1*b97391a6SBinbin Zhou /* SPDX-License-Identifier: GPL-2.0-only */ 2*b97391a6SBinbin Zhou /* 3*b97391a6SBinbin Zhou * Copyright Openedhand Ltd. 4*b97391a6SBinbin Zhou * 5*b97391a6SBinbin Zhou * Author: Richard Purdie <richard@openedhand.com> 6*b97391a6SBinbin Zhou * Binbin Zhou <zhoubinbin@loongson.cn> 7*b97391a6SBinbin Zhou * 8*b97391a6SBinbin Zhou */ 9*b97391a6SBinbin Zhou 10*b97391a6SBinbin Zhou #ifndef _ES8323_H 11*b97391a6SBinbin Zhou #define _ES8323_H 12*b97391a6SBinbin Zhou 13*b97391a6SBinbin Zhou /* ES8323 register space */ 14*b97391a6SBinbin Zhou 15*b97391a6SBinbin Zhou /* Chip Control and Power Management */ 16*b97391a6SBinbin Zhou #define ES8323_CONTROL1 0x00 17*b97391a6SBinbin Zhou #define ES8323_CONTROL2 0x01 18*b97391a6SBinbin Zhou #define ES8323_CHIPPOWER 0x02 19*b97391a6SBinbin Zhou #define ES8323_ADCPOWER 0x03 20*b97391a6SBinbin Zhou #define ES8323_DACPOWER 0x04 21*b97391a6SBinbin Zhou #define ES8323_CHIPLOPOW1 0x05 22*b97391a6SBinbin Zhou #define ES8323_CHIPLOPOW2 0x06 23*b97391a6SBinbin Zhou #define ES8323_ANAVOLMANAG 0x07 24*b97391a6SBinbin Zhou #define ES8323_MASTERMODE 0x08 25*b97391a6SBinbin Zhou 26*b97391a6SBinbin Zhou /* ADC Control */ 27*b97391a6SBinbin Zhou #define ES8323_ADCCONTROL1 0x09 28*b97391a6SBinbin Zhou #define ES8323_ADCCONTROL2 0x0a 29*b97391a6SBinbin Zhou #define ES8323_ADCCONTROL3 0x0b 30*b97391a6SBinbin Zhou #define ES8323_ADCCONTROL4 0x0c 31*b97391a6SBinbin Zhou #define ES8323_ADCCONTROL5 0x0d 32*b97391a6SBinbin Zhou #define ES8323_ADCCONTROL6 0x0e 33*b97391a6SBinbin Zhou #define ES8323_ADC_MUTE 0x0f 34*b97391a6SBinbin Zhou #define ES8323_LADC_VOL 0x10 35*b97391a6SBinbin Zhou #define ES8323_RADC_VOL 0x11 36*b97391a6SBinbin Zhou #define ES8323_ADCCONTROL10 0x12 37*b97391a6SBinbin Zhou #define ES8323_ADCCONTROL11 0x13 38*b97391a6SBinbin Zhou #define ES8323_ADCCONTROL12 0x14 39*b97391a6SBinbin Zhou #define ES8323_ADCCONTROL13 0x15 40*b97391a6SBinbin Zhou #define ES8323_ADCCONTROL14 0x16 41*b97391a6SBinbin Zhou 42*b97391a6SBinbin Zhou /* DAC Control */ 43*b97391a6SBinbin Zhou #define ES8323_DACCONTROL1 0x17 44*b97391a6SBinbin Zhou #define ES8323_DACCONTROL2 0x18 45*b97391a6SBinbin Zhou #define ES8323_DAC_MUTE 0x19 46*b97391a6SBinbin Zhou #define ES8323_LDAC_VOL 0x1a 47*b97391a6SBinbin Zhou #define ES8323_RDAC_VOL 0x1b 48*b97391a6SBinbin Zhou #define ES8323_DACCONTROL6 0x1c 49*b97391a6SBinbin Zhou #define ES8323_DACCONTROL7 0x1d 50*b97391a6SBinbin Zhou #define ES8323_DACCONTROL8 0x1e 51*b97391a6SBinbin Zhou #define ES8323_DACCONTROL9 0x1f 52*b97391a6SBinbin Zhou #define ES8323_DACCONTROL10 0x20 53*b97391a6SBinbin Zhou #define ES8323_DACCONTROL11 0x21 54*b97391a6SBinbin Zhou #define ES8323_DACCONTROL12 0x22 55*b97391a6SBinbin Zhou #define ES8323_DACCONTROL13 0x23 56*b97391a6SBinbin Zhou #define ES8323_DACCONTROL14 0x24 57*b97391a6SBinbin Zhou #define ES8323_DACCONTROL15 0x25 58*b97391a6SBinbin Zhou #define ES8323_DACCONTROL16 0x26 59*b97391a6SBinbin Zhou #define ES8323_DACCONTROL17 0x27 60*b97391a6SBinbin Zhou #define ES8323_DACCONTROL18 0x28 61*b97391a6SBinbin Zhou #define ES8323_DACCONTROL19 0x29 62*b97391a6SBinbin Zhou #define ES8323_DACCONTROL20 0x2a 63*b97391a6SBinbin Zhou #define ES8323_DACCONTROL21 0x2b 64*b97391a6SBinbin Zhou #define ES8323_DACCONTROL22 0x2c 65*b97391a6SBinbin Zhou #define ES8323_DACCONTROL23 0x2d 66*b97391a6SBinbin Zhou #define ES8323_LOUT1_VOL 0x2e 67*b97391a6SBinbin Zhou #define ES8323_ROUT1_VOL 0x2f 68*b97391a6SBinbin Zhou #define ES8323_LOUT2_VOL 0x30 69*b97391a6SBinbin Zhou #define ES8323_ROUT2_VOL 0x31 70*b97391a6SBinbin Zhou #define ES8323_DACCONTROL28 0x32 71*b97391a6SBinbin Zhou #define ES8323_DACCONTROL29 0x33 72*b97391a6SBinbin Zhou #define ES8323_DACCONTROL30 0x34 73*b97391a6SBinbin Zhou 74*b97391a6SBinbin Zhou #define ES8323_ADC_IFACE ES8323_ADCCONTROL4 75*b97391a6SBinbin Zhou #define ES8323_ADC_SRATE ES8323_ADCCONTROL5 76*b97391a6SBinbin Zhou #define ES8323_DAC_IFACE ES8323_DACCONTROL1 77*b97391a6SBinbin Zhou #define ES8323_DAC_SRATE ES8323_DACCONTROL2 78*b97391a6SBinbin Zhou #endif 79