1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * DA7213 ALSA SoC Codec Driver 4 * 5 * Copyright (c) 2013 Dialog Semiconductor 6 * 7 * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> 8 * Based on DA9055 ALSA SoC codec driver. 9 */ 10 11 #include <linux/acpi.h> 12 #include <linux/of.h> 13 #include <linux/property.h> 14 #include <linux/clk.h> 15 #include <linux/delay.h> 16 #include <linux/i2c.h> 17 #include <linux/regmap.h> 18 #include <linux/slab.h> 19 #include <linux/module.h> 20 #include <sound/pcm.h> 21 #include <sound/pcm_params.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/units.h> 24 #include <sound/soc.h> 25 #include <sound/initval.h> 26 #include <sound/tlv.h> 27 28 #include <sound/da7213.h> 29 #include "da7213.h" 30 31 32 /* Gain and Volume */ 33 static const DECLARE_TLV_DB_RANGE(aux_vol_tlv, 34 /* -54dB */ 35 0x0, 0x11, TLV_DB_SCALE_ITEM(-5400, 0, 0), 36 /* -52.5dB to 15dB */ 37 0x12, 0x3f, TLV_DB_SCALE_ITEM(-5250, 150, 0) 38 ); 39 40 static const DECLARE_TLV_DB_RANGE(digital_gain_tlv, 41 0x0, 0x07, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1), 42 /* -78dB to 12dB */ 43 0x08, 0x7f, TLV_DB_SCALE_ITEM(-7800, 75, 0) 44 ); 45 46 static const DECLARE_TLV_DB_RANGE(alc_analog_gain_tlv, 47 0x0, 0x0, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1), 48 /* 0dB to 36dB */ 49 0x01, 0x07, TLV_DB_SCALE_ITEM(0, 600, 0) 50 ); 51 52 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0); 53 static const DECLARE_TLV_DB_SCALE(mixin_gain_tlv, -450, 150, 0); 54 static const DECLARE_TLV_DB_SCALE(eq_gain_tlv, -1050, 150, 0); 55 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -5700, 100, 0); 56 static const DECLARE_TLV_DB_SCALE(lineout_vol_tlv, -4800, 100, 0); 57 static const DECLARE_TLV_DB_SCALE(alc_threshold_tlv, -9450, 150, 0); 58 static const DECLARE_TLV_DB_SCALE(alc_gain_tlv, 0, 600, 0); 59 static const DECLARE_TLV_DB_SCALE(da7213_tonegen_gain_tlv, -4500, 300, 0); 60 61 /* ADC and DAC voice mode (8kHz) high pass cutoff value */ 62 static const char * const da7213_voice_hpf_corner_txt[] = { 63 "2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz" 64 }; 65 66 static SOC_ENUM_SINGLE_DECL(da7213_dac_voice_hpf_corner, 67 DA7213_DAC_FILTERS1, 68 DA7213_VOICE_HPF_CORNER_SHIFT, 69 da7213_voice_hpf_corner_txt); 70 71 static SOC_ENUM_SINGLE_DECL(da7213_adc_voice_hpf_corner, 72 DA7213_ADC_FILTERS1, 73 DA7213_VOICE_HPF_CORNER_SHIFT, 74 da7213_voice_hpf_corner_txt); 75 76 /* ADC and DAC high pass filter cutoff value */ 77 static const char * const da7213_audio_hpf_corner_txt[] = { 78 "Fs/24000", "Fs/12000", "Fs/6000", "Fs/3000" 79 }; 80 81 static SOC_ENUM_SINGLE_DECL(da7213_dac_audio_hpf_corner, 82 DA7213_DAC_FILTERS1 83 , DA7213_AUDIO_HPF_CORNER_SHIFT, 84 da7213_audio_hpf_corner_txt); 85 86 static SOC_ENUM_SINGLE_DECL(da7213_adc_audio_hpf_corner, 87 DA7213_ADC_FILTERS1, 88 DA7213_AUDIO_HPF_CORNER_SHIFT, 89 da7213_audio_hpf_corner_txt); 90 91 static const char * const da7213_tonegen_dtmf_key_txt[] = { 92 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "A", "B", "C", "D", 93 "*", "#" 94 }; 95 96 static const struct soc_enum da7213_tonegen_dtmf_key = 97 SOC_ENUM_SINGLE(DA7213_TONE_GEN_CFG1, DA7213_DTMF_REG_SHIFT, 98 DA7213_DTMF_REG_MAX, da7213_tonegen_dtmf_key_txt); 99 100 static const char * const da7213_tonegen_swg_sel_txt[] = { 101 "Sum", "SWG1", "SWG2", "Sum" 102 }; 103 104 static const struct soc_enum da7213_tonegen_swg_sel = 105 SOC_ENUM_SINGLE(DA7213_TONE_GEN_CFG2, DA7213_SWG_SEL_SHIFT, 106 DA7213_SWG_SEL_MAX, da7213_tonegen_swg_sel_txt); 107 108 /* Gain ramping rate value */ 109 static const char * const da7213_gain_ramp_rate_txt[] = { 110 "nominal rate * 8", "nominal rate * 16", "nominal rate / 16", 111 "nominal rate / 32" 112 }; 113 114 static SOC_ENUM_SINGLE_DECL(da7213_gain_ramp_rate, 115 DA7213_GAIN_RAMP_CTRL, 116 DA7213_GAIN_RAMP_RATE_SHIFT, 117 da7213_gain_ramp_rate_txt); 118 119 /* DAC noise gate setup time value */ 120 static const char * const da7213_dac_ng_setup_time_txt[] = { 121 "256 samples", "512 samples", "1024 samples", "2048 samples" 122 }; 123 124 static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_setup_time, 125 DA7213_DAC_NG_SETUP_TIME, 126 DA7213_DAC_NG_SETUP_TIME_SHIFT, 127 da7213_dac_ng_setup_time_txt); 128 129 /* DAC noise gate rampup rate value */ 130 static const char * const da7213_dac_ng_rampup_txt[] = { 131 "0.02 ms/dB", "0.16 ms/dB" 132 }; 133 134 static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampup_rate, 135 DA7213_DAC_NG_SETUP_TIME, 136 DA7213_DAC_NG_RAMPUP_RATE_SHIFT, 137 da7213_dac_ng_rampup_txt); 138 139 /* DAC noise gate rampdown rate value */ 140 static const char * const da7213_dac_ng_rampdown_txt[] = { 141 "0.64 ms/dB", "20.48 ms/dB" 142 }; 143 144 static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampdown_rate, 145 DA7213_DAC_NG_SETUP_TIME, 146 DA7213_DAC_NG_RAMPDN_RATE_SHIFT, 147 da7213_dac_ng_rampdown_txt); 148 149 /* DAC soft mute rate value */ 150 static const char * const da7213_dac_soft_mute_rate_txt[] = { 151 "1", "2", "4", "8", "16", "32", "64" 152 }; 153 154 static SOC_ENUM_SINGLE_DECL(da7213_dac_soft_mute_rate, 155 DA7213_DAC_FILTERS5, 156 DA7213_DAC_SOFTMUTE_RATE_SHIFT, 157 da7213_dac_soft_mute_rate_txt); 158 159 /* ALC Attack Rate select */ 160 static const char * const da7213_alc_attack_rate_txt[] = { 161 "44/fs", "88/fs", "176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs", 162 "5632/fs", "11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs" 163 }; 164 165 static SOC_ENUM_SINGLE_DECL(da7213_alc_attack_rate, 166 DA7213_ALC_CTRL2, 167 DA7213_ALC_ATTACK_SHIFT, 168 da7213_alc_attack_rate_txt); 169 170 /* ALC Release Rate select */ 171 static const char * const da7213_alc_release_rate_txt[] = { 172 "176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs", "5632/fs", 173 "11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs" 174 }; 175 176 static SOC_ENUM_SINGLE_DECL(da7213_alc_release_rate, 177 DA7213_ALC_CTRL2, 178 DA7213_ALC_RELEASE_SHIFT, 179 da7213_alc_release_rate_txt); 180 181 /* ALC Hold Time select */ 182 static const char * const da7213_alc_hold_time_txt[] = { 183 "62/fs", "124/fs", "248/fs", "496/fs", "992/fs", "1984/fs", "3968/fs", 184 "7936/fs", "15872/fs", "31744/fs", "63488/fs", "126976/fs", 185 "253952/fs", "507904/fs", "1015808/fs", "2031616/fs" 186 }; 187 188 static SOC_ENUM_SINGLE_DECL(da7213_alc_hold_time, 189 DA7213_ALC_CTRL3, 190 DA7213_ALC_HOLD_SHIFT, 191 da7213_alc_hold_time_txt); 192 193 /* ALC Input Signal Tracking rate select */ 194 static const char * const da7213_alc_integ_rate_txt[] = { 195 "1/4", "1/16", "1/256", "1/65536" 196 }; 197 198 static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_attack_rate, 199 DA7213_ALC_CTRL3, 200 DA7213_ALC_INTEG_ATTACK_SHIFT, 201 da7213_alc_integ_rate_txt); 202 203 static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_release_rate, 204 DA7213_ALC_CTRL3, 205 DA7213_ALC_INTEG_RELEASE_SHIFT, 206 da7213_alc_integ_rate_txt); 207 208 209 /* 210 * Control Functions 211 */ 212 213 /* Locked Kcontrol calls */ 214 static int da7213_volsw_locked_get(struct snd_kcontrol *kcontrol, 215 struct snd_ctl_elem_value *ucontrol) 216 { 217 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 218 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 219 int ret; 220 221 mutex_lock(&da7213->ctrl_lock); 222 ret = snd_soc_get_volsw(kcontrol, ucontrol); 223 mutex_unlock(&da7213->ctrl_lock); 224 225 return ret; 226 } 227 228 static int da7213_volsw_locked_put(struct snd_kcontrol *kcontrol, 229 struct snd_ctl_elem_value *ucontrol) 230 { 231 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 232 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 233 int ret; 234 235 mutex_lock(&da7213->ctrl_lock); 236 ret = snd_soc_put_volsw(kcontrol, ucontrol); 237 mutex_unlock(&da7213->ctrl_lock); 238 239 return ret; 240 } 241 242 static int da7213_enum_locked_get(struct snd_kcontrol *kcontrol, 243 struct snd_ctl_elem_value *ucontrol) 244 { 245 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 246 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 247 int ret; 248 249 mutex_lock(&da7213->ctrl_lock); 250 ret = snd_soc_get_enum_double(kcontrol, ucontrol); 251 mutex_unlock(&da7213->ctrl_lock); 252 253 return ret; 254 } 255 256 static int da7213_enum_locked_put(struct snd_kcontrol *kcontrol, 257 struct snd_ctl_elem_value *ucontrol) 258 { 259 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 260 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 261 int ret; 262 263 mutex_lock(&da7213->ctrl_lock); 264 ret = snd_soc_put_enum_double(kcontrol, ucontrol); 265 mutex_unlock(&da7213->ctrl_lock); 266 267 return ret; 268 } 269 270 /* ALC */ 271 static int da7213_get_alc_data(struct snd_soc_component *component, u8 reg_val) 272 { 273 int mid_data, top_data; 274 int sum = 0; 275 u8 iteration; 276 277 for (iteration = 0; iteration < DA7213_ALC_AVG_ITERATIONS; 278 iteration++) { 279 /* Select the left or right channel and capture data */ 280 snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL, reg_val); 281 282 /* Select middle 8 bits for read back from data register */ 283 snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL, 284 reg_val | DA7213_ALC_DATA_MIDDLE); 285 mid_data = snd_soc_component_read(component, DA7213_ALC_CIC_OP_LVL_DATA); 286 287 /* Select top 8 bits for read back from data register */ 288 snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL, 289 reg_val | DA7213_ALC_DATA_TOP); 290 top_data = snd_soc_component_read(component, DA7213_ALC_CIC_OP_LVL_DATA); 291 292 sum += ((mid_data << 8) | (top_data << 16)); 293 } 294 295 return sum / DA7213_ALC_AVG_ITERATIONS; 296 } 297 298 static void da7213_alc_calib_man(struct snd_soc_component *component) 299 { 300 u8 reg_val; 301 int avg_left_data, avg_right_data, offset_l, offset_r; 302 303 /* Calculate average for Left and Right data */ 304 /* Left Data */ 305 avg_left_data = da7213_get_alc_data(component, 306 DA7213_ALC_CIC_OP_CHANNEL_LEFT); 307 /* Right Data */ 308 avg_right_data = da7213_get_alc_data(component, 309 DA7213_ALC_CIC_OP_CHANNEL_RIGHT); 310 311 /* Calculate DC offset */ 312 offset_l = -avg_left_data; 313 offset_r = -avg_right_data; 314 315 reg_val = (offset_l & DA7213_ALC_OFFSET_15_8) >> 8; 316 snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_M_L, reg_val); 317 reg_val = (offset_l & DA7213_ALC_OFFSET_19_16) >> 16; 318 snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_U_L, reg_val); 319 320 reg_val = (offset_r & DA7213_ALC_OFFSET_15_8) >> 8; 321 snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_M_R, reg_val); 322 reg_val = (offset_r & DA7213_ALC_OFFSET_19_16) >> 16; 323 snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_U_R, reg_val); 324 325 /* Enable analog/digital gain mode & offset cancellation */ 326 snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, 327 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE, 328 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE); 329 } 330 331 static void da7213_alc_calib_auto(struct snd_soc_component *component) 332 { 333 u8 alc_ctrl1; 334 335 /* Begin auto calibration and wait for completion */ 336 snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, DA7213_ALC_AUTO_CALIB_EN, 337 DA7213_ALC_AUTO_CALIB_EN); 338 do { 339 alc_ctrl1 = snd_soc_component_read(component, DA7213_ALC_CTRL1); 340 } while (alc_ctrl1 & DA7213_ALC_AUTO_CALIB_EN); 341 342 /* If auto calibration fails, fall back to digital gain only mode */ 343 if (alc_ctrl1 & DA7213_ALC_CALIB_OVERFLOW) { 344 dev_warn(component->dev, 345 "ALC auto calibration failed with overflow\n"); 346 snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, 347 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE, 348 0); 349 } else { 350 /* Enable analog/digital gain mode & offset cancellation */ 351 snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, 352 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE, 353 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE); 354 } 355 356 } 357 358 static void da7213_alc_calib(struct snd_soc_component *component) 359 { 360 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 361 u8 adc_l_ctrl, adc_r_ctrl; 362 u8 mixin_l_sel, mixin_r_sel; 363 u8 mic_1_ctrl, mic_2_ctrl; 364 365 /* Save current values from ADC control registers */ 366 adc_l_ctrl = snd_soc_component_read(component, DA7213_ADC_L_CTRL); 367 adc_r_ctrl = snd_soc_component_read(component, DA7213_ADC_R_CTRL); 368 369 /* Save current values from MIXIN_L/R_SELECT registers */ 370 mixin_l_sel = snd_soc_component_read(component, DA7213_MIXIN_L_SELECT); 371 mixin_r_sel = snd_soc_component_read(component, DA7213_MIXIN_R_SELECT); 372 373 /* Save current values from MIC control registers */ 374 mic_1_ctrl = snd_soc_component_read(component, DA7213_MIC_1_CTRL); 375 mic_2_ctrl = snd_soc_component_read(component, DA7213_MIC_2_CTRL); 376 377 /* Enable ADC Left and Right */ 378 snd_soc_component_update_bits(component, DA7213_ADC_L_CTRL, DA7213_ADC_EN, 379 DA7213_ADC_EN); 380 snd_soc_component_update_bits(component, DA7213_ADC_R_CTRL, DA7213_ADC_EN, 381 DA7213_ADC_EN); 382 383 /* Enable MIC paths */ 384 snd_soc_component_update_bits(component, DA7213_MIXIN_L_SELECT, 385 DA7213_MIXIN_L_MIX_SELECT_MIC_1 | 386 DA7213_MIXIN_L_MIX_SELECT_MIC_2, 387 DA7213_MIXIN_L_MIX_SELECT_MIC_1 | 388 DA7213_MIXIN_L_MIX_SELECT_MIC_2); 389 snd_soc_component_update_bits(component, DA7213_MIXIN_R_SELECT, 390 DA7213_MIXIN_R_MIX_SELECT_MIC_2 | 391 DA7213_MIXIN_R_MIX_SELECT_MIC_1, 392 DA7213_MIXIN_R_MIX_SELECT_MIC_2 | 393 DA7213_MIXIN_R_MIX_SELECT_MIC_1); 394 395 /* Mute MIC PGAs */ 396 snd_soc_component_update_bits(component, DA7213_MIC_1_CTRL, DA7213_MUTE_EN, 397 DA7213_MUTE_EN); 398 snd_soc_component_update_bits(component, DA7213_MIC_2_CTRL, DA7213_MUTE_EN, 399 DA7213_MUTE_EN); 400 401 /* Perform calibration */ 402 if (da7213->alc_calib_auto) 403 da7213_alc_calib_auto(component); 404 else 405 da7213_alc_calib_man(component); 406 407 /* Restore MIXIN_L/R_SELECT registers to their original states */ 408 snd_soc_component_write(component, DA7213_MIXIN_L_SELECT, mixin_l_sel); 409 snd_soc_component_write(component, DA7213_MIXIN_R_SELECT, mixin_r_sel); 410 411 /* Restore ADC control registers to their original states */ 412 snd_soc_component_write(component, DA7213_ADC_L_CTRL, adc_l_ctrl); 413 snd_soc_component_write(component, DA7213_ADC_R_CTRL, adc_r_ctrl); 414 415 /* Restore original values of MIC control registers */ 416 snd_soc_component_write(component, DA7213_MIC_1_CTRL, mic_1_ctrl); 417 snd_soc_component_write(component, DA7213_MIC_2_CTRL, mic_2_ctrl); 418 } 419 420 static int da7213_put_mixin_gain(struct snd_kcontrol *kcontrol, 421 struct snd_ctl_elem_value *ucontrol) 422 { 423 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 424 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 425 int ret; 426 427 ret = snd_soc_put_volsw_2r(kcontrol, ucontrol); 428 429 /* If ALC in operation, make sure calibrated offsets are updated */ 430 if ((!ret) && (da7213->alc_en)) 431 da7213_alc_calib(component); 432 433 return ret; 434 } 435 436 static int da7213_put_alc_sw(struct snd_kcontrol *kcontrol, 437 struct snd_ctl_elem_value *ucontrol) 438 { 439 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 440 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 441 442 /* Force ALC offset calibration if enabling ALC */ 443 if (ucontrol->value.integer.value[0] || 444 ucontrol->value.integer.value[1]) { 445 if (!da7213->alc_en) { 446 da7213_alc_calib(component); 447 da7213->alc_en = true; 448 } 449 } else { 450 da7213->alc_en = false; 451 } 452 453 return snd_soc_put_volsw(kcontrol, ucontrol); 454 } 455 456 /* ToneGen */ 457 static int da7213_tonegen_freq_get(struct snd_kcontrol *kcontrol, 458 struct snd_ctl_elem_value *ucontrol) 459 { 460 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 461 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 462 struct soc_mixer_control *mixer_ctrl = 463 (struct soc_mixer_control *) kcontrol->private_value; 464 unsigned int reg = mixer_ctrl->reg; 465 __le16 val; 466 int ret; 467 468 mutex_lock(&da7213->ctrl_lock); 469 ret = regmap_raw_read(da7213->regmap, reg, &val, sizeof(val)); 470 mutex_unlock(&da7213->ctrl_lock); 471 472 if (ret) 473 return ret; 474 475 /* 476 * Frequency value spans two 8-bit registers, lower then upper byte. 477 * Therefore we need to convert to host endianness here. 478 */ 479 ucontrol->value.integer.value[0] = le16_to_cpu(val); 480 481 return 0; 482 } 483 484 static int da7213_tonegen_freq_put(struct snd_kcontrol *kcontrol, 485 struct snd_ctl_elem_value *ucontrol) 486 { 487 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 488 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 489 struct soc_mixer_control *mixer_ctrl = 490 (struct soc_mixer_control *) kcontrol->private_value; 491 unsigned int reg = mixer_ctrl->reg; 492 __le16 val_new, val_old; 493 int ret; 494 495 /* 496 * Frequency value spans two 8-bit registers, lower then upper byte. 497 * Therefore we need to convert to little endian here to align with 498 * HW registers. 499 */ 500 val_new = cpu_to_le16(ucontrol->value.integer.value[0]); 501 502 mutex_lock(&da7213->ctrl_lock); 503 ret = regmap_raw_read(da7213->regmap, reg, &val_old, sizeof(val_old)); 504 if (ret == 0 && (val_old != val_new)) 505 ret = regmap_raw_write(da7213->regmap, reg, 506 &val_new, sizeof(val_new)); 507 mutex_unlock(&da7213->ctrl_lock); 508 509 if (ret < 0) 510 return ret; 511 512 return val_old != val_new; 513 } 514 515 /* 516 * KControls 517 */ 518 519 static const struct snd_kcontrol_new da7213_snd_controls[] = { 520 521 /* Volume controls */ 522 SOC_SINGLE_TLV("Mic 1 Volume", DA7213_MIC_1_GAIN, 523 DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX, 524 DA7213_NO_INVERT, mic_vol_tlv), 525 SOC_SINGLE_TLV("Mic 2 Volume", DA7213_MIC_2_GAIN, 526 DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX, 527 DA7213_NO_INVERT, mic_vol_tlv), 528 SOC_DOUBLE_R_TLV("Aux Volume", DA7213_AUX_L_GAIN, DA7213_AUX_R_GAIN, 529 DA7213_AUX_AMP_GAIN_SHIFT, DA7213_AUX_AMP_GAIN_MAX, 530 DA7213_NO_INVERT, aux_vol_tlv), 531 SOC_DOUBLE_R_EXT_TLV("Mixin PGA Volume", DA7213_MIXIN_L_GAIN, 532 DA7213_MIXIN_R_GAIN, DA7213_MIXIN_AMP_GAIN_SHIFT, 533 DA7213_MIXIN_AMP_GAIN_MAX, DA7213_NO_INVERT, 534 snd_soc_get_volsw_2r, da7213_put_mixin_gain, 535 mixin_gain_tlv), 536 SOC_DOUBLE_R_TLV("ADC Volume", DA7213_ADC_L_GAIN, DA7213_ADC_R_GAIN, 537 DA7213_ADC_AMP_GAIN_SHIFT, DA7213_ADC_AMP_GAIN_MAX, 538 DA7213_NO_INVERT, digital_gain_tlv), 539 SOC_DOUBLE_R_TLV("DAC Volume", DA7213_DAC_L_GAIN, DA7213_DAC_R_GAIN, 540 DA7213_DAC_AMP_GAIN_SHIFT, DA7213_DAC_AMP_GAIN_MAX, 541 DA7213_NO_INVERT, digital_gain_tlv), 542 SOC_DOUBLE_R_TLV("Headphone Volume", DA7213_HP_L_GAIN, DA7213_HP_R_GAIN, 543 DA7213_HP_AMP_GAIN_SHIFT, DA7213_HP_AMP_GAIN_MAX, 544 DA7213_NO_INVERT, hp_vol_tlv), 545 SOC_SINGLE_TLV("Lineout Volume", DA7213_LINE_GAIN, 546 DA7213_LINE_AMP_GAIN_SHIFT, DA7213_LINE_AMP_GAIN_MAX, 547 DA7213_NO_INVERT, lineout_vol_tlv), 548 549 /* DAC Equalizer controls */ 550 SOC_SINGLE("DAC EQ Switch", DA7213_DAC_FILTERS4, DA7213_DAC_EQ_EN_SHIFT, 551 DA7213_DAC_EQ_EN_MAX, DA7213_NO_INVERT), 552 SOC_SINGLE_TLV("DAC EQ1 Volume", DA7213_DAC_FILTERS2, 553 DA7213_DAC_EQ_BAND1_SHIFT, DA7213_DAC_EQ_BAND_MAX, 554 DA7213_NO_INVERT, eq_gain_tlv), 555 SOC_SINGLE_TLV("DAC EQ2 Volume", DA7213_DAC_FILTERS2, 556 DA7213_DAC_EQ_BAND2_SHIFT, DA7213_DAC_EQ_BAND_MAX, 557 DA7213_NO_INVERT, eq_gain_tlv), 558 SOC_SINGLE_TLV("DAC EQ3 Volume", DA7213_DAC_FILTERS3, 559 DA7213_DAC_EQ_BAND3_SHIFT, DA7213_DAC_EQ_BAND_MAX, 560 DA7213_NO_INVERT, eq_gain_tlv), 561 SOC_SINGLE_TLV("DAC EQ4 Volume", DA7213_DAC_FILTERS3, 562 DA7213_DAC_EQ_BAND4_SHIFT, DA7213_DAC_EQ_BAND_MAX, 563 DA7213_NO_INVERT, eq_gain_tlv), 564 SOC_SINGLE_TLV("DAC EQ5 Volume", DA7213_DAC_FILTERS4, 565 DA7213_DAC_EQ_BAND5_SHIFT, DA7213_DAC_EQ_BAND_MAX, 566 DA7213_NO_INVERT, eq_gain_tlv), 567 568 /* High Pass Filter and Voice Mode controls */ 569 SOC_SINGLE("ADC HPF Switch", DA7213_ADC_FILTERS1, DA7213_HPF_EN_SHIFT, 570 DA7213_HPF_EN_MAX, DA7213_NO_INVERT), 571 SOC_ENUM("ADC HPF Cutoff", da7213_adc_audio_hpf_corner), 572 SOC_SINGLE("ADC Voice Mode Switch", DA7213_ADC_FILTERS1, 573 DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX, 574 DA7213_NO_INVERT), 575 SOC_ENUM("ADC Voice Cutoff", da7213_adc_voice_hpf_corner), 576 577 SOC_SINGLE("DAC HPF Switch", DA7213_DAC_FILTERS1, DA7213_HPF_EN_SHIFT, 578 DA7213_HPF_EN_MAX, DA7213_NO_INVERT), 579 SOC_ENUM("DAC HPF Cutoff", da7213_dac_audio_hpf_corner), 580 SOC_SINGLE("DAC Voice Mode Switch", DA7213_DAC_FILTERS1, 581 DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX, 582 DA7213_NO_INVERT), 583 SOC_ENUM("DAC Voice Cutoff", da7213_dac_voice_hpf_corner), 584 585 /* Mute controls */ 586 SOC_SINGLE("Mic 1 Switch", DA7213_MIC_1_CTRL, DA7213_MUTE_EN_SHIFT, 587 DA7213_MUTE_EN_MAX, DA7213_INVERT), 588 SOC_SINGLE("Mic 2 Switch", DA7213_MIC_2_CTRL, DA7213_MUTE_EN_SHIFT, 589 DA7213_MUTE_EN_MAX, DA7213_INVERT), 590 SOC_DOUBLE_R("Aux Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL, 591 DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT), 592 SOC_DOUBLE_R("Mixin PGA Switch", DA7213_MIXIN_L_CTRL, 593 DA7213_MIXIN_R_CTRL, DA7213_MUTE_EN_SHIFT, 594 DA7213_MUTE_EN_MAX, DA7213_INVERT), 595 SOC_DOUBLE_R("ADC Switch", DA7213_ADC_L_CTRL, DA7213_ADC_R_CTRL, 596 DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT), 597 SOC_DOUBLE_R("Headphone Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL, 598 DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT), 599 SOC_SINGLE("Lineout Switch", DA7213_LINE_CTRL, DA7213_MUTE_EN_SHIFT, 600 DA7213_MUTE_EN_MAX, DA7213_INVERT), 601 SOC_SINGLE("DAC Soft Mute Switch", DA7213_DAC_FILTERS5, 602 DA7213_DAC_SOFTMUTE_EN_SHIFT, DA7213_DAC_SOFTMUTE_EN_MAX, 603 DA7213_NO_INVERT), 604 SOC_ENUM("DAC Soft Mute Rate", da7213_dac_soft_mute_rate), 605 606 /* Zero Cross controls */ 607 SOC_DOUBLE_R("Aux ZC Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL, 608 DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT), 609 SOC_DOUBLE_R("Mixin PGA ZC Switch", DA7213_MIXIN_L_CTRL, 610 DA7213_MIXIN_R_CTRL, DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, 611 DA7213_NO_INVERT), 612 SOC_DOUBLE_R("Headphone ZC Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL, 613 DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT), 614 615 /* Tone Generator */ 616 SOC_SINGLE_EXT_TLV("ToneGen Volume", DA7213_TONE_GEN_CFG2, 617 DA7213_TONE_GEN_GAIN_SHIFT, DA7213_TONE_GEN_GAIN_MAX, 618 DA7213_NO_INVERT, da7213_volsw_locked_get, 619 da7213_volsw_locked_put, da7213_tonegen_gain_tlv), 620 SOC_ENUM_EXT("ToneGen DTMF Key", da7213_tonegen_dtmf_key, 621 da7213_enum_locked_get, da7213_enum_locked_put), 622 SOC_SINGLE_EXT("ToneGen DTMF Switch", DA7213_TONE_GEN_CFG1, 623 DA7213_DTMF_EN_SHIFT, DA7213_SWITCH_EN_MAX, 624 DA7213_NO_INVERT, da7213_volsw_locked_get, 625 da7213_volsw_locked_put), 626 SOC_SINGLE_EXT("ToneGen Start", DA7213_TONE_GEN_CFG1, 627 DA7213_START_STOPN_SHIFT, DA7213_SWITCH_EN_MAX, 628 DA7213_NO_INVERT, da7213_volsw_locked_get, 629 da7213_volsw_locked_put), 630 SOC_ENUM_EXT("ToneGen Sinewave Gen Type", da7213_tonegen_swg_sel, 631 da7213_enum_locked_get, da7213_enum_locked_put), 632 SOC_SINGLE_EXT("ToneGen Sinewave1 Freq", DA7213_TONE_GEN_FREQ1_L, 633 DA7213_FREQ1_L_SHIFT, DA7213_FREQ_MAX, DA7213_NO_INVERT, 634 da7213_tonegen_freq_get, da7213_tonegen_freq_put), 635 SOC_SINGLE_EXT("ToneGen Sinewave2 Freq", DA7213_TONE_GEN_FREQ2_L, 636 DA7213_FREQ2_L_SHIFT, DA7213_FREQ_MAX, DA7213_NO_INVERT, 637 da7213_tonegen_freq_get, da7213_tonegen_freq_put), 638 SOC_SINGLE_EXT("ToneGen On Time", DA7213_TONE_GEN_ON_PER, 639 DA7213_BEEP_ON_PER_SHIFT, DA7213_BEEP_ON_OFF_MAX, 640 DA7213_NO_INVERT, da7213_volsw_locked_get, 641 da7213_volsw_locked_put), 642 SOC_SINGLE("ToneGen Off Time", DA7213_TONE_GEN_OFF_PER, 643 DA7213_BEEP_OFF_PER_SHIFT, DA7213_BEEP_ON_OFF_MAX, 644 DA7213_NO_INVERT), 645 646 /* Gain Ramping controls */ 647 SOC_DOUBLE_R("Aux Gain Ramping Switch", DA7213_AUX_L_CTRL, 648 DA7213_AUX_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT, 649 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT), 650 SOC_DOUBLE_R("Mixin Gain Ramping Switch", DA7213_MIXIN_L_CTRL, 651 DA7213_MIXIN_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT, 652 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT), 653 SOC_DOUBLE_R("ADC Gain Ramping Switch", DA7213_ADC_L_CTRL, 654 DA7213_ADC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT, 655 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT), 656 SOC_DOUBLE_R("DAC Gain Ramping Switch", DA7213_DAC_L_CTRL, 657 DA7213_DAC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT, 658 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT), 659 SOC_DOUBLE_R("Headphone Gain Ramping Switch", DA7213_HP_L_CTRL, 660 DA7213_HP_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT, 661 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT), 662 SOC_SINGLE("Lineout Gain Ramping Switch", DA7213_LINE_CTRL, 663 DA7213_GAIN_RAMP_EN_SHIFT, DA7213_GAIN_RAMP_EN_MAX, 664 DA7213_NO_INVERT), 665 SOC_ENUM("Gain Ramping Rate", da7213_gain_ramp_rate), 666 667 /* DAC Noise Gate controls */ 668 SOC_SINGLE("DAC NG Switch", DA7213_DAC_NG_CTRL, DA7213_DAC_NG_EN_SHIFT, 669 DA7213_DAC_NG_EN_MAX, DA7213_NO_INVERT), 670 SOC_ENUM("DAC NG Setup Time", da7213_dac_ng_setup_time), 671 SOC_ENUM("DAC NG Rampup Rate", da7213_dac_ng_rampup_rate), 672 SOC_ENUM("DAC NG Rampdown Rate", da7213_dac_ng_rampdown_rate), 673 SOC_SINGLE("DAC NG OFF Threshold", DA7213_DAC_NG_OFF_THRESHOLD, 674 DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX, 675 DA7213_NO_INVERT), 676 SOC_SINGLE("DAC NG ON Threshold", DA7213_DAC_NG_ON_THRESHOLD, 677 DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX, 678 DA7213_NO_INVERT), 679 680 /* DAC Routing & Inversion */ 681 SOC_DOUBLE("DAC Mono Switch", DA7213_DIG_ROUTING_DAC, 682 DA7213_DAC_L_MONO_SHIFT, DA7213_DAC_R_MONO_SHIFT, 683 DA7213_DAC_MONO_MAX, DA7213_NO_INVERT), 684 SOC_DOUBLE("DAC Invert Switch", DA7213_DIG_CTRL, DA7213_DAC_L_INV_SHIFT, 685 DA7213_DAC_R_INV_SHIFT, DA7213_DAC_INV_MAX, 686 DA7213_NO_INVERT), 687 688 /* DMIC controls */ 689 SOC_DOUBLE_R("DMIC Switch", DA7213_MIXIN_L_SELECT, 690 DA7213_MIXIN_R_SELECT, DA7213_DMIC_EN_SHIFT, 691 DA7213_DMIC_EN_MAX, DA7213_NO_INVERT), 692 693 /* ALC Controls */ 694 SOC_DOUBLE_EXT("ALC Switch", DA7213_ALC_CTRL1, DA7213_ALC_L_EN_SHIFT, 695 DA7213_ALC_R_EN_SHIFT, DA7213_ALC_EN_MAX, 696 DA7213_NO_INVERT, snd_soc_get_volsw, da7213_put_alc_sw), 697 SOC_ENUM("ALC Attack Rate", da7213_alc_attack_rate), 698 SOC_ENUM("ALC Release Rate", da7213_alc_release_rate), 699 SOC_ENUM("ALC Hold Time", da7213_alc_hold_time), 700 /* 701 * Rate at which input signal envelope is tracked as the signal gets 702 * larger 703 */ 704 SOC_ENUM("ALC Integ Attack Rate", da7213_alc_integ_attack_rate), 705 /* 706 * Rate at which input signal envelope is tracked as the signal gets 707 * smaller 708 */ 709 SOC_ENUM("ALC Integ Release Rate", da7213_alc_integ_release_rate), 710 SOC_SINGLE_TLV("ALC Noise Threshold Volume", DA7213_ALC_NOISE, 711 DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX, 712 DA7213_INVERT, alc_threshold_tlv), 713 SOC_SINGLE_TLV("ALC Min Threshold Volume", DA7213_ALC_TARGET_MIN, 714 DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX, 715 DA7213_INVERT, alc_threshold_tlv), 716 SOC_SINGLE_TLV("ALC Max Threshold Volume", DA7213_ALC_TARGET_MAX, 717 DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX, 718 DA7213_INVERT, alc_threshold_tlv), 719 SOC_SINGLE_TLV("ALC Max Attenuation Volume", DA7213_ALC_GAIN_LIMITS, 720 DA7213_ALC_ATTEN_MAX_SHIFT, 721 DA7213_ALC_ATTEN_GAIN_MAX_MAX, DA7213_NO_INVERT, 722 alc_gain_tlv), 723 SOC_SINGLE_TLV("ALC Max Gain Volume", DA7213_ALC_GAIN_LIMITS, 724 DA7213_ALC_GAIN_MAX_SHIFT, DA7213_ALC_ATTEN_GAIN_MAX_MAX, 725 DA7213_NO_INVERT, alc_gain_tlv), 726 SOC_SINGLE_TLV("ALC Min Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS, 727 DA7213_ALC_ANA_GAIN_MIN_SHIFT, DA7213_ALC_ANA_GAIN_MAX, 728 DA7213_NO_INVERT, alc_analog_gain_tlv), 729 SOC_SINGLE_TLV("ALC Max Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS, 730 DA7213_ALC_ANA_GAIN_MAX_SHIFT, DA7213_ALC_ANA_GAIN_MAX, 731 DA7213_NO_INVERT, alc_analog_gain_tlv), 732 SOC_SINGLE("ALC Anticlip Mode Switch", DA7213_ALC_ANTICLIP_CTRL, 733 DA7213_ALC_ANTICLIP_EN_SHIFT, DA7213_ALC_ANTICLIP_EN_MAX, 734 DA7213_NO_INVERT), 735 SOC_SINGLE("ALC Anticlip Level", DA7213_ALC_ANTICLIP_LEVEL, 736 DA7213_ALC_ANTICLIP_LEVEL_SHIFT, 737 DA7213_ALC_ANTICLIP_LEVEL_MAX, DA7213_NO_INVERT), 738 }; 739 740 741 /* 742 * DAPM 743 */ 744 745 /* 746 * Enums 747 */ 748 749 /* MIC PGA source select */ 750 static const char * const da7213_mic_amp_in_sel_txt[] = { 751 "Differential", "MIC_P", "MIC_N" 752 }; 753 754 static SOC_ENUM_SINGLE_DECL(da7213_mic_1_amp_in_sel, 755 DA7213_MIC_1_CTRL, 756 DA7213_MIC_AMP_IN_SEL_SHIFT, 757 da7213_mic_amp_in_sel_txt); 758 static const struct snd_kcontrol_new da7213_mic_1_amp_in_sel_mux = 759 SOC_DAPM_ENUM("Mic 1 Amp Source MUX", da7213_mic_1_amp_in_sel); 760 761 static SOC_ENUM_SINGLE_DECL(da7213_mic_2_amp_in_sel, 762 DA7213_MIC_2_CTRL, 763 DA7213_MIC_AMP_IN_SEL_SHIFT, 764 da7213_mic_amp_in_sel_txt); 765 static const struct snd_kcontrol_new da7213_mic_2_amp_in_sel_mux = 766 SOC_DAPM_ENUM("Mic 2 Amp Source MUX", da7213_mic_2_amp_in_sel); 767 768 /* DAI routing select */ 769 static const char * const da7213_dai_src_txt[] = { 770 "ADC Left", "ADC Right", "DAI Input Left", "DAI Input Right" 771 }; 772 773 static SOC_ENUM_SINGLE_DECL(da7213_dai_l_src, 774 DA7213_DIG_ROUTING_DAI, 775 DA7213_DAI_L_SRC_SHIFT, 776 da7213_dai_src_txt); 777 static const struct snd_kcontrol_new da7213_dai_l_src_mux = 778 SOC_DAPM_ENUM("DAI Left Source MUX", da7213_dai_l_src); 779 780 static SOC_ENUM_SINGLE_DECL(da7213_dai_r_src, 781 DA7213_DIG_ROUTING_DAI, 782 DA7213_DAI_R_SRC_SHIFT, 783 da7213_dai_src_txt); 784 static const struct snd_kcontrol_new da7213_dai_r_src_mux = 785 SOC_DAPM_ENUM("DAI Right Source MUX", da7213_dai_r_src); 786 787 /* DAC routing select */ 788 static const char * const da7213_dac_src_txt[] = { 789 "ADC Output Left", "ADC Output Right", "DAI Input Left", 790 "DAI Input Right" 791 }; 792 793 static SOC_ENUM_SINGLE_DECL(da7213_dac_l_src, 794 DA7213_DIG_ROUTING_DAC, 795 DA7213_DAC_L_SRC_SHIFT, 796 da7213_dac_src_txt); 797 static const struct snd_kcontrol_new da7213_dac_l_src_mux = 798 SOC_DAPM_ENUM("DAC Left Source MUX", da7213_dac_l_src); 799 800 static SOC_ENUM_SINGLE_DECL(da7213_dac_r_src, 801 DA7213_DIG_ROUTING_DAC, 802 DA7213_DAC_R_SRC_SHIFT, 803 da7213_dac_src_txt); 804 static const struct snd_kcontrol_new da7213_dac_r_src_mux = 805 SOC_DAPM_ENUM("DAC Right Source MUX", da7213_dac_r_src); 806 807 /* 808 * Mixer Controls 809 */ 810 811 /* Mixin Left */ 812 static const struct snd_kcontrol_new da7213_dapm_mixinl_controls[] = { 813 SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXIN_L_SELECT, 814 DA7213_MIXIN_L_MIX_SELECT_AUX_L_SHIFT, 815 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 816 SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_L_SELECT, 817 DA7213_MIXIN_L_MIX_SELECT_MIC_1_SHIFT, 818 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 819 SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_L_SELECT, 820 DA7213_MIXIN_L_MIX_SELECT_MIC_2_SHIFT, 821 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 822 SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXIN_L_SELECT, 823 DA7213_MIXIN_L_MIX_SELECT_MIXIN_R_SHIFT, 824 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 825 }; 826 827 /* Mixin Right */ 828 static const struct snd_kcontrol_new da7213_dapm_mixinr_controls[] = { 829 SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXIN_R_SELECT, 830 DA7213_MIXIN_R_MIX_SELECT_AUX_R_SHIFT, 831 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 832 SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_R_SELECT, 833 DA7213_MIXIN_R_MIX_SELECT_MIC_2_SHIFT, 834 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 835 SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_R_SELECT, 836 DA7213_MIXIN_R_MIX_SELECT_MIC_1_SHIFT, 837 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 838 SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXIN_R_SELECT, 839 DA7213_MIXIN_R_MIX_SELECT_MIXIN_L_SHIFT, 840 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 841 }; 842 843 /* Mixout Left */ 844 static const struct snd_kcontrol_new da7213_dapm_mixoutl_controls[] = { 845 SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXOUT_L_SELECT, 846 DA7213_MIXOUT_L_MIX_SELECT_AUX_L_SHIFT, 847 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 848 SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_L_SELECT, 849 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_SHIFT, 850 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 851 SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_L_SELECT, 852 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_SHIFT, 853 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 854 SOC_DAPM_SINGLE("DAC Left Switch", DA7213_MIXOUT_L_SELECT, 855 DA7213_MIXOUT_L_MIX_SELECT_DAC_L_SHIFT, 856 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 857 SOC_DAPM_SINGLE("Aux Left Invert Switch", DA7213_MIXOUT_L_SELECT, 858 DA7213_MIXOUT_L_MIX_SELECT_AUX_L_INVERTED_SHIFT, 859 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 860 SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_L_SELECT, 861 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_INVERTED_SHIFT, 862 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 863 SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_L_SELECT, 864 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_INVERTED_SHIFT, 865 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 866 }; 867 868 /* Mixout Right */ 869 static const struct snd_kcontrol_new da7213_dapm_mixoutr_controls[] = { 870 SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXOUT_R_SELECT, 871 DA7213_MIXOUT_R_MIX_SELECT_AUX_R_SHIFT, 872 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 873 SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_R_SELECT, 874 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_SHIFT, 875 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 876 SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_R_SELECT, 877 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_SHIFT, 878 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 879 SOC_DAPM_SINGLE("DAC Right Switch", DA7213_MIXOUT_R_SELECT, 880 DA7213_MIXOUT_R_MIX_SELECT_DAC_R_SHIFT, 881 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 882 SOC_DAPM_SINGLE("Aux Right Invert Switch", DA7213_MIXOUT_R_SELECT, 883 DA7213_MIXOUT_R_MIX_SELECT_AUX_R_INVERTED_SHIFT, 884 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 885 SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_R_SELECT, 886 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_INVERTED_SHIFT, 887 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 888 SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_R_SELECT, 889 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_INVERTED_SHIFT, 890 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 891 }; 892 893 894 /* 895 * DAPM Events 896 */ 897 898 static int da7213_dai_event(struct snd_soc_dapm_widget *w, 899 struct snd_kcontrol *kcontrol, int event) 900 { 901 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 902 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 903 u8 pll_ctrl, pll_status; 904 int i = 0; 905 bool srm_lock = false; 906 907 switch (event) { 908 case SND_SOC_DAPM_PRE_PMU: 909 /* Enable DAI clks for master mode */ 910 if (da7213->master) 911 snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE, 912 DA7213_DAI_CLK_EN_MASK, 913 DA7213_DAI_CLK_EN_MASK); 914 915 /* PC synchronised to DAI */ 916 snd_soc_component_update_bits(component, DA7213_PC_COUNT, 917 DA7213_PC_FREERUN_MASK, 0); 918 919 /* If SRM not enabled then nothing more to do */ 920 pll_ctrl = snd_soc_component_read(component, DA7213_PLL_CTRL); 921 if (!(pll_ctrl & DA7213_PLL_SRM_EN)) 922 return 0; 923 924 /* Assist 32KHz mode PLL lock */ 925 if (pll_ctrl & DA7213_PLL_32K_MODE) { 926 snd_soc_component_write(component, 0xF0, 0x8B); 927 snd_soc_component_write(component, 0xF2, 0x03); 928 snd_soc_component_write(component, 0xF0, 0x00); 929 } 930 931 /* Check SRM has locked */ 932 do { 933 pll_status = snd_soc_component_read(component, DA7213_PLL_STATUS); 934 if (pll_status & DA7213_PLL_SRM_LOCK) { 935 srm_lock = true; 936 } else { 937 ++i; 938 msleep(50); 939 } 940 } while ((i < DA7213_SRM_CHECK_RETRIES) && (!srm_lock)); 941 942 if (!srm_lock) 943 dev_warn(component->dev, "SRM failed to lock\n"); 944 945 return 0; 946 case SND_SOC_DAPM_POST_PMD: 947 /* Revert 32KHz PLL lock udpates if applied previously */ 948 pll_ctrl = snd_soc_component_read(component, DA7213_PLL_CTRL); 949 if (pll_ctrl & DA7213_PLL_32K_MODE) { 950 snd_soc_component_write(component, 0xF0, 0x8B); 951 snd_soc_component_write(component, 0xF2, 0x01); 952 snd_soc_component_write(component, 0xF0, 0x00); 953 } 954 955 /* PC free-running */ 956 snd_soc_component_update_bits(component, DA7213_PC_COUNT, 957 DA7213_PC_FREERUN_MASK, 958 DA7213_PC_FREERUN_MASK); 959 960 /* Disable DAI clks if in master mode */ 961 if (da7213->master) 962 snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE, 963 DA7213_DAI_CLK_EN_MASK, 0); 964 return 0; 965 default: 966 return -EINVAL; 967 } 968 } 969 970 971 /* 972 * DAPM widgets 973 */ 974 975 static const struct snd_soc_dapm_widget da7213_dapm_widgets[] = { 976 /* 977 * Power Supply 978 */ 979 SND_SOC_DAPM_REGULATOR_SUPPLY("VDDMIC", 0, 0), 980 981 /* 982 * Input & Output 983 */ 984 985 /* Use a supply here as this controls both input & output DAIs */ 986 SND_SOC_DAPM_SUPPLY("DAI", DA7213_DAI_CTRL, DA7213_DAI_EN_SHIFT, 987 DA7213_NO_INVERT, da7213_dai_event, 988 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 989 990 /* 991 * Input 992 */ 993 994 /* Input Lines */ 995 SND_SOC_DAPM_INPUT("MIC1"), 996 SND_SOC_DAPM_INPUT("MIC2"), 997 SND_SOC_DAPM_INPUT("AUXL"), 998 SND_SOC_DAPM_INPUT("AUXR"), 999 1000 /* MUXs for Mic PGA source selection */ 1001 SND_SOC_DAPM_MUX("Mic 1 Amp Source MUX", SND_SOC_NOPM, 0, 0, 1002 &da7213_mic_1_amp_in_sel_mux), 1003 SND_SOC_DAPM_MUX("Mic 2 Amp Source MUX", SND_SOC_NOPM, 0, 0, 1004 &da7213_mic_2_amp_in_sel_mux), 1005 1006 /* Input PGAs */ 1007 SND_SOC_DAPM_PGA("Mic 1 PGA", DA7213_MIC_1_CTRL, DA7213_AMP_EN_SHIFT, 1008 DA7213_NO_INVERT, NULL, 0), 1009 SND_SOC_DAPM_PGA("Mic 2 PGA", DA7213_MIC_2_CTRL, DA7213_AMP_EN_SHIFT, 1010 DA7213_NO_INVERT, NULL, 0), 1011 SND_SOC_DAPM_PGA("Aux Left PGA", DA7213_AUX_L_CTRL, DA7213_AMP_EN_SHIFT, 1012 DA7213_NO_INVERT, NULL, 0), 1013 SND_SOC_DAPM_PGA("Aux Right PGA", DA7213_AUX_R_CTRL, 1014 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), 1015 SND_SOC_DAPM_PGA("Mixin Left PGA", DA7213_MIXIN_L_CTRL, 1016 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), 1017 SND_SOC_DAPM_PGA("Mixin Right PGA", DA7213_MIXIN_R_CTRL, 1018 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), 1019 1020 /* Mic Biases */ 1021 SND_SOC_DAPM_SUPPLY("Mic Bias 1", DA7213_MICBIAS_CTRL, 1022 DA7213_MICBIAS1_EN_SHIFT, DA7213_NO_INVERT, 1023 NULL, 0), 1024 SND_SOC_DAPM_SUPPLY("Mic Bias 2", DA7213_MICBIAS_CTRL, 1025 DA7213_MICBIAS2_EN_SHIFT, DA7213_NO_INVERT, 1026 NULL, 0), 1027 1028 /* Input Mixers */ 1029 SND_SOC_DAPM_MIXER("Mixin Left", SND_SOC_NOPM, 0, 0, 1030 &da7213_dapm_mixinl_controls[0], 1031 ARRAY_SIZE(da7213_dapm_mixinl_controls)), 1032 SND_SOC_DAPM_MIXER("Mixin Right", SND_SOC_NOPM, 0, 0, 1033 &da7213_dapm_mixinr_controls[0], 1034 ARRAY_SIZE(da7213_dapm_mixinr_controls)), 1035 1036 /* ADCs */ 1037 SND_SOC_DAPM_ADC("ADC Left", NULL, DA7213_ADC_L_CTRL, 1038 DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT), 1039 SND_SOC_DAPM_ADC("ADC Right", NULL, DA7213_ADC_R_CTRL, 1040 DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT), 1041 1042 /* DAI */ 1043 SND_SOC_DAPM_MUX("DAI Left Source MUX", SND_SOC_NOPM, 0, 0, 1044 &da7213_dai_l_src_mux), 1045 SND_SOC_DAPM_MUX("DAI Right Source MUX", SND_SOC_NOPM, 0, 0, 1046 &da7213_dai_r_src_mux), 1047 SND_SOC_DAPM_AIF_OUT("DAIOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0), 1048 SND_SOC_DAPM_AIF_OUT("DAIOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0), 1049 1050 /* 1051 * Output 1052 */ 1053 1054 /* DAI */ 1055 SND_SOC_DAPM_AIF_IN("DAIINL", "Playback", 0, SND_SOC_NOPM, 0, 0), 1056 SND_SOC_DAPM_AIF_IN("DAIINR", "Playback", 1, SND_SOC_NOPM, 0, 0), 1057 SND_SOC_DAPM_MUX("DAC Left Source MUX", SND_SOC_NOPM, 0, 0, 1058 &da7213_dac_l_src_mux), 1059 SND_SOC_DAPM_MUX("DAC Right Source MUX", SND_SOC_NOPM, 0, 0, 1060 &da7213_dac_r_src_mux), 1061 1062 /* DACs */ 1063 SND_SOC_DAPM_DAC("DAC Left", NULL, DA7213_DAC_L_CTRL, 1064 DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT), 1065 SND_SOC_DAPM_DAC("DAC Right", NULL, DA7213_DAC_R_CTRL, 1066 DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT), 1067 1068 /* Output Mixers */ 1069 SND_SOC_DAPM_MIXER("Mixout Left", SND_SOC_NOPM, 0, 0, 1070 &da7213_dapm_mixoutl_controls[0], 1071 ARRAY_SIZE(da7213_dapm_mixoutl_controls)), 1072 SND_SOC_DAPM_MIXER("Mixout Right", SND_SOC_NOPM, 0, 0, 1073 &da7213_dapm_mixoutr_controls[0], 1074 ARRAY_SIZE(da7213_dapm_mixoutr_controls)), 1075 1076 /* Output PGAs */ 1077 SND_SOC_DAPM_PGA("Mixout Left PGA", DA7213_MIXOUT_L_CTRL, 1078 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), 1079 SND_SOC_DAPM_PGA("Mixout Right PGA", DA7213_MIXOUT_R_CTRL, 1080 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), 1081 SND_SOC_DAPM_PGA("Lineout PGA", DA7213_LINE_CTRL, DA7213_AMP_EN_SHIFT, 1082 DA7213_NO_INVERT, NULL, 0), 1083 SND_SOC_DAPM_PGA("Headphone Left PGA", DA7213_HP_L_CTRL, 1084 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), 1085 SND_SOC_DAPM_PGA("Headphone Right PGA", DA7213_HP_R_CTRL, 1086 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), 1087 1088 /* Charge Pump */ 1089 SND_SOC_DAPM_SUPPLY("Charge Pump", DA7213_CP_CTRL, DA7213_CP_EN_SHIFT, 1090 DA7213_NO_INVERT, NULL, 0), 1091 1092 /* Output Lines */ 1093 SND_SOC_DAPM_OUTPUT("HPL"), 1094 SND_SOC_DAPM_OUTPUT("HPR"), 1095 SND_SOC_DAPM_OUTPUT("LINE"), 1096 }; 1097 1098 1099 /* 1100 * DAPM audio route definition 1101 */ 1102 1103 static const struct snd_soc_dapm_route da7213_audio_map[] = { 1104 /* Dest Connecting Widget source */ 1105 1106 /* Input path */ 1107 {"Mic Bias 1", NULL, "VDDMIC"}, 1108 {"Mic Bias 2", NULL, "VDDMIC"}, 1109 1110 {"MIC1", NULL, "Mic Bias 1"}, 1111 {"MIC2", NULL, "Mic Bias 2"}, 1112 1113 {"Mic 1 Amp Source MUX", "Differential", "MIC1"}, 1114 {"Mic 1 Amp Source MUX", "MIC_P", "MIC1"}, 1115 {"Mic 1 Amp Source MUX", "MIC_N", "MIC1"}, 1116 1117 {"Mic 2 Amp Source MUX", "Differential", "MIC2"}, 1118 {"Mic 2 Amp Source MUX", "MIC_P", "MIC2"}, 1119 {"Mic 2 Amp Source MUX", "MIC_N", "MIC2"}, 1120 1121 {"Mic 1 PGA", NULL, "Mic 1 Amp Source MUX"}, 1122 {"Mic 2 PGA", NULL, "Mic 2 Amp Source MUX"}, 1123 1124 {"Aux Left PGA", NULL, "AUXL"}, 1125 {"Aux Right PGA", NULL, "AUXR"}, 1126 1127 {"Mixin Left", "Aux Left Switch", "Aux Left PGA"}, 1128 {"Mixin Left", "Mic 1 Switch", "Mic 1 PGA"}, 1129 {"Mixin Left", "Mic 2 Switch", "Mic 2 PGA"}, 1130 {"Mixin Left", "Mixin Right Switch", "Mixin Right PGA"}, 1131 1132 {"Mixin Right", "Aux Right Switch", "Aux Right PGA"}, 1133 {"Mixin Right", "Mic 2 Switch", "Mic 2 PGA"}, 1134 {"Mixin Right", "Mic 1 Switch", "Mic 1 PGA"}, 1135 {"Mixin Right", "Mixin Left Switch", "Mixin Left PGA"}, 1136 1137 {"Mixin Left PGA", NULL, "Mixin Left"}, 1138 {"ADC Left", NULL, "Mixin Left PGA"}, 1139 1140 {"Mixin Right PGA", NULL, "Mixin Right"}, 1141 {"ADC Right", NULL, "Mixin Right PGA"}, 1142 1143 {"DAI Left Source MUX", "ADC Left", "ADC Left"}, 1144 {"DAI Left Source MUX", "ADC Right", "ADC Right"}, 1145 {"DAI Left Source MUX", "DAI Input Left", "DAIINL"}, 1146 {"DAI Left Source MUX", "DAI Input Right", "DAIINR"}, 1147 1148 {"DAI Right Source MUX", "ADC Left", "ADC Left"}, 1149 {"DAI Right Source MUX", "ADC Right", "ADC Right"}, 1150 {"DAI Right Source MUX", "DAI Input Left", "DAIINL"}, 1151 {"DAI Right Source MUX", "DAI Input Right", "DAIINR"}, 1152 1153 {"DAIOUTL", NULL, "DAI Left Source MUX"}, 1154 {"DAIOUTR", NULL, "DAI Right Source MUX"}, 1155 1156 {"DAIOUTL", NULL, "DAI"}, 1157 {"DAIOUTR", NULL, "DAI"}, 1158 1159 /* Output path */ 1160 {"DAIINL", NULL, "DAI"}, 1161 {"DAIINR", NULL, "DAI"}, 1162 1163 {"DAC Left Source MUX", "ADC Output Left", "ADC Left"}, 1164 {"DAC Left Source MUX", "ADC Output Right", "ADC Right"}, 1165 {"DAC Left Source MUX", "DAI Input Left", "DAIINL"}, 1166 {"DAC Left Source MUX", "DAI Input Right", "DAIINR"}, 1167 1168 {"DAC Right Source MUX", "ADC Output Left", "ADC Left"}, 1169 {"DAC Right Source MUX", "ADC Output Right", "ADC Right"}, 1170 {"DAC Right Source MUX", "DAI Input Left", "DAIINL"}, 1171 {"DAC Right Source MUX", "DAI Input Right", "DAIINR"}, 1172 1173 {"DAC Left", NULL, "DAC Left Source MUX"}, 1174 {"DAC Right", NULL, "DAC Right Source MUX"}, 1175 1176 {"Mixout Left", "Aux Left Switch", "Aux Left PGA"}, 1177 {"Mixout Left", "Mixin Left Switch", "Mixin Left PGA"}, 1178 {"Mixout Left", "Mixin Right Switch", "Mixin Right PGA"}, 1179 {"Mixout Left", "DAC Left Switch", "DAC Left"}, 1180 {"Mixout Left", "Aux Left Invert Switch", "Aux Left PGA"}, 1181 {"Mixout Left", "Mixin Left Invert Switch", "Mixin Left PGA"}, 1182 {"Mixout Left", "Mixin Right Invert Switch", "Mixin Right PGA"}, 1183 1184 {"Mixout Right", "Aux Right Switch", "Aux Right PGA"}, 1185 {"Mixout Right", "Mixin Right Switch", "Mixin Right PGA"}, 1186 {"Mixout Right", "Mixin Left Switch", "Mixin Left PGA"}, 1187 {"Mixout Right", "DAC Right Switch", "DAC Right"}, 1188 {"Mixout Right", "Aux Right Invert Switch", "Aux Right PGA"}, 1189 {"Mixout Right", "Mixin Right Invert Switch", "Mixin Right PGA"}, 1190 {"Mixout Right", "Mixin Left Invert Switch", "Mixin Left PGA"}, 1191 1192 {"Mixout Left PGA", NULL, "Mixout Left"}, 1193 {"Mixout Right PGA", NULL, "Mixout Right"}, 1194 1195 {"Headphone Left PGA", NULL, "Mixout Left PGA"}, 1196 {"Headphone Left PGA", NULL, "Charge Pump"}, 1197 {"HPL", NULL, "Headphone Left PGA"}, 1198 1199 {"Headphone Right PGA", NULL, "Mixout Right PGA"}, 1200 {"Headphone Right PGA", NULL, "Charge Pump"}, 1201 {"HPR", NULL, "Headphone Right PGA"}, 1202 1203 {"Lineout PGA", NULL, "Mixout Right PGA"}, 1204 {"LINE", NULL, "Lineout PGA"}, 1205 }; 1206 1207 static const struct reg_default da7213_reg_defaults[] = { 1208 { DA7213_DIG_ROUTING_DAI, 0x10 }, 1209 { DA7213_SR, 0x0A }, 1210 { DA7213_REFERENCES, 0x80 }, 1211 { DA7213_PLL_FRAC_TOP, 0x00 }, 1212 { DA7213_PLL_FRAC_BOT, 0x00 }, 1213 { DA7213_PLL_INTEGER, 0x20 }, 1214 { DA7213_PLL_CTRL, 0x0C }, 1215 { DA7213_DAI_CLK_MODE, 0x01 }, 1216 { DA7213_DAI_CTRL, 0x08 }, 1217 { DA7213_DIG_ROUTING_DAC, 0x32 }, 1218 { DA7213_AUX_L_GAIN, 0x35 }, 1219 { DA7213_AUX_R_GAIN, 0x35 }, 1220 { DA7213_MIXIN_L_SELECT, 0x00 }, 1221 { DA7213_MIXIN_R_SELECT, 0x00 }, 1222 { DA7213_MIXIN_L_GAIN, 0x03 }, 1223 { DA7213_MIXIN_R_GAIN, 0x03 }, 1224 { DA7213_ADC_L_GAIN, 0x6F }, 1225 { DA7213_ADC_R_GAIN, 0x6F }, 1226 { DA7213_ADC_FILTERS1, 0x80 }, 1227 { DA7213_MIC_1_GAIN, 0x01 }, 1228 { DA7213_MIC_2_GAIN, 0x01 }, 1229 { DA7213_DAC_FILTERS5, 0x00 }, 1230 { DA7213_DAC_FILTERS2, 0x88 }, 1231 { DA7213_DAC_FILTERS3, 0x88 }, 1232 { DA7213_DAC_FILTERS4, 0x08 }, 1233 { DA7213_DAC_FILTERS1, 0x80 }, 1234 { DA7213_DAC_L_GAIN, 0x6F }, 1235 { DA7213_DAC_R_GAIN, 0x6F }, 1236 { DA7213_CP_CTRL, 0x61 }, 1237 { DA7213_HP_L_GAIN, 0x39 }, 1238 { DA7213_HP_R_GAIN, 0x39 }, 1239 { DA7213_LINE_GAIN, 0x30 }, 1240 { DA7213_MIXOUT_L_SELECT, 0x00 }, 1241 { DA7213_MIXOUT_R_SELECT, 0x00 }, 1242 { DA7213_SYSTEM_MODES_INPUT, 0x00 }, 1243 { DA7213_SYSTEM_MODES_OUTPUT, 0x00 }, 1244 { DA7213_AUX_L_CTRL, 0x44 }, 1245 { DA7213_AUX_R_CTRL, 0x44 }, 1246 { DA7213_MICBIAS_CTRL, 0x11 }, 1247 { DA7213_MIC_1_CTRL, 0x40 }, 1248 { DA7213_MIC_2_CTRL, 0x40 }, 1249 { DA7213_MIXIN_L_CTRL, 0x40 }, 1250 { DA7213_MIXIN_R_CTRL, 0x40 }, 1251 { DA7213_ADC_L_CTRL, 0x40 }, 1252 { DA7213_ADC_R_CTRL, 0x40 }, 1253 { DA7213_DAC_L_CTRL, 0x48 }, 1254 { DA7213_DAC_R_CTRL, 0x40 }, 1255 { DA7213_HP_L_CTRL, 0x41 }, 1256 { DA7213_HP_R_CTRL, 0x40 }, 1257 { DA7213_LINE_CTRL, 0x40 }, 1258 { DA7213_MIXOUT_L_CTRL, 0x10 }, 1259 { DA7213_MIXOUT_R_CTRL, 0x10 }, 1260 { DA7213_LDO_CTRL, 0x00 }, 1261 { DA7213_IO_CTRL, 0x00 }, 1262 { DA7213_GAIN_RAMP_CTRL, 0x00}, 1263 { DA7213_MIC_CONFIG, 0x00 }, 1264 { DA7213_PC_COUNT, 0x00 }, 1265 { DA7213_CP_VOL_THRESHOLD1, 0x32 }, 1266 { DA7213_CP_DELAY, 0x95 }, 1267 { DA7213_CP_DETECTOR, 0x00 }, 1268 { DA7213_DAI_OFFSET, 0x00 }, 1269 { DA7213_DIG_CTRL, 0x00 }, 1270 { DA7213_ALC_CTRL2, 0x00 }, 1271 { DA7213_ALC_CTRL3, 0x00 }, 1272 { DA7213_ALC_NOISE, 0x3F }, 1273 { DA7213_ALC_TARGET_MIN, 0x3F }, 1274 { DA7213_ALC_TARGET_MAX, 0x00 }, 1275 { DA7213_ALC_GAIN_LIMITS, 0xFF }, 1276 { DA7213_ALC_ANA_GAIN_LIMITS, 0x71 }, 1277 { DA7213_ALC_ANTICLIP_CTRL, 0x00 }, 1278 { DA7213_ALC_ANTICLIP_LEVEL, 0x00 }, 1279 { DA7213_ALC_OFFSET_MAN_M_L, 0x00 }, 1280 { DA7213_ALC_OFFSET_MAN_U_L, 0x00 }, 1281 { DA7213_ALC_OFFSET_MAN_M_R, 0x00 }, 1282 { DA7213_ALC_OFFSET_MAN_U_R, 0x00 }, 1283 { DA7213_ALC_CIC_OP_LVL_CTRL, 0x00 }, 1284 { DA7213_DAC_NG_SETUP_TIME, 0x00 }, 1285 { DA7213_DAC_NG_OFF_THRESHOLD, 0x00 }, 1286 { DA7213_DAC_NG_ON_THRESHOLD, 0x00 }, 1287 { DA7213_DAC_NG_CTRL, 0x00 }, 1288 }; 1289 1290 static bool da7213_volatile_register(struct device *dev, unsigned int reg) 1291 { 1292 switch (reg) { 1293 case DA7213_STATUS1: 1294 case DA7213_PLL_STATUS: 1295 case DA7213_AUX_L_GAIN_STATUS: 1296 case DA7213_AUX_R_GAIN_STATUS: 1297 case DA7213_MIC_1_GAIN_STATUS: 1298 case DA7213_MIC_2_GAIN_STATUS: 1299 case DA7213_MIXIN_L_GAIN_STATUS: 1300 case DA7213_MIXIN_R_GAIN_STATUS: 1301 case DA7213_ADC_L_GAIN_STATUS: 1302 case DA7213_ADC_R_GAIN_STATUS: 1303 case DA7213_DAC_L_GAIN_STATUS: 1304 case DA7213_DAC_R_GAIN_STATUS: 1305 case DA7213_HP_L_GAIN_STATUS: 1306 case DA7213_HP_R_GAIN_STATUS: 1307 case DA7213_LINE_GAIN_STATUS: 1308 case DA7213_ALC_CTRL1: 1309 case DA7213_ALC_OFFSET_AUTO_M_L: 1310 case DA7213_ALC_OFFSET_AUTO_U_L: 1311 case DA7213_ALC_OFFSET_AUTO_M_R: 1312 case DA7213_ALC_OFFSET_AUTO_U_R: 1313 case DA7213_ALC_CIC_OP_LVL_DATA: 1314 return true; 1315 default: 1316 return false; 1317 } 1318 } 1319 1320 static int da7213_hw_params(struct snd_pcm_substream *substream, 1321 struct snd_pcm_hw_params *params, 1322 struct snd_soc_dai *dai) 1323 { 1324 struct snd_soc_component *component = dai->component; 1325 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 1326 u8 dai_clk_mode = DA7213_DAI_BCLKS_PER_WCLK_64; 1327 u8 dai_ctrl = 0; 1328 u8 fs; 1329 1330 /* Set channels */ 1331 switch (params_channels(params)) { 1332 case 1: 1333 if (da7213->fmt != DA7213_DAI_FORMAT_DSP) { 1334 dev_err(component->dev, "Mono supported only in DSP mode\n"); 1335 return -EINVAL; 1336 } 1337 dai_ctrl |= DA7213_DAI_MONO_MODE_EN; 1338 break; 1339 case 2: 1340 dai_ctrl &= ~(DA7213_DAI_MONO_MODE_EN); 1341 break; 1342 default: 1343 return -EINVAL; 1344 } 1345 1346 /* Set DAI format */ 1347 switch (params_width(params)) { 1348 case 16: 1349 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S16_LE; 1350 dai_clk_mode = DA7213_DAI_BCLKS_PER_WCLK_32; /* 32bit for 1ch and 2ch */ 1351 break; 1352 case 20: 1353 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S20_LE; 1354 break; 1355 case 24: 1356 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S24_LE; 1357 break; 1358 case 32: 1359 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S32_LE; 1360 break; 1361 default: 1362 return -EINVAL; 1363 } 1364 1365 /* Set sampling rate */ 1366 switch (params_rate(params)) { 1367 case 8000: 1368 fs = DA7213_SR_8000; 1369 da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000; 1370 break; 1371 case 11025: 1372 fs = DA7213_SR_11025; 1373 da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800; 1374 break; 1375 case 12000: 1376 fs = DA7213_SR_12000; 1377 da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000; 1378 break; 1379 case 16000: 1380 fs = DA7213_SR_16000; 1381 da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000; 1382 break; 1383 case 22050: 1384 fs = DA7213_SR_22050; 1385 da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800; 1386 break; 1387 case 32000: 1388 fs = DA7213_SR_32000; 1389 da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000; 1390 break; 1391 case 44100: 1392 fs = DA7213_SR_44100; 1393 da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800; 1394 break; 1395 case 48000: 1396 fs = DA7213_SR_48000; 1397 da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000; 1398 break; 1399 case 88200: 1400 fs = DA7213_SR_88200; 1401 da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800; 1402 break; 1403 case 96000: 1404 fs = DA7213_SR_96000; 1405 da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000; 1406 break; 1407 default: 1408 return -EINVAL; 1409 } 1410 1411 snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE, 1412 DA7213_DAI_BCLKS_PER_WCLK_MASK, dai_clk_mode); 1413 1414 snd_soc_component_update_bits(component, DA7213_DAI_CTRL, 1415 DA7213_DAI_WORD_LENGTH_MASK | DA7213_DAI_MONO_MODE_MASK, dai_ctrl); 1416 snd_soc_component_write(component, DA7213_SR, fs); 1417 1418 return 0; 1419 } 1420 1421 static int da7213_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 1422 { 1423 struct snd_soc_component *component = codec_dai->component; 1424 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 1425 u8 dai_clk_mode = 0, dai_ctrl = 0; 1426 u8 dai_offset = 0; 1427 1428 /* Set master/slave mode */ 1429 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1430 case SND_SOC_DAIFMT_CBP_CFP: 1431 da7213->master = true; 1432 break; 1433 case SND_SOC_DAIFMT_CBC_CFC: 1434 da7213->master = false; 1435 break; 1436 default: 1437 return -EINVAL; 1438 } 1439 1440 /* Set clock normal/inverted */ 1441 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1442 case SND_SOC_DAIFMT_I2S: 1443 case SND_SOC_DAIFMT_LEFT_J: 1444 case SND_SOC_DAIFMT_RIGHT_J: 1445 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1446 case SND_SOC_DAIFMT_NB_NF: 1447 break; 1448 case SND_SOC_DAIFMT_NB_IF: 1449 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV; 1450 break; 1451 case SND_SOC_DAIFMT_IB_NF: 1452 dai_clk_mode |= DA7213_DAI_CLK_POL_INV; 1453 break; 1454 case SND_SOC_DAIFMT_IB_IF: 1455 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV | 1456 DA7213_DAI_CLK_POL_INV; 1457 break; 1458 default: 1459 return -EINVAL; 1460 } 1461 break; 1462 case SND_SOC_DAIFMT_DSP_A: 1463 case SND_SOC_DAIFMT_DSP_B: 1464 /* The bclk is inverted wrt ASoC conventions */ 1465 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1466 case SND_SOC_DAIFMT_NB_NF: 1467 dai_clk_mode |= DA7213_DAI_CLK_POL_INV; 1468 break; 1469 case SND_SOC_DAIFMT_NB_IF: 1470 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV | 1471 DA7213_DAI_CLK_POL_INV; 1472 break; 1473 case SND_SOC_DAIFMT_IB_NF: 1474 break; 1475 case SND_SOC_DAIFMT_IB_IF: 1476 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV; 1477 break; 1478 default: 1479 return -EINVAL; 1480 } 1481 break; 1482 default: 1483 return -EINVAL; 1484 } 1485 1486 /* Only I2S is supported */ 1487 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1488 case SND_SOC_DAIFMT_I2S: 1489 dai_ctrl |= DA7213_DAI_FORMAT_I2S_MODE; 1490 da7213->fmt = DA7213_DAI_FORMAT_I2S_MODE; 1491 break; 1492 case SND_SOC_DAIFMT_LEFT_J: 1493 dai_ctrl |= DA7213_DAI_FORMAT_LEFT_J; 1494 da7213->fmt = DA7213_DAI_FORMAT_LEFT_J; 1495 break; 1496 case SND_SOC_DAIFMT_RIGHT_J: 1497 dai_ctrl |= DA7213_DAI_FORMAT_RIGHT_J; 1498 da7213->fmt = DA7213_DAI_FORMAT_RIGHT_J; 1499 break; 1500 case SND_SOC_DAIFMT_DSP_A: /* L data MSB after FRM LRC */ 1501 dai_ctrl |= DA7213_DAI_FORMAT_DSP; 1502 dai_offset = 1; 1503 da7213->fmt = DA7213_DAI_FORMAT_DSP; 1504 break; 1505 case SND_SOC_DAIFMT_DSP_B: /* L data MSB during FRM LRC */ 1506 dai_ctrl |= DA7213_DAI_FORMAT_DSP; 1507 da7213->fmt = DA7213_DAI_FORMAT_DSP; 1508 break; 1509 default: 1510 return -EINVAL; 1511 } 1512 1513 /* By default only 64 BCLK per WCLK is supported */ 1514 dai_clk_mode |= DA7213_DAI_BCLKS_PER_WCLK_64; 1515 1516 snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE, 1517 DA7213_DAI_BCLKS_PER_WCLK_MASK | 1518 DA7213_DAI_CLK_POL_MASK | DA7213_DAI_WCLK_POL_MASK, 1519 dai_clk_mode); 1520 snd_soc_component_update_bits(component, DA7213_DAI_CTRL, DA7213_DAI_FORMAT_MASK, 1521 dai_ctrl); 1522 snd_soc_component_write(component, DA7213_DAI_OFFSET, dai_offset); 1523 1524 return 0; 1525 } 1526 1527 static int da7213_mute(struct snd_soc_dai *dai, int mute, int direction) 1528 { 1529 struct snd_soc_component *component = dai->component; 1530 1531 if (mute) { 1532 snd_soc_component_update_bits(component, DA7213_DAC_L_CTRL, 1533 DA7213_MUTE_EN, DA7213_MUTE_EN); 1534 snd_soc_component_update_bits(component, DA7213_DAC_R_CTRL, 1535 DA7213_MUTE_EN, DA7213_MUTE_EN); 1536 } else { 1537 snd_soc_component_update_bits(component, DA7213_DAC_L_CTRL, 1538 DA7213_MUTE_EN, 0); 1539 snd_soc_component_update_bits(component, DA7213_DAC_R_CTRL, 1540 DA7213_MUTE_EN, 0); 1541 } 1542 1543 return 0; 1544 } 1545 1546 #define DA7213_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 1547 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 1548 1549 static int da7213_set_component_sysclk(struct snd_soc_component *component, 1550 int clk_id, int source, 1551 unsigned int freq, int dir) 1552 { 1553 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 1554 int ret = 0; 1555 1556 if ((da7213->clk_src == clk_id) && (da7213->mclk_rate == freq)) 1557 return 0; 1558 1559 /* Maybe audio stream is closing. */ 1560 if (freq == 0) 1561 return 0; 1562 1563 if (((freq < da7213->fin_min_rate) && (freq != 32768)) || (freq > 54000000)) { 1564 dev_err(component->dev, "Unsupported MCLK value %d\n", 1565 freq); 1566 return -EINVAL; 1567 } 1568 1569 switch (clk_id) { 1570 case DA7213_CLKSRC_MCLK: 1571 snd_soc_component_update_bits(component, DA7213_PLL_CTRL, 1572 DA7213_PLL_MCLK_SQR_EN, 0); 1573 break; 1574 case DA7213_CLKSRC_MCLK_SQR: 1575 snd_soc_component_update_bits(component, DA7213_PLL_CTRL, 1576 DA7213_PLL_MCLK_SQR_EN, 1577 DA7213_PLL_MCLK_SQR_EN); 1578 break; 1579 default: 1580 dev_err(component->dev, "Unknown clock source %d\n", clk_id); 1581 return -EINVAL; 1582 } 1583 1584 da7213->clk_src = clk_id; 1585 1586 if (da7213->mclk) { 1587 freq = clk_round_rate(da7213->mclk, freq); 1588 ret = clk_set_rate(da7213->mclk, freq); 1589 if (ret) { 1590 dev_err(component->dev, "Failed to set clock rate %d\n", 1591 freq); 1592 return ret; 1593 } 1594 } 1595 1596 da7213->mclk_rate = freq; 1597 1598 return 0; 1599 } 1600 1601 /* Supported PLL input frequencies are 32KHz, 5MHz - 54MHz. */ 1602 static int _da7213_set_component_pll(struct snd_soc_component *component, 1603 int pll_id, int source, 1604 unsigned int fref, unsigned int fout) 1605 { 1606 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 1607 1608 u8 pll_ctrl, indiv_bits, indiv; 1609 u8 pll_frac_top, pll_frac_bot, pll_integer; 1610 u32 freq_ref; 1611 u64 frac_div; 1612 1613 /* Workout input divider based on MCLK rate */ 1614 if (da7213->mclk_rate == 32768) { 1615 if (!da7213->master) { 1616 dev_err(component->dev, 1617 "32KHz only valid if codec is clock master\n"); 1618 return -EINVAL; 1619 } 1620 1621 /* 32KHz PLL Mode */ 1622 indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ; 1623 indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL; 1624 source = DA7213_SYSCLK_PLL_32KHZ; 1625 freq_ref = 3750000; 1626 1627 } else { 1628 if (da7213->mclk_rate < 5000000) { 1629 dev_err(component->dev, 1630 "PLL input clock %d below valid range\n", 1631 da7213->mclk_rate); 1632 return -EINVAL; 1633 } else if (da7213->mclk_rate <= 9000000) { 1634 indiv_bits = DA7213_PLL_INDIV_5_TO_9_MHZ; 1635 indiv = DA7213_PLL_INDIV_5_TO_9_MHZ_VAL; 1636 } else if (da7213->mclk_rate <= 18000000) { 1637 indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ; 1638 indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL; 1639 } else if (da7213->mclk_rate <= 36000000) { 1640 indiv_bits = DA7213_PLL_INDIV_18_TO_36_MHZ; 1641 indiv = DA7213_PLL_INDIV_18_TO_36_MHZ_VAL; 1642 } else if (da7213->mclk_rate <= 54000000) { 1643 indiv_bits = DA7213_PLL_INDIV_36_TO_54_MHZ; 1644 indiv = DA7213_PLL_INDIV_36_TO_54_MHZ_VAL; 1645 } else { 1646 dev_err(component->dev, 1647 "PLL input clock %d above valid range\n", 1648 da7213->mclk_rate); 1649 return -EINVAL; 1650 } 1651 freq_ref = (da7213->mclk_rate / indiv); 1652 } 1653 1654 pll_ctrl = indiv_bits; 1655 1656 /* Configure PLL */ 1657 switch (source) { 1658 case DA7213_SYSCLK_MCLK: 1659 snd_soc_component_update_bits(component, DA7213_PLL_CTRL, 1660 DA7213_PLL_INDIV_MASK | 1661 DA7213_PLL_MODE_MASK, pll_ctrl); 1662 return 0; 1663 case DA7213_SYSCLK_PLL: 1664 break; 1665 case DA7213_SYSCLK_PLL_SRM: 1666 pll_ctrl |= DA7213_PLL_SRM_EN; 1667 fout = DA7213_PLL_FREQ_OUT_94310400; 1668 break; 1669 case DA7213_SYSCLK_PLL_32KHZ: 1670 if (da7213->mclk_rate != 32768) { 1671 dev_err(component->dev, 1672 "32KHz mode only valid with 32KHz MCLK\n"); 1673 return -EINVAL; 1674 } 1675 1676 pll_ctrl |= DA7213_PLL_32K_MODE | DA7213_PLL_SRM_EN; 1677 fout = DA7213_PLL_FREQ_OUT_94310400; 1678 break; 1679 default: 1680 dev_err(component->dev, "Invalid PLL config\n"); 1681 return -EINVAL; 1682 } 1683 1684 /* Calculate dividers for PLL */ 1685 pll_integer = fout / freq_ref; 1686 frac_div = (u64)(fout % freq_ref) * 8192ULL; 1687 do_div(frac_div, freq_ref); 1688 pll_frac_top = (frac_div >> DA7213_BYTE_SHIFT) & DA7213_BYTE_MASK; 1689 pll_frac_bot = (frac_div) & DA7213_BYTE_MASK; 1690 1691 /* Write PLL dividers */ 1692 snd_soc_component_write(component, DA7213_PLL_FRAC_TOP, pll_frac_top); 1693 snd_soc_component_write(component, DA7213_PLL_FRAC_BOT, pll_frac_bot); 1694 snd_soc_component_write(component, DA7213_PLL_INTEGER, pll_integer); 1695 1696 /* Enable PLL */ 1697 pll_ctrl |= DA7213_PLL_EN; 1698 snd_soc_component_update_bits(component, DA7213_PLL_CTRL, 1699 DA7213_PLL_INDIV_MASK | DA7213_PLL_MODE_MASK, 1700 pll_ctrl); 1701 1702 /* Assist 32KHz mode PLL lock */ 1703 if (source == DA7213_SYSCLK_PLL_32KHZ) { 1704 snd_soc_component_write(component, 0xF0, 0x8B); 1705 snd_soc_component_write(component, 0xF1, 0x03); 1706 snd_soc_component_write(component, 0xF1, 0x01); 1707 snd_soc_component_write(component, 0xF0, 0x00); 1708 } 1709 1710 return 0; 1711 } 1712 1713 static int da7213_set_component_pll(struct snd_soc_component *component, 1714 int pll_id, int source, 1715 unsigned int fref, unsigned int fout) 1716 { 1717 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 1718 da7213->fixed_clk_auto_pll = false; 1719 1720 return _da7213_set_component_pll(component, pll_id, source, fref, fout); 1721 } 1722 1723 /* 1724 * Select below from Sound Card, not Auto 1725 * SND_SOC_DAIFMT_CBC_CFC 1726 * SND_SOC_DAIFMT_CBP_CFP 1727 */ 1728 static const u64 da7213_dai_formats = 1729 SND_SOC_POSSIBLE_DAIFMT_I2S | 1730 SND_SOC_POSSIBLE_DAIFMT_LEFT_J | 1731 SND_SOC_POSSIBLE_DAIFMT_RIGHT_J | 1732 SND_SOC_POSSIBLE_DAIFMT_DSP_A | 1733 SND_SOC_POSSIBLE_DAIFMT_DSP_B | 1734 SND_SOC_POSSIBLE_DAIFMT_NB_NF | 1735 SND_SOC_POSSIBLE_DAIFMT_NB_IF | 1736 SND_SOC_POSSIBLE_DAIFMT_IB_NF | 1737 SND_SOC_POSSIBLE_DAIFMT_IB_IF; 1738 1739 /* DAI operations */ 1740 static const struct snd_soc_dai_ops da7213_dai_ops = { 1741 .hw_params = da7213_hw_params, 1742 .set_fmt = da7213_set_dai_fmt, 1743 .mute_stream = da7213_mute, 1744 .no_capture_mute = 1, 1745 .auto_selectable_formats = &da7213_dai_formats, 1746 .num_auto_selectable_formats = 1, 1747 }; 1748 1749 static struct snd_soc_dai_driver da7213_dai = { 1750 .name = "da7213-hifi", 1751 /* Playback Capabilities */ 1752 .playback = { 1753 .stream_name = "Playback", 1754 .channels_min = 1, 1755 .channels_max = 2, 1756 .rates = SNDRV_PCM_RATE_8000_96000, 1757 .formats = DA7213_FORMATS, 1758 }, 1759 /* Capture Capabilities */ 1760 .capture = { 1761 .stream_name = "Capture", 1762 .channels_min = 1, 1763 .channels_max = 2, 1764 .rates = SNDRV_PCM_RATE_8000_96000, 1765 .formats = DA7213_FORMATS, 1766 }, 1767 .ops = &da7213_dai_ops, 1768 .symmetric_rate = 1, 1769 }; 1770 1771 static int da7213_set_auto_pll(struct snd_soc_component *component, bool enable) 1772 { 1773 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 1774 int mode; 1775 1776 if (!da7213->fixed_clk_auto_pll) 1777 return 0; 1778 1779 da7213->mclk_rate = clk_get_rate(da7213->mclk); 1780 1781 if (enable) { 1782 /* Slave mode needs SRM for non-harmonic frequencies */ 1783 if (da7213->master) 1784 mode = DA7213_SYSCLK_PLL; 1785 else 1786 mode = DA7213_SYSCLK_PLL_SRM; 1787 1788 /* PLL is not required for harmonic frequencies */ 1789 switch (da7213->out_rate) { 1790 case DA7213_PLL_FREQ_OUT_90316800: 1791 if (da7213->mclk_rate == 11289600 || 1792 da7213->mclk_rate == 22579200 || 1793 da7213->mclk_rate == 45158400) 1794 mode = DA7213_SYSCLK_MCLK; 1795 break; 1796 case DA7213_PLL_FREQ_OUT_98304000: 1797 if (da7213->mclk_rate == 12288000 || 1798 da7213->mclk_rate == 24576000 || 1799 da7213->mclk_rate == 49152000) 1800 mode = DA7213_SYSCLK_MCLK; 1801 1802 break; 1803 default: 1804 return -1; 1805 } 1806 } else { 1807 /* Disable PLL in standby */ 1808 mode = DA7213_SYSCLK_MCLK; 1809 } 1810 1811 return _da7213_set_component_pll(component, 0, mode, 1812 da7213->mclk_rate, da7213->out_rate); 1813 } 1814 1815 static int da7213_set_bias_level(struct snd_soc_component *component, 1816 enum snd_soc_bias_level level) 1817 { 1818 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 1819 int ret; 1820 1821 switch (level) { 1822 case SND_SOC_BIAS_ON: 1823 break; 1824 case SND_SOC_BIAS_PREPARE: 1825 /* Enable MCLK for transition to ON state */ 1826 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_STANDBY) { 1827 if (da7213->mclk) { 1828 ret = clk_prepare_enable(da7213->mclk); 1829 if (ret) { 1830 dev_err(component->dev, 1831 "Failed to enable mclk\n"); 1832 return ret; 1833 } 1834 1835 da7213_set_auto_pll(component, true); 1836 } 1837 } 1838 break; 1839 case SND_SOC_BIAS_STANDBY: 1840 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) { 1841 /* Enable VMID reference & master bias */ 1842 snd_soc_component_update_bits(component, DA7213_REFERENCES, 1843 DA7213_VMID_EN | DA7213_BIAS_EN, 1844 DA7213_VMID_EN | DA7213_BIAS_EN); 1845 } else { 1846 /* Remove MCLK */ 1847 if (da7213->mclk) { 1848 da7213_set_auto_pll(component, false); 1849 clk_disable_unprepare(da7213->mclk); 1850 } 1851 } 1852 break; 1853 case SND_SOC_BIAS_OFF: 1854 /* Disable VMID reference & master bias */ 1855 snd_soc_component_update_bits(component, DA7213_REFERENCES, 1856 DA7213_VMID_EN | DA7213_BIAS_EN, 0); 1857 break; 1858 } 1859 return 0; 1860 } 1861 1862 #define DA7213_FIN_MIN_RATE (5 * MEGA) 1863 #define DA7212_FIN_MIN_RATE (2 * MEGA) 1864 1865 #if defined(CONFIG_OF) 1866 /* DT */ 1867 static const struct of_device_id da7213_of_match[] = { 1868 { .compatible = "dlg,da7212", .data = (void *)DA7212_FIN_MIN_RATE }, 1869 { .compatible = "dlg,da7213", .data = (void *)DA7213_FIN_MIN_RATE }, 1870 { } 1871 }; 1872 MODULE_DEVICE_TABLE(of, da7213_of_match); 1873 #endif 1874 1875 #ifdef CONFIG_ACPI 1876 static const struct acpi_device_id da7213_acpi_match[] = { 1877 { "DLGS7212", DA7212_FIN_MIN_RATE }, 1878 { "DLGS7213", DA7213_FIN_MIN_RATE }, 1879 { }, 1880 }; 1881 MODULE_DEVICE_TABLE(acpi, da7213_acpi_match); 1882 #endif 1883 1884 static enum da7213_micbias_voltage 1885 da7213_of_micbias_lvl(struct snd_soc_component *component, u32 val) 1886 { 1887 switch (val) { 1888 case 1600: 1889 return DA7213_MICBIAS_1_6V; 1890 case 2200: 1891 return DA7213_MICBIAS_2_2V; 1892 case 2500: 1893 return DA7213_MICBIAS_2_5V; 1894 case 3000: 1895 return DA7213_MICBIAS_3_0V; 1896 default: 1897 dev_warn(component->dev, "Invalid micbias level\n"); 1898 return DA7213_MICBIAS_2_2V; 1899 } 1900 } 1901 1902 static enum da7213_dmic_data_sel 1903 da7213_of_dmic_data_sel(struct snd_soc_component *component, const char *str) 1904 { 1905 if (!strcmp(str, "lrise_rfall")) { 1906 return DA7213_DMIC_DATA_LRISE_RFALL; 1907 } else if (!strcmp(str, "lfall_rrise")) { 1908 return DA7213_DMIC_DATA_LFALL_RRISE; 1909 } else { 1910 dev_warn(component->dev, "Invalid DMIC data select type\n"); 1911 return DA7213_DMIC_DATA_LRISE_RFALL; 1912 } 1913 } 1914 1915 static enum da7213_dmic_samplephase 1916 da7213_of_dmic_samplephase(struct snd_soc_component *component, const char *str) 1917 { 1918 if (!strcmp(str, "on_clkedge")) { 1919 return DA7213_DMIC_SAMPLE_ON_CLKEDGE; 1920 } else if (!strcmp(str, "between_clkedge")) { 1921 return DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE; 1922 } else { 1923 dev_warn(component->dev, "Invalid DMIC sample phase\n"); 1924 return DA7213_DMIC_SAMPLE_ON_CLKEDGE; 1925 } 1926 } 1927 1928 static enum da7213_dmic_clk_rate 1929 da7213_of_dmic_clkrate(struct snd_soc_component *component, u32 val) 1930 { 1931 switch (val) { 1932 case 1500000: 1933 return DA7213_DMIC_CLK_1_5MHZ; 1934 case 3000000: 1935 return DA7213_DMIC_CLK_3_0MHZ; 1936 default: 1937 dev_warn(component->dev, "Invalid DMIC clock rate\n"); 1938 return DA7213_DMIC_CLK_1_5MHZ; 1939 } 1940 } 1941 1942 static struct da7213_platform_data 1943 *da7213_fw_to_pdata(struct snd_soc_component *component) 1944 { 1945 struct device *dev = component->dev; 1946 struct da7213_platform_data *pdata; 1947 const char *fw_str; 1948 u32 fw_val32; 1949 1950 pdata = devm_kzalloc(component->dev, sizeof(*pdata), GFP_KERNEL); 1951 if (!pdata) 1952 return NULL; 1953 1954 if (device_property_read_u32(dev, "dlg,micbias1-lvl", &fw_val32) >= 0) 1955 pdata->micbias1_lvl = da7213_of_micbias_lvl(component, fw_val32); 1956 else 1957 pdata->micbias1_lvl = DA7213_MICBIAS_2_2V; 1958 1959 if (device_property_read_u32(dev, "dlg,micbias2-lvl", &fw_val32) >= 0) 1960 pdata->micbias2_lvl = da7213_of_micbias_lvl(component, fw_val32); 1961 else 1962 pdata->micbias2_lvl = DA7213_MICBIAS_2_2V; 1963 1964 if (!device_property_read_string(dev, "dlg,dmic-data-sel", &fw_str)) 1965 pdata->dmic_data_sel = da7213_of_dmic_data_sel(component, fw_str); 1966 else 1967 pdata->dmic_data_sel = DA7213_DMIC_DATA_LRISE_RFALL; 1968 1969 if (!device_property_read_string(dev, "dlg,dmic-samplephase", &fw_str)) 1970 pdata->dmic_samplephase = 1971 da7213_of_dmic_samplephase(component, fw_str); 1972 else 1973 pdata->dmic_samplephase = DA7213_DMIC_SAMPLE_ON_CLKEDGE; 1974 1975 if (device_property_read_u32(dev, "dlg,dmic-clkrate", &fw_val32) >= 0) 1976 pdata->dmic_clk_rate = da7213_of_dmic_clkrate(component, fw_val32); 1977 else 1978 pdata->dmic_clk_rate = DA7213_DMIC_CLK_3_0MHZ; 1979 1980 return pdata; 1981 } 1982 1983 static int da7213_probe(struct snd_soc_component *component) 1984 { 1985 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 1986 1987 pm_runtime_get_sync(component->dev); 1988 1989 /* Default to using ALC auto offset calibration mode. */ 1990 snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, 1991 DA7213_ALC_CALIB_MODE_MAN, 0); 1992 da7213->alc_calib_auto = true; 1993 1994 /* Default PC counter to free-running */ 1995 snd_soc_component_update_bits(component, DA7213_PC_COUNT, DA7213_PC_FREERUN_MASK, 1996 DA7213_PC_FREERUN_MASK); 1997 1998 /* Enable all Gain Ramps */ 1999 snd_soc_component_update_bits(component, DA7213_AUX_L_CTRL, 2000 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 2001 snd_soc_component_update_bits(component, DA7213_AUX_R_CTRL, 2002 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 2003 snd_soc_component_update_bits(component, DA7213_MIXIN_L_CTRL, 2004 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 2005 snd_soc_component_update_bits(component, DA7213_MIXIN_R_CTRL, 2006 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 2007 snd_soc_component_update_bits(component, DA7213_ADC_L_CTRL, 2008 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 2009 snd_soc_component_update_bits(component, DA7213_ADC_R_CTRL, 2010 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 2011 snd_soc_component_update_bits(component, DA7213_DAC_L_CTRL, 2012 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 2013 snd_soc_component_update_bits(component, DA7213_DAC_R_CTRL, 2014 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 2015 snd_soc_component_update_bits(component, DA7213_HP_L_CTRL, 2016 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 2017 snd_soc_component_update_bits(component, DA7213_HP_R_CTRL, 2018 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 2019 snd_soc_component_update_bits(component, DA7213_LINE_CTRL, 2020 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 2021 2022 /* 2023 * There are two separate control bits for input and output mixers as 2024 * well as headphone and line outs. 2025 * One to enable corresponding amplifier and other to enable its 2026 * output. As amplifier bits are related to power control, they are 2027 * being managed by DAPM while other (non power related) bits are 2028 * enabled here 2029 */ 2030 snd_soc_component_update_bits(component, DA7213_MIXIN_L_CTRL, 2031 DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN); 2032 snd_soc_component_update_bits(component, DA7213_MIXIN_R_CTRL, 2033 DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN); 2034 2035 snd_soc_component_update_bits(component, DA7213_MIXOUT_L_CTRL, 2036 DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN); 2037 snd_soc_component_update_bits(component, DA7213_MIXOUT_R_CTRL, 2038 DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN); 2039 2040 snd_soc_component_update_bits(component, DA7213_HP_L_CTRL, 2041 DA7213_HP_AMP_OE, DA7213_HP_AMP_OE); 2042 snd_soc_component_update_bits(component, DA7213_HP_R_CTRL, 2043 DA7213_HP_AMP_OE, DA7213_HP_AMP_OE); 2044 2045 snd_soc_component_update_bits(component, DA7213_LINE_CTRL, 2046 DA7213_LINE_AMP_OE, DA7213_LINE_AMP_OE); 2047 2048 /* Handle DT/Platform data */ 2049 da7213->pdata = dev_get_platdata(component->dev); 2050 if (!da7213->pdata) 2051 da7213->pdata = da7213_fw_to_pdata(component); 2052 2053 /* Set platform data values */ 2054 if (da7213->pdata) { 2055 struct da7213_platform_data *pdata = da7213->pdata; 2056 u8 micbias_lvl = 0, dmic_cfg = 0; 2057 2058 /* Set Mic Bias voltages */ 2059 switch (pdata->micbias1_lvl) { 2060 case DA7213_MICBIAS_1_6V: 2061 case DA7213_MICBIAS_2_2V: 2062 case DA7213_MICBIAS_2_5V: 2063 case DA7213_MICBIAS_3_0V: 2064 micbias_lvl |= (pdata->micbias1_lvl << 2065 DA7213_MICBIAS1_LEVEL_SHIFT); 2066 break; 2067 } 2068 switch (pdata->micbias2_lvl) { 2069 case DA7213_MICBIAS_1_6V: 2070 case DA7213_MICBIAS_2_2V: 2071 case DA7213_MICBIAS_2_5V: 2072 case DA7213_MICBIAS_3_0V: 2073 micbias_lvl |= (pdata->micbias2_lvl << 2074 DA7213_MICBIAS2_LEVEL_SHIFT); 2075 break; 2076 } 2077 snd_soc_component_update_bits(component, DA7213_MICBIAS_CTRL, 2078 DA7213_MICBIAS1_LEVEL_MASK | 2079 DA7213_MICBIAS2_LEVEL_MASK, micbias_lvl); 2080 2081 /* Set DMIC configuration */ 2082 switch (pdata->dmic_data_sel) { 2083 case DA7213_DMIC_DATA_LFALL_RRISE: 2084 case DA7213_DMIC_DATA_LRISE_RFALL: 2085 dmic_cfg |= (pdata->dmic_data_sel << 2086 DA7213_DMIC_DATA_SEL_SHIFT); 2087 break; 2088 } 2089 switch (pdata->dmic_samplephase) { 2090 case DA7213_DMIC_SAMPLE_ON_CLKEDGE: 2091 case DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE: 2092 dmic_cfg |= (pdata->dmic_samplephase << 2093 DA7213_DMIC_SAMPLEPHASE_SHIFT); 2094 break; 2095 } 2096 switch (pdata->dmic_clk_rate) { 2097 case DA7213_DMIC_CLK_3_0MHZ: 2098 case DA7213_DMIC_CLK_1_5MHZ: 2099 dmic_cfg |= (pdata->dmic_clk_rate << 2100 DA7213_DMIC_CLK_RATE_SHIFT); 2101 break; 2102 } 2103 snd_soc_component_update_bits(component, DA7213_MIC_CONFIG, 2104 DA7213_DMIC_DATA_SEL_MASK | 2105 DA7213_DMIC_SAMPLEPHASE_MASK | 2106 DA7213_DMIC_CLK_RATE_MASK, dmic_cfg); 2107 } 2108 2109 pm_runtime_put_sync(component->dev); 2110 2111 /* Check if MCLK provided */ 2112 da7213->mclk = devm_clk_get_optional(component->dev, "mclk"); 2113 if (IS_ERR(da7213->mclk)) 2114 return PTR_ERR(da7213->mclk); 2115 if (da7213->mclk) 2116 /* Do automatic PLL handling assuming fixed clock until 2117 * set_pll() has been called. This makes the codec usable 2118 * with the simple-audio-card driver. */ 2119 da7213->fixed_clk_auto_pll = true; 2120 2121 /* Default infinite tone gen, start/stop by Kcontrol */ 2122 snd_soc_component_write(component, DA7213_TONE_GEN_CYCLES, DA7213_BEEP_CYCLES_MASK); 2123 2124 return 0; 2125 } 2126 2127 static const struct snd_soc_component_driver soc_component_dev_da7213 = { 2128 .probe = da7213_probe, 2129 .set_bias_level = da7213_set_bias_level, 2130 .controls = da7213_snd_controls, 2131 .num_controls = ARRAY_SIZE(da7213_snd_controls), 2132 .dapm_widgets = da7213_dapm_widgets, 2133 .num_dapm_widgets = ARRAY_SIZE(da7213_dapm_widgets), 2134 .dapm_routes = da7213_audio_map, 2135 .num_dapm_routes = ARRAY_SIZE(da7213_audio_map), 2136 .set_sysclk = da7213_set_component_sysclk, 2137 .set_pll = da7213_set_component_pll, 2138 .idle_bias_on = 1, 2139 .use_pmdown_time = 1, 2140 .endianness = 1, 2141 }; 2142 2143 static const struct regmap_config da7213_regmap_config = { 2144 .reg_bits = 8, 2145 .val_bits = 8, 2146 2147 .max_register = DA7213_TONE_GEN_OFF_PER, 2148 .reg_defaults = da7213_reg_defaults, 2149 .num_reg_defaults = ARRAY_SIZE(da7213_reg_defaults), 2150 .volatile_reg = da7213_volatile_register, 2151 .cache_type = REGCACHE_RBTREE, 2152 }; 2153 2154 static void da7213_power_off(void *data) 2155 { 2156 struct da7213_priv *da7213 = data; 2157 regulator_bulk_disable(DA7213_NUM_SUPPLIES, da7213->supplies); 2158 } 2159 2160 static const char *da7213_supply_names[DA7213_NUM_SUPPLIES] = { 2161 [DA7213_SUPPLY_VDDA] = "VDDA", 2162 [DA7213_SUPPLY_VDDIO] = "VDDIO", 2163 }; 2164 2165 static int da7213_i2c_probe(struct i2c_client *i2c) 2166 { 2167 struct da7213_priv *da7213; 2168 int i, ret; 2169 2170 da7213 = devm_kzalloc(&i2c->dev, sizeof(*da7213), GFP_KERNEL); 2171 if (!da7213) 2172 return -ENOMEM; 2173 2174 da7213->fin_min_rate = (uintptr_t)i2c_get_match_data(i2c); 2175 if (!da7213->fin_min_rate) 2176 return -EINVAL; 2177 2178 i2c_set_clientdata(i2c, da7213); 2179 2180 /* Get required supplies */ 2181 for (i = 0; i < DA7213_NUM_SUPPLIES; ++i) 2182 da7213->supplies[i].supply = da7213_supply_names[i]; 2183 2184 ret = devm_regulator_bulk_get(&i2c->dev, DA7213_NUM_SUPPLIES, 2185 da7213->supplies); 2186 if (ret) { 2187 dev_err(&i2c->dev, "Failed to get supplies: %d\n", ret); 2188 return ret; 2189 } 2190 2191 ret = regulator_bulk_enable(DA7213_NUM_SUPPLIES, da7213->supplies); 2192 if (ret < 0) 2193 return ret; 2194 2195 ret = devm_add_action_or_reset(&i2c->dev, da7213_power_off, da7213); 2196 if (ret < 0) 2197 return ret; 2198 2199 da7213->regmap = devm_regmap_init_i2c(i2c, &da7213_regmap_config); 2200 if (IS_ERR(da7213->regmap)) { 2201 ret = PTR_ERR(da7213->regmap); 2202 dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret); 2203 return ret; 2204 } 2205 2206 pm_runtime_set_autosuspend_delay(&i2c->dev, 100); 2207 pm_runtime_use_autosuspend(&i2c->dev); 2208 pm_runtime_set_active(&i2c->dev); 2209 pm_runtime_enable(&i2c->dev); 2210 2211 ret = devm_snd_soc_register_component(&i2c->dev, 2212 &soc_component_dev_da7213, &da7213_dai, 1); 2213 if (ret < 0) { 2214 dev_err(&i2c->dev, "Failed to register da7213 component: %d\n", 2215 ret); 2216 } 2217 return ret; 2218 } 2219 2220 static void da7213_i2c_remove(struct i2c_client *i2c) 2221 { 2222 pm_runtime_disable(&i2c->dev); 2223 } 2224 2225 static int __maybe_unused da7213_runtime_suspend(struct device *dev) 2226 { 2227 struct da7213_priv *da7213 = dev_get_drvdata(dev); 2228 2229 regcache_cache_only(da7213->regmap, true); 2230 regcache_mark_dirty(da7213->regmap); 2231 regulator_bulk_disable(DA7213_NUM_SUPPLIES, da7213->supplies); 2232 2233 return 0; 2234 } 2235 2236 static int __maybe_unused da7213_runtime_resume(struct device *dev) 2237 { 2238 struct da7213_priv *da7213 = dev_get_drvdata(dev); 2239 int ret; 2240 2241 ret = regulator_bulk_enable(DA7213_NUM_SUPPLIES, da7213->supplies); 2242 if (ret < 0) 2243 return ret; 2244 regcache_cache_only(da7213->regmap, false); 2245 return regcache_sync(da7213->regmap); 2246 } 2247 2248 static const struct dev_pm_ops da7213_pm = { 2249 SET_RUNTIME_PM_OPS(da7213_runtime_suspend, da7213_runtime_resume, NULL) 2250 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume) 2251 }; 2252 2253 static const struct i2c_device_id da7213_i2c_id[] = { 2254 { "da7213" }, 2255 { } 2256 }; 2257 MODULE_DEVICE_TABLE(i2c, da7213_i2c_id); 2258 2259 /* I2C codec control layer */ 2260 static struct i2c_driver da7213_i2c_driver = { 2261 .driver = { 2262 .name = "da7213", 2263 .of_match_table = of_match_ptr(da7213_of_match), 2264 .acpi_match_table = ACPI_PTR(da7213_acpi_match), 2265 .pm = &da7213_pm, 2266 }, 2267 .probe = da7213_i2c_probe, 2268 .remove = da7213_i2c_remove, 2269 .id_table = da7213_i2c_id, 2270 }; 2271 2272 module_i2c_driver(da7213_i2c_driver); 2273 2274 MODULE_DESCRIPTION("ASoC DA7213 Codec driver"); 2275 MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>"); 2276 MODULE_AUTHOR("David Rau <David.Rau.opensource@dm.renesas.com>"); 2277 MODULE_LICENSE("GPL"); 2278