1*3158f585SChancel Liu // SPDX-License-Identifier: GPL-2.0
2*3158f585SChancel Liu /*
3*3158f585SChancel Liu * Cirrus Logic CS42448/CS42888 Audio CODEC DAI SPI driver
4*3158f585SChancel Liu *
5*3158f585SChancel Liu * Copyright 2026 NXP
6*3158f585SChancel Liu *
7*3158f585SChancel Liu */
8*3158f585SChancel Liu
9*3158f585SChancel Liu #include <linux/module.h>
10*3158f585SChancel Liu #include <linux/pm_runtime.h>
11*3158f585SChancel Liu #include <linux/regmap.h>
12*3158f585SChancel Liu #include <linux/spi/spi.h>
13*3158f585SChancel Liu #include <sound/soc.h>
14*3158f585SChancel Liu
15*3158f585SChancel Liu #include "cs42xx8.h"
16*3158f585SChancel Liu
17*3158f585SChancel Liu /*
18*3158f585SChancel Liu * CS42448/CS42888 SPI register access (from datasheet Figure 23):
19*3158f585SChancel Liu *
20*3158f585SChancel Liu * The SPI frame is 3 bytes:
21*3158f585SChancel Liu * Byte 0: chip address [7:1] = 1001111, bit[0] = R/W (0=write, 1=read)
22*3158f585SChancel Liu * Write: 0x9E, Read: 0x9F
23*3158f585SChancel Liu * Byte 1: MAP - Memory Address Pointer
24*3158f585SChancel Liu * bit[7] = INCR (auto-increment for burst), bits[6:0] = address
25*3158f585SChancel Liu * Byte 2: data byte
26*3158f585SChancel Liu *
27*3158f585SChancel Liu * We configure reg_bits=16 so that regmap treats the address field as 2 bytes
28*3158f585SChancel Liu * (big-endian). The chip address byte (0x9E/0x9F) is placed in the high byte
29*3158f585SChancel Liu * via write_flag_mask / read_flag_mask, and the MAP register address occupies
30*3158f585SChancel Liu * the low byte. Currently INCR (MAP bit[7]) is not set and use_single_read/write
31*3158f585SChancel Liu * are enabled. This produces the correct 3-byte on-wire frame without any
32*3158f585SChancel Liu * custom bus implementation:
33*3158f585SChancel Liu *
34*3158f585SChancel Liu * write: [0x9E, MAP_addr, data]
35*3158f585SChancel Liu * read: [0x9F, MAP_addr] -> [data]
36*3158f585SChancel Liu */
37*3158f585SChancel Liu
cs42xx8_spi_probe(struct spi_device * spi)38*3158f585SChancel Liu static int cs42xx8_spi_probe(struct spi_device *spi)
39*3158f585SChancel Liu {
40*3158f585SChancel Liu struct cs42xx8_driver_data *drvdata;
41*3158f585SChancel Liu struct regmap_config config;
42*3158f585SChancel Liu int ret;
43*3158f585SChancel Liu
44*3158f585SChancel Liu drvdata = (struct cs42xx8_driver_data *)spi_get_device_match_data(spi);
45*3158f585SChancel Liu if (!drvdata)
46*3158f585SChancel Liu return dev_err_probe(&spi->dev, -EINVAL,
47*3158f585SChancel Liu "failed to find driver data\n");
48*3158f585SChancel Liu
49*3158f585SChancel Liu config = cs42xx8_regmap_config;
50*3158f585SChancel Liu /*
51*3158f585SChancel Liu * reg_bits=16 makes regmap send a 2-byte address field (big-endian).
52*3158f585SChancel Liu * write_flag_mask/read_flag_mask are OR'd into that address field:
53*3158f585SChancel Liu */
54*3158f585SChancel Liu config.reg_bits = 16;
55*3158f585SChancel Liu config.write_flag_mask = 0x9E;
56*3158f585SChancel Liu config.read_flag_mask = 0x9F;
57*3158f585SChancel Liu
58*3158f585SChancel Liu ret = cs42xx8_probe(&spi->dev,
59*3158f585SChancel Liu devm_regmap_init_spi(spi, &config), drvdata);
60*3158f585SChancel Liu if (ret)
61*3158f585SChancel Liu return ret;
62*3158f585SChancel Liu
63*3158f585SChancel Liu pm_runtime_enable(&spi->dev);
64*3158f585SChancel Liu pm_request_idle(&spi->dev);
65*3158f585SChancel Liu
66*3158f585SChancel Liu return 0;
67*3158f585SChancel Liu }
68*3158f585SChancel Liu
cs42xx8_spi_remove(struct spi_device * spi)69*3158f585SChancel Liu static void cs42xx8_spi_remove(struct spi_device *spi)
70*3158f585SChancel Liu {
71*3158f585SChancel Liu pm_runtime_disable(&spi->dev);
72*3158f585SChancel Liu }
73*3158f585SChancel Liu
74*3158f585SChancel Liu static const struct of_device_id cs42xx8_of_match[] = {
75*3158f585SChancel Liu { .compatible = "cirrus,cs42448", .data = &cs42448_data, },
76*3158f585SChancel Liu { .compatible = "cirrus,cs42888", .data = &cs42888_data, },
77*3158f585SChancel Liu { /* sentinel */ }
78*3158f585SChancel Liu };
79*3158f585SChancel Liu MODULE_DEVICE_TABLE(of, cs42xx8_of_match);
80*3158f585SChancel Liu
81*3158f585SChancel Liu static const struct spi_device_id cs42xx8_spi_id[] = {
82*3158f585SChancel Liu { .name = "cs42448", .driver_data = (kernel_ulong_t)&cs42448_data },
83*3158f585SChancel Liu { .name = "cs42888", .driver_data = (kernel_ulong_t)&cs42888_data },
84*3158f585SChancel Liu { }
85*3158f585SChancel Liu };
86*3158f585SChancel Liu MODULE_DEVICE_TABLE(spi, cs42xx8_spi_id);
87*3158f585SChancel Liu
88*3158f585SChancel Liu static struct spi_driver cs42xx8_spi_driver = {
89*3158f585SChancel Liu .driver = {
90*3158f585SChancel Liu .name = "cs42xx8",
91*3158f585SChancel Liu .pm = pm_ptr(&cs42xx8_pm),
92*3158f585SChancel Liu .of_match_table = cs42xx8_of_match,
93*3158f585SChancel Liu },
94*3158f585SChancel Liu .probe = cs42xx8_spi_probe,
95*3158f585SChancel Liu .remove = cs42xx8_spi_remove,
96*3158f585SChancel Liu .id_table = cs42xx8_spi_id,
97*3158f585SChancel Liu };
98*3158f585SChancel Liu
99*3158f585SChancel Liu module_spi_driver(cs42xx8_spi_driver);
100*3158f585SChancel Liu
101*3158f585SChancel Liu MODULE_DESCRIPTION("Cirrus Logic CS42448/CS42888 ALSA SoC Codec SPI Driver");
102*3158f585SChancel Liu MODULE_AUTHOR("Chancel Liu <chancel.liu@nxp.com>");
103*3158f585SChancel Liu MODULE_LICENSE("GPL");
104