xref: /linux/sound/soc/codecs/cs42l73.h (revision f9ca060680e7c26a88d990ad9370572274b0d54b)
16d10c914SBrian Austin /*
26d10c914SBrian Austin  * ALSA SoC CS42L73 codec driver
36d10c914SBrian Austin  *
46d10c914SBrian Austin  * Copyright 2011 Cirrus Logic, Inc.
56d10c914SBrian Austin  *
66d10c914SBrian Austin  * Author: Georgi Vlaev <joe@nucleusys.com>
76d10c914SBrian Austin  *	   Brian Austin <brian.austin@cirrus.com>
86d10c914SBrian Austin  *
96d10c914SBrian Austin  * This program is free software; you can redistribute it and/or
106d10c914SBrian Austin  * modify it under the terms of the GNU General Public License
116d10c914SBrian Austin  * version 2 as published by the Free Software Foundation.
126d10c914SBrian Austin  *
136d10c914SBrian Austin  * This program is distributed in the hope that it will be useful, but
146d10c914SBrian Austin  * WITHOUT ANY WARRANTY; without even the implied warranty of
156d10c914SBrian Austin  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
166d10c914SBrian Austin  * General Public License for more details.
176d10c914SBrian Austin  *
186d10c914SBrian Austin  * You should have received a copy of the GNU General Public License
196d10c914SBrian Austin  * along with this program; if not, write to the Free Software
206d10c914SBrian Austin  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
216d10c914SBrian Austin  * 02110-1301 USA
226d10c914SBrian Austin  *
236d10c914SBrian Austin  */
246d10c914SBrian Austin 
256d10c914SBrian Austin #ifndef __CS42L73_H__
266d10c914SBrian Austin #define __CS42L73_H__
276d10c914SBrian Austin 
286d10c914SBrian Austin /* I2C Registers */
296d10c914SBrian Austin /* I2C Address: 1001010[R/W] - 10010100 = 0x94(Write); 10010101 = 0x95(Read) */
306d10c914SBrian Austin #define CS42L73_CHIP_ID		0x4a
316d10c914SBrian Austin #define CS42L73_DEVID_AB	0x01	/* Device ID A & B [RO]. */
326d10c914SBrian Austin #define CS42L73_DEVID_CD	0x02    /* Device ID C & D [RO]. */
336d10c914SBrian Austin #define CS42L73_DEVID_E		0x03    /* Device ID E [RO]. */
346d10c914SBrian Austin #define CS42L73_REVID		0x05    /* Revision ID [RO]. */
356d10c914SBrian Austin #define CS42L73_PWRCTL1		0x06    /* Power Control 1. */
366d10c914SBrian Austin #define CS42L73_PWRCTL2		0x07    /* Power Control 2. */
376d10c914SBrian Austin #define CS42L73_PWRCTL3		0x08    /* Power Control 3. */
386d10c914SBrian Austin #define CS42L73_CPFCHC		0x09    /* Charge Pump Freq. Class H Ctl. */
396d10c914SBrian Austin #define CS42L73_OLMBMSDC	0x0A    /* Output Load, MIC Bias, MIC2 SDT */
406d10c914SBrian Austin #define CS42L73_DMMCC		0x0B    /* Digital MIC & Master Clock Ctl. */
416d10c914SBrian Austin #define CS42L73_XSPC		0x0C    /* Auxiliary Serial Port (XSP) Ctl. */
426d10c914SBrian Austin #define CS42L73_XSPMMCC		0x0D    /* XSP Master Mode Clocking Control. */
436d10c914SBrian Austin #define CS42L73_ASPC		0x0E    /* Audio Serial Port (ASP) Control. */
446d10c914SBrian Austin #define CS42L73_ASPMMCC		0x0F    /* ASP Master Mode Clocking Control. */
456d10c914SBrian Austin #define CS42L73_VSPC		0x10    /* Voice Serial Port (VSP) Control. */
466d10c914SBrian Austin #define CS42L73_VSPMMCC		0x11    /* VSP Master Mode Clocking Control. */
476d10c914SBrian Austin #define CS42L73_VXSPFS		0x12    /* VSP & XSP Sample Rate. */
486d10c914SBrian Austin #define CS42L73_MIOPC		0x13    /* Misc. Input & Output Path Control. */
496d10c914SBrian Austin #define CS42L73_ADCIPC		0x14	/* ADC/IP Control. */
506d10c914SBrian Austin #define CS42L73_MICAPREPGAAVOL	0x15	/* MIC 1 [A] PreAmp, PGAA Vol. */
516d10c914SBrian Austin #define CS42L73_MICBPREPGABVOL	0x16	/* MIC 2 [B] PreAmp, PGAB Vol. */
526d10c914SBrian Austin #define CS42L73_IPADVOL		0x17	/* Input Pat7h A Digital Volume. */
536d10c914SBrian Austin #define CS42L73_IPBDVOL		0x18	/* Input Path B Digital Volume. */
546d10c914SBrian Austin #define CS42L73_PBDC		0x19	/* Playback Digital Control. */
556d10c914SBrian Austin #define CS42L73_HLADVOL		0x1A	/* HP/Line A Out Digital Vol. */
566d10c914SBrian Austin #define CS42L73_HLBDVOL		0x1B	/* HP/Line B Out Digital Vol. */
576d10c914SBrian Austin #define CS42L73_SPKDVOL		0x1C	/* Spkphone Out [A] Digital Vol. */
586d10c914SBrian Austin #define CS42L73_ESLDVOL		0x1D	/* Ear/Spkphone LO [B] Digital */
596d10c914SBrian Austin #define CS42L73_HPAAVOL		0x1E	/* HP A Analog Volume. */
606d10c914SBrian Austin #define CS42L73_HPBAVOL		0x1F	/* HP B Analog Volume. */
616d10c914SBrian Austin #define CS42L73_LOAAVOL		0x20	/* Line Out A Analog Volume. */
626d10c914SBrian Austin #define CS42L73_LOBAVOL		0x21	/* Line Out B Analog Volume. */
636d10c914SBrian Austin #define CS42L73_STRINV		0x22	/* Stereo Input Path Adv. Vol. */
646d10c914SBrian Austin #define CS42L73_XSPINV		0x23	/* Auxiliary Port Input Advisory Vol. */
656d10c914SBrian Austin #define CS42L73_ASPINV		0x24	/* Audio Port Input Advisory Vol. */
666d10c914SBrian Austin #define CS42L73_VSPINV		0x25	/* Voice Port Input Advisory Vol. */
676d10c914SBrian Austin #define CS42L73_LIMARATEHL	0x26	/* Lmtr Attack Rate HP/Line. */
686d10c914SBrian Austin #define CS42L73_LIMRRATEHL	0x27	/* Lmtr Ctl, Rel.Rate HP/Line. */
696d10c914SBrian Austin #define CS42L73_LMAXHL		0x28	/* Lmtr Thresholds HP/Line. */
706d10c914SBrian Austin #define CS42L73_LIMARATESPK	0x29	/* Lmtr Attack Rate Spkphone [A]. */
716d10c914SBrian Austin #define CS42L73_LIMRRATESPK	0x2A	/* Lmtr Ctl,Release Rate Spk. [A]. */
726d10c914SBrian Austin #define CS42L73_LMAXSPK		0x2B	/* Lmtr Thresholds Spkphone [A]. */
736d10c914SBrian Austin #define CS42L73_LIMARATEESL	0x2C	/* Lmtr Attack Rate  */
746d10c914SBrian Austin #define CS42L73_LIMRRATEESL	0x2D	/* Lmtr Ctl,Release Rate */
756d10c914SBrian Austin #define CS42L73_LMAXESL		0x2E	/* Lmtr Thresholds */
766d10c914SBrian Austin #define CS42L73_ALCARATE	0x2F	/* ALC Enable, Attack Rate AB. */
776d10c914SBrian Austin #define CS42L73_ALCRRATE	0x30	/* ALC Release Rate AB.  */
786d10c914SBrian Austin #define CS42L73_ALCMINMAX	0x31	/* ALC Thresholds AB. */
796d10c914SBrian Austin #define CS42L73_NGCAB		0x32	/* Noise Gate Ctl AB. */
806d10c914SBrian Austin #define CS42L73_ALCNGMC		0x33	/* ALC & Noise Gate Misc Ctl. */
816d10c914SBrian Austin #define CS42L73_MIXERCTL	0x34	/* Mixer Control. */
826d10c914SBrian Austin #define CS42L73_HLAIPAA		0x35	/* HP/LO Left Mixer: L. */
836d10c914SBrian Austin #define CS42L73_HLBIPBA		0x36	/* HP/LO Right Mixer: R.  */
846d10c914SBrian Austin #define CS42L73_HLAXSPAA	0x37	/* HP/LO Left Mixer: XSP L */
856d10c914SBrian Austin #define CS42L73_HLBXSPBA	0x38	/* HP/LO Right Mixer: XSP R */
866d10c914SBrian Austin #define CS42L73_HLAASPAA	0x39	/* HP/LO Left Mixer: ASP L */
876d10c914SBrian Austin #define CS42L73_HLBASPBA	0x3A	/* HP/LO Right Mixer: ASP R */
886d10c914SBrian Austin #define CS42L73_HLAVSPMA	0x3B	/* HP/LO Left Mixer: VSP. */
896d10c914SBrian Austin #define CS42L73_HLBVSPMA	0x3C	/* HP/LO Right Mixer: VSP */
906d10c914SBrian Austin #define CS42L73_XSPAIPAA	0x3D	/* XSP Left Mixer: Left */
916d10c914SBrian Austin #define CS42L73_XSPBIPBA	0x3E	/* XSP Rt. Mixer: Right */
926d10c914SBrian Austin #define CS42L73_XSPAXSPAA	0x3F	/* XSP Left Mixer: XSP L */
936d10c914SBrian Austin #define CS42L73_XSPBXSPBA	0x40	/* XSP Rt. Mixer: XSP R */
946d10c914SBrian Austin #define CS42L73_XSPAASPAA	0x41	/* XSP Left Mixer: ASP L */
956d10c914SBrian Austin #define CS42L73_XSPAASPBA	0x42	/* XSP Rt. Mixer: ASP R */
966d10c914SBrian Austin #define CS42L73_XSPAVSPMA	0x43	/* XSP Left Mixer: VSP */
976d10c914SBrian Austin #define CS42L73_XSPBVSPMA	0x44	/* XSP Rt. Mixer: VSP */
986d10c914SBrian Austin #define CS42L73_ASPAIPAA	0x45	/* ASP Left Mixer: Left */
996d10c914SBrian Austin #define CS42L73_ASPBIPBA	0x46	/* ASP Rt. Mixer: Right */
1006d10c914SBrian Austin #define CS42L73_ASPAXSPAA	0x47	/* ASP Left Mixer: XSP L */
1016d10c914SBrian Austin #define CS42L73_ASPBXSPBA	0x48	/* ASP Rt. Mixer: XSP R */
1026d10c914SBrian Austin #define CS42L73_ASPAASPAA	0x49	/* ASP Left Mixer: ASP L */
1036d10c914SBrian Austin #define CS42L73_ASPBASPBA	0x4A	/* ASP Rt. Mixer: ASP R */
1046d10c914SBrian Austin #define CS42L73_ASPAVSPMA	0x4B	/* ASP Left Mixer: VSP */
1056d10c914SBrian Austin #define CS42L73_ASPBVSPMA	0x4C	/* ASP Rt. Mixer: VSP */
1066d10c914SBrian Austin #define CS42L73_VSPAIPAA	0x4D	/* VSP Left Mixer: Left */
1076d10c914SBrian Austin #define CS42L73_VSPBIPBA	0x4E	/* VSP Rt. Mixer: Right */
1086d10c914SBrian Austin #define CS42L73_VSPAXSPAA	0x4F	/* VSP Left Mixer: XSP L */
1096d10c914SBrian Austin #define CS42L73_VSPBXSPBA	0x50	/* VSP Rt. Mixer: XSP R */
1106d10c914SBrian Austin #define CS42L73_VSPAASPAA	0x51	/* VSP Left Mixer: ASP Left */
1116d10c914SBrian Austin #define CS42L73_VSPBASPBA	0x52	/* VSP Rt. Mixer: ASP Right */
1126d10c914SBrian Austin #define CS42L73_VSPAVSPMA	0x53	/* VSP Left Mixer: VSP */
1136d10c914SBrian Austin #define CS42L73_VSPBVSPMA	0x54	/* VSP Rt. Mixer: VSP */
1146d10c914SBrian Austin #define CS42L73_MMIXCTL		0x55	/* Mono Mixer Controls. */
1156d10c914SBrian Austin #define CS42L73_SPKMIPMA	0x56	/* SPK Mono Mixer: In. Path */
1166d10c914SBrian Austin #define CS42L73_SPKMXSPA	0x57	/* SPK Mono Mixer: XSP Mono/L/R Att. */
1176d10c914SBrian Austin #define CS42L73_SPKMASPA	0x58	/* SPK Mono Mixer: ASP Mono/L/R Att. */
1186d10c914SBrian Austin #define CS42L73_SPKMVSPMA	0x59	/* SPK Mono Mixer: VSP Mono Atten. */
1196d10c914SBrian Austin #define CS42L73_ESLMIPMA	0x5A	/* Ear/SpLO Mono Mixer: */
1206d10c914SBrian Austin #define CS42L73_ESLMXSPA	0x5B	/* Ear/SpLO Mono Mixer: XSP */
1216d10c914SBrian Austin #define CS42L73_ESLMASPA	0x5C	/* Ear/SpLO Mono Mixer: ASP */
1226d10c914SBrian Austin #define CS42L73_ESLMVSPMA	0x5D	/* Ear/SpLO Mono Mixer: VSP */
1236d10c914SBrian Austin #define CS42L73_IM1		0x5E	/* Interrupt Mask 1.  */
1246d10c914SBrian Austin #define CS42L73_IM2		0x5F	/* Interrupt Mask 2. */
1256d10c914SBrian Austin #define CS42L73_IS1		0x60	/* Interrupt Status 1 [RO]. */
1266d10c914SBrian Austin #define CS42L73_IS2		0x61	/* Interrupt Status 2 [RO]. */
1276d10c914SBrian Austin #define CS42L73_MAX_REGISTER	0x61	/* Total Registers */
1286d10c914SBrian Austin /* Bitfield Definitions */
1296d10c914SBrian Austin 
1306d10c914SBrian Austin /* CS42L73_PWRCTL1 */
131*f9ca0606SBrian Austin #define CS42L73_PDN_ADCB		(1 << 7)
132*f9ca0606SBrian Austin #define CS42L73_PDN_DMICB		(1 << 6)
133*f9ca0606SBrian Austin #define CS42L73_PDN_ADCA		(1 << 5)
134*f9ca0606SBrian Austin #define CS42L73_PDN_DMICA		(1 << 4)
135*f9ca0606SBrian Austin #define CS42L73_PDN_LDO			(1 << 2)
136*f9ca0606SBrian Austin #define CS42L73_DISCHG_FILT		(1 << 1)
137*f9ca0606SBrian Austin #define CS42L73_PDN			(1 << 0)
1386d10c914SBrian Austin 
1396d10c914SBrian Austin /* CS42L73_PWRCTL2 */
140*f9ca0606SBrian Austin #define CS42L73_PDN_MIC2_BIAS		(1 << 7)
141*f9ca0606SBrian Austin #define CS42L73_PDN_MIC1_BIAS		(1 << 6)
142*f9ca0606SBrian Austin #define CS42L73_PDN_VSP			(1 << 4)
143*f9ca0606SBrian Austin #define CS42L73_PDN_ASP_SDOUT		(1 << 3)
144*f9ca0606SBrian Austin #define CS42L73_PDN_ASP_SDIN		(1 << 2)
145*f9ca0606SBrian Austin #define CS42L73_PDN_XSP_SDOUT		(1 << 1)
146*f9ca0606SBrian Austin #define CS42L73_PDN_XSP_SDIN		(1 << 0)
1476d10c914SBrian Austin 
1486d10c914SBrian Austin /* CS42L73_PWRCTL3 */
149*f9ca0606SBrian Austin #define CS42L73_PDN_THMS		(1 << 5)
150*f9ca0606SBrian Austin #define CS42L73_PDN_SPKLO		(1 << 4)
151*f9ca0606SBrian Austin #define CS42L73_PDN_EAR			(1 << 3)
152*f9ca0606SBrian Austin #define CS42L73_PDN_SPK			(1 << 2)
153*f9ca0606SBrian Austin #define CS42L73_PDN_LO			(1 << 1)
154*f9ca0606SBrian Austin #define CS42L73_PDN_HP			(1 << 0)
1556d10c914SBrian Austin 
1566d10c914SBrian Austin /* Thermal Overload Detect. Requires interrupt ... */
157*f9ca0606SBrian Austin #define CS42L73_THMOVLD_150C		0
158*f9ca0606SBrian Austin #define CS42L73_THMOVLD_132C		1
159*f9ca0606SBrian Austin #define CS42L73_THMOVLD_115C		2
160*f9ca0606SBrian Austin #define CS42L73_THMOVLD_098C		3
1616d10c914SBrian Austin 
1623d8c8bc0SBrian Austin #define CS42L73_CHARGEPUMP_MASK	(0xF0)
1636d10c914SBrian Austin 
1646d10c914SBrian Austin /* CS42L73_ASPC, CS42L73_XSPC, CS42L73_VSPC */
165*f9ca0606SBrian Austin #define	CS42L73_SP_3ST			(1 << 7)
166*f9ca0606SBrian Austin #define CS42L73_SPDIF_I2S		(0 << 6)
167*f9ca0606SBrian Austin #define CS42L73_SPDIF_PCM		(1 << 6)
168*f9ca0606SBrian Austin #define CS42L73_PCM_MODE0		(0 << 4)
169*f9ca0606SBrian Austin #define CS42L73_PCM_MODE1		(1 << 4)
170*f9ca0606SBrian Austin #define CS42L73_PCM_MODE2		(2 << 4)
171*f9ca0606SBrian Austin #define CS42L73_PCM_MODE_MASK		(3 << 4)
172*f9ca0606SBrian Austin #define CS42L73_PCM_BIT_ORDER		(1 << 3)
173*f9ca0606SBrian Austin #define CS42L73_MCK_SCLK_64FS		(0 << 0)
174*f9ca0606SBrian Austin #define CS42L73_MCK_SCLK_MCLK		(2 << 0)
175*f9ca0606SBrian Austin #define CS42L73_MCK_SCLK_PREMCLK	(3 << 0)
1766d10c914SBrian Austin 
1776d10c914SBrian Austin /* CS42L73_xSPMMCC */
178*f9ca0606SBrian Austin #define CS42L73_MS_MASTER		(1 << 7)
1796d10c914SBrian Austin 
1806d10c914SBrian Austin 
1816d10c914SBrian Austin /* CS42L73_DMMCC */
182*f9ca0606SBrian Austin #define CS42L73_MCLKDIS			(1 << 0)
183*f9ca0606SBrian Austin #define CS42L73_MCLKSEL_MCLK2		(1 << 4)
184*f9ca0606SBrian Austin #define CS42L73_MCLKSEL_MCLK1		(0 << 4)
1856d10c914SBrian Austin 
1866d10c914SBrian Austin /* CS42L73 MCLK derived from MCLK1 or MCLK2 */
1876d10c914SBrian Austin #define CS42L73_CLKID_MCLK1     0
1886d10c914SBrian Austin #define CS42L73_CLKID_MCLK2     1
1896d10c914SBrian Austin 
1906d10c914SBrian Austin #define CS42L73_MCLKXDIV	0
1916d10c914SBrian Austin #define CS42L73_MMCCDIV         1
1926d10c914SBrian Austin 
1936d10c914SBrian Austin #define CS42L73_XSP		0
1946d10c914SBrian Austin #define CS42L73_ASP		1
1956d10c914SBrian Austin #define CS42L73_VSP		2
1966d10c914SBrian Austin 
1976d10c914SBrian Austin /* IS1, IM1 */
198*f9ca0606SBrian Austin #define CS42L73_MIC2_SDET		(1 << 6)
199*f9ca0606SBrian Austin #define CS42L73_THMOVLD			(1 << 4)
200*f9ca0606SBrian Austin #define CS42L73_DIGMIXOVFL		(1 << 3)
201*f9ca0606SBrian Austin #define CS42L73_IPBOVFL			(1 << 1)
202*f9ca0606SBrian Austin #define CS42L73_IPAOVFL			(1 << 0)
2036d10c914SBrian Austin 
2046d10c914SBrian Austin /* Analog Softramp */
205*f9ca0606SBrian Austin #define CS42L73_ANLGOSFT		(1 << 0)
2066d10c914SBrian Austin 
2076d10c914SBrian Austin /* HP A/B Analog Mute */
208*f9ca0606SBrian Austin #define CS42L73_HPA_MUTE		(1 << 7)
2096d10c914SBrian Austin /* LO A/B Analog Mute	*/
210*f9ca0606SBrian Austin #define CS42L73_LOA_MUTE		(1 << 7)
2116d10c914SBrian Austin /* Digital Mute */
212*f9ca0606SBrian Austin #define CS42L73_HLAD_MUTE		(1 << 0)
213*f9ca0606SBrian Austin #define CS42L73_HLBD_MUTE		(1 << 1)
214*f9ca0606SBrian Austin #define CS42L73_SPKD_MUTE		(1 << 2)
215*f9ca0606SBrian Austin #define CS42L73_ESLD_MUTE		(1 << 3)
2166d10c914SBrian Austin 
2176d10c914SBrian Austin /* Misc defines for codec */
2186d10c914SBrian Austin #define CS42L73_DEVID		0x00042A73
2196d10c914SBrian Austin #define CS42L73_MCLKX_MIN	5644800
2206d10c914SBrian Austin #define CS42L73_MCLKX_MAX	38400000
2216d10c914SBrian Austin 
2226d10c914SBrian Austin #define CS42L73_SPC(id)		(CS42L73_XSPC + (id << 1))
2236d10c914SBrian Austin #define CS42L73_MMCC(id)	(CS42L73_XSPMMCC + (id << 1))
2246d10c914SBrian Austin #define CS42L73_SPFS(id)	((id == CS42L73_ASP) ? CS42L73_ASPC : CS42L73_VXSPFS)
2256d10c914SBrian Austin 
2266d10c914SBrian Austin #endif	/* __CS42L73_H__ */
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