1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // Driver for Cirrus Logic CS35L56 smart amp 4 // 5 // Copyright (C) 2023 Cirrus Logic, Inc. and 6 // Cirrus Logic International Semiconductor Ltd. 7 8 #include <linux/completion.h> 9 #include <linux/debugfs.h> 10 #include <linux/delay.h> 11 #include <linux/err.h> 12 #include <linux/gpio/consumer.h> 13 #include <linux/interrupt.h> 14 #include <linux/math.h> 15 #include <linux/module.h> 16 #include <linux/pm.h> 17 #include <linux/pm_runtime.h> 18 #include <linux/regmap.h> 19 #include <linux/regulator/consumer.h> 20 #include <linux/slab.h> 21 #include <linux/soundwire/sdw.h> 22 #include <linux/types.h> 23 #include <linux/workqueue.h> 24 #include <sound/pcm.h> 25 #include <sound/pcm_params.h> 26 #include <sound/soc.h> 27 #include <sound/soc-dapm.h> 28 #include <sound/tlv.h> 29 30 #include "wm_adsp.h" 31 #include "cs35l56.h" 32 33 static int cs35l56_dsp_event(struct snd_soc_dapm_widget *w, 34 struct snd_kcontrol *kcontrol, int event); 35 36 static void cs35l56_wait_dsp_ready(struct cs35l56_private *cs35l56) 37 { 38 /* Wait for patching to complete */ 39 flush_work(&cs35l56->dsp_work); 40 } 41 42 static int cs35l56_dspwait_get_volsw(struct snd_kcontrol *kcontrol, 43 struct snd_ctl_elem_value *ucontrol) 44 { 45 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 46 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 47 48 cs35l56_wait_dsp_ready(cs35l56); 49 return snd_soc_get_volsw(kcontrol, ucontrol); 50 } 51 52 static int cs35l56_dspwait_put_volsw(struct snd_kcontrol *kcontrol, 53 struct snd_ctl_elem_value *ucontrol) 54 { 55 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 56 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 57 58 cs35l56_wait_dsp_ready(cs35l56); 59 return snd_soc_put_volsw(kcontrol, ucontrol); 60 } 61 62 static const unsigned short cs35l56_asp1_mixer_regs[] = { 63 CS35L56_ASP1TX1_INPUT, CS35L56_ASP1TX2_INPUT, 64 CS35L56_ASP1TX3_INPUT, CS35L56_ASP1TX4_INPUT, 65 }; 66 67 static const char * const cs35l56_asp1_mux_control_names[] = { 68 "ASP1 TX1 Source", "ASP1 TX2 Source", "ASP1 TX3 Source", "ASP1 TX4 Source" 69 }; 70 71 static int cs35l56_dspwait_asp1tx_get(struct snd_kcontrol *kcontrol, 72 struct snd_ctl_elem_value *ucontrol) 73 { 74 struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol); 75 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 76 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 77 int index = e->shift_l; 78 unsigned int addr, val; 79 int ret; 80 81 /* Wait for mux to be initialized */ 82 cs35l56_wait_dsp_ready(cs35l56); 83 flush_work(&cs35l56->mux_init_work); 84 85 addr = cs35l56_asp1_mixer_regs[index]; 86 ret = regmap_read(cs35l56->base.regmap, addr, &val); 87 if (ret) 88 return ret; 89 90 val &= CS35L56_ASP_TXn_SRC_MASK; 91 ucontrol->value.enumerated.item[0] = snd_soc_enum_val_to_item(e, val); 92 93 return 0; 94 } 95 96 static int cs35l56_dspwait_asp1tx_put(struct snd_kcontrol *kcontrol, 97 struct snd_ctl_elem_value *ucontrol) 98 { 99 struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol); 100 struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kcontrol); 101 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 102 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 103 int item = ucontrol->value.enumerated.item[0]; 104 int index = e->shift_l; 105 unsigned int addr, val; 106 bool changed; 107 int ret; 108 109 /* Wait for mux to be initialized */ 110 cs35l56_wait_dsp_ready(cs35l56); 111 flush_work(&cs35l56->mux_init_work); 112 113 addr = cs35l56_asp1_mixer_regs[index]; 114 val = snd_soc_enum_item_to_val(e, item); 115 116 ret = regmap_update_bits_check(cs35l56->base.regmap, addr, 117 CS35L56_ASP_TXn_SRC_MASK, val, &changed); 118 if (!ret) 119 return ret; 120 121 if (changed) 122 snd_soc_dapm_mux_update_power(dapm, kcontrol, item, e, NULL); 123 124 return changed; 125 } 126 127 static void cs35l56_mark_asp1_mixer_widgets_dirty(struct cs35l56_private *cs35l56) 128 { 129 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(cs35l56->component); 130 const char *prefix = cs35l56->component->name_prefix; 131 char full_name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; 132 const char *name; 133 struct snd_kcontrol *kcontrol; 134 struct soc_enum *e; 135 unsigned int val[4]; 136 int i, item, ret; 137 138 /* 139 * Resume so we can read the registers from silicon if the regmap 140 * cache has not yet been populated. 141 */ 142 ret = pm_runtime_resume_and_get(cs35l56->base.dev); 143 if (ret < 0) 144 return; 145 146 ret = regmap_bulk_read(cs35l56->base.regmap, CS35L56_ASP1TX1_INPUT, 147 val, ARRAY_SIZE(val)); 148 149 pm_runtime_mark_last_busy(cs35l56->base.dev); 150 pm_runtime_put_autosuspend(cs35l56->base.dev); 151 152 if (ret) { 153 dev_err(cs35l56->base.dev, "Failed to read ASP1 mixer regs: %d\n", ret); 154 return; 155 } 156 157 snd_soc_card_mutex_lock(dapm->card); 158 WARN_ON(!dapm->card->instantiated); 159 160 for (i = 0; i < ARRAY_SIZE(cs35l56_asp1_mux_control_names); ++i) { 161 name = cs35l56_asp1_mux_control_names[i]; 162 163 if (prefix) { 164 snprintf(full_name, sizeof(full_name), "%s %s", prefix, name); 165 name = full_name; 166 } 167 168 kcontrol = snd_soc_card_get_kcontrol(dapm->card, name); 169 if (!kcontrol) { 170 dev_warn(cs35l56->base.dev, "Could not find control %s\n", name); 171 continue; 172 } 173 174 e = (struct soc_enum *)kcontrol->private_value; 175 item = snd_soc_enum_val_to_item(e, val[i] & CS35L56_ASP_TXn_SRC_MASK); 176 snd_soc_dapm_mux_update_power(dapm, kcontrol, item, e, NULL); 177 } 178 179 snd_soc_card_mutex_unlock(dapm->card); 180 } 181 182 static void cs35l56_mux_init_work(struct work_struct *work) 183 { 184 struct cs35l56_private *cs35l56 = container_of(work, 185 struct cs35l56_private, 186 mux_init_work); 187 188 cs35l56_mark_asp1_mixer_widgets_dirty(cs35l56); 189 } 190 191 static DECLARE_TLV_DB_SCALE(vol_tlv, -10000, 25, 0); 192 193 static const struct snd_kcontrol_new cs35l56_controls[] = { 194 SOC_SINGLE_EXT("Speaker Switch", 195 CS35L56_MAIN_RENDER_USER_MUTE, 0, 1, 1, 196 cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw), 197 SOC_SINGLE_S_EXT_TLV("Speaker Volume", 198 CS35L56_MAIN_RENDER_USER_VOLUME, 199 6, -400, 400, 9, 0, 200 cs35l56_dspwait_get_volsw, 201 cs35l56_dspwait_put_volsw, 202 vol_tlv), 203 SOC_SINGLE_EXT("Posture Number", CS35L56_MAIN_POSTURE_NUMBER, 204 0, 255, 0, 205 cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw), 206 }; 207 208 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx1_enum, 209 SND_SOC_NOPM, 210 0, 0, 211 cs35l56_tx_input_texts, 212 cs35l56_tx_input_values); 213 214 static const struct snd_kcontrol_new asp1_tx1_mux = 215 SOC_DAPM_ENUM_EXT("ASP1TX1 SRC", cs35l56_asp1tx1_enum, 216 cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put); 217 218 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx2_enum, 219 SND_SOC_NOPM, 220 1, 0, 221 cs35l56_tx_input_texts, 222 cs35l56_tx_input_values); 223 224 static const struct snd_kcontrol_new asp1_tx2_mux = 225 SOC_DAPM_ENUM_EXT("ASP1TX2 SRC", cs35l56_asp1tx2_enum, 226 cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put); 227 228 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx3_enum, 229 SND_SOC_NOPM, 230 2, 0, 231 cs35l56_tx_input_texts, 232 cs35l56_tx_input_values); 233 234 static const struct snd_kcontrol_new asp1_tx3_mux = 235 SOC_DAPM_ENUM_EXT("ASP1TX3 SRC", cs35l56_asp1tx3_enum, 236 cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put); 237 238 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx4_enum, 239 SND_SOC_NOPM, 240 3, 0, 241 cs35l56_tx_input_texts, 242 cs35l56_tx_input_values); 243 244 static const struct snd_kcontrol_new asp1_tx4_mux = 245 SOC_DAPM_ENUM_EXT("ASP1TX4 SRC", cs35l56_asp1tx4_enum, 246 cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put); 247 248 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx1_enum, 249 CS35L56_SWIRE_DP3_CH1_INPUT, 250 0, CS35L56_SWIRETXn_SRC_MASK, 251 cs35l56_tx_input_texts, 252 cs35l56_tx_input_values); 253 254 static const struct snd_kcontrol_new sdw1_tx1_mux = 255 SOC_DAPM_ENUM("SDW1TX1 SRC", cs35l56_sdw1tx1_enum); 256 257 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx2_enum, 258 CS35L56_SWIRE_DP3_CH2_INPUT, 259 0, CS35L56_SWIRETXn_SRC_MASK, 260 cs35l56_tx_input_texts, 261 cs35l56_tx_input_values); 262 263 static const struct snd_kcontrol_new sdw1_tx2_mux = 264 SOC_DAPM_ENUM("SDW1TX2 SRC", cs35l56_sdw1tx2_enum); 265 266 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx3_enum, 267 CS35L56_SWIRE_DP3_CH3_INPUT, 268 0, CS35L56_SWIRETXn_SRC_MASK, 269 cs35l56_tx_input_texts, 270 cs35l56_tx_input_values); 271 272 static const struct snd_kcontrol_new sdw1_tx3_mux = 273 SOC_DAPM_ENUM("SDW1TX3 SRC", cs35l56_sdw1tx3_enum); 274 275 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx4_enum, 276 CS35L56_SWIRE_DP3_CH4_INPUT, 277 0, CS35L56_SWIRETXn_SRC_MASK, 278 cs35l56_tx_input_texts, 279 cs35l56_tx_input_values); 280 281 static const struct snd_kcontrol_new sdw1_tx4_mux = 282 SOC_DAPM_ENUM("SDW1TX4 SRC", cs35l56_sdw1tx4_enum); 283 284 static int cs35l56_asp1_cfg_event(struct snd_soc_dapm_widget *w, 285 struct snd_kcontrol *kcontrol, int event) 286 { 287 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 288 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 289 290 switch (event) { 291 case SND_SOC_DAPM_PRE_PMU: 292 /* Override register values set by firmware boot */ 293 return cs35l56_force_sync_asp1_registers_from_cache(&cs35l56->base); 294 default: 295 return 0; 296 } 297 } 298 299 static int cs35l56_play_event(struct snd_soc_dapm_widget *w, 300 struct snd_kcontrol *kcontrol, int event) 301 { 302 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 303 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 304 unsigned int val; 305 int ret; 306 307 dev_dbg(cs35l56->base.dev, "play: %d\n", event); 308 309 switch (event) { 310 case SND_SOC_DAPM_PRE_PMU: 311 /* Don't wait for ACK, we check in POST_PMU that it completed */ 312 return regmap_write(cs35l56->base.regmap, CS35L56_DSP_VIRTUAL1_MBOX_1, 313 CS35L56_MBOX_CMD_AUDIO_PLAY); 314 case SND_SOC_DAPM_POST_PMU: 315 /* Wait for firmware to enter PS0 power state */ 316 ret = regmap_read_poll_timeout(cs35l56->base.regmap, 317 CS35L56_TRANSDUCER_ACTUAL_PS, 318 val, (val == CS35L56_PS0), 319 CS35L56_PS0_POLL_US, 320 CS35L56_PS0_TIMEOUT_US); 321 if (ret) 322 dev_err(cs35l56->base.dev, "PS0 wait failed: %d\n", ret); 323 return ret; 324 case SND_SOC_DAPM_POST_PMD: 325 return cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_PAUSE); 326 default: 327 return 0; 328 } 329 } 330 331 static const struct snd_soc_dapm_widget cs35l56_dapm_widgets[] = { 332 SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_B", 0, 0), 333 SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_AMP", 0, 0), 334 335 SND_SOC_DAPM_SUPPLY("ASP1 CFG", SND_SOC_NOPM, 0, 0, cs35l56_asp1_cfg_event, 336 SND_SOC_DAPM_PRE_PMU), 337 338 SND_SOC_DAPM_SUPPLY("PLAY", SND_SOC_NOPM, 0, 0, cs35l56_play_event, 339 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 340 341 SND_SOC_DAPM_OUT_DRV("AMP", SND_SOC_NOPM, 0, 0, NULL, 0), 342 SND_SOC_DAPM_OUTPUT("SPK"), 343 344 SND_SOC_DAPM_PGA_E("DSP1", SND_SOC_NOPM, 0, 0, NULL, 0, cs35l56_dsp_event, 345 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 346 347 SND_SOC_DAPM_AIF_IN("ASP1RX1", NULL, 0, CS35L56_ASP1_ENABLES1, 348 CS35L56_ASP_RX1_EN_SHIFT, 0), 349 SND_SOC_DAPM_AIF_IN("ASP1RX2", NULL, 1, CS35L56_ASP1_ENABLES1, 350 CS35L56_ASP_RX2_EN_SHIFT, 0), 351 SND_SOC_DAPM_AIF_OUT("ASP1TX1", NULL, 0, CS35L56_ASP1_ENABLES1, 352 CS35L56_ASP_TX1_EN_SHIFT, 0), 353 SND_SOC_DAPM_AIF_OUT("ASP1TX2", NULL, 1, CS35L56_ASP1_ENABLES1, 354 CS35L56_ASP_TX2_EN_SHIFT, 0), 355 SND_SOC_DAPM_AIF_OUT("ASP1TX3", NULL, 2, CS35L56_ASP1_ENABLES1, 356 CS35L56_ASP_TX3_EN_SHIFT, 0), 357 SND_SOC_DAPM_AIF_OUT("ASP1TX4", NULL, 3, CS35L56_ASP1_ENABLES1, 358 CS35L56_ASP_TX4_EN_SHIFT, 0), 359 360 SND_SOC_DAPM_MUX("ASP1 TX1 Source", SND_SOC_NOPM, 0, 0, &asp1_tx1_mux), 361 SND_SOC_DAPM_MUX("ASP1 TX2 Source", SND_SOC_NOPM, 0, 0, &asp1_tx2_mux), 362 SND_SOC_DAPM_MUX("ASP1 TX3 Source", SND_SOC_NOPM, 0, 0, &asp1_tx3_mux), 363 SND_SOC_DAPM_MUX("ASP1 TX4 Source", SND_SOC_NOPM, 0, 0, &asp1_tx4_mux), 364 365 SND_SOC_DAPM_MUX("SDW1 TX1 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx1_mux), 366 SND_SOC_DAPM_MUX("SDW1 TX2 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx2_mux), 367 SND_SOC_DAPM_MUX("SDW1 TX3 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx3_mux), 368 SND_SOC_DAPM_MUX("SDW1 TX4 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx4_mux), 369 370 SND_SOC_DAPM_SIGGEN("VMON ADC"), 371 SND_SOC_DAPM_SIGGEN("IMON ADC"), 372 SND_SOC_DAPM_SIGGEN("ERRVOL ADC"), 373 SND_SOC_DAPM_SIGGEN("CLASSH ADC"), 374 SND_SOC_DAPM_SIGGEN("VDDBMON ADC"), 375 SND_SOC_DAPM_SIGGEN("VBSTMON ADC"), 376 SND_SOC_DAPM_SIGGEN("TEMPMON ADC"), 377 }; 378 379 #define CS35L56_SRC_ROUTE(name) \ 380 { name" Source", "ASP1RX1", "ASP1RX1" }, \ 381 { name" Source", "ASP1RX2", "ASP1RX2" }, \ 382 { name" Source", "VMON", "VMON ADC" }, \ 383 { name" Source", "IMON", "IMON ADC" }, \ 384 { name" Source", "ERRVOL", "ERRVOL ADC" }, \ 385 { name" Source", "CLASSH", "CLASSH ADC" }, \ 386 { name" Source", "VDDBMON", "VDDBMON ADC" }, \ 387 { name" Source", "VBSTMON", "VBSTMON ADC" }, \ 388 { name" Source", "DSP1TX1", "DSP1" }, \ 389 { name" Source", "DSP1TX2", "DSP1" }, \ 390 { name" Source", "DSP1TX3", "DSP1" }, \ 391 { name" Source", "DSP1TX4", "DSP1" }, \ 392 { name" Source", "DSP1TX5", "DSP1" }, \ 393 { name" Source", "DSP1TX6", "DSP1" }, \ 394 { name" Source", "DSP1TX7", "DSP1" }, \ 395 { name" Source", "DSP1TX8", "DSP1" }, \ 396 { name" Source", "TEMPMON", "TEMPMON ADC" }, \ 397 { name" Source", "INTERPOLATOR", "AMP" }, \ 398 { name" Source", "SDW1RX1", "SDW1 Playback" }, \ 399 { name" Source", "SDW1RX2", "SDW1 Playback" }, 400 401 static const struct snd_soc_dapm_route cs35l56_audio_map[] = { 402 { "AMP", NULL, "VDD_B" }, 403 { "AMP", NULL, "VDD_AMP" }, 404 405 { "ASP1 Playback", NULL, "ASP1 CFG" }, 406 { "ASP1 Capture", NULL, "ASP1 CFG" }, 407 408 { "ASP1 Playback", NULL, "PLAY" }, 409 { "SDW1 Playback", NULL, "PLAY" }, 410 411 { "ASP1RX1", NULL, "ASP1 Playback" }, 412 { "ASP1RX2", NULL, "ASP1 Playback" }, 413 { "DSP1", NULL, "ASP1RX1" }, 414 { "DSP1", NULL, "ASP1RX2" }, 415 { "DSP1", NULL, "SDW1 Playback" }, 416 { "AMP", NULL, "DSP1" }, 417 { "SPK", NULL, "AMP" }, 418 419 CS35L56_SRC_ROUTE("ASP1 TX1") 420 CS35L56_SRC_ROUTE("ASP1 TX2") 421 CS35L56_SRC_ROUTE("ASP1 TX3") 422 CS35L56_SRC_ROUTE("ASP1 TX4") 423 424 { "ASP1TX1", NULL, "ASP1 TX1 Source" }, 425 { "ASP1TX2", NULL, "ASP1 TX2 Source" }, 426 { "ASP1TX3", NULL, "ASP1 TX3 Source" }, 427 { "ASP1TX4", NULL, "ASP1 TX4 Source" }, 428 { "ASP1 Capture", NULL, "ASP1TX1" }, 429 { "ASP1 Capture", NULL, "ASP1TX2" }, 430 { "ASP1 Capture", NULL, "ASP1TX3" }, 431 { "ASP1 Capture", NULL, "ASP1TX4" }, 432 433 CS35L56_SRC_ROUTE("SDW1 TX1") 434 CS35L56_SRC_ROUTE("SDW1 TX2") 435 CS35L56_SRC_ROUTE("SDW1 TX3") 436 CS35L56_SRC_ROUTE("SDW1 TX4") 437 { "SDW1 Capture", NULL, "SDW1 TX1 Source" }, 438 { "SDW1 Capture", NULL, "SDW1 TX2 Source" }, 439 { "SDW1 Capture", NULL, "SDW1 TX3 Source" }, 440 { "SDW1 Capture", NULL, "SDW1 TX4 Source" }, 441 }; 442 443 static int cs35l56_dsp_event(struct snd_soc_dapm_widget *w, 444 struct snd_kcontrol *kcontrol, int event) 445 { 446 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 447 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 448 449 dev_dbg(cs35l56->base.dev, "%s: %d\n", __func__, event); 450 451 return wm_adsp_event(w, kcontrol, event); 452 } 453 454 static int cs35l56_asp_dai_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 455 { 456 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(codec_dai->component); 457 unsigned int val; 458 459 dev_dbg(cs35l56->base.dev, "%s: %#x\n", __func__, fmt); 460 461 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 462 case SND_SOC_DAIFMT_CBC_CFC: 463 break; 464 default: 465 dev_err(cs35l56->base.dev, "Unsupported clock source mode\n"); 466 return -EINVAL; 467 } 468 469 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 470 case SND_SOC_DAIFMT_DSP_A: 471 val = CS35L56_ASP_FMT_DSP_A << CS35L56_ASP_FMT_SHIFT; 472 cs35l56->tdm_mode = true; 473 break; 474 case SND_SOC_DAIFMT_I2S: 475 val = CS35L56_ASP_FMT_I2S << CS35L56_ASP_FMT_SHIFT; 476 cs35l56->tdm_mode = false; 477 break; 478 default: 479 dev_err(cs35l56->base.dev, "Unsupported DAI format\n"); 480 return -EINVAL; 481 } 482 483 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 484 case SND_SOC_DAIFMT_NB_IF: 485 val |= CS35L56_ASP_FSYNC_INV_MASK; 486 break; 487 case SND_SOC_DAIFMT_IB_NF: 488 val |= CS35L56_ASP_BCLK_INV_MASK; 489 break; 490 case SND_SOC_DAIFMT_IB_IF: 491 val |= CS35L56_ASP_BCLK_INV_MASK | CS35L56_ASP_FSYNC_INV_MASK; 492 break; 493 case SND_SOC_DAIFMT_NB_NF: 494 break; 495 default: 496 dev_err(cs35l56->base.dev, "Invalid clock invert\n"); 497 return -EINVAL; 498 } 499 500 regmap_update_bits(cs35l56->base.regmap, 501 CS35L56_ASP1_CONTROL2, 502 CS35L56_ASP_FMT_MASK | 503 CS35L56_ASP_BCLK_INV_MASK | CS35L56_ASP_FSYNC_INV_MASK, 504 val); 505 506 /* Hi-Z DOUT in unused slots and when all TX are disabled */ 507 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL3, 508 CS35L56_ASP1_DOUT_HIZ_CTRL_MASK, 509 CS35L56_ASP_UNUSED_HIZ_OFF_HIZ); 510 511 return 0; 512 } 513 514 static unsigned int cs35l56_make_tdm_config_word(unsigned int reg_val, unsigned long mask) 515 { 516 unsigned int channel_shift; 517 int bit_num; 518 519 /* Enable consecutive TX1..TXn for each of the slots set in mask */ 520 channel_shift = 0; 521 for_each_set_bit(bit_num, &mask, 32) { 522 reg_val &= ~(0x3f << channel_shift); 523 reg_val |= bit_num << channel_shift; 524 channel_shift += 8; 525 } 526 527 return reg_val; 528 } 529 530 static int cs35l56_asp_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, 531 unsigned int rx_mask, int slots, int slot_width) 532 { 533 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component); 534 535 if ((slots == 0) || (slot_width == 0)) { 536 dev_dbg(cs35l56->base.dev, "tdm config cleared\n"); 537 cs35l56->asp_slot_width = 0; 538 cs35l56->asp_slot_count = 0; 539 return 0; 540 } 541 542 if (slot_width > (CS35L56_ASP_RX_WIDTH_MASK >> CS35L56_ASP_RX_WIDTH_SHIFT)) { 543 dev_err(cs35l56->base.dev, "tdm invalid slot width %d\n", slot_width); 544 return -EINVAL; 545 } 546 547 /* More than 32 slots would give an unsupportable BCLK frequency */ 548 if (slots > 32) { 549 dev_err(cs35l56->base.dev, "tdm invalid slot count %d\n", slots); 550 return -EINVAL; 551 } 552 553 cs35l56->asp_slot_width = (u8)slot_width; 554 cs35l56->asp_slot_count = (u8)slots; 555 556 // Note: rx/tx is from point of view of the CPU end 557 if (tx_mask == 0) 558 tx_mask = 0x3; // ASPRX1/RX2 in slots 0 and 1 559 560 if (rx_mask == 0) 561 rx_mask = 0xf; // ASPTX1..TX4 in slots 0..3 562 563 /* Default unused slots to 63 */ 564 regmap_write(cs35l56->base.regmap, CS35L56_ASP1_FRAME_CONTROL1, 565 cs35l56_make_tdm_config_word(0x3f3f3f3f, rx_mask)); 566 regmap_write(cs35l56->base.regmap, CS35L56_ASP1_FRAME_CONTROL5, 567 cs35l56_make_tdm_config_word(0x3f3f3f, tx_mask)); 568 569 dev_dbg(cs35l56->base.dev, "tdm slot width: %u count: %u tx_mask: %#x rx_mask: %#x\n", 570 cs35l56->asp_slot_width, cs35l56->asp_slot_count, tx_mask, rx_mask); 571 572 return 0; 573 } 574 575 static int cs35l56_asp_dai_hw_params(struct snd_pcm_substream *substream, 576 struct snd_pcm_hw_params *params, 577 struct snd_soc_dai *dai) 578 { 579 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component); 580 unsigned int rate = params_rate(params); 581 u8 asp_width, asp_wl; 582 583 asp_wl = params_width(params); 584 if (cs35l56->asp_slot_width) 585 asp_width = cs35l56->asp_slot_width; 586 else 587 asp_width = asp_wl; 588 589 dev_dbg(cs35l56->base.dev, "%s: wl=%d, width=%d, rate=%d", 590 __func__, asp_wl, asp_width, rate); 591 592 if (!cs35l56->sysclk_set) { 593 unsigned int slots = cs35l56->asp_slot_count; 594 unsigned int bclk_freq; 595 int freq_id; 596 597 if (slots == 0) { 598 slots = params_channels(params); 599 600 /* I2S always has an even number of slots */ 601 if (!cs35l56->tdm_mode) 602 slots = round_up(slots, 2); 603 } 604 605 bclk_freq = asp_width * slots * rate; 606 freq_id = cs35l56_get_bclk_freq_id(bclk_freq); 607 if (freq_id < 0) { 608 dev_err(cs35l56->base.dev, "%s: Invalid BCLK %u\n", __func__, bclk_freq); 609 return -EINVAL; 610 } 611 612 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL1, 613 CS35L56_ASP_BCLK_FREQ_MASK, 614 freq_id << CS35L56_ASP_BCLK_FREQ_SHIFT); 615 } 616 617 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 618 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL2, 619 CS35L56_ASP_RX_WIDTH_MASK, asp_width << 620 CS35L56_ASP_RX_WIDTH_SHIFT); 621 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_DATA_CONTROL5, 622 CS35L56_ASP_RX_WL_MASK, asp_wl); 623 } else { 624 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL2, 625 CS35L56_ASP_TX_WIDTH_MASK, asp_width << 626 CS35L56_ASP_TX_WIDTH_SHIFT); 627 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_DATA_CONTROL1, 628 CS35L56_ASP_TX_WL_MASK, asp_wl); 629 } 630 631 return 0; 632 } 633 634 static int cs35l56_asp_dai_set_sysclk(struct snd_soc_dai *dai, 635 int clk_id, unsigned int freq, int dir) 636 { 637 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component); 638 int freq_id; 639 640 if (freq == 0) { 641 cs35l56->sysclk_set = false; 642 return 0; 643 } 644 645 freq_id = cs35l56_get_bclk_freq_id(freq); 646 if (freq_id < 0) 647 return freq_id; 648 649 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL1, 650 CS35L56_ASP_BCLK_FREQ_MASK, 651 freq_id << CS35L56_ASP_BCLK_FREQ_SHIFT); 652 cs35l56->sysclk_set = true; 653 654 return 0; 655 } 656 657 static const struct snd_soc_dai_ops cs35l56_ops = { 658 .set_fmt = cs35l56_asp_dai_set_fmt, 659 .set_tdm_slot = cs35l56_asp_dai_set_tdm_slot, 660 .hw_params = cs35l56_asp_dai_hw_params, 661 .set_sysclk = cs35l56_asp_dai_set_sysclk, 662 }; 663 664 static void cs35l56_sdw_dai_shutdown(struct snd_pcm_substream *substream, 665 struct snd_soc_dai *dai) 666 { 667 snd_soc_dai_set_dma_data(dai, substream, NULL); 668 } 669 670 static int cs35l56_sdw_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, 671 unsigned int rx_mask, int slots, int slot_width) 672 { 673 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component); 674 675 /* rx/tx are from point of view of the CPU end so opposite to our rx/tx */ 676 cs35l56->rx_mask = tx_mask; 677 cs35l56->tx_mask = rx_mask; 678 679 return 0; 680 } 681 682 static int cs35l56_sdw_dai_hw_params(struct snd_pcm_substream *substream, 683 struct snd_pcm_hw_params *params, 684 struct snd_soc_dai *dai) 685 { 686 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component); 687 struct sdw_stream_runtime *sdw_stream = snd_soc_dai_get_dma_data(dai, substream); 688 struct sdw_stream_config sconfig; 689 struct sdw_port_config pconfig; 690 int ret; 691 692 dev_dbg(cs35l56->base.dev, "%s: rate %d\n", __func__, params_rate(params)); 693 694 if (!cs35l56->base.init_done) 695 return -ENODEV; 696 697 if (!sdw_stream) 698 return -EINVAL; 699 700 memset(&sconfig, 0, sizeof(sconfig)); 701 memset(&pconfig, 0, sizeof(pconfig)); 702 703 sconfig.frame_rate = params_rate(params); 704 sconfig.bps = snd_pcm_format_width(params_format(params)); 705 706 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 707 sconfig.direction = SDW_DATA_DIR_RX; 708 pconfig.num = CS35L56_SDW1_PLAYBACK_PORT; 709 pconfig.ch_mask = cs35l56->rx_mask; 710 } else { 711 sconfig.direction = SDW_DATA_DIR_TX; 712 pconfig.num = CS35L56_SDW1_CAPTURE_PORT; 713 pconfig.ch_mask = cs35l56->tx_mask; 714 } 715 716 if (pconfig.ch_mask == 0) { 717 sconfig.ch_count = params_channels(params); 718 pconfig.ch_mask = GENMASK(sconfig.ch_count - 1, 0); 719 } else { 720 sconfig.ch_count = hweight32(pconfig.ch_mask); 721 } 722 723 ret = sdw_stream_add_slave(cs35l56->sdw_peripheral, &sconfig, &pconfig, 724 1, sdw_stream); 725 if (ret) { 726 dev_err(dai->dev, "Failed to add sdw stream: %d\n", ret); 727 return ret; 728 } 729 730 return 0; 731 } 732 733 static int cs35l56_sdw_dai_hw_free(struct snd_pcm_substream *substream, 734 struct snd_soc_dai *dai) 735 { 736 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component); 737 struct sdw_stream_runtime *sdw_stream = snd_soc_dai_get_dma_data(dai, substream); 738 739 if (!cs35l56->sdw_peripheral) 740 return -EINVAL; 741 742 sdw_stream_remove_slave(cs35l56->sdw_peripheral, sdw_stream); 743 744 return 0; 745 } 746 747 static int cs35l56_sdw_dai_set_stream(struct snd_soc_dai *dai, 748 void *sdw_stream, int direction) 749 { 750 snd_soc_dai_dma_data_set(dai, direction, sdw_stream); 751 752 return 0; 753 } 754 755 static const struct snd_soc_dai_ops cs35l56_sdw_dai_ops = { 756 .set_tdm_slot = cs35l56_sdw_dai_set_tdm_slot, 757 .shutdown = cs35l56_sdw_dai_shutdown, 758 .hw_params = cs35l56_sdw_dai_hw_params, 759 .hw_free = cs35l56_sdw_dai_hw_free, 760 .set_stream = cs35l56_sdw_dai_set_stream, 761 }; 762 763 static struct snd_soc_dai_driver cs35l56_dai[] = { 764 { 765 .name = "cs35l56-asp1", 766 .id = 0, 767 .playback = { 768 .stream_name = "ASP1 Playback", 769 .channels_min = 1, 770 .channels_max = 2, 771 .rates = CS35L56_RATES, 772 .formats = CS35L56_RX_FORMATS, 773 }, 774 .capture = { 775 .stream_name = "ASP1 Capture", 776 .channels_min = 1, 777 .channels_max = 4, 778 .rates = CS35L56_RATES, 779 .formats = CS35L56_TX_FORMATS, 780 }, 781 .ops = &cs35l56_ops, 782 .symmetric_rate = 1, 783 .symmetric_sample_bits = 1, 784 }, 785 { 786 .name = "cs35l56-sdw1", 787 .id = 1, 788 .playback = { 789 .stream_name = "SDW1 Playback", 790 .channels_min = 1, 791 .channels_max = 2, 792 .rates = CS35L56_RATES, 793 .formats = CS35L56_RX_FORMATS, 794 }, 795 .capture = { 796 .stream_name = "SDW1 Capture", 797 .channels_min = 1, 798 .channels_max = 4, 799 .rates = CS35L56_RATES, 800 .formats = CS35L56_TX_FORMATS, 801 }, 802 .symmetric_rate = 1, 803 .ops = &cs35l56_sdw_dai_ops, 804 } 805 }; 806 807 static void cs35l56_reinit_patch(struct cs35l56_private *cs35l56) 808 { 809 int ret; 810 811 /* Use wm_adsp to load and apply the firmware patch and coefficient files */ 812 ret = wm_adsp_power_up(&cs35l56->dsp, true); 813 if (ret) 814 dev_dbg(cs35l56->base.dev, "%s: wm_adsp_power_up ret %d\n", __func__, ret); 815 else 816 cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_REINIT); 817 } 818 819 static void cs35l56_patch(struct cs35l56_private *cs35l56, bool firmware_missing) 820 { 821 int ret; 822 823 /* 824 * Disable SoundWire interrupts to prevent race with IRQ work. 825 * Setting sdw_irq_no_unmask prevents the handler re-enabling 826 * the SoundWire interrupt. 827 */ 828 if (cs35l56->sdw_peripheral) { 829 cs35l56->sdw_irq_no_unmask = true; 830 flush_work(&cs35l56->sdw_irq_work); 831 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1, 0); 832 sdw_read_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1); 833 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1, 0xFF); 834 flush_work(&cs35l56->sdw_irq_work); 835 } 836 837 ret = cs35l56_firmware_shutdown(&cs35l56->base); 838 if (ret) 839 goto err; 840 841 /* 842 * Use wm_adsp to load and apply the firmware patch and coefficient files, 843 * but only if firmware is missing. If firmware is already patched just 844 * power-up wm_adsp without downloading firmware. 845 */ 846 ret = wm_adsp_power_up(&cs35l56->dsp, !!firmware_missing); 847 if (ret) { 848 dev_dbg(cs35l56->base.dev, "%s: wm_adsp_power_up ret %d\n", __func__, ret); 849 goto err; 850 } 851 852 mutex_lock(&cs35l56->base.irq_lock); 853 854 reinit_completion(&cs35l56->init_completion); 855 856 cs35l56->soft_resetting = true; 857 cs35l56_system_reset(&cs35l56->base, !!cs35l56->sdw_peripheral); 858 859 if (cs35l56->sdw_peripheral) { 860 /* 861 * The system-reset causes the CS35L56 to detach from the bus. 862 * Wait for the manager to re-enumerate the CS35L56 and 863 * cs35l56_init() to run again. 864 */ 865 if (!wait_for_completion_timeout(&cs35l56->init_completion, 866 msecs_to_jiffies(5000))) { 867 dev_err(cs35l56->base.dev, "%s: init_completion timed out (SDW)\n", 868 __func__); 869 goto err_unlock; 870 } 871 } else if (cs35l56_init(cs35l56)) { 872 goto err_unlock; 873 } 874 875 regmap_clear_bits(cs35l56->base.regmap, CS35L56_PROTECTION_STATUS, 876 CS35L56_FIRMWARE_MISSING); 877 cs35l56->base.fw_patched = true; 878 879 err_unlock: 880 mutex_unlock(&cs35l56->base.irq_lock); 881 err: 882 /* Re-enable SoundWire interrupts */ 883 if (cs35l56->sdw_peripheral) { 884 cs35l56->sdw_irq_no_unmask = false; 885 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1, 886 CS35L56_SDW_INT_MASK_CODEC_IRQ); 887 } 888 } 889 890 static void cs35l56_dsp_work(struct work_struct *work) 891 { 892 struct cs35l56_private *cs35l56 = container_of(work, 893 struct cs35l56_private, 894 dsp_work); 895 unsigned int firmware_version; 896 bool firmware_missing; 897 int ret; 898 899 if (!cs35l56->base.init_done) 900 return; 901 902 pm_runtime_get_sync(cs35l56->base.dev); 903 904 ret = cs35l56_read_prot_status(&cs35l56->base, &firmware_missing, &firmware_version); 905 if (ret) 906 goto err; 907 908 /* Populate fw file qualifier with the revision and security state */ 909 kfree(cs35l56->dsp.fwf_name); 910 if (firmware_missing) { 911 cs35l56->dsp.fwf_name = kasprintf(GFP_KERNEL, "%02x-dsp1", cs35l56->base.rev); 912 } else { 913 /* Firmware files must match the running firmware version */ 914 cs35l56->dsp.fwf_name = kasprintf(GFP_KERNEL, 915 "%02x%s-%06x-dsp1", 916 cs35l56->base.rev, 917 cs35l56->base.secured ? "-s" : "", 918 firmware_version); 919 } 920 921 if (!cs35l56->dsp.fwf_name) 922 goto err; 923 924 dev_dbg(cs35l56->base.dev, "DSP fwf name: '%s' system name: '%s'\n", 925 cs35l56->dsp.fwf_name, cs35l56->dsp.system_name); 926 927 /* 928 * The firmware cannot be patched if it is already running from 929 * patch RAM. In this case the firmware files are versioned to 930 * match the running firmware version and will only contain 931 * tunings. We do not need to shutdown the firmware to apply 932 * tunings so can use the lower cost reinit sequence instead. 933 */ 934 if (!firmware_missing) 935 cs35l56_reinit_patch(cs35l56); 936 else 937 cs35l56_patch(cs35l56, firmware_missing); 938 939 940 /* 941 * Set starting value of ASP1 mux widgets. Updating a mux takes 942 * the DAPM mutex. Post this to a separate job so that DAPM 943 * power-up can wait for dsp_work to complete without deadlocking 944 * on the DAPM mutex. 945 */ 946 queue_work(cs35l56->dsp_wq, &cs35l56->mux_init_work); 947 err: 948 pm_runtime_mark_last_busy(cs35l56->base.dev); 949 pm_runtime_put_autosuspend(cs35l56->base.dev); 950 } 951 952 static int cs35l56_component_probe(struct snd_soc_component *component) 953 { 954 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 955 struct dentry *debugfs_root = component->debugfs_root; 956 unsigned short vendor, device; 957 958 BUILD_BUG_ON(ARRAY_SIZE(cs35l56_tx_input_texts) != ARRAY_SIZE(cs35l56_tx_input_values)); 959 960 if (!cs35l56->dsp.system_name && 961 (snd_soc_card_get_pci_ssid(component->card, &vendor, &device) == 0)) { 962 /* Append a speaker qualifier if there is a speaker ID */ 963 if (cs35l56->speaker_id >= 0) { 964 cs35l56->dsp.system_name = devm_kasprintf(cs35l56->base.dev, 965 GFP_KERNEL, 966 "%04x%04x-spkid%d", 967 vendor, device, 968 cs35l56->speaker_id); 969 } else { 970 cs35l56->dsp.system_name = devm_kasprintf(cs35l56->base.dev, 971 GFP_KERNEL, 972 "%04x%04x", 973 vendor, device); 974 } 975 if (!cs35l56->dsp.system_name) 976 return -ENOMEM; 977 } 978 979 if (!wait_for_completion_timeout(&cs35l56->init_completion, 980 msecs_to_jiffies(5000))) { 981 dev_err(cs35l56->base.dev, "%s: init_completion timed out\n", __func__); 982 return -ENODEV; 983 } 984 985 cs35l56->component = component; 986 wm_adsp2_component_probe(&cs35l56->dsp, component); 987 988 debugfs_create_bool("init_done", 0444, debugfs_root, &cs35l56->base.init_done); 989 debugfs_create_bool("can_hibernate", 0444, debugfs_root, &cs35l56->base.can_hibernate); 990 debugfs_create_bool("fw_patched", 0444, debugfs_root, &cs35l56->base.fw_patched); 991 992 queue_work(cs35l56->dsp_wq, &cs35l56->dsp_work); 993 994 return 0; 995 } 996 997 static void cs35l56_component_remove(struct snd_soc_component *component) 998 { 999 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 1000 1001 cancel_work_sync(&cs35l56->dsp_work); 1002 cancel_work_sync(&cs35l56->mux_init_work); 1003 1004 if (cs35l56->dsp.cs_dsp.booted) 1005 wm_adsp_power_down(&cs35l56->dsp); 1006 1007 wm_adsp2_component_remove(&cs35l56->dsp, component); 1008 1009 kfree(cs35l56->dsp.fwf_name); 1010 cs35l56->dsp.fwf_name = NULL; 1011 1012 cs35l56->component = NULL; 1013 } 1014 1015 static int cs35l56_set_bias_level(struct snd_soc_component *component, 1016 enum snd_soc_bias_level level) 1017 { 1018 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 1019 1020 switch (level) { 1021 case SND_SOC_BIAS_STANDBY: 1022 /* 1023 * Wait for patching to complete when transitioning from 1024 * BIAS_OFF to BIAS_STANDBY 1025 */ 1026 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) 1027 cs35l56_wait_dsp_ready(cs35l56); 1028 1029 break; 1030 default: 1031 break; 1032 } 1033 1034 return 0; 1035 } 1036 1037 static const struct snd_soc_component_driver soc_component_dev_cs35l56 = { 1038 .probe = cs35l56_component_probe, 1039 .remove = cs35l56_component_remove, 1040 1041 .dapm_widgets = cs35l56_dapm_widgets, 1042 .num_dapm_widgets = ARRAY_SIZE(cs35l56_dapm_widgets), 1043 .dapm_routes = cs35l56_audio_map, 1044 .num_dapm_routes = ARRAY_SIZE(cs35l56_audio_map), 1045 .controls = cs35l56_controls, 1046 .num_controls = ARRAY_SIZE(cs35l56_controls), 1047 1048 .set_bias_level = cs35l56_set_bias_level, 1049 1050 .suspend_bias_off = 1, /* see cs35l56_system_resume() */ 1051 }; 1052 1053 static int __maybe_unused cs35l56_runtime_suspend_i2c_spi(struct device *dev) 1054 { 1055 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 1056 1057 return cs35l56_runtime_suspend_common(&cs35l56->base); 1058 } 1059 1060 static int __maybe_unused cs35l56_runtime_resume_i2c_spi(struct device *dev) 1061 { 1062 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 1063 1064 return cs35l56_runtime_resume_common(&cs35l56->base, false); 1065 } 1066 1067 int cs35l56_system_suspend(struct device *dev) 1068 { 1069 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 1070 1071 dev_dbg(dev, "system_suspend\n"); 1072 1073 if (cs35l56->component) { 1074 flush_work(&cs35l56->dsp_work); 1075 cancel_work_sync(&cs35l56->mux_init_work); 1076 } 1077 1078 /* 1079 * The interrupt line is normally shared, but after we start suspending 1080 * we can't check if our device is the source of an interrupt, and can't 1081 * clear it. Prevent this race by temporarily disabling the parent irq 1082 * until we reach _no_irq. 1083 */ 1084 if (cs35l56->base.irq) 1085 disable_irq(cs35l56->base.irq); 1086 1087 return pm_runtime_force_suspend(dev); 1088 } 1089 EXPORT_SYMBOL_GPL(cs35l56_system_suspend); 1090 1091 int cs35l56_system_suspend_late(struct device *dev) 1092 { 1093 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 1094 1095 dev_dbg(dev, "system_suspend_late\n"); 1096 1097 /* 1098 * Assert RESET before removing supplies. 1099 * RESET is usually shared by all amps so it must not be asserted until 1100 * all driver instances have done their suspend() stage. 1101 */ 1102 if (cs35l56->base.reset_gpio) { 1103 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0); 1104 cs35l56_wait_min_reset_pulse(); 1105 } 1106 1107 regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies); 1108 1109 return 0; 1110 } 1111 EXPORT_SYMBOL_GPL(cs35l56_system_suspend_late); 1112 1113 int cs35l56_system_suspend_no_irq(struct device *dev) 1114 { 1115 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 1116 1117 dev_dbg(dev, "system_suspend_no_irq\n"); 1118 1119 /* Handlers are now disabled so the parent IRQ can safely be re-enabled. */ 1120 if (cs35l56->base.irq) 1121 enable_irq(cs35l56->base.irq); 1122 1123 return 0; 1124 } 1125 EXPORT_SYMBOL_GPL(cs35l56_system_suspend_no_irq); 1126 1127 int cs35l56_system_resume_no_irq(struct device *dev) 1128 { 1129 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 1130 1131 dev_dbg(dev, "system_resume_no_irq\n"); 1132 1133 /* 1134 * WAKE interrupts unmask if the CS35L56 hibernates, which can cause 1135 * spurious interrupts, and the interrupt line is normally shared. 1136 * We can't check if our device is the source of an interrupt, and can't 1137 * clear it, until it has fully resumed. Prevent this race by temporarily 1138 * disabling the parent irq until we complete resume(). 1139 */ 1140 if (cs35l56->base.irq) 1141 disable_irq(cs35l56->base.irq); 1142 1143 return 0; 1144 } 1145 EXPORT_SYMBOL_GPL(cs35l56_system_resume_no_irq); 1146 1147 int cs35l56_system_resume_early(struct device *dev) 1148 { 1149 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 1150 int ret; 1151 1152 dev_dbg(dev, "system_resume_early\n"); 1153 1154 /* Ensure a spec-compliant RESET pulse. */ 1155 if (cs35l56->base.reset_gpio) { 1156 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0); 1157 cs35l56_wait_min_reset_pulse(); 1158 } 1159 1160 /* Enable supplies before releasing RESET. */ 1161 ret = regulator_bulk_enable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies); 1162 if (ret) { 1163 dev_err(dev, "system_resume_early failed to enable supplies: %d\n", ret); 1164 return ret; 1165 } 1166 1167 /* Release shared RESET before drivers start resume(). */ 1168 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1); 1169 1170 return 0; 1171 } 1172 EXPORT_SYMBOL_GPL(cs35l56_system_resume_early); 1173 1174 int cs35l56_system_resume(struct device *dev) 1175 { 1176 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 1177 int ret; 1178 1179 dev_dbg(dev, "system_resume\n"); 1180 1181 /* 1182 * We might have done a hard reset or the CS35L56 was power-cycled 1183 * so wait for control port to be ready. 1184 */ 1185 cs35l56_wait_control_port_ready(); 1186 1187 /* Undo pm_runtime_force_suspend() before re-enabling the irq */ 1188 ret = pm_runtime_force_resume(dev); 1189 if (cs35l56->base.irq) 1190 enable_irq(cs35l56->base.irq); 1191 1192 if (ret) 1193 return ret; 1194 1195 /* Firmware won't have been loaded if the component hasn't probed */ 1196 if (!cs35l56->component) 1197 return 0; 1198 1199 ret = cs35l56_is_fw_reload_needed(&cs35l56->base); 1200 dev_dbg(cs35l56->base.dev, "fw_reload_needed: %d\n", ret); 1201 if (ret < 1) 1202 return ret; 1203 1204 cs35l56->base.fw_patched = false; 1205 wm_adsp_power_down(&cs35l56->dsp); 1206 queue_work(cs35l56->dsp_wq, &cs35l56->dsp_work); 1207 1208 /* 1209 * suspend_bias_off ensures we are now in BIAS_OFF so there will be 1210 * a BIAS_OFF->BIAS_STANDBY transition to complete dsp patching. 1211 */ 1212 1213 return 0; 1214 } 1215 EXPORT_SYMBOL_GPL(cs35l56_system_resume); 1216 1217 static int cs35l56_dsp_init(struct cs35l56_private *cs35l56) 1218 { 1219 struct wm_adsp *dsp; 1220 int ret; 1221 1222 cs35l56->dsp_wq = create_singlethread_workqueue("cs35l56-dsp"); 1223 if (!cs35l56->dsp_wq) 1224 return -ENOMEM; 1225 1226 INIT_WORK(&cs35l56->dsp_work, cs35l56_dsp_work); 1227 INIT_WORK(&cs35l56->mux_init_work, cs35l56_mux_init_work); 1228 1229 dsp = &cs35l56->dsp; 1230 cs35l56_init_cs_dsp(&cs35l56->base, &dsp->cs_dsp); 1231 dsp->part = "cs35l56"; 1232 dsp->fw = 12; 1233 dsp->wmfw_optional = true; 1234 1235 dev_dbg(cs35l56->base.dev, "DSP system name: '%s'\n", dsp->system_name); 1236 1237 ret = wm_halo_init(dsp); 1238 if (ret != 0) { 1239 dev_err(cs35l56->base.dev, "wm_halo_init failed\n"); 1240 return ret; 1241 } 1242 1243 return 0; 1244 } 1245 1246 static int cs35l56_get_firmware_uid(struct cs35l56_private *cs35l56) 1247 { 1248 struct device *dev = cs35l56->base.dev; 1249 const char *prop; 1250 int ret; 1251 1252 ret = device_property_read_string(dev, "cirrus,firmware-uid", &prop); 1253 /* If bad sw node property, return 0 and fallback to legacy firmware path */ 1254 if (ret < 0) 1255 return 0; 1256 1257 /* Append a speaker qualifier if there is a speaker ID */ 1258 if (cs35l56->speaker_id >= 0) 1259 cs35l56->dsp.system_name = devm_kasprintf(dev, GFP_KERNEL, "%s-spkid%d", 1260 prop, cs35l56->speaker_id); 1261 else 1262 cs35l56->dsp.system_name = devm_kstrdup(dev, prop, GFP_KERNEL); 1263 1264 if (cs35l56->dsp.system_name == NULL) 1265 return -ENOMEM; 1266 1267 dev_dbg(dev, "Firmware UID: %s\n", cs35l56->dsp.system_name); 1268 1269 return 0; 1270 } 1271 1272 int cs35l56_common_probe(struct cs35l56_private *cs35l56) 1273 { 1274 int ret; 1275 1276 init_completion(&cs35l56->init_completion); 1277 mutex_init(&cs35l56->base.irq_lock); 1278 cs35l56->speaker_id = -ENOENT; 1279 1280 dev_set_drvdata(cs35l56->base.dev, cs35l56); 1281 1282 cs35l56_fill_supply_names(cs35l56->supplies); 1283 ret = devm_regulator_bulk_get(cs35l56->base.dev, ARRAY_SIZE(cs35l56->supplies), 1284 cs35l56->supplies); 1285 if (ret != 0) 1286 return dev_err_probe(cs35l56->base.dev, ret, "Failed to request supplies\n"); 1287 1288 /* Reset could be controlled by the BIOS or shared by multiple amps */ 1289 cs35l56->base.reset_gpio = devm_gpiod_get_optional(cs35l56->base.dev, "reset", 1290 GPIOD_OUT_LOW); 1291 if (IS_ERR(cs35l56->base.reset_gpio)) { 1292 ret = PTR_ERR(cs35l56->base.reset_gpio); 1293 /* 1294 * If RESET is shared the first amp to probe will grab the reset 1295 * line and reset all the amps 1296 */ 1297 if (ret != -EBUSY) 1298 return dev_err_probe(cs35l56->base.dev, ret, "Failed to get reset GPIO\n"); 1299 1300 dev_info(cs35l56->base.dev, "Reset GPIO busy, assume shared reset\n"); 1301 cs35l56->base.reset_gpio = NULL; 1302 } 1303 1304 ret = regulator_bulk_enable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies); 1305 if (ret != 0) 1306 return dev_err_probe(cs35l56->base.dev, ret, "Failed to enable supplies\n"); 1307 1308 if (cs35l56->base.reset_gpio) { 1309 /* ACPI can override GPIOD_OUT_LOW flag so force it to start low */ 1310 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0); 1311 cs35l56_wait_min_reset_pulse(); 1312 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1); 1313 } 1314 1315 ret = cs35l56_get_speaker_id(&cs35l56->base); 1316 if ((ret < 0) && (ret != -ENOENT)) 1317 goto err; 1318 1319 cs35l56->speaker_id = ret; 1320 1321 ret = cs35l56_get_firmware_uid(cs35l56); 1322 if (ret != 0) 1323 goto err; 1324 1325 ret = cs35l56_dsp_init(cs35l56); 1326 if (ret < 0) { 1327 dev_err_probe(cs35l56->base.dev, ret, "DSP init failed\n"); 1328 goto err; 1329 } 1330 1331 ret = devm_snd_soc_register_component(cs35l56->base.dev, 1332 &soc_component_dev_cs35l56, 1333 cs35l56_dai, ARRAY_SIZE(cs35l56_dai)); 1334 if (ret < 0) { 1335 dev_err_probe(cs35l56->base.dev, ret, "Register codec failed\n"); 1336 goto err; 1337 } 1338 1339 return 0; 1340 1341 err: 1342 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0); 1343 regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies); 1344 1345 return ret; 1346 } 1347 EXPORT_SYMBOL_NS_GPL(cs35l56_common_probe, SND_SOC_CS35L56_CORE); 1348 1349 int cs35l56_init(struct cs35l56_private *cs35l56) 1350 { 1351 int ret; 1352 1353 /* 1354 * Check whether the actions associated with soft reset or one time 1355 * init need to be performed. 1356 */ 1357 if (cs35l56->soft_resetting) 1358 goto post_soft_reset; 1359 1360 if (cs35l56->base.init_done) 1361 return 0; 1362 1363 pm_runtime_set_autosuspend_delay(cs35l56->base.dev, 100); 1364 pm_runtime_use_autosuspend(cs35l56->base.dev); 1365 pm_runtime_set_active(cs35l56->base.dev); 1366 pm_runtime_enable(cs35l56->base.dev); 1367 1368 ret = cs35l56_hw_init(&cs35l56->base); 1369 if (ret < 0) 1370 return ret; 1371 1372 ret = cs35l56_set_patch(&cs35l56->base); 1373 if (ret) 1374 return ret; 1375 1376 if (!cs35l56->base.reset_gpio) { 1377 dev_dbg(cs35l56->base.dev, "No reset gpio: using soft reset\n"); 1378 cs35l56->soft_resetting = true; 1379 cs35l56_system_reset(&cs35l56->base, !!cs35l56->sdw_peripheral); 1380 if (cs35l56->sdw_peripheral) { 1381 /* Keep alive while we wait for re-enumeration */ 1382 pm_runtime_get_noresume(cs35l56->base.dev); 1383 return 0; 1384 } 1385 } 1386 1387 post_soft_reset: 1388 if (cs35l56->soft_resetting) { 1389 cs35l56->soft_resetting = false; 1390 1391 /* Done re-enumerating after one-time init so release the keep-alive */ 1392 if (cs35l56->sdw_peripheral && !cs35l56->base.init_done) 1393 pm_runtime_put_noidle(cs35l56->base.dev); 1394 1395 regcache_mark_dirty(cs35l56->base.regmap); 1396 ret = cs35l56_wait_for_firmware_boot(&cs35l56->base); 1397 if (ret) 1398 return ret; 1399 1400 dev_dbg(cs35l56->base.dev, "Firmware rebooted after soft reset\n"); 1401 } 1402 1403 /* Disable auto-hibernate so that runtime_pm has control */ 1404 ret = cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_PREVENT_AUTO_HIBERNATE); 1405 if (ret) 1406 return ret; 1407 1408 /* Registers could be dirty after soft reset or SoundWire enumeration */ 1409 regcache_sync(cs35l56->base.regmap); 1410 1411 /* Set ASP1 DOUT to high-impedance when it is not transmitting audio data. */ 1412 ret = regmap_set_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL3, 1413 CS35L56_ASP1_DOUT_HIZ_CTRL_MASK); 1414 if (ret) 1415 return dev_err_probe(cs35l56->base.dev, ret, "Failed to write ASP1_CONTROL3\n"); 1416 1417 cs35l56->base.init_done = true; 1418 complete(&cs35l56->init_completion); 1419 1420 return 0; 1421 } 1422 EXPORT_SYMBOL_NS_GPL(cs35l56_init, SND_SOC_CS35L56_CORE); 1423 1424 void cs35l56_remove(struct cs35l56_private *cs35l56) 1425 { 1426 cs35l56->base.init_done = false; 1427 1428 /* 1429 * WAKE IRQs unmask if CS35L56 hibernates so free the handler to 1430 * prevent it racing with remove(). 1431 */ 1432 if (cs35l56->base.irq) 1433 devm_free_irq(cs35l56->base.dev, cs35l56->base.irq, &cs35l56->base); 1434 1435 flush_workqueue(cs35l56->dsp_wq); 1436 destroy_workqueue(cs35l56->dsp_wq); 1437 1438 pm_runtime_dont_use_autosuspend(cs35l56->base.dev); 1439 pm_runtime_suspend(cs35l56->base.dev); 1440 pm_runtime_disable(cs35l56->base.dev); 1441 1442 regcache_cache_only(cs35l56->base.regmap, true); 1443 1444 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0); 1445 regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies); 1446 } 1447 EXPORT_SYMBOL_NS_GPL(cs35l56_remove, SND_SOC_CS35L56_CORE); 1448 1449 #if IS_ENABLED(CONFIG_SND_SOC_CS35L56_I2C) || IS_ENABLED(CONFIG_SND_SOC_CS35L56_SPI) 1450 EXPORT_NS_GPL_DEV_PM_OPS(cs35l56_pm_ops_i2c_spi, SND_SOC_CS35L56_CORE) = { 1451 SET_RUNTIME_PM_OPS(cs35l56_runtime_suspend_i2c_spi, cs35l56_runtime_resume_i2c_spi, NULL) 1452 SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend, cs35l56_system_resume) 1453 LATE_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_late, cs35l56_system_resume_early) 1454 NOIRQ_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_no_irq, cs35l56_system_resume_no_irq) 1455 }; 1456 #endif 1457 1458 MODULE_DESCRIPTION("ASoC CS35L56 driver"); 1459 MODULE_IMPORT_NS(SND_SOC_CS35L56_SHARED); 1460 MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>"); 1461 MODULE_AUTHOR("Simon Trimmer <simont@opensource.cirrus.com>"); 1462 MODULE_LICENSE("GPL"); 1463