1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // CS35L56 ALSA SoC audio driver SoundWire binding 4 // 5 // Copyright (C) 2023 Cirrus Logic, Inc. and 6 // Cirrus Logic International Semiconductor Ltd. 7 8 #include <linux/delay.h> 9 #include <linux/device.h> 10 #include <linux/err.h> 11 #include <linux/module.h> 12 #include <linux/pm_runtime.h> 13 #include <linux/regmap.h> 14 #include <linux/soundwire/sdw.h> 15 #include <linux/soundwire/sdw_registers.h> 16 #include <linux/soundwire/sdw_type.h> 17 #include <linux/swab.h> 18 #include <linux/types.h> 19 #include <linux/workqueue.h> 20 21 #include "cs35l56.h" 22 23 /* Register addresses are offset when sent over SoundWire */ 24 #define CS35L56_SDW_ADDR_OFFSET 0x8000 25 26 /* Cirrus bus bridge registers */ 27 #define CS35L56_SDW_MEM_ACCESS_STATUS 0xd0 28 #define CS35L56_SDW_MEM_READ_DATA 0xd8 29 30 #define CS35L56_SDW_LAST_LATE BIT(3) 31 #define CS35L56_SDW_CMD_IN_PROGRESS BIT(2) 32 #define CS35L56_SDW_RDATA_RDY BIT(0) 33 34 #define CS35L56_LATE_READ_POLL_US 10 35 #define CS35L56_LATE_READ_TIMEOUT_US 1000 36 37 static int cs35l56_sdw_poll_mem_status(struct sdw_slave *peripheral, 38 unsigned int mask, 39 unsigned int match) 40 { 41 int ret, val; 42 43 ret = read_poll_timeout(sdw_read_no_pm, val, 44 (val < 0) || ((val & mask) == match), 45 CS35L56_LATE_READ_POLL_US, CS35L56_LATE_READ_TIMEOUT_US, 46 false, peripheral, CS35L56_SDW_MEM_ACCESS_STATUS); 47 if (ret < 0) 48 return ret; 49 50 if (val < 0) 51 return val; 52 53 return 0; 54 } 55 56 static int cs35l56_sdw_slow_read(struct sdw_slave *peripheral, unsigned int reg, 57 u8 *buf, size_t val_size) 58 { 59 int ret, i; 60 61 reg += CS35L56_SDW_ADDR_OFFSET; 62 63 for (i = 0; i < val_size; i += sizeof(u32)) { 64 /* Poll for bus bridge idle */ 65 ret = cs35l56_sdw_poll_mem_status(peripheral, 66 CS35L56_SDW_CMD_IN_PROGRESS, 67 0); 68 if (ret < 0) { 69 dev_err(&peripheral->dev, "!CMD_IN_PROGRESS fail: %d\n", ret); 70 return ret; 71 } 72 73 /* Reading LSByte triggers read of register to holding buffer */ 74 sdw_read_no_pm(peripheral, reg + i); 75 76 /* Wait for data available */ 77 ret = cs35l56_sdw_poll_mem_status(peripheral, 78 CS35L56_SDW_RDATA_RDY, 79 CS35L56_SDW_RDATA_RDY); 80 if (ret < 0) { 81 dev_err(&peripheral->dev, "RDATA_RDY fail: %d\n", ret); 82 return ret; 83 } 84 85 /* Read data from buffer */ 86 ret = sdw_nread_no_pm(peripheral, CS35L56_SDW_MEM_READ_DATA, 87 sizeof(u32), &buf[i]); 88 if (ret) { 89 dev_err(&peripheral->dev, "Late read @%#x failed: %d\n", reg + i, ret); 90 return ret; 91 } 92 93 swab32s((u32 *)&buf[i]); 94 } 95 96 return 0; 97 } 98 99 static int cs35l56_sdw_read_one(struct sdw_slave *peripheral, unsigned int reg, void *buf) 100 { 101 int ret; 102 103 ret = sdw_nread_no_pm(peripheral, reg, 4, (u8 *)buf); 104 if (ret != 0) { 105 dev_err(&peripheral->dev, "Read failed @%#x:%d\n", reg, ret); 106 return ret; 107 } 108 109 swab32s((u32 *)buf); 110 111 return 0; 112 } 113 114 static int cs35l56_sdw_read(void *context, const void *reg_buf, 115 const size_t reg_size, void *val_buf, 116 size_t val_size) 117 { 118 struct sdw_slave *peripheral = context; 119 u8 *buf8 = val_buf; 120 unsigned int reg, bytes; 121 int ret; 122 123 reg = le32_to_cpu(*(const __le32 *)reg_buf); 124 125 if (cs35l56_is_otp_register(reg)) 126 return cs35l56_sdw_slow_read(peripheral, reg, buf8, val_size); 127 128 reg += CS35L56_SDW_ADDR_OFFSET; 129 130 if (val_size == 4) 131 return cs35l56_sdw_read_one(peripheral, reg, val_buf); 132 133 while (val_size) { 134 bytes = SDW_REG_NO_PAGE - (reg & SDW_REGADDR); /* to end of page */ 135 if (bytes > val_size) 136 bytes = val_size; 137 138 ret = sdw_nread_no_pm(peripheral, reg, bytes, buf8); 139 if (ret != 0) { 140 dev_err(&peripheral->dev, "Read failed @%#x..%#x:%d\n", 141 reg, reg + bytes - 1, ret); 142 return ret; 143 } 144 145 swab32_array((u32 *)buf8, bytes / 4); 146 val_size -= bytes; 147 reg += bytes; 148 buf8 += bytes; 149 } 150 151 return 0; 152 } 153 154 static inline void cs35l56_swab_copy(void *dest, const void *src, size_t nbytes) 155 { 156 u32 *dest32 = dest; 157 const u32 *src32 = src; 158 159 for (; nbytes > 0; nbytes -= 4) 160 *dest32++ = swab32(*src32++); 161 } 162 163 static int cs35l56_sdw_write_one(struct sdw_slave *peripheral, unsigned int reg, const void *buf) 164 { 165 u32 val_le = swab32(*(u32 *)buf); 166 int ret; 167 168 ret = sdw_nwrite_no_pm(peripheral, reg, 4, (u8 *)&val_le); 169 if (ret != 0) { 170 dev_err(&peripheral->dev, "Write failed @%#x:%d\n", reg, ret); 171 return ret; 172 } 173 174 return 0; 175 } 176 177 static int cs35l56_sdw_gather_write(void *context, 178 const void *reg_buf, size_t reg_size, 179 const void *val_buf, size_t val_size) 180 { 181 struct sdw_slave *peripheral = context; 182 const u8 *src_be = val_buf; 183 u32 val_le_buf[64]; /* Define u32 so it is 32-bit aligned */ 184 unsigned int reg, bytes; 185 int ret; 186 187 reg = le32_to_cpu(*(const __le32 *)reg_buf); 188 reg += CS35L56_SDW_ADDR_OFFSET; 189 190 if (val_size == 4) 191 return cs35l56_sdw_write_one(peripheral, reg, src_be); 192 193 while (val_size) { 194 bytes = SDW_REG_NO_PAGE - (reg & SDW_REGADDR); /* to end of page */ 195 if (bytes > val_size) 196 bytes = val_size; 197 if (bytes > sizeof(val_le_buf)) 198 bytes = sizeof(val_le_buf); 199 200 cs35l56_swab_copy(val_le_buf, src_be, bytes); 201 202 ret = sdw_nwrite_no_pm(peripheral, reg, bytes, (u8 *)val_le_buf); 203 if (ret != 0) { 204 dev_err(&peripheral->dev, "Write failed @%#x..%#x:%d\n", 205 reg, reg + bytes - 1, ret); 206 return ret; 207 } 208 209 val_size -= bytes; 210 reg += bytes; 211 src_be += bytes; 212 } 213 214 return 0; 215 } 216 217 static int cs35l56_sdw_write(void *context, const void *val_buf, size_t val_size) 218 { 219 const u8 *src_buf = val_buf; 220 221 /* First word of val_buf contains the destination address */ 222 return cs35l56_sdw_gather_write(context, &src_buf[0], 4, &src_buf[4], val_size - 4); 223 } 224 225 /* 226 * Registers are big-endian on I2C and SPI but little-endian on SoundWire. 227 * Exported firmware controls are big-endian on I2C/SPI but little-endian on 228 * SoundWire. Firmware files are always big-endian and are opaque blobs. 229 * Present a big-endian regmap and hide the endianness swap, so that the ALSA 230 * byte controls always have the same byte order, and firmware file blobs 231 * can be written verbatim. 232 */ 233 static const struct regmap_bus cs35l56_regmap_bus_sdw = { 234 .read = cs35l56_sdw_read, 235 .write = cs35l56_sdw_write, 236 .gather_write = cs35l56_sdw_gather_write, 237 .reg_format_endian_default = REGMAP_ENDIAN_LITTLE, 238 .val_format_endian_default = REGMAP_ENDIAN_BIG, 239 }; 240 241 static int cs35l56_sdw_get_unique_id(struct cs35l56_private *cs35l56) 242 { 243 int ret; 244 245 ret = sdw_read_no_pm(cs35l56->sdw_peripheral, SDW_SCP_DEVID_0); 246 if (ret < 0) 247 return ret; 248 249 cs35l56->sdw_unique_id = ret & 0xf; 250 251 return 0; 252 } 253 254 static void cs35l56_sdw_init(struct sdw_slave *peripheral) 255 { 256 struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev); 257 int ret; 258 259 pm_runtime_get_noresume(cs35l56->base.dev); 260 261 ret = cs35l56_sdw_get_unique_id(cs35l56); 262 if (ret) 263 goto out; 264 265 /* SoundWire UniqueId is used to index the calibration array */ 266 if (cs35l56->base.cal_index < 0) 267 cs35l56->base.cal_index = cs35l56->sdw_unique_id; 268 269 ret = cs35l56_init(cs35l56); 270 if (ret < 0) { 271 regcache_cache_only(cs35l56->base.regmap, true); 272 goto out; 273 } 274 275 /* 276 * cs35l56_init can return with !init_done if it triggered 277 * a soft reset. 278 */ 279 if (cs35l56->base.init_done) { 280 /* Enable SoundWire interrupts */ 281 sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_MASK_1, 282 CS35L56_SDW_INT_MASK_CODEC_IRQ); 283 } 284 285 out: 286 pm_runtime_put_autosuspend(cs35l56->base.dev); 287 } 288 289 static int cs35l56_sdw_interrupt(struct sdw_slave *peripheral, 290 struct sdw_slave_intr_status *status) 291 { 292 struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev); 293 294 /* SoundWire core holds our pm_runtime when calling this function. */ 295 296 dev_dbg(cs35l56->base.dev, "int control_port=%#x\n", status->control_port); 297 298 if ((status->control_port & SDW_SCP_INT1_IMPL_DEF) == 0) 299 return 0; 300 301 /* 302 * Prevent bus manager suspending and possibly issuing a 303 * bus-reset before the queued work has run. 304 */ 305 pm_runtime_get_noresume(cs35l56->base.dev); 306 307 /* 308 * Mask and clear until it has been handled. The read of GEN_INT_STAT_1 309 * is required as per the SoundWire spec for interrupt status bits 310 * to clear. GEN_INT_MASK_1 masks the _inputs_ to GEN_INT_STAT1. 311 * None of the interrupts are time-critical so use the 312 * power-efficient queue. 313 */ 314 sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_MASK_1, 0); 315 sdw_read_no_pm(peripheral, CS35L56_SDW_GEN_INT_STAT_1); 316 sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_STAT_1, 0xFF); 317 queue_work(system_power_efficient_wq, &cs35l56->sdw_irq_work); 318 319 return 0; 320 } 321 322 static void cs35l56_sdw_irq_work(struct work_struct *work) 323 { 324 struct cs35l56_private *cs35l56 = container_of(work, 325 struct cs35l56_private, 326 sdw_irq_work); 327 328 cs35l56_irq(-1, &cs35l56->base); 329 330 /* unmask interrupts */ 331 if (!cs35l56->sdw_irq_no_unmask) 332 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1, 333 CS35L56_SDW_INT_MASK_CODEC_IRQ); 334 335 pm_runtime_put_autosuspend(cs35l56->base.dev); 336 } 337 338 static int cs35l56_sdw_read_prop(struct sdw_slave *peripheral) 339 { 340 struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev); 341 struct sdw_slave_prop *prop = &peripheral->prop; 342 struct sdw_dpn_prop *ports; 343 344 ports = devm_kcalloc(cs35l56->base.dev, 2, sizeof(*ports), GFP_KERNEL); 345 if (!ports) 346 return -ENOMEM; 347 348 prop->source_ports = BIT(CS35L56_SDW1_CAPTURE_PORT); 349 prop->sink_ports = BIT(CS35L56_SDW1_PLAYBACK_PORT); 350 prop->paging_support = true; 351 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY; 352 prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY | SDW_SCP_INT1_IMPL_DEF; 353 354 /* DP1 - playback */ 355 ports[0].num = CS35L56_SDW1_PLAYBACK_PORT; 356 ports[0].type = SDW_DPN_FULL; 357 ports[0].ch_prep_timeout = 10; 358 prop->sink_dpn_prop = &ports[0]; 359 360 /* DP3 - capture */ 361 ports[1].num = CS35L56_SDW1_CAPTURE_PORT; 362 ports[1].type = SDW_DPN_FULL; 363 ports[1].ch_prep_timeout = 10; 364 prop->src_dpn_prop = &ports[1]; 365 366 return 0; 367 } 368 369 static int cs35l56_sdw_update_status(struct sdw_slave *peripheral, 370 enum sdw_slave_status status) 371 { 372 struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev); 373 374 switch (status) { 375 case SDW_SLAVE_ATTACHED: 376 dev_dbg(cs35l56->base.dev, "%s: ATTACHED\n", __func__); 377 if (cs35l56->sdw_attached) 378 break; 379 380 if (!cs35l56->base.init_done || cs35l56->soft_resetting) 381 cs35l56_sdw_init(peripheral); 382 383 cs35l56->sdw_attached = true; 384 break; 385 case SDW_SLAVE_UNATTACHED: 386 dev_dbg(cs35l56->base.dev, "%s: UNATTACHED\n", __func__); 387 cs35l56->sdw_attached = false; 388 break; 389 default: 390 break; 391 } 392 393 return 0; 394 } 395 396 static int cs35l63_sdw_kick_divider(struct cs35l56_private *cs35l56, 397 struct sdw_slave *peripheral) 398 { 399 unsigned int curr_scale_reg, next_scale_reg; 400 int curr_scale, next_scale, ret; 401 402 if (!cs35l56->base.init_done) 403 return 0; 404 405 if (peripheral->bus->params.curr_bank) { 406 curr_scale_reg = SDW_SCP_BUSCLOCK_SCALE_B1; 407 next_scale_reg = SDW_SCP_BUSCLOCK_SCALE_B0; 408 } else { 409 curr_scale_reg = SDW_SCP_BUSCLOCK_SCALE_B0; 410 next_scale_reg = SDW_SCP_BUSCLOCK_SCALE_B1; 411 } 412 413 /* 414 * Current clock scale value must be different to new value. 415 * Modify current to guarantee this. If next still has the dummy 416 * value we wrote when it was current, the core code has not set 417 * a new scale so restore its original good value 418 */ 419 curr_scale = sdw_read_no_pm(peripheral, curr_scale_reg); 420 if (curr_scale < 0) { 421 dev_err(cs35l56->base.dev, "Failed to read current clock scale: %d\n", curr_scale); 422 return curr_scale; 423 } 424 425 next_scale = sdw_read_no_pm(peripheral, next_scale_reg); 426 if (next_scale < 0) { 427 dev_err(cs35l56->base.dev, "Failed to read next clock scale: %d\n", next_scale); 428 return next_scale; 429 } 430 431 if (next_scale == CS35L56_SDW_INVALID_BUS_SCALE) { 432 next_scale = cs35l56->old_sdw_clock_scale; 433 ret = sdw_write_no_pm(peripheral, next_scale_reg, next_scale); 434 if (ret < 0) { 435 dev_err(cs35l56->base.dev, "Failed to modify current clock scale: %d\n", 436 ret); 437 return ret; 438 } 439 } 440 441 cs35l56->old_sdw_clock_scale = curr_scale; 442 ret = sdw_write_no_pm(peripheral, curr_scale_reg, CS35L56_SDW_INVALID_BUS_SCALE); 443 if (ret < 0) { 444 dev_err(cs35l56->base.dev, "Failed to modify current clock scale: %d\n", ret); 445 return ret; 446 } 447 448 dev_dbg(cs35l56->base.dev, "Next bus scale: %#x\n", next_scale); 449 450 return 0; 451 } 452 453 static int cs35l56_sdw_bus_config(struct sdw_slave *peripheral, 454 struct sdw_bus_params *params) 455 { 456 struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev); 457 458 if ((cs35l56->base.type == 0x63) && (cs35l56->base.rev < 0xa1)) 459 return cs35l63_sdw_kick_divider(cs35l56, peripheral); 460 461 return 0; 462 } 463 464 static int __maybe_unused cs35l56_sdw_clk_stop(struct sdw_slave *peripheral, 465 enum sdw_clk_stop_mode mode, 466 enum sdw_clk_stop_type type) 467 { 468 struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev); 469 470 dev_dbg(cs35l56->base.dev, "%s: mode:%d type:%d\n", __func__, mode, type); 471 472 return 0; 473 } 474 475 static const struct sdw_slave_ops cs35l56_sdw_ops = { 476 .read_prop = cs35l56_sdw_read_prop, 477 .interrupt_callback = cs35l56_sdw_interrupt, 478 .update_status = cs35l56_sdw_update_status, 479 .bus_config = cs35l56_sdw_bus_config, 480 #ifdef DEBUG 481 .clk_stop = cs35l56_sdw_clk_stop, 482 #endif 483 }; 484 485 static int __maybe_unused cs35l56_sdw_handle_unattach(struct cs35l56_private *cs35l56) 486 { 487 struct sdw_slave *peripheral = cs35l56->sdw_peripheral; 488 489 if (peripheral->unattach_request) { 490 /* Cannot access registers until bus is re-initialized. */ 491 dev_dbg(cs35l56->base.dev, "Wait for initialization_complete\n"); 492 if (!wait_for_completion_timeout(&peripheral->initialization_complete, 493 msecs_to_jiffies(5000))) { 494 dev_err(cs35l56->base.dev, "initialization_complete timed out\n"); 495 return -ETIMEDOUT; 496 } 497 498 peripheral->unattach_request = 0; 499 500 /* 501 * Don't call regcache_mark_dirty(), we can't be sure that the 502 * Manager really did issue a Bus Reset. 503 */ 504 } 505 506 return 0; 507 } 508 509 static int __maybe_unused cs35l56_sdw_runtime_suspend(struct device *dev) 510 { 511 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 512 513 if (!cs35l56->base.init_done) 514 return 0; 515 516 return cs35l56_runtime_suspend_common(&cs35l56->base); 517 } 518 519 static int __maybe_unused cs35l56_sdw_runtime_resume(struct device *dev) 520 { 521 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 522 int ret; 523 524 dev_dbg(dev, "Runtime resume\n"); 525 526 if (!cs35l56->base.init_done) 527 return 0; 528 529 ret = cs35l56_sdw_handle_unattach(cs35l56); 530 if (ret < 0) 531 return ret; 532 533 ret = cs35l56_runtime_resume_common(&cs35l56->base, true); 534 if (ret) 535 return ret; 536 537 /* Re-enable SoundWire interrupts */ 538 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1, 539 CS35L56_SDW_INT_MASK_CODEC_IRQ); 540 541 return 0; 542 } 543 544 static int __maybe_unused cs35l56_sdw_system_suspend(struct device *dev) 545 { 546 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 547 548 if (!cs35l56->base.init_done) 549 return 0; 550 551 /* 552 * Disable SoundWire interrupts. 553 * Flush - don't cancel because that could leave an unbalanced pm_runtime_get. 554 */ 555 cs35l56->sdw_irq_no_unmask = true; 556 flush_work(&cs35l56->sdw_irq_work); 557 558 /* Mask interrupts and flush in case sdw_irq_work was queued again */ 559 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1, 0); 560 sdw_read_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1); 561 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1, 0xFF); 562 flush_work(&cs35l56->sdw_irq_work); 563 564 return cs35l56_system_suspend(dev); 565 } 566 567 static int __maybe_unused cs35l56_sdw_system_resume(struct device *dev) 568 { 569 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 570 571 cs35l56->sdw_irq_no_unmask = false; 572 /* runtime_resume re-enables the interrupt */ 573 574 return cs35l56_system_resume(dev); 575 } 576 577 static int cs35l56_sdw_probe(struct sdw_slave *peripheral, const struct sdw_device_id *id) 578 { 579 struct device *dev = &peripheral->dev; 580 struct cs35l56_private *cs35l56; 581 const struct regmap_config *regmap_config; 582 int ret; 583 584 cs35l56 = devm_kzalloc(dev, sizeof(*cs35l56), GFP_KERNEL); 585 if (!cs35l56) 586 return -ENOMEM; 587 588 cs35l56->base.dev = dev; 589 cs35l56->sdw_peripheral = peripheral; 590 cs35l56->sdw_link_num = peripheral->bus->link_id; 591 INIT_WORK(&cs35l56->sdw_irq_work, cs35l56_sdw_irq_work); 592 593 dev_set_drvdata(dev, cs35l56); 594 595 switch ((unsigned int)id->driver_data) { 596 case 0x3556: 597 case 0x3557: 598 regmap_config = &cs35l56_regmap_sdw; 599 cs35l56->base.fw_reg = &cs35l56_fw_reg; 600 break; 601 case 0x3563: 602 regmap_config = &cs35l63_regmap_sdw; 603 cs35l56->base.fw_reg = &cs35l63_fw_reg; 604 break; 605 default: 606 return -ENODEV; 607 } 608 609 cs35l56->base.regmap = devm_regmap_init(dev, &cs35l56_regmap_bus_sdw, 610 peripheral, regmap_config); 611 if (IS_ERR(cs35l56->base.regmap)) { 612 ret = PTR_ERR(cs35l56->base.regmap); 613 return dev_err_probe(dev, ret, "Failed to allocate register map\n"); 614 } 615 616 /* Start in cache-only until device is enumerated */ 617 regcache_cache_only(cs35l56->base.regmap, true); 618 619 ret = cs35l56_common_probe(cs35l56); 620 if (ret != 0) 621 return ret; 622 623 return 0; 624 } 625 626 static int cs35l56_sdw_remove(struct sdw_slave *peripheral) 627 { 628 struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev); 629 630 /* Disable SoundWire interrupts */ 631 cs35l56->sdw_irq_no_unmask = true; 632 cancel_work_sync(&cs35l56->sdw_irq_work); 633 sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_MASK_1, 0); 634 sdw_read_no_pm(peripheral, CS35L56_SDW_GEN_INT_STAT_1); 635 sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_STAT_1, 0xFF); 636 637 cs35l56_remove(cs35l56); 638 639 return 0; 640 } 641 642 static const struct dev_pm_ops cs35l56_sdw_pm = { 643 SET_RUNTIME_PM_OPS(cs35l56_sdw_runtime_suspend, cs35l56_sdw_runtime_resume, NULL) 644 SYSTEM_SLEEP_PM_OPS(cs35l56_sdw_system_suspend, cs35l56_sdw_system_resume) 645 LATE_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_late, cs35l56_system_resume_early) 646 /* NOIRQ stage not needed, SoundWire doesn't use a hard IRQ */ 647 }; 648 649 static const struct sdw_device_id cs35l56_sdw_id[] = { 650 SDW_SLAVE_ENTRY(0x01FA, 0x3556, 0x3556), 651 SDW_SLAVE_ENTRY(0x01FA, 0x3557, 0x3557), 652 SDW_SLAVE_ENTRY(0x01FA, 0x3563, 0x3563), 653 {}, 654 }; 655 MODULE_DEVICE_TABLE(sdw, cs35l56_sdw_id); 656 657 static struct sdw_driver cs35l56_sdw_driver = { 658 .driver = { 659 .name = "cs35l56", 660 .pm = pm_ptr(&cs35l56_sdw_pm), 661 }, 662 .probe = cs35l56_sdw_probe, 663 .remove = cs35l56_sdw_remove, 664 .ops = &cs35l56_sdw_ops, 665 .id_table = cs35l56_sdw_id, 666 }; 667 668 module_sdw_driver(cs35l56_sdw_driver); 669 670 MODULE_DESCRIPTION("ASoC CS35L56 SoundWire driver"); 671 MODULE_IMPORT_NS("SND_SOC_CS35L56_CORE"); 672 MODULE_IMPORT_NS("SND_SOC_CS35L56_SHARED"); 673 MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>"); 674 MODULE_AUTHOR("Simon Trimmer <simont@opensource.cirrus.com>"); 675 MODULE_LICENSE("GPL"); 676