1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // CS35L56 ALSA SoC audio driver SoundWire binding 4 // 5 // Copyright (C) 2023 Cirrus Logic, Inc. and 6 // Cirrus Logic International Semiconductor Ltd. 7 8 #include <linux/delay.h> 9 #include <linux/device.h> 10 #include <linux/err.h> 11 #include <linux/module.h> 12 #include <linux/pm_runtime.h> 13 #include <linux/regmap.h> 14 #include <linux/soundwire/sdw.h> 15 #include <linux/soundwire/sdw_registers.h> 16 #include <linux/soundwire/sdw_type.h> 17 #include <linux/string_choices.h> 18 #include <linux/swab.h> 19 #include <linux/types.h> 20 #include <linux/workqueue.h> 21 22 #include "cs35l56.h" 23 24 /* Register addresses are offset when sent over SoundWire */ 25 #define CS35L56_SDW_ADDR_OFFSET 0x8000 26 27 /* Cirrus bus bridge registers */ 28 #define CS35L56_SDW_MEM_ACCESS_STATUS 0xd0 29 #define CS35L56_SDW_MEM_READ_DATA 0xd8 30 31 #define CS35L56_SDW_LAST_LATE BIT(3) 32 #define CS35L56_SDW_CMD_IN_PROGRESS BIT(2) 33 #define CS35L56_SDW_RDATA_RDY BIT(0) 34 35 #define CS35L56_LATE_READ_POLL_US 10 36 #define CS35L56_LATE_READ_TIMEOUT_US 1000 37 38 static int cs35l56_sdw_poll_mem_status(struct sdw_slave *peripheral, 39 unsigned int mask, 40 unsigned int match) 41 { 42 int ret, val; 43 44 ret = read_poll_timeout(sdw_read_no_pm, val, 45 (val < 0) || ((val & mask) == match), 46 CS35L56_LATE_READ_POLL_US, CS35L56_LATE_READ_TIMEOUT_US, 47 false, peripheral, CS35L56_SDW_MEM_ACCESS_STATUS); 48 if (ret < 0) 49 return ret; 50 51 if (val < 0) 52 return val; 53 54 return 0; 55 } 56 57 static int cs35l56_sdw_slow_read(struct sdw_slave *peripheral, unsigned int reg, 58 u8 *buf, size_t val_size) 59 { 60 int ret, i; 61 62 reg += CS35L56_SDW_ADDR_OFFSET; 63 64 for (i = 0; i < val_size; i += sizeof(u32)) { 65 /* Poll for bus bridge idle */ 66 ret = cs35l56_sdw_poll_mem_status(peripheral, 67 CS35L56_SDW_CMD_IN_PROGRESS, 68 0); 69 if (ret < 0) { 70 dev_err(&peripheral->dev, "!CMD_IN_PROGRESS fail: %d\n", ret); 71 return ret; 72 } 73 74 /* Reading LSByte triggers read of register to holding buffer */ 75 sdw_read_no_pm(peripheral, reg + i); 76 77 /* Wait for data available */ 78 ret = cs35l56_sdw_poll_mem_status(peripheral, 79 CS35L56_SDW_RDATA_RDY, 80 CS35L56_SDW_RDATA_RDY); 81 if (ret < 0) { 82 dev_err(&peripheral->dev, "RDATA_RDY fail: %d\n", ret); 83 return ret; 84 } 85 86 /* Read data from buffer */ 87 ret = sdw_nread_no_pm(peripheral, CS35L56_SDW_MEM_READ_DATA, 88 sizeof(u32), &buf[i]); 89 if (ret) { 90 dev_err(&peripheral->dev, "Late read @%#x failed: %d\n", reg + i, ret); 91 return ret; 92 } 93 94 swab32s((u32 *)&buf[i]); 95 } 96 97 return 0; 98 } 99 100 static int cs35l56_sdw_read_one(struct sdw_slave *peripheral, unsigned int reg, void *buf) 101 { 102 int ret; 103 104 ret = sdw_nread_no_pm(peripheral, reg, 4, (u8 *)buf); 105 if (ret != 0) { 106 dev_err(&peripheral->dev, "Read failed @%#x:%d\n", reg, ret); 107 return ret; 108 } 109 110 swab32s((u32 *)buf); 111 112 return 0; 113 } 114 115 static int cs35l56_sdw_read(void *context, const void *reg_buf, 116 const size_t reg_size, void *val_buf, 117 size_t val_size) 118 { 119 struct sdw_slave *peripheral = context; 120 u8 *buf8 = val_buf; 121 unsigned int reg, bytes; 122 int ret; 123 124 reg = le32_to_cpu(*(const __le32 *)reg_buf); 125 126 if (cs35l56_is_otp_register(reg)) 127 return cs35l56_sdw_slow_read(peripheral, reg, buf8, val_size); 128 129 reg += CS35L56_SDW_ADDR_OFFSET; 130 131 if (val_size == 4) 132 return cs35l56_sdw_read_one(peripheral, reg, val_buf); 133 134 while (val_size) { 135 bytes = SDW_REG_NO_PAGE - (reg & SDW_REGADDR); /* to end of page */ 136 if (bytes > val_size) 137 bytes = val_size; 138 139 ret = sdw_nread_no_pm(peripheral, reg, bytes, buf8); 140 if (ret != 0) { 141 dev_err(&peripheral->dev, "Read failed @%#x..%#x:%d\n", 142 reg, reg + bytes - 1, ret); 143 return ret; 144 } 145 146 swab32_array((u32 *)buf8, bytes / 4); 147 val_size -= bytes; 148 reg += bytes; 149 buf8 += bytes; 150 } 151 152 return 0; 153 } 154 155 static inline void cs35l56_swab_copy(void *dest, const void *src, size_t nbytes) 156 { 157 u32 *dest32 = dest; 158 const u32 *src32 = src; 159 160 for (; nbytes > 0; nbytes -= 4) 161 *dest32++ = swab32(*src32++); 162 } 163 164 static int cs35l56_sdw_write_one(struct sdw_slave *peripheral, unsigned int reg, const void *buf) 165 { 166 u32 val_le = swab32(*(u32 *)buf); 167 int ret; 168 169 ret = sdw_nwrite_no_pm(peripheral, reg, 4, (u8 *)&val_le); 170 if (ret != 0) { 171 dev_err(&peripheral->dev, "Write failed @%#x:%d\n", reg, ret); 172 return ret; 173 } 174 175 return 0; 176 } 177 178 static int cs35l56_sdw_gather_write(void *context, 179 const void *reg_buf, size_t reg_size, 180 const void *val_buf, size_t val_size) 181 { 182 struct sdw_slave *peripheral = context; 183 const u8 *src_be = val_buf; 184 u32 val_le_buf[64]; /* Define u32 so it is 32-bit aligned */ 185 unsigned int reg, bytes; 186 int ret; 187 188 reg = le32_to_cpu(*(const __le32 *)reg_buf); 189 reg += CS35L56_SDW_ADDR_OFFSET; 190 191 if (val_size == 4) 192 return cs35l56_sdw_write_one(peripheral, reg, src_be); 193 194 while (val_size) { 195 bytes = SDW_REG_NO_PAGE - (reg & SDW_REGADDR); /* to end of page */ 196 if (bytes > val_size) 197 bytes = val_size; 198 if (bytes > sizeof(val_le_buf)) 199 bytes = sizeof(val_le_buf); 200 201 cs35l56_swab_copy(val_le_buf, src_be, bytes); 202 203 ret = sdw_nwrite_no_pm(peripheral, reg, bytes, (u8 *)val_le_buf); 204 if (ret != 0) { 205 dev_err(&peripheral->dev, "Write failed @%#x..%#x:%d\n", 206 reg, reg + bytes - 1, ret); 207 return ret; 208 } 209 210 val_size -= bytes; 211 reg += bytes; 212 src_be += bytes; 213 } 214 215 return 0; 216 } 217 218 static int cs35l56_sdw_write(void *context, const void *val_buf, size_t val_size) 219 { 220 const u8 *src_buf = val_buf; 221 222 /* First word of val_buf contains the destination address */ 223 return cs35l56_sdw_gather_write(context, &src_buf[0], 4, &src_buf[4], val_size - 4); 224 } 225 226 /* 227 * Registers are big-endian on I2C and SPI but little-endian on SoundWire. 228 * Exported firmware controls are big-endian on I2C/SPI but little-endian on 229 * SoundWire. Firmware files are always big-endian and are opaque blobs. 230 * Present a big-endian regmap and hide the endianness swap, so that the ALSA 231 * byte controls always have the same byte order, and firmware file blobs 232 * can be written verbatim. 233 */ 234 static const struct regmap_bus cs35l56_regmap_bus_sdw = { 235 .read = cs35l56_sdw_read, 236 .write = cs35l56_sdw_write, 237 .gather_write = cs35l56_sdw_gather_write, 238 .reg_format_endian_default = REGMAP_ENDIAN_LITTLE, 239 .val_format_endian_default = REGMAP_ENDIAN_BIG, 240 }; 241 242 static int cs35l56_sdw_get_unique_id(struct cs35l56_private *cs35l56) 243 { 244 int ret; 245 246 ret = sdw_read_no_pm(cs35l56->sdw_peripheral, SDW_SCP_DEVID_0); 247 if (ret < 0) 248 return ret; 249 250 cs35l56->sdw_unique_id = ret & 0xf; 251 252 return 0; 253 } 254 255 static void cs35l56_sdw_init(struct sdw_slave *peripheral) 256 { 257 struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev); 258 int ret; 259 260 pm_runtime_get_noresume(cs35l56->base.dev); 261 262 ret = cs35l56_sdw_get_unique_id(cs35l56); 263 if (ret) 264 goto out; 265 266 /* SoundWire UniqueId is used to index the calibration array */ 267 if (cs35l56->base.cal_index < 0) 268 cs35l56->base.cal_index = cs35l56->sdw_unique_id; 269 270 ret = cs35l56_init(cs35l56); 271 if (ret < 0) { 272 regcache_cache_only(cs35l56->base.regmap, true); 273 goto out; 274 } 275 276 /* 277 * cs35l56_init can return with !init_done if it triggered 278 * a soft reset. 279 */ 280 if (cs35l56->base.init_done) { 281 /* Enable SoundWire interrupts */ 282 sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_MASK_1, 283 CS35L56_SDW_INT_MASK_CODEC_IRQ); 284 } 285 286 out: 287 pm_runtime_put_autosuspend(cs35l56->base.dev); 288 } 289 290 static int cs35l56_sdw_interrupt(struct sdw_slave *peripheral, 291 struct sdw_slave_intr_status *status) 292 { 293 struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev); 294 295 /* SoundWire core holds our pm_runtime when calling this function. */ 296 297 dev_dbg(cs35l56->base.dev, "int control_port=%#x\n", status->control_port); 298 299 if ((status->control_port & SDW_SCP_INT1_IMPL_DEF) == 0) 300 return 0; 301 302 /* 303 * Prevent bus manager suspending and possibly issuing a 304 * bus-reset before the queued work has run. 305 */ 306 pm_runtime_get_noresume(cs35l56->base.dev); 307 308 /* 309 * Mask and clear until it has been handled. The read of GEN_INT_STAT_1 310 * is required as per the SoundWire spec for interrupt status bits 311 * to clear. GEN_INT_MASK_1 masks the _inputs_ to GEN_INT_STAT1. 312 * None of the interrupts are time-critical so use the 313 * power-efficient queue. 314 */ 315 sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_MASK_1, 0); 316 sdw_read_no_pm(peripheral, CS35L56_SDW_GEN_INT_STAT_1); 317 sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_STAT_1, 0xFF); 318 queue_work(system_power_efficient_wq, &cs35l56->sdw_irq_work); 319 320 return 0; 321 } 322 323 static void cs35l56_sdw_irq_work(struct work_struct *work) 324 { 325 struct cs35l56_private *cs35l56 = container_of(work, 326 struct cs35l56_private, 327 sdw_irq_work); 328 329 cs35l56_irq(-1, &cs35l56->base); 330 331 /* unmask interrupts */ 332 if (!cs35l56->sdw_irq_no_unmask) 333 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1, 334 CS35L56_SDW_INT_MASK_CODEC_IRQ); 335 336 pm_runtime_put_autosuspend(cs35l56->base.dev); 337 } 338 339 static int cs35l56_sdw_read_prop(struct sdw_slave *peripheral) 340 { 341 struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev); 342 struct sdw_slave_prop *prop = &peripheral->prop; 343 struct sdw_dpn_prop *ports; 344 u8 clock_stop_1 = false; 345 int ret; 346 347 ret = fwnode_property_read_u8(dev_fwnode(cs35l56->base.dev), 348 "mipi-sdw-clock-stop-mode1-supported", 349 &clock_stop_1); 350 if (ret == 0) 351 prop->clk_stop_mode1 = !!clock_stop_1; 352 353 ports = devm_kcalloc(cs35l56->base.dev, 2, sizeof(*ports), GFP_KERNEL); 354 if (!ports) 355 return -ENOMEM; 356 357 prop->source_ports = BIT(CS35L56_SDW1_CAPTURE_PORT); 358 prop->sink_ports = BIT(CS35L56_SDW1_PLAYBACK_PORT); 359 prop->paging_support = true; 360 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY; 361 prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY | SDW_SCP_INT1_IMPL_DEF; 362 363 /* DP1 - playback */ 364 ports[0].num = CS35L56_SDW1_PLAYBACK_PORT; 365 ports[0].type = SDW_DPN_FULL; 366 ports[0].ch_prep_timeout = 10; 367 prop->sink_dpn_prop = &ports[0]; 368 369 /* DP3 - capture */ 370 ports[1].num = CS35L56_SDW1_CAPTURE_PORT; 371 ports[1].type = SDW_DPN_FULL; 372 ports[1].ch_prep_timeout = 10; 373 prop->src_dpn_prop = &ports[1]; 374 375 dev_dbg(&peripheral->dev, "clock stop mode 1 supported: %s\n", 376 str_yes_no(prop->clk_stop_mode1)); 377 378 return 0; 379 } 380 381 static int cs35l56_sdw_update_status(struct sdw_slave *peripheral, 382 enum sdw_slave_status status) 383 { 384 struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev); 385 386 switch (status) { 387 case SDW_SLAVE_ATTACHED: 388 cs35l56->sdw_in_clock_stop_1 = false; 389 if (cs35l56->sdw_attached) 390 break; 391 392 dev_dbg(cs35l56->base.dev, "%s: ATTACHED\n", __func__); 393 if (!cs35l56->base.init_done || cs35l56->soft_resetting) 394 cs35l56_sdw_init(peripheral); 395 396 cs35l56->sdw_attached = true; 397 break; 398 case SDW_SLAVE_UNATTACHED: 399 if (cs35l56->sdw_attached) 400 dev_dbg(cs35l56->base.dev, "%s: UNATTACHED\n", __func__); 401 cs35l56->sdw_attached = false; 402 break; 403 default: 404 break; 405 } 406 407 return 0; 408 } 409 410 static int __maybe_unused cs35l56_sdw_clk_stop(struct sdw_slave *peripheral, 411 enum sdw_clk_stop_mode mode, 412 enum sdw_clk_stop_type type) 413 { 414 struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev); 415 416 dev_dbg(cs35l56->base.dev, "%s: clock_stop_mode%d stage:%d\n", __func__, mode, type); 417 418 switch (type) { 419 case SDW_CLK_POST_PREPARE: 420 if (mode == SDW_CLK_STOP_MODE1) 421 cs35l56->sdw_in_clock_stop_1 = true; 422 else 423 cs35l56->sdw_in_clock_stop_1 = false; 424 return 0; 425 default: 426 return 0; 427 } 428 } 429 430 static const struct sdw_slave_ops cs35l56_sdw_ops = { 431 .read_prop = cs35l56_sdw_read_prop, 432 .interrupt_callback = cs35l56_sdw_interrupt, 433 .update_status = cs35l56_sdw_update_status, 434 .clk_stop = cs35l56_sdw_clk_stop, 435 }; 436 437 static int __maybe_unused cs35l56_sdw_handle_unattach(struct cs35l56_private *cs35l56) 438 { 439 struct sdw_slave *peripheral = cs35l56->sdw_peripheral; 440 441 dev_dbg(cs35l56->base.dev, "attached:%u unattach_request:%u in_clock_stop_1:%u\n", 442 cs35l56->sdw_attached, peripheral->unattach_request, cs35l56->sdw_in_clock_stop_1); 443 444 if (cs35l56->sdw_in_clock_stop_1 || peripheral->unattach_request) { 445 /* Cannot access registers until bus is re-initialized. */ 446 dev_dbg(cs35l56->base.dev, "Wait for initialization_complete\n"); 447 if (!wait_for_completion_timeout(&peripheral->initialization_complete, 448 msecs_to_jiffies(5000))) { 449 dev_err(cs35l56->base.dev, "initialization_complete timed out\n"); 450 return -ETIMEDOUT; 451 } 452 453 peripheral->unattach_request = 0; 454 cs35l56->sdw_in_clock_stop_1 = false; 455 456 /* 457 * Don't call regcache_mark_dirty(), we can't be sure that the 458 * Manager really did issue a Bus Reset. 459 */ 460 } 461 462 return 0; 463 } 464 465 static int __maybe_unused cs35l56_sdw_runtime_suspend(struct device *dev) 466 { 467 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 468 469 if (!cs35l56->base.init_done) 470 return 0; 471 472 return cs35l56_runtime_suspend_common(&cs35l56->base); 473 } 474 475 static int __maybe_unused cs35l56_sdw_runtime_resume(struct device *dev) 476 { 477 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 478 int ret; 479 480 dev_dbg(dev, "Runtime resume\n"); 481 482 if (!cs35l56->base.init_done) 483 return 0; 484 485 ret = cs35l56_sdw_handle_unattach(cs35l56); 486 if (ret < 0) 487 return ret; 488 489 ret = cs35l56_runtime_resume_common(&cs35l56->base, true); 490 if (ret) 491 return ret; 492 493 /* Re-enable SoundWire interrupts */ 494 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1, 495 CS35L56_SDW_INT_MASK_CODEC_IRQ); 496 497 return 0; 498 } 499 500 static int __maybe_unused cs35l56_sdw_system_suspend(struct device *dev) 501 { 502 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 503 504 if (!cs35l56->base.init_done) 505 return 0; 506 507 /* 508 * Disable SoundWire interrupts. 509 * Flush - don't cancel because that could leave an unbalanced pm_runtime_get. 510 */ 511 cs35l56->sdw_irq_no_unmask = true; 512 flush_work(&cs35l56->sdw_irq_work); 513 514 /* Mask interrupts and flush in case sdw_irq_work was queued again */ 515 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1, 0); 516 sdw_read_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1); 517 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1, 0xFF); 518 flush_work(&cs35l56->sdw_irq_work); 519 520 return cs35l56_system_suspend(dev); 521 } 522 523 static int __maybe_unused cs35l56_sdw_system_resume(struct device *dev) 524 { 525 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 526 527 cs35l56->sdw_irq_no_unmask = false; 528 /* runtime_resume re-enables the interrupt */ 529 530 return cs35l56_system_resume(dev); 531 } 532 533 static int cs35l56_sdw_probe(struct sdw_slave *peripheral, const struct sdw_device_id *id) 534 { 535 struct device *dev = &peripheral->dev; 536 struct cs35l56_private *cs35l56; 537 const struct regmap_config *regmap_config; 538 int ret; 539 540 cs35l56 = devm_kzalloc(dev, sizeof(*cs35l56), GFP_KERNEL); 541 if (!cs35l56) 542 return -ENOMEM; 543 544 cs35l56->base.dev = dev; 545 cs35l56->sdw_peripheral = peripheral; 546 cs35l56->sdw_link_num = peripheral->bus->link_id; 547 INIT_WORK(&cs35l56->sdw_irq_work, cs35l56_sdw_irq_work); 548 549 dev_set_drvdata(dev, cs35l56); 550 551 switch ((unsigned int)id->driver_data) { 552 case 0x3556: 553 case 0x3557: 554 regmap_config = &cs35l56_regmap_sdw; 555 break; 556 case 0x3563: 557 regmap_config = &cs35l63_regmap_sdw; 558 break; 559 default: 560 return -ENODEV; 561 } 562 563 cs35l56->base.type = ((unsigned int)id->driver_data) & 0xff; 564 565 cs35l56->base.regmap = devm_regmap_init(dev, &cs35l56_regmap_bus_sdw, 566 peripheral, regmap_config); 567 if (IS_ERR(cs35l56->base.regmap)) { 568 ret = PTR_ERR(cs35l56->base.regmap); 569 return dev_err_probe(dev, ret, "Failed to allocate register map\n"); 570 } 571 572 /* Start in cache-only until device is enumerated */ 573 regcache_cache_only(cs35l56->base.regmap, true); 574 575 ret = cs35l56_common_probe(cs35l56); 576 if (ret != 0) 577 return ret; 578 579 return 0; 580 } 581 582 static void cs35l56_sdw_remove(struct sdw_slave *peripheral) 583 { 584 struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev); 585 586 /* Disable SoundWire interrupts */ 587 cs35l56->sdw_irq_no_unmask = true; 588 flush_work(&cs35l56->sdw_irq_work); 589 sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_MASK_1, 0); 590 sdw_read_no_pm(peripheral, CS35L56_SDW_GEN_INT_STAT_1); 591 sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_STAT_1, 0xFF); 592 flush_work(&cs35l56->sdw_irq_work); 593 594 cs35l56_remove(cs35l56); 595 } 596 597 static const struct dev_pm_ops cs35l56_sdw_pm = { 598 SET_RUNTIME_PM_OPS(cs35l56_sdw_runtime_suspend, cs35l56_sdw_runtime_resume, NULL) 599 SYSTEM_SLEEP_PM_OPS(cs35l56_sdw_system_suspend, cs35l56_sdw_system_resume) 600 LATE_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_late, cs35l56_system_resume_early) 601 /* NOIRQ stage not needed, SoundWire doesn't use a hard IRQ */ 602 }; 603 604 static const struct sdw_device_id cs35l56_sdw_id[] = { 605 SDW_SLAVE_ENTRY(0x01FA, 0x3556, 0x3556), 606 SDW_SLAVE_ENTRY(0x01FA, 0x3557, 0x3557), 607 SDW_SLAVE_ENTRY(0x01FA, 0x3563, 0x3563), 608 {}, 609 }; 610 MODULE_DEVICE_TABLE(sdw, cs35l56_sdw_id); 611 612 static struct sdw_driver cs35l56_sdw_driver = { 613 .driver = { 614 .name = "cs35l56", 615 .pm = pm_ptr(&cs35l56_sdw_pm), 616 }, 617 .probe = cs35l56_sdw_probe, 618 .remove = cs35l56_sdw_remove, 619 .ops = &cs35l56_sdw_ops, 620 .id_table = cs35l56_sdw_id, 621 }; 622 623 module_sdw_driver(cs35l56_sdw_driver); 624 625 MODULE_DESCRIPTION("ASoC CS35L56 SoundWire driver"); 626 MODULE_IMPORT_NS("SND_SOC_CS35L56_CORE"); 627 MODULE_IMPORT_NS("SND_SOC_CS35L56_SHARED"); 628 MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>"); 629 MODULE_AUTHOR("Simon Trimmer <simont@opensource.cirrus.com>"); 630 MODULE_LICENSE("GPL"); 631