xref: /linux/sound/soc/codecs/cs35l32.c (revision cc04a46f11ea046ed53e2c832ae29e4790f7e35f)
1 /*
2  * cs35l32.c -- CS35L32 ALSA SoC audio driver
3  *
4  * Copyright 2014 CirrusLogic, Inc.
5  *
6  * Author: Brian Austin <brian.austin@cirrus.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  */
13 
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/i2c.h>
20 #include <linux/gpio.h>
21 #include <linux/regmap.h>
22 #include <linux/slab.h>
23 #include <linux/platform_device.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/gpio/consumer.h>
26 #include <linux/of_device.h>
27 #include <sound/core.h>
28 #include <sound/pcm.h>
29 #include <sound/pcm_params.h>
30 #include <sound/soc.h>
31 #include <sound/soc-dapm.h>
32 #include <sound/initval.h>
33 #include <sound/tlv.h>
34 #include <dt-bindings/sound/cs35l32.h>
35 
36 #include "cs35l32.h"
37 
38 #define CS35L32_NUM_SUPPLIES 2
39 static const char *const cs35l32_supply_names[CS35L32_NUM_SUPPLIES] = {
40 	"VA",
41 	"VP",
42 };
43 
44 struct  cs35l32_private {
45 	struct regmap *regmap;
46 	struct snd_soc_codec *codec;
47 	struct regulator_bulk_data supplies[CS35L32_NUM_SUPPLIES];
48 	struct cs35l32_platform_data pdata;
49 	struct gpio_desc *reset_gpio;
50 };
51 
52 static const struct reg_default cs35l32_reg_defaults[] = {
53 
54 	{ 0x06, 0x04 }, /* Power Ctl 1 */
55 	{ 0x07, 0xE8 }, /* Power Ctl 2 */
56 	{ 0x08, 0x40 }, /* Clock Ctl */
57 	{ 0x09, 0x20 }, /* Low Battery Threshold */
58 	{ 0x0A, 0x00 }, /* Voltage Monitor [RO] */
59 	{ 0x0B, 0x40 }, /* Conv Peak Curr Protection CTL */
60 	{ 0x0C, 0x07 }, /* IMON Scaling */
61 	{ 0x0D, 0x03 }, /* Audio/LED Pwr Manager */
62 	{ 0x0F, 0x20 }, /* Serial Port Control */
63 	{ 0x10, 0x14 }, /* Class D Amp CTL */
64 	{ 0x11, 0x00 }, /* Protection Release CTL */
65 	{ 0x12, 0xFF }, /* Interrupt Mask 1 */
66 	{ 0x13, 0xFF }, /* Interrupt Mask 2 */
67 	{ 0x14, 0xFF }, /* Interrupt Mask 3 */
68 	{ 0x19, 0x00 }, /* LED Flash Mode Current */
69 	{ 0x1A, 0x00 }, /* LED Movie Mode Current */
70 	{ 0x1B, 0x20 }, /* LED Flash Timer */
71 	{ 0x1C, 0x00 }, /* LED Flash Inhibit Current */
72 };
73 
74 static bool cs35l32_readable_register(struct device *dev, unsigned int reg)
75 {
76 	switch (reg) {
77 	case CS35L32_DEVID_AB ... CS35L32_AUDIO_LED_MNGR:
78 	case CS35L32_ADSP_CTL ... CS35L32_FLASH_INHIBIT:
79 		return true;
80 	default:
81 		return false;
82 	}
83 }
84 
85 static bool cs35l32_volatile_register(struct device *dev, unsigned int reg)
86 {
87 	switch (reg) {
88 	case CS35L32_DEVID_AB ... CS35L32_REV_ID:
89 	case CS35L32_INT_STATUS_1 ... CS35L32_LED_STATUS:
90 		return true;
91 	default:
92 		return false;
93 	}
94 }
95 
96 static bool cs35l32_precious_register(struct device *dev, unsigned int reg)
97 {
98 	switch (reg) {
99 	case CS35L32_INT_STATUS_1 ... CS35L32_LED_STATUS:
100 		return true;
101 	default:
102 		return false;
103 	}
104 }
105 
106 static DECLARE_TLV_DB_SCALE(classd_ctl_tlv, 900, 300, 0);
107 
108 static const struct snd_kcontrol_new imon_ctl =
109 	SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 6, 1, 1);
110 
111 static const struct snd_kcontrol_new vmon_ctl =
112 	SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 7, 1, 1);
113 
114 static const struct snd_kcontrol_new vpmon_ctl =
115 	SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 5, 1, 1);
116 
117 static const struct snd_kcontrol_new cs35l32_snd_controls[] = {
118 	SOC_SINGLE_TLV("Speaker Volume", CS35L32_CLASSD_CTL,
119 		       3, 0x04, 1, classd_ctl_tlv),
120 	SOC_SINGLE("Zero Cross Switch", CS35L32_CLASSD_CTL, 2, 1, 0),
121 	SOC_SINGLE("Gain Manager Switch", CS35L32_AUDIO_LED_MNGR, 3, 1, 0),
122 };
123 
124 static const struct snd_soc_dapm_widget cs35l32_dapm_widgets[] = {
125 
126 	SND_SOC_DAPM_SUPPLY("BOOST", CS35L32_PWRCTL1, 2, 1, NULL, 0),
127 	SND_SOC_DAPM_OUT_DRV("Speaker", CS35L32_PWRCTL1, 7, 1, NULL, 0),
128 
129 	SND_SOC_DAPM_AIF_OUT("SDOUT", NULL, 0, CS35L32_PWRCTL2, 3, 1),
130 
131 	SND_SOC_DAPM_INPUT("VP"),
132 	SND_SOC_DAPM_INPUT("ISENSE"),
133 	SND_SOC_DAPM_INPUT("VSENSE"),
134 
135 	SND_SOC_DAPM_SWITCH("VMON ADC", CS35L32_PWRCTL2, 7, 1, &vmon_ctl),
136 	SND_SOC_DAPM_SWITCH("IMON ADC", CS35L32_PWRCTL2, 6, 1, &imon_ctl),
137 	SND_SOC_DAPM_SWITCH("VPMON ADC", CS35L32_PWRCTL2, 5, 1, &vpmon_ctl),
138 };
139 
140 static const struct snd_soc_dapm_route cs35l32_audio_map[] = {
141 
142 	{"Speaker", NULL, "BOOST"},
143 
144 	{"VMON ADC", NULL, "VSENSE"},
145 	{"IMON ADC", NULL, "ISENSE"},
146 	{"VPMON ADC", NULL, "VP"},
147 
148 	{"SDOUT", "Switch", "VMON ADC"},
149 	{"SDOUT",  "Switch", "IMON ADC"},
150 	{"SDOUT", "Switch", "VPMON ADC"},
151 
152 	{"Capture", NULL, "SDOUT"},
153 };
154 
155 static int cs35l32_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
156 {
157 	struct snd_soc_codec *codec = codec_dai->codec;
158 
159 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
160 	case SND_SOC_DAIFMT_CBM_CFM:
161 		snd_soc_update_bits(codec, CS35L32_ADSP_CTL,
162 				    CS35L32_ADSP_MASTER_MASK,
163 				CS35L32_ADSP_MASTER_MASK);
164 		break;
165 	case SND_SOC_DAIFMT_CBS_CFS:
166 		snd_soc_update_bits(codec, CS35L32_ADSP_CTL,
167 				    CS35L32_ADSP_MASTER_MASK, 0);
168 		break;
169 	default:
170 		return -EINVAL;
171 	}
172 
173 	return 0;
174 }
175 
176 static int cs35l32_set_tristate(struct snd_soc_dai *dai, int tristate)
177 {
178 	struct snd_soc_codec *codec = dai->codec;
179 
180 	return snd_soc_update_bits(codec, CS35L32_PWRCTL2,
181 					CS35L32_SDOUT_3ST, tristate << 3);
182 }
183 
184 static const struct snd_soc_dai_ops cs35l32_ops = {
185 	.set_fmt = cs35l32_set_dai_fmt,
186 	.set_tristate = cs35l32_set_tristate,
187 };
188 
189 static struct snd_soc_dai_driver cs35l32_dai[] = {
190 	{
191 		.name = "cs35l32-monitor",
192 		.id = 0,
193 		.capture = {
194 			.stream_name = "Capture",
195 			.channels_min = 2,
196 			.channels_max = 2,
197 			.rates = CS35L32_RATES,
198 			.formats = CS35L32_FORMATS,
199 		},
200 		.ops = &cs35l32_ops,
201 		.symmetric_rates = 1,
202 	}
203 };
204 
205 static int cs35l32_codec_set_sysclk(struct snd_soc_codec *codec,
206 			      int clk_id, int source, unsigned int freq, int dir)
207 {
208 	unsigned int val;
209 
210 	switch (freq) {
211 	case 6000000:
212 		val = CS35L32_MCLK_RATIO;
213 		break;
214 	case 12000000:
215 		val = CS35L32_MCLK_DIV2_MASK | CS35L32_MCLK_RATIO;
216 		break;
217 	case 6144000:
218 		val = 0;
219 		break;
220 	case 12288000:
221 		val = CS35L32_MCLK_DIV2_MASK;
222 		break;
223 	default:
224 		return -EINVAL;
225 	}
226 
227 	return snd_soc_update_bits(codec, CS35L32_CLK_CTL,
228 			CS35L32_MCLK_DIV2_MASK | CS35L32_MCLK_RATIO_MASK, val);
229 }
230 
231 static const struct snd_soc_codec_driver soc_codec_dev_cs35l32 = {
232 	.set_sysclk = cs35l32_codec_set_sysclk,
233 
234 	.dapm_widgets = cs35l32_dapm_widgets,
235 	.num_dapm_widgets = ARRAY_SIZE(cs35l32_dapm_widgets),
236 	.dapm_routes = cs35l32_audio_map,
237 	.num_dapm_routes = ARRAY_SIZE(cs35l32_audio_map),
238 
239 	.controls = cs35l32_snd_controls,
240 	.num_controls = ARRAY_SIZE(cs35l32_snd_controls),
241 };
242 
243 /* Current and threshold powerup sequence Pg37 in datasheet */
244 static const struct reg_sequence cs35l32_monitor_patch[] = {
245 
246 	{ 0x00, 0x99 },
247 	{ 0x48, 0x17 },
248 	{ 0x49, 0x56 },
249 	{ 0x43, 0x01 },
250 	{ 0x3B, 0x62 },
251 	{ 0x3C, 0x80 },
252 	{ 0x00, 0x00 },
253 };
254 
255 static const struct regmap_config cs35l32_regmap = {
256 	.reg_bits = 8,
257 	.val_bits = 8,
258 
259 	.max_register = CS35L32_MAX_REGISTER,
260 	.reg_defaults = cs35l32_reg_defaults,
261 	.num_reg_defaults = ARRAY_SIZE(cs35l32_reg_defaults),
262 	.volatile_reg = cs35l32_volatile_register,
263 	.readable_reg = cs35l32_readable_register,
264 	.precious_reg = cs35l32_precious_register,
265 	.cache_type = REGCACHE_RBTREE,
266 };
267 
268 static int cs35l32_handle_of_data(struct i2c_client *i2c_client,
269 				    struct cs35l32_platform_data *pdata)
270 {
271 	struct device_node *np = i2c_client->dev.of_node;
272 	unsigned int val;
273 
274 	if (of_property_read_u32(np, "cirrus,sdout-share", &val) >= 0)
275 		pdata->sdout_share = val;
276 
277 	of_property_read_u32(np, "cirrus,boost-manager", &val);
278 	switch (val) {
279 	case CS35L32_BOOST_MGR_AUTO:
280 	case CS35L32_BOOST_MGR_AUTO_AUDIO:
281 	case CS35L32_BOOST_MGR_BYPASS:
282 	case CS35L32_BOOST_MGR_FIXED:
283 		pdata->boost_mng = val;
284 		break;
285 	default:
286 		dev_err(&i2c_client->dev,
287 			"Wrong cirrus,boost-manager DT value %d\n", val);
288 		pdata->boost_mng = CS35L32_BOOST_MGR_BYPASS;
289 	}
290 
291 	of_property_read_u32(np, "cirrus,sdout-datacfg", &val);
292 	switch (val) {
293 	case CS35L32_DATA_CFG_LR_VP:
294 	case CS35L32_DATA_CFG_LR_STAT:
295 	case CS35L32_DATA_CFG_LR:
296 	case CS35L32_DATA_CFG_LR_VPSTAT:
297 		pdata->sdout_datacfg = val;
298 		break;
299 	default:
300 		dev_err(&i2c_client->dev,
301 			"Wrong cirrus,sdout-datacfg DT value %d\n", val);
302 		pdata->sdout_datacfg = CS35L32_DATA_CFG_LR;
303 	}
304 
305 	of_property_read_u32(np, "cirrus,battery-threshold", &val);
306 	switch (val) {
307 	case CS35L32_BATT_THRESH_3_1V:
308 	case CS35L32_BATT_THRESH_3_2V:
309 	case CS35L32_BATT_THRESH_3_3V:
310 	case CS35L32_BATT_THRESH_3_4V:
311 		pdata->batt_thresh = val;
312 		break;
313 	default:
314 		dev_err(&i2c_client->dev,
315 			"Wrong cirrus,battery-threshold DT value %d\n", val);
316 		pdata->batt_thresh = CS35L32_BATT_THRESH_3_3V;
317 	}
318 
319 	of_property_read_u32(np, "cirrus,battery-recovery", &val);
320 	switch (val) {
321 	case CS35L32_BATT_RECOV_3_1V:
322 	case CS35L32_BATT_RECOV_3_2V:
323 	case CS35L32_BATT_RECOV_3_3V:
324 	case CS35L32_BATT_RECOV_3_4V:
325 	case CS35L32_BATT_RECOV_3_5V:
326 	case CS35L32_BATT_RECOV_3_6V:
327 		pdata->batt_recov = val;
328 		break;
329 	default:
330 		dev_err(&i2c_client->dev,
331 			"Wrong cirrus,battery-recovery DT value %d\n", val);
332 		pdata->batt_recov = CS35L32_BATT_RECOV_3_4V;
333 	}
334 
335 	return 0;
336 }
337 
338 static int cs35l32_i2c_probe(struct i2c_client *i2c_client,
339 				       const struct i2c_device_id *id)
340 {
341 	struct cs35l32_private *cs35l32;
342 	struct cs35l32_platform_data *pdata =
343 		dev_get_platdata(&i2c_client->dev);
344 	int ret, i;
345 	unsigned int devid = 0;
346 	unsigned int reg;
347 
348 
349 	cs35l32 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs35l32_private),
350 			       GFP_KERNEL);
351 	if (!cs35l32) {
352 		dev_err(&i2c_client->dev, "could not allocate codec\n");
353 		return -ENOMEM;
354 	}
355 
356 	i2c_set_clientdata(i2c_client, cs35l32);
357 
358 	cs35l32->regmap = devm_regmap_init_i2c(i2c_client, &cs35l32_regmap);
359 	if (IS_ERR(cs35l32->regmap)) {
360 		ret = PTR_ERR(cs35l32->regmap);
361 		dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret);
362 		return ret;
363 	}
364 
365 	if (pdata) {
366 		cs35l32->pdata = *pdata;
367 	} else {
368 		pdata = devm_kzalloc(&i2c_client->dev,
369 				     sizeof(struct cs35l32_platform_data),
370 				GFP_KERNEL);
371 		if (!pdata) {
372 			dev_err(&i2c_client->dev, "could not allocate pdata\n");
373 			return -ENOMEM;
374 		}
375 		if (i2c_client->dev.of_node) {
376 			ret = cs35l32_handle_of_data(i2c_client,
377 						     &cs35l32->pdata);
378 			if (ret != 0)
379 				return ret;
380 		}
381 	}
382 
383 	for (i = 0; i < ARRAY_SIZE(cs35l32->supplies); i++)
384 		cs35l32->supplies[i].supply = cs35l32_supply_names[i];
385 
386 	ret = devm_regulator_bulk_get(&i2c_client->dev,
387 				      ARRAY_SIZE(cs35l32->supplies),
388 				      cs35l32->supplies);
389 	if (ret != 0) {
390 		dev_err(&i2c_client->dev,
391 			"Failed to request supplies: %d\n", ret);
392 		return ret;
393 	}
394 
395 	ret = regulator_bulk_enable(ARRAY_SIZE(cs35l32->supplies),
396 				    cs35l32->supplies);
397 	if (ret != 0) {
398 		dev_err(&i2c_client->dev,
399 			"Failed to enable supplies: %d\n", ret);
400 		return ret;
401 	}
402 
403 	/* Reset the Device */
404 	cs35l32->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev,
405 		"reset", GPIOD_OUT_LOW);
406 	if (IS_ERR(cs35l32->reset_gpio))
407 		return PTR_ERR(cs35l32->reset_gpio);
408 
409 	gpiod_set_value_cansleep(cs35l32->reset_gpio, 1);
410 
411 	/* initialize codec */
412 	ret = regmap_read(cs35l32->regmap, CS35L32_DEVID_AB, &reg);
413 	devid = (reg & 0xFF) << 12;
414 
415 	ret = regmap_read(cs35l32->regmap, CS35L32_DEVID_CD, &reg);
416 	devid |= (reg & 0xFF) << 4;
417 
418 	ret = regmap_read(cs35l32->regmap, CS35L32_DEVID_E, &reg);
419 	devid |= (reg & 0xF0) >> 4;
420 
421 	if (devid != CS35L32_CHIP_ID) {
422 		ret = -ENODEV;
423 		dev_err(&i2c_client->dev,
424 			"CS35L32 Device ID (%X). Expected %X\n",
425 			devid, CS35L32_CHIP_ID);
426 		return ret;
427 	}
428 
429 	ret = regmap_read(cs35l32->regmap, CS35L32_REV_ID, &reg);
430 	if (ret < 0) {
431 		dev_err(&i2c_client->dev, "Get Revision ID failed\n");
432 		return ret;
433 	}
434 
435 	ret = regmap_register_patch(cs35l32->regmap, cs35l32_monitor_patch,
436 				    ARRAY_SIZE(cs35l32_monitor_patch));
437 	if (ret < 0) {
438 		dev_err(&i2c_client->dev, "Failed to apply errata patch\n");
439 		return ret;
440 	}
441 
442 	dev_info(&i2c_client->dev,
443 		 "Cirrus Logic CS35L32, Revision: %02X\n", reg & 0xFF);
444 
445 	/* Setup VBOOST Management */
446 	if (cs35l32->pdata.boost_mng)
447 		regmap_update_bits(cs35l32->regmap, CS35L32_AUDIO_LED_MNGR,
448 				   CS35L32_BOOST_MASK,
449 				cs35l32->pdata.boost_mng);
450 
451 	/* Setup ADSP Format Config */
452 	if (cs35l32->pdata.sdout_share)
453 		regmap_update_bits(cs35l32->regmap, CS35L32_ADSP_CTL,
454 				    CS35L32_ADSP_SHARE_MASK,
455 				cs35l32->pdata.sdout_share << 3);
456 
457 	/* Setup ADSP Data Configuration */
458 	if (cs35l32->pdata.sdout_datacfg)
459 		regmap_update_bits(cs35l32->regmap, CS35L32_ADSP_CTL,
460 				   CS35L32_ADSP_DATACFG_MASK,
461 				cs35l32->pdata.sdout_datacfg << 4);
462 
463 	/* Setup Low Battery Recovery  */
464 	if (cs35l32->pdata.batt_recov)
465 		regmap_update_bits(cs35l32->regmap, CS35L32_BATT_THRESHOLD,
466 				   CS35L32_BATT_REC_MASK,
467 				cs35l32->pdata.batt_recov << 1);
468 
469 	/* Setup Low Battery Threshold */
470 	if (cs35l32->pdata.batt_thresh)
471 		regmap_update_bits(cs35l32->regmap, CS35L32_BATT_THRESHOLD,
472 				   CS35L32_BATT_THRESH_MASK,
473 				cs35l32->pdata.batt_thresh << 4);
474 
475 	/* Power down the AMP */
476 	regmap_update_bits(cs35l32->regmap, CS35L32_PWRCTL1, CS35L32_PDN_AMP,
477 			    CS35L32_PDN_AMP);
478 
479 	/* Clear MCLK Error Bit since we don't have the clock yet */
480 	ret = regmap_read(cs35l32->regmap, CS35L32_INT_STATUS_1, &reg);
481 
482 	ret =  snd_soc_register_codec(&i2c_client->dev,
483 			&soc_codec_dev_cs35l32, cs35l32_dai,
484 			ARRAY_SIZE(cs35l32_dai));
485 	if (ret < 0)
486 		goto err_disable;
487 
488 	return 0;
489 
490 err_disable:
491 	regulator_bulk_disable(ARRAY_SIZE(cs35l32->supplies),
492 			       cs35l32->supplies);
493 	return ret;
494 }
495 
496 static int cs35l32_i2c_remove(struct i2c_client *i2c_client)
497 {
498 	struct cs35l32_private *cs35l32 = i2c_get_clientdata(i2c_client);
499 
500 	snd_soc_unregister_codec(&i2c_client->dev);
501 
502 	/* Hold down reset */
503 	gpiod_set_value_cansleep(cs35l32->reset_gpio, 0);
504 
505 	return 0;
506 }
507 
508 #ifdef CONFIG_PM
509 static int cs35l32_runtime_suspend(struct device *dev)
510 {
511 	struct cs35l32_private *cs35l32 = dev_get_drvdata(dev);
512 
513 	regcache_cache_only(cs35l32->regmap, true);
514 	regcache_mark_dirty(cs35l32->regmap);
515 
516 	/* Hold down reset */
517 	gpiod_set_value_cansleep(cs35l32->reset_gpio, 0);
518 
519 	/* remove power */
520 	regulator_bulk_disable(ARRAY_SIZE(cs35l32->supplies),
521 			       cs35l32->supplies);
522 
523 	return 0;
524 }
525 
526 static int cs35l32_runtime_resume(struct device *dev)
527 {
528 	struct cs35l32_private *cs35l32 = dev_get_drvdata(dev);
529 	int ret;
530 
531 	/* Enable power */
532 	ret = regulator_bulk_enable(ARRAY_SIZE(cs35l32->supplies),
533 				    cs35l32->supplies);
534 	if (ret != 0) {
535 		dev_err(dev, "Failed to enable supplies: %d\n",
536 			ret);
537 		return ret;
538 	}
539 
540 	gpiod_set_value_cansleep(cs35l32->reset_gpio, 1);
541 
542 	regcache_cache_only(cs35l32->regmap, false);
543 	regcache_sync(cs35l32->regmap);
544 
545 	return 0;
546 }
547 #endif
548 
549 static const struct dev_pm_ops cs35l32_runtime_pm = {
550 	SET_RUNTIME_PM_OPS(cs35l32_runtime_suspend, cs35l32_runtime_resume,
551 			   NULL)
552 };
553 
554 static const struct of_device_id cs35l32_of_match[] = {
555 	{ .compatible = "cirrus,cs35l32", },
556 	{},
557 };
558 MODULE_DEVICE_TABLE(of, cs35l32_of_match);
559 
560 
561 static const struct i2c_device_id cs35l32_id[] = {
562 	{"cs35l32", 0},
563 	{}
564 };
565 
566 MODULE_DEVICE_TABLE(i2c, cs35l32_id);
567 
568 static struct i2c_driver cs35l32_i2c_driver = {
569 	.driver = {
570 		   .name = "cs35l32",
571 		   .pm = &cs35l32_runtime_pm,
572 		   .of_match_table = cs35l32_of_match,
573 		   },
574 	.id_table = cs35l32_id,
575 	.probe = cs35l32_i2c_probe,
576 	.remove = cs35l32_i2c_remove,
577 };
578 
579 module_i2c_driver(cs35l32_i2c_driver);
580 
581 MODULE_DESCRIPTION("ASoC CS35L32 driver");
582 MODULE_AUTHOR("Brian Austin, Cirrus Logic Inc, <brian.austin@cirrus.com>");
583 MODULE_LICENSE("GPL");
584