1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright 2019 Google, Inc. 4 * 5 * ChromeOS Embedded Controller codec driver. 6 * 7 * This driver uses the cros-ec interface to communicate with the ChromeOS 8 * EC for audio function. 9 */ 10 11 #include <crypto/sha2.h> 12 #include <linux/acpi.h> 13 #include <linux/delay.h> 14 #include <linux/device.h> 15 #include <linux/cleanup.h> 16 #include <linux/io.h> 17 #include <linux/jiffies.h> 18 #include <linux/kernel.h> 19 #include <linux/module.h> 20 #include <linux/of.h> 21 #include <linux/of_address.h> 22 #include <linux/of_reserved_mem.h> 23 #include <linux/platform_data/cros_ec_commands.h> 24 #include <linux/platform_data/cros_ec_proto.h> 25 #include <linux/platform_device.h> 26 #include <linux/string_choices.h> 27 #include <sound/pcm.h> 28 #include <sound/pcm_params.h> 29 #include <sound/soc.h> 30 #include <sound/tlv.h> 31 32 struct cros_ec_codec_priv { 33 struct device *dev; 34 struct cros_ec_device *ec_device; 35 36 /* common */ 37 uint32_t ec_capabilities; 38 39 uint64_t ec_shm_addr; 40 uint32_t ec_shm_len; 41 42 uint64_t ap_shm_phys_addr; 43 uint32_t ap_shm_len; 44 uint64_t ap_shm_addr; 45 uint64_t ap_shm_last_alloc; 46 47 /* DMIC */ 48 atomic_t dmic_probed; 49 50 /* I2S_RX */ 51 uint32_t i2s_rx_bclk_ratio; 52 53 /* WoV */ 54 bool wov_enabled; 55 uint8_t *wov_audio_shm_p; 56 uint32_t wov_audio_shm_len; 57 uint8_t wov_audio_shm_type; 58 uint8_t *wov_lang_shm_p; 59 uint32_t wov_lang_shm_len; 60 uint8_t wov_lang_shm_type; 61 62 struct mutex wov_dma_lock; 63 uint8_t wov_buf[64000]; 64 uint32_t wov_rp, wov_wp; 65 size_t wov_dma_offset; 66 bool wov_burst_read; 67 struct snd_pcm_substream *wov_substream; 68 struct delayed_work wov_copy_work; 69 struct notifier_block wov_notifier; 70 }; 71 72 static int ec_codec_capable(struct cros_ec_codec_priv *priv, uint8_t cap) 73 { 74 return priv->ec_capabilities & BIT(cap); 75 } 76 77 static int send_ec_host_command(struct cros_ec_device *ec_dev, uint32_t cmd, 78 uint8_t *out, size_t outsize, 79 uint8_t *in, size_t insize) 80 { 81 int ret; 82 struct cros_ec_command *msg; 83 84 msg = kmalloc(sizeof(*msg) + max(outsize, insize), GFP_KERNEL); 85 if (!msg) 86 return -ENOMEM; 87 88 msg->version = 0; 89 msg->command = cmd; 90 msg->outsize = outsize; 91 msg->insize = insize; 92 93 if (outsize) 94 memcpy(msg->data, out, outsize); 95 96 ret = cros_ec_cmd_xfer_status(ec_dev, msg); 97 if (ret < 0) 98 goto error; 99 100 if (in && insize) 101 memcpy(in, msg->data, insize); 102 103 ret = 0; 104 error: 105 kfree(msg); 106 return ret; 107 } 108 109 static int dmic_get_gain(struct snd_kcontrol *kcontrol, 110 struct snd_ctl_elem_value *ucontrol) 111 { 112 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 113 struct cros_ec_codec_priv *priv = 114 snd_soc_component_get_drvdata(component); 115 struct ec_param_ec_codec_dmic p; 116 struct ec_response_ec_codec_dmic_get_gain_idx r; 117 int ret; 118 119 p.cmd = EC_CODEC_DMIC_GET_GAIN_IDX; 120 p.get_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_0; 121 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC, 122 (uint8_t *)&p, sizeof(p), 123 (uint8_t *)&r, sizeof(r)); 124 if (ret < 0) 125 return ret; 126 ucontrol->value.integer.value[0] = r.gain; 127 128 p.cmd = EC_CODEC_DMIC_GET_GAIN_IDX; 129 p.get_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_1; 130 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC, 131 (uint8_t *)&p, sizeof(p), 132 (uint8_t *)&r, sizeof(r)); 133 if (ret < 0) 134 return ret; 135 ucontrol->value.integer.value[1] = r.gain; 136 137 return 0; 138 } 139 140 static int dmic_put_gain(struct snd_kcontrol *kcontrol, 141 struct snd_ctl_elem_value *ucontrol) 142 { 143 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 144 struct cros_ec_codec_priv *priv = 145 snd_soc_component_get_drvdata(component); 146 struct soc_mixer_control *control = 147 (struct soc_mixer_control *)kcontrol->private_value; 148 int max_dmic_gain = control->max; 149 int left = ucontrol->value.integer.value[0]; 150 int right = ucontrol->value.integer.value[1]; 151 struct ec_param_ec_codec_dmic p; 152 int ret; 153 154 if (left > max_dmic_gain || right > max_dmic_gain) 155 return -EINVAL; 156 157 dev_dbg(component->dev, "set mic gain to %u, %u\n", left, right); 158 159 p.cmd = EC_CODEC_DMIC_SET_GAIN_IDX; 160 p.set_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_0; 161 p.set_gain_idx_param.gain = left; 162 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC, 163 (uint8_t *)&p, sizeof(p), NULL, 0); 164 if (ret < 0) 165 return ret; 166 167 p.cmd = EC_CODEC_DMIC_SET_GAIN_IDX; 168 p.set_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_1; 169 p.set_gain_idx_param.gain = right; 170 return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC, 171 (uint8_t *)&p, sizeof(p), NULL, 0); 172 } 173 174 static const DECLARE_TLV_DB_SCALE(dmic_gain_tlv, 0, 100, 0); 175 176 enum { 177 DMIC_CTL_GAIN = 0, 178 }; 179 180 static struct snd_kcontrol_new dmic_controls[] = { 181 [DMIC_CTL_GAIN] = 182 SOC_DOUBLE_EXT_TLV("EC Mic Gain", SND_SOC_NOPM, SND_SOC_NOPM, 183 0, 0, 0, dmic_get_gain, dmic_put_gain, 184 dmic_gain_tlv), 185 }; 186 187 static int dmic_probe(struct snd_soc_component *component) 188 { 189 struct cros_ec_codec_priv *priv = 190 snd_soc_component_get_drvdata(component); 191 struct device *dev = priv->dev; 192 struct soc_mixer_control *control; 193 struct ec_param_ec_codec_dmic p; 194 struct ec_response_ec_codec_dmic_get_max_gain r; 195 int ret; 196 197 if (!atomic_add_unless(&priv->dmic_probed, 1, 1)) 198 return 0; 199 200 p.cmd = EC_CODEC_DMIC_GET_MAX_GAIN; 201 202 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC, 203 (uint8_t *)&p, sizeof(p), 204 (uint8_t *)&r, sizeof(r)); 205 if (ret < 0) { 206 dev_warn(dev, "get_max_gain() unsupported\n"); 207 return 0; 208 } 209 210 dev_dbg(dev, "max gain = %d\n", r.max_gain); 211 212 control = (struct soc_mixer_control *) 213 dmic_controls[DMIC_CTL_GAIN].private_value; 214 control->max = r.max_gain; 215 control->platform_max = r.max_gain; 216 217 return snd_soc_add_component_controls(component, 218 &dmic_controls[DMIC_CTL_GAIN], 1); 219 } 220 221 static int i2s_rx_hw_params(struct snd_pcm_substream *substream, 222 struct snd_pcm_hw_params *params, 223 struct snd_soc_dai *dai) 224 { 225 struct snd_soc_component *component = dai->component; 226 struct cros_ec_codec_priv *priv = 227 snd_soc_component_get_drvdata(component); 228 struct ec_param_ec_codec_i2s_rx p; 229 enum ec_codec_i2s_rx_sample_depth depth; 230 uint32_t bclk; 231 int ret; 232 233 if (params_rate(params) != 48000) 234 return -EINVAL; 235 236 switch (params_width(params)) { 237 case 16: 238 depth = EC_CODEC_I2S_RX_SAMPLE_DEPTH_16; 239 break; 240 case 24: 241 depth = EC_CODEC_I2S_RX_SAMPLE_DEPTH_24; 242 break; 243 default: 244 return -EINVAL; 245 } 246 247 dev_dbg(component->dev, "set depth to %u\n", depth); 248 249 p.cmd = EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH; 250 p.set_sample_depth_param.depth = depth; 251 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX, 252 (uint8_t *)&p, sizeof(p), NULL, 0); 253 if (ret < 0) 254 return ret; 255 256 if (priv->i2s_rx_bclk_ratio) 257 bclk = params_rate(params) * priv->i2s_rx_bclk_ratio; 258 else 259 bclk = snd_soc_params_to_bclk(params); 260 261 dev_dbg(component->dev, "set bclk to %u\n", bclk); 262 263 p.cmd = EC_CODEC_I2S_RX_SET_BCLK; 264 p.set_bclk_param.bclk = bclk; 265 return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX, 266 (uint8_t *)&p, sizeof(p), NULL, 0); 267 } 268 269 static int i2s_rx_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio) 270 { 271 struct snd_soc_component *component = dai->component; 272 struct cros_ec_codec_priv *priv = 273 snd_soc_component_get_drvdata(component); 274 275 priv->i2s_rx_bclk_ratio = ratio; 276 return 0; 277 } 278 279 static int i2s_rx_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) 280 { 281 struct snd_soc_component *component = dai->component; 282 struct cros_ec_codec_priv *priv = 283 snd_soc_component_get_drvdata(component); 284 struct ec_param_ec_codec_i2s_rx p; 285 enum ec_codec_i2s_rx_daifmt daifmt; 286 287 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 288 case SND_SOC_DAIFMT_CBC_CFC: 289 break; 290 default: 291 return -EINVAL; 292 } 293 294 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 295 case SND_SOC_DAIFMT_NB_NF: 296 break; 297 default: 298 return -EINVAL; 299 } 300 301 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 302 case SND_SOC_DAIFMT_I2S: 303 daifmt = EC_CODEC_I2S_RX_DAIFMT_I2S; 304 break; 305 case SND_SOC_DAIFMT_RIGHT_J: 306 daifmt = EC_CODEC_I2S_RX_DAIFMT_RIGHT_J; 307 break; 308 case SND_SOC_DAIFMT_LEFT_J: 309 daifmt = EC_CODEC_I2S_RX_DAIFMT_LEFT_J; 310 break; 311 default: 312 return -EINVAL; 313 } 314 315 dev_dbg(component->dev, "set format to %u\n", daifmt); 316 317 p.cmd = EC_CODEC_I2S_RX_SET_DAIFMT; 318 p.set_daifmt_param.daifmt = daifmt; 319 return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX, 320 (uint8_t *)&p, sizeof(p), NULL, 0); 321 } 322 323 static const u64 i2s_rx_selectable_formats = 324 SND_SOC_POSSIBLE_DAIFMT_I2S | 325 SND_SOC_POSSIBLE_DAIFMT_RIGHT_J | 326 SND_SOC_POSSIBLE_DAIFMT_LEFT_J | 327 SND_SOC_POSSIBLE_DAIFMT_NB_NF; 328 329 static const struct snd_soc_dai_ops i2s_rx_dai_ops = { 330 .hw_params = i2s_rx_hw_params, 331 .set_fmt = i2s_rx_set_fmt, 332 .set_bclk_ratio = i2s_rx_set_bclk_ratio, 333 .auto_selectable_formats = &i2s_rx_selectable_formats, 334 .num_auto_selectable_formats = 1, 335 }; 336 337 static int i2s_rx_event(struct snd_soc_dapm_widget *w, 338 struct snd_kcontrol *kcontrol, int event) 339 { 340 struct snd_soc_component *component = 341 snd_soc_dapm_to_component(w->dapm); 342 struct cros_ec_codec_priv *priv = 343 snd_soc_component_get_drvdata(component); 344 struct ec_param_ec_codec_i2s_rx p = {}; 345 346 switch (event) { 347 case SND_SOC_DAPM_PRE_PMU: 348 dev_dbg(component->dev, "enable I2S RX\n"); 349 p.cmd = EC_CODEC_I2S_RX_ENABLE; 350 break; 351 case SND_SOC_DAPM_PRE_PMD: 352 dev_dbg(component->dev, "disable I2S RX\n"); 353 p.cmd = EC_CODEC_I2S_RX_DISABLE; 354 break; 355 default: 356 return 0; 357 } 358 359 return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX, 360 (uint8_t *)&p, sizeof(p), NULL, 0); 361 } 362 363 static struct snd_soc_dapm_widget i2s_rx_dapm_widgets[] = { 364 SND_SOC_DAPM_INPUT("DMIC"), 365 SND_SOC_DAPM_SUPPLY("I2S RX Enable", SND_SOC_NOPM, 0, 0, i2s_rx_event, 366 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), 367 SND_SOC_DAPM_AIF_OUT("I2S RX", "I2S Capture", 0, SND_SOC_NOPM, 0, 0), 368 }; 369 370 static struct snd_soc_dapm_route i2s_rx_dapm_routes[] = { 371 {"I2S RX", NULL, "DMIC"}, 372 {"I2S RX", NULL, "I2S RX Enable"}, 373 }; 374 375 static struct snd_soc_dai_driver i2s_rx_dai_driver = { 376 .name = "EC Codec I2S RX", 377 .capture = { 378 .stream_name = "I2S Capture", 379 .channels_min = 2, 380 .channels_max = 2, 381 .rates = SNDRV_PCM_RATE_48000, 382 .formats = SNDRV_PCM_FMTBIT_S16_LE | 383 SNDRV_PCM_FMTBIT_S24_LE, 384 }, 385 .ops = &i2s_rx_dai_ops, 386 }; 387 388 static int i2s_rx_probe(struct snd_soc_component *component) 389 { 390 return dmic_probe(component); 391 } 392 393 static const struct snd_soc_component_driver i2s_rx_component_driver = { 394 .probe = i2s_rx_probe, 395 .dapm_widgets = i2s_rx_dapm_widgets, 396 .num_dapm_widgets = ARRAY_SIZE(i2s_rx_dapm_widgets), 397 .dapm_routes = i2s_rx_dapm_routes, 398 .num_dapm_routes = ARRAY_SIZE(i2s_rx_dapm_routes), 399 .endianness = 1, 400 }; 401 402 static void *wov_map_shm(struct cros_ec_codec_priv *priv, 403 uint8_t shm_id, uint32_t *len, uint8_t *type) 404 { 405 struct ec_param_ec_codec p; 406 struct ec_response_ec_codec_get_shm_addr r; 407 uint32_t req, offset; 408 409 p.cmd = EC_CODEC_GET_SHM_ADDR; 410 p.get_shm_addr_param.shm_id = shm_id; 411 if (send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC, 412 (uint8_t *)&p, sizeof(p), 413 (uint8_t *)&r, sizeof(r)) < 0) { 414 dev_err(priv->dev, "failed to EC_CODEC_GET_SHM_ADDR\n"); 415 return NULL; 416 } 417 418 dev_dbg(priv->dev, "phys_addr=%#llx, len=%#x\n", r.phys_addr, r.len); 419 420 *len = r.len; 421 *type = r.type; 422 423 switch (r.type) { 424 case EC_CODEC_SHM_TYPE_EC_RAM: 425 return (void __force *)devm_ioremap_wc(priv->dev, 426 r.phys_addr + priv->ec_shm_addr, r.len); 427 case EC_CODEC_SHM_TYPE_SYSTEM_RAM: 428 if (r.phys_addr) { 429 dev_err(priv->dev, "unknown status\n"); 430 return NULL; 431 } 432 433 req = round_up(r.len, PAGE_SIZE); 434 dev_dbg(priv->dev, "round up from %u to %u\n", r.len, req); 435 436 if (priv->ap_shm_last_alloc + req > 437 priv->ap_shm_phys_addr + priv->ap_shm_len) { 438 dev_err(priv->dev, "insufficient space for AP SHM\n"); 439 return NULL; 440 } 441 442 dev_dbg(priv->dev, "alloc AP SHM addr=%#llx, len=%#x\n", 443 priv->ap_shm_last_alloc, req); 444 445 p.cmd = EC_CODEC_SET_SHM_ADDR; 446 p.set_shm_addr_param.phys_addr = priv->ap_shm_last_alloc; 447 p.set_shm_addr_param.len = req; 448 p.set_shm_addr_param.shm_id = shm_id; 449 if (send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC, 450 (uint8_t *)&p, sizeof(p), 451 NULL, 0) < 0) { 452 dev_err(priv->dev, "failed to EC_CODEC_SET_SHM_ADDR\n"); 453 return NULL; 454 } 455 456 /* 457 * Note: EC codec only requests for `r.len' but we allocate 458 * round up PAGE_SIZE `req'. 459 */ 460 offset = priv->ap_shm_last_alloc - priv->ap_shm_phys_addr; 461 priv->ap_shm_last_alloc += req; 462 463 return (void *)(uintptr_t)(priv->ap_shm_addr + offset); 464 default: 465 return NULL; 466 } 467 } 468 469 static bool wov_queue_full(struct cros_ec_codec_priv *priv) 470 { 471 return ((priv->wov_wp + 1) % sizeof(priv->wov_buf)) == priv->wov_rp; 472 } 473 474 static size_t wov_queue_size(struct cros_ec_codec_priv *priv) 475 { 476 if (priv->wov_wp >= priv->wov_rp) 477 return priv->wov_wp - priv->wov_rp; 478 else 479 return sizeof(priv->wov_buf) - priv->wov_rp + priv->wov_wp; 480 } 481 482 static void wov_queue_dequeue(struct cros_ec_codec_priv *priv, size_t len) 483 { 484 struct snd_pcm_runtime *runtime = priv->wov_substream->runtime; 485 size_t req; 486 487 while (len) { 488 req = min(len, runtime->dma_bytes - priv->wov_dma_offset); 489 if (priv->wov_wp >= priv->wov_rp) 490 req = min(req, (size_t)priv->wov_wp - priv->wov_rp); 491 else 492 req = min(req, sizeof(priv->wov_buf) - priv->wov_rp); 493 494 memcpy(runtime->dma_area + priv->wov_dma_offset, 495 priv->wov_buf + priv->wov_rp, req); 496 497 priv->wov_dma_offset += req; 498 if (priv->wov_dma_offset == runtime->dma_bytes) 499 priv->wov_dma_offset = 0; 500 501 priv->wov_rp += req; 502 if (priv->wov_rp == sizeof(priv->wov_buf)) 503 priv->wov_rp = 0; 504 505 len -= req; 506 } 507 508 snd_pcm_period_elapsed(priv->wov_substream); 509 } 510 511 static void wov_queue_try_dequeue(struct cros_ec_codec_priv *priv) 512 { 513 size_t period_bytes = snd_pcm_lib_period_bytes(priv->wov_substream); 514 515 while (period_bytes && wov_queue_size(priv) >= period_bytes) { 516 wov_queue_dequeue(priv, period_bytes); 517 period_bytes = snd_pcm_lib_period_bytes(priv->wov_substream); 518 } 519 } 520 521 static void wov_queue_enqueue(struct cros_ec_codec_priv *priv, 522 uint8_t *addr, size_t len, bool iomem) 523 { 524 size_t req; 525 526 while (len) { 527 if (wov_queue_full(priv)) { 528 wov_queue_try_dequeue(priv); 529 530 if (wov_queue_full(priv)) { 531 dev_err(priv->dev, "overrun detected\n"); 532 return; 533 } 534 } 535 536 if (priv->wov_wp >= priv->wov_rp) 537 req = sizeof(priv->wov_buf) - priv->wov_wp; 538 else 539 /* Note: waste 1-byte to differentiate full and empty */ 540 req = priv->wov_rp - priv->wov_wp - 1; 541 req = min(req, len); 542 543 if (iomem) 544 memcpy_fromio(priv->wov_buf + priv->wov_wp, 545 (void __force __iomem *)addr, req); 546 else 547 memcpy(priv->wov_buf + priv->wov_wp, addr, req); 548 549 priv->wov_wp += req; 550 if (priv->wov_wp == sizeof(priv->wov_buf)) 551 priv->wov_wp = 0; 552 553 addr += req; 554 len -= req; 555 } 556 557 wov_queue_try_dequeue(priv); 558 } 559 560 static int wov_read_audio_shm(struct cros_ec_codec_priv *priv) 561 { 562 struct ec_param_ec_codec_wov p; 563 struct ec_response_ec_codec_wov_read_audio_shm r; 564 int ret; 565 566 p.cmd = EC_CODEC_WOV_READ_AUDIO_SHM; 567 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV, 568 (uint8_t *)&p, sizeof(p), 569 (uint8_t *)&r, sizeof(r)); 570 if (ret) { 571 dev_err(priv->dev, "failed to EC_CODEC_WOV_READ_AUDIO_SHM\n"); 572 return ret; 573 } 574 575 if (!r.len) 576 dev_dbg(priv->dev, "no data, sleep\n"); 577 else 578 wov_queue_enqueue(priv, priv->wov_audio_shm_p + r.offset, r.len, 579 priv->wov_audio_shm_type == EC_CODEC_SHM_TYPE_EC_RAM); 580 return -EAGAIN; 581 } 582 583 static int wov_read_audio(struct cros_ec_codec_priv *priv) 584 { 585 struct ec_param_ec_codec_wov p; 586 struct ec_response_ec_codec_wov_read_audio r; 587 int remain = priv->wov_burst_read ? 16000 : 320; 588 int ret; 589 590 while (remain >= 0) { 591 p.cmd = EC_CODEC_WOV_READ_AUDIO; 592 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV, 593 (uint8_t *)&p, sizeof(p), 594 (uint8_t *)&r, sizeof(r)); 595 if (ret) { 596 dev_err(priv->dev, 597 "failed to EC_CODEC_WOV_READ_AUDIO\n"); 598 return ret; 599 } 600 601 if (!r.len) { 602 dev_dbg(priv->dev, "no data, sleep\n"); 603 priv->wov_burst_read = false; 604 break; 605 } 606 607 wov_queue_enqueue(priv, r.buf, r.len, false); 608 remain -= r.len; 609 } 610 611 return -EAGAIN; 612 } 613 614 static void wov_copy_work(struct work_struct *w) 615 { 616 struct cros_ec_codec_priv *priv = 617 container_of(w, struct cros_ec_codec_priv, wov_copy_work.work); 618 int ret; 619 620 guard(mutex)(&priv->wov_dma_lock); 621 if (!priv->wov_substream) { 622 dev_warn(priv->dev, "no pcm substream\n"); 623 return; 624 } 625 626 if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_AUDIO_SHM)) 627 ret = wov_read_audio_shm(priv); 628 else 629 ret = wov_read_audio(priv); 630 631 if (ret == -EAGAIN) 632 schedule_delayed_work(&priv->wov_copy_work, 633 msecs_to_jiffies(10)); 634 else if (ret) 635 dev_err(priv->dev, "failed to read audio data\n"); 636 } 637 638 static int wov_enable_get(struct snd_kcontrol *kcontrol, 639 struct snd_ctl_elem_value *ucontrol) 640 { 641 struct snd_soc_component *c = snd_kcontrol_chip(kcontrol); 642 struct cros_ec_codec_priv *priv = snd_soc_component_get_drvdata(c); 643 644 ucontrol->value.integer.value[0] = priv->wov_enabled; 645 return 0; 646 } 647 648 static int wov_enable_put(struct snd_kcontrol *kcontrol, 649 struct snd_ctl_elem_value *ucontrol) 650 { 651 struct snd_soc_component *c = snd_kcontrol_chip(kcontrol); 652 struct cros_ec_codec_priv *priv = snd_soc_component_get_drvdata(c); 653 int enabled = ucontrol->value.integer.value[0]; 654 struct ec_param_ec_codec_wov p; 655 int ret; 656 657 if (priv->wov_enabled != enabled) { 658 if (enabled) 659 p.cmd = EC_CODEC_WOV_ENABLE; 660 else 661 p.cmd = EC_CODEC_WOV_DISABLE; 662 663 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV, 664 (uint8_t *)&p, sizeof(p), NULL, 0); 665 if (ret) { 666 dev_err(priv->dev, "failed to %s wov\n", 667 str_enable_disable(enabled)); 668 return ret; 669 } 670 671 priv->wov_enabled = enabled; 672 } 673 674 return 0; 675 } 676 677 static int wov_set_lang_shm(struct cros_ec_codec_priv *priv, 678 uint8_t *buf, size_t size, uint8_t *digest) 679 { 680 struct ec_param_ec_codec_wov p; 681 struct ec_param_ec_codec_wov_set_lang_shm *pp = &p.set_lang_shm_param; 682 int ret; 683 684 if (size > priv->wov_lang_shm_len) { 685 dev_err(priv->dev, "no enough SHM size: %d\n", 686 priv->wov_lang_shm_len); 687 return -EIO; 688 } 689 690 switch (priv->wov_lang_shm_type) { 691 case EC_CODEC_SHM_TYPE_EC_RAM: 692 memcpy_toio((void __force __iomem *)priv->wov_lang_shm_p, 693 buf, size); 694 memset_io((void __force __iomem *)priv->wov_lang_shm_p + size, 695 0, priv->wov_lang_shm_len - size); 696 break; 697 case EC_CODEC_SHM_TYPE_SYSTEM_RAM: 698 memcpy(priv->wov_lang_shm_p, buf, size); 699 memset(priv->wov_lang_shm_p + size, 0, 700 priv->wov_lang_shm_len - size); 701 702 /* make sure write to memory before calling host command */ 703 wmb(); 704 break; 705 } 706 707 p.cmd = EC_CODEC_WOV_SET_LANG_SHM; 708 memcpy(pp->hash, digest, SHA256_DIGEST_SIZE); 709 pp->total_len = size; 710 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV, 711 (uint8_t *)&p, sizeof(p), NULL, 0); 712 if (ret) { 713 dev_err(priv->dev, "failed to EC_CODEC_WOV_SET_LANG_SHM\n"); 714 return ret; 715 } 716 717 return 0; 718 } 719 720 static int wov_set_lang(struct cros_ec_codec_priv *priv, 721 uint8_t *buf, size_t size, uint8_t *digest) 722 { 723 struct ec_param_ec_codec_wov p; 724 struct ec_param_ec_codec_wov_set_lang *pp = &p.set_lang_param; 725 size_t i, req; 726 int ret; 727 728 for (i = 0; i < size; i += req) { 729 req = min(size - i, ARRAY_SIZE(pp->buf)); 730 731 p.cmd = EC_CODEC_WOV_SET_LANG; 732 memcpy(pp->hash, digest, SHA256_DIGEST_SIZE); 733 pp->total_len = size; 734 pp->offset = i; 735 memcpy(pp->buf, buf + i, req); 736 pp->len = req; 737 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV, 738 (uint8_t *)&p, sizeof(p), NULL, 0); 739 if (ret) { 740 dev_err(priv->dev, "failed to EC_CODEC_WOV_SET_LANG\n"); 741 return ret; 742 } 743 } 744 745 return 0; 746 } 747 748 static int wov_hotword_model_put(struct snd_kcontrol *kcontrol, 749 const unsigned int __user *bytes, 750 unsigned int size) 751 { 752 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 753 struct cros_ec_codec_priv *priv = 754 snd_soc_component_get_drvdata(component); 755 struct ec_param_ec_codec_wov p; 756 struct ec_response_ec_codec_wov_get_lang r; 757 uint8_t digest[SHA256_DIGEST_SIZE]; 758 uint8_t *buf; 759 int ret; 760 761 /* Skips the TLV header. */ 762 bytes += 2; 763 size -= 8; 764 765 dev_dbg(priv->dev, "%s: size=%d\n", __func__, size); 766 767 buf = memdup_user(bytes, size); 768 if (IS_ERR(buf)) 769 return PTR_ERR(buf); 770 771 sha256(buf, size, digest); 772 dev_dbg(priv->dev, "hash=%*phN\n", SHA256_DIGEST_SIZE, digest); 773 774 p.cmd = EC_CODEC_WOV_GET_LANG; 775 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV, 776 (uint8_t *)&p, sizeof(p), 777 (uint8_t *)&r, sizeof(r)); 778 if (ret) 779 goto leave; 780 781 if (memcmp(digest, r.hash, SHA256_DIGEST_SIZE) == 0) { 782 dev_dbg(priv->dev, "not updated"); 783 goto leave; 784 } 785 786 if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_LANG_SHM)) 787 ret = wov_set_lang_shm(priv, buf, size, digest); 788 else 789 ret = wov_set_lang(priv, buf, size, digest); 790 791 leave: 792 kfree(buf); 793 return ret; 794 } 795 796 static struct snd_kcontrol_new wov_controls[] = { 797 SOC_SINGLE_BOOL_EXT("Wake-on-Voice Switch", 0, 798 wov_enable_get, wov_enable_put), 799 SND_SOC_BYTES_TLV("Hotword Model", 0x11000, NULL, 800 wov_hotword_model_put), 801 }; 802 803 static struct snd_soc_dai_driver wov_dai_driver = { 804 .name = "Wake on Voice", 805 .capture = { 806 .stream_name = "WoV Capture", 807 .channels_min = 1, 808 .channels_max = 1, 809 .rates = SNDRV_PCM_RATE_16000, 810 .formats = SNDRV_PCM_FMTBIT_S16_LE, 811 }, 812 }; 813 814 static int wov_host_event(struct notifier_block *nb, 815 unsigned long queued_during_suspend, void *notify) 816 { 817 struct cros_ec_codec_priv *priv = 818 container_of(nb, struct cros_ec_codec_priv, wov_notifier); 819 u32 host_event; 820 821 dev_dbg(priv->dev, "%s\n", __func__); 822 823 host_event = cros_ec_get_host_event(priv->ec_device); 824 if (host_event & EC_HOST_EVENT_MASK(EC_HOST_EVENT_WOV)) { 825 schedule_delayed_work(&priv->wov_copy_work, 0); 826 return NOTIFY_OK; 827 } else { 828 return NOTIFY_DONE; 829 } 830 } 831 832 static int wov_probe(struct snd_soc_component *component) 833 { 834 struct cros_ec_codec_priv *priv = 835 snd_soc_component_get_drvdata(component); 836 int ret; 837 838 mutex_init(&priv->wov_dma_lock); 839 INIT_DELAYED_WORK(&priv->wov_copy_work, wov_copy_work); 840 841 priv->wov_notifier.notifier_call = wov_host_event; 842 ret = blocking_notifier_chain_register( 843 &priv->ec_device->event_notifier, &priv->wov_notifier); 844 if (ret) 845 return ret; 846 847 if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_LANG_SHM)) { 848 priv->wov_lang_shm_p = wov_map_shm(priv, 849 EC_CODEC_SHM_ID_WOV_LANG, 850 &priv->wov_lang_shm_len, 851 &priv->wov_lang_shm_type); 852 if (!priv->wov_lang_shm_p) 853 return -EFAULT; 854 } 855 856 if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_AUDIO_SHM)) { 857 priv->wov_audio_shm_p = wov_map_shm(priv, 858 EC_CODEC_SHM_ID_WOV_AUDIO, 859 &priv->wov_audio_shm_len, 860 &priv->wov_audio_shm_type); 861 if (!priv->wov_audio_shm_p) 862 return -EFAULT; 863 } 864 865 return dmic_probe(component); 866 } 867 868 static void wov_remove(struct snd_soc_component *component) 869 { 870 struct cros_ec_codec_priv *priv = 871 snd_soc_component_get_drvdata(component); 872 873 blocking_notifier_chain_unregister( 874 &priv->ec_device->event_notifier, &priv->wov_notifier); 875 } 876 877 static int wov_pcm_open(struct snd_soc_component *component, 878 struct snd_pcm_substream *substream) 879 { 880 static const struct snd_pcm_hardware hw_param = { 881 .info = SNDRV_PCM_INFO_MMAP | 882 SNDRV_PCM_INFO_INTERLEAVED | 883 SNDRV_PCM_INFO_MMAP_VALID, 884 .formats = SNDRV_PCM_FMTBIT_S16_LE, 885 .rates = SNDRV_PCM_RATE_16000, 886 .channels_min = 1, 887 .channels_max = 1, 888 .period_bytes_min = PAGE_SIZE, 889 .period_bytes_max = 0x20000 / 8, 890 .periods_min = 8, 891 .periods_max = 8, 892 .buffer_bytes_max = 0x20000, 893 }; 894 895 return snd_soc_set_runtime_hwparams(substream, &hw_param); 896 } 897 898 static int wov_pcm_hw_params(struct snd_soc_component *component, 899 struct snd_pcm_substream *substream, 900 struct snd_pcm_hw_params *hw_params) 901 { 902 struct cros_ec_codec_priv *priv = 903 snd_soc_component_get_drvdata(component); 904 905 guard(mutex)(&priv->wov_dma_lock); 906 priv->wov_substream = substream; 907 priv->wov_rp = priv->wov_wp = 0; 908 priv->wov_dma_offset = 0; 909 priv->wov_burst_read = true; 910 911 return 0; 912 } 913 914 static int wov_pcm_hw_free(struct snd_soc_component *component, 915 struct snd_pcm_substream *substream) 916 { 917 struct cros_ec_codec_priv *priv = 918 snd_soc_component_get_drvdata(component); 919 920 scoped_guard(mutex, &priv->wov_dma_lock) { 921 wov_queue_dequeue(priv, wov_queue_size(priv)); 922 priv->wov_substream = NULL; 923 } 924 925 cancel_delayed_work_sync(&priv->wov_copy_work); 926 927 return 0; 928 } 929 930 static snd_pcm_uframes_t wov_pcm_pointer(struct snd_soc_component *component, 931 struct snd_pcm_substream *substream) 932 { 933 struct snd_pcm_runtime *runtime = substream->runtime; 934 struct cros_ec_codec_priv *priv = 935 snd_soc_component_get_drvdata(component); 936 937 return bytes_to_frames(runtime, priv->wov_dma_offset); 938 } 939 940 static int wov_pcm_new(struct snd_soc_component *component, 941 struct snd_soc_pcm_runtime *rtd) 942 { 943 snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_VMALLOC, 944 NULL, 0, 0); 945 return 0; 946 } 947 948 static const struct snd_soc_component_driver wov_component_driver = { 949 .probe = wov_probe, 950 .remove = wov_remove, 951 .controls = wov_controls, 952 .num_controls = ARRAY_SIZE(wov_controls), 953 .open = wov_pcm_open, 954 .hw_params = wov_pcm_hw_params, 955 .hw_free = wov_pcm_hw_free, 956 .pointer = wov_pcm_pointer, 957 .pcm_new = wov_pcm_new, 958 }; 959 960 static int cros_ec_codec_platform_probe(struct platform_device *pdev) 961 { 962 struct device *dev = &pdev->dev; 963 struct cros_ec_device *ec_device = dev_get_drvdata(pdev->dev.parent); 964 struct cros_ec_codec_priv *priv; 965 struct ec_param_ec_codec p; 966 struct ec_response_ec_codec_get_capabilities r; 967 int ret; 968 #ifdef CONFIG_OF 969 struct resource res; 970 u64 ec_shm_size; 971 const __be32 *regaddr_p; 972 #endif 973 974 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 975 if (!priv) 976 return -ENOMEM; 977 978 #ifdef CONFIG_OF 979 regaddr_p = of_get_address(dev->of_node, 0, &ec_shm_size, NULL); 980 if (regaddr_p) { 981 priv->ec_shm_addr = of_read_number(regaddr_p, 2); 982 priv->ec_shm_len = ec_shm_size; 983 984 dev_dbg(dev, "ec_shm_addr=%#llx len=%#x\n", 985 priv->ec_shm_addr, priv->ec_shm_len); 986 } 987 988 ret = of_reserved_mem_region_to_resource(dev->of_node, 0, &res); 989 if (!ret) { 990 priv->ap_shm_phys_addr = res.start; 991 priv->ap_shm_len = resource_size(&res); 992 priv->ap_shm_addr = 993 (uint64_t)(uintptr_t)devm_ioremap_wc( 994 dev, priv->ap_shm_phys_addr, 995 priv->ap_shm_len); 996 priv->ap_shm_last_alloc = priv->ap_shm_phys_addr; 997 998 dev_dbg(dev, "ap_shm_phys_addr=%#llx len=%#x\n", 999 priv->ap_shm_phys_addr, priv->ap_shm_len); 1000 } 1001 #endif 1002 1003 priv->dev = dev; 1004 priv->ec_device = ec_device; 1005 atomic_set(&priv->dmic_probed, 0); 1006 1007 p.cmd = EC_CODEC_GET_CAPABILITIES; 1008 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC, 1009 (uint8_t *)&p, sizeof(p), 1010 (uint8_t *)&r, sizeof(r)); 1011 if (ret) { 1012 dev_err(dev, "failed to EC_CODEC_GET_CAPABILITIES\n"); 1013 return ret; 1014 } 1015 priv->ec_capabilities = r.capabilities; 1016 1017 /* Reset EC codec i2s rx. */ 1018 p.cmd = EC_CODEC_I2S_RX_RESET; 1019 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX, 1020 (uint8_t *)&p, sizeof(p), NULL, 0); 1021 if (ret == -ENOPROTOOPT) { 1022 dev_info(dev, 1023 "Missing reset command. Please update EC firmware.\n"); 1024 } else if (ret) { 1025 dev_err(dev, "failed to EC_CODEC_I2S_RESET: %d\n", ret); 1026 return ret; 1027 } 1028 1029 platform_set_drvdata(pdev, priv); 1030 1031 ret = devm_snd_soc_register_component(dev, &i2s_rx_component_driver, 1032 &i2s_rx_dai_driver, 1); 1033 if (ret) 1034 return ret; 1035 1036 return devm_snd_soc_register_component(dev, &wov_component_driver, 1037 &wov_dai_driver, 1); 1038 } 1039 1040 #ifdef CONFIG_OF 1041 static const struct of_device_id cros_ec_codec_of_match[] = { 1042 { .compatible = "google,cros-ec-codec" }, 1043 {}, 1044 }; 1045 MODULE_DEVICE_TABLE(of, cros_ec_codec_of_match); 1046 #endif 1047 1048 #ifdef CONFIG_ACPI 1049 static const struct acpi_device_id cros_ec_codec_acpi_id[] = { 1050 { "GOOG0013", 0 }, 1051 { } 1052 }; 1053 MODULE_DEVICE_TABLE(acpi, cros_ec_codec_acpi_id); 1054 #endif 1055 1056 static struct platform_driver cros_ec_codec_platform_driver = { 1057 .driver = { 1058 .name = "cros-ec-codec", 1059 .of_match_table = of_match_ptr(cros_ec_codec_of_match), 1060 .acpi_match_table = ACPI_PTR(cros_ec_codec_acpi_id), 1061 }, 1062 .probe = cros_ec_codec_platform_probe, 1063 }; 1064 1065 module_platform_driver(cros_ec_codec_platform_driver); 1066 1067 MODULE_LICENSE("GPL v2"); 1068 MODULE_DESCRIPTION("ChromeOS EC codec driver"); 1069 MODULE_AUTHOR("Cheng-Yi Chiang <cychiang@chromium.org>"); 1070 MODULE_ALIAS("platform:cros-ec-codec"); 1071