18ade6cc7SWeidong Wang // SPDX-License-Identifier: GPL-2.0-only 28ade6cc7SWeidong Wang // 38ade6cc7SWeidong Wang // aw88399.h -- ALSA SoC AW88399 codec support 48ade6cc7SWeidong Wang // 58ade6cc7SWeidong Wang // Copyright (c) 2023 AWINIC Technology CO., LTD 68ade6cc7SWeidong Wang // 78ade6cc7SWeidong Wang // Author: Weidong Wang <wangweidong.a@awinic.com> 88ade6cc7SWeidong Wang // 98ade6cc7SWeidong Wang 108ade6cc7SWeidong Wang #ifndef __AW88399_H__ 118ade6cc7SWeidong Wang #define __AW88399_H__ 128ade6cc7SWeidong Wang 138ade6cc7SWeidong Wang /* registers list */ 148ade6cc7SWeidong Wang #define AW88399_ID_REG (0x00) 158ade6cc7SWeidong Wang #define AW88399_SYSST_REG (0x01) 168ade6cc7SWeidong Wang #define AW88399_SYSINT_REG (0x02) 178ade6cc7SWeidong Wang #define AW88399_SYSINTM_REG (0x03) 188ade6cc7SWeidong Wang #define AW88399_SYSCTRL_REG (0x04) 198ade6cc7SWeidong Wang #define AW88399_SYSCTRL2_REG (0x05) 208ade6cc7SWeidong Wang #define AW88399_I2SCTRL1_REG (0x06) 218ade6cc7SWeidong Wang #define AW88399_I2SCTRL2_REG (0x07) 228ade6cc7SWeidong Wang #define AW88399_I2SCTRL3_REG (0x08) 238ade6cc7SWeidong Wang #define AW88399_DACCFG1_REG (0x09) 248ade6cc7SWeidong Wang #define AW88399_DACCFG2_REG (0x0A) 258ade6cc7SWeidong Wang #define AW88399_DACCFG3_REG (0x0B) 268ade6cc7SWeidong Wang #define AW88399_DACCFG4_REG (0x0C) 278ade6cc7SWeidong Wang #define AW88399_DACCFG5_REG (0x0D) 288ade6cc7SWeidong Wang #define AW88399_DACCFG6_REG (0x0E) 298ade6cc7SWeidong Wang #define AW88399_DACCFG7_REG (0x0F) 308ade6cc7SWeidong Wang #define AW88399_MPDCFG1_REG (0x10) 318ade6cc7SWeidong Wang #define AW88399_MPDCFG2_REG (0x11) 328ade6cc7SWeidong Wang #define AW88399_MPDCFG3_REG (0x12) 338ade6cc7SWeidong Wang #define AW88399_MPDCFG4_REG (0x13) 348ade6cc7SWeidong Wang #define AW88399_PWMCTRL1_REG (0x14) 358ade6cc7SWeidong Wang #define AW88399_PWMCTRL2_REG (0x15) 368ade6cc7SWeidong Wang #define AW88399_PWMCTRL3_REG (0x16) 378ade6cc7SWeidong Wang #define AW88399_I2SCFG1_REG (0x17) 388ade6cc7SWeidong Wang #define AW88399_DBGCTRL_REG (0x18) 398ade6cc7SWeidong Wang #define AW88399_HAGCST_REG (0x20) 408ade6cc7SWeidong Wang #define AW88399_VBAT_REG (0x21) 418ade6cc7SWeidong Wang #define AW88399_TEMP_REG (0x22) 428ade6cc7SWeidong Wang #define AW88399_PVDD_REG (0x23) 438ade6cc7SWeidong Wang #define AW88399_ISNDAT_REG (0x24) 448ade6cc7SWeidong Wang #define AW88399_VSNDAT_REG (0x25) 458ade6cc7SWeidong Wang #define AW88399_I2SINT_REG (0x26) 468ade6cc7SWeidong Wang #define AW88399_I2SCAPCNT_REG (0x27) 478ade6cc7SWeidong Wang #define AW88399_ANASTA1_REG (0x28) 488ade6cc7SWeidong Wang #define AW88399_ANASTA2_REG (0x29) 498ade6cc7SWeidong Wang #define AW88399_ANASTA3_REG (0x2A) 508ade6cc7SWeidong Wang #define AW88399_TESTDET_REG (0x2B) 518ade6cc7SWeidong Wang #define AW88399_DSMCFG1_REG (0x30) 528ade6cc7SWeidong Wang #define AW88399_DSMCFG2_REG (0x31) 538ade6cc7SWeidong Wang #define AW88399_DSMCFG3_REG (0x32) 548ade6cc7SWeidong Wang #define AW88399_DSMCFG4_REG (0x33) 558ade6cc7SWeidong Wang #define AW88399_DSMCFG5_REG (0x34) 568ade6cc7SWeidong Wang #define AW88399_DSMCFG6_REG (0x35) 578ade6cc7SWeidong Wang #define AW88399_DSMCFG7_REG (0x36) 588ade6cc7SWeidong Wang #define AW88399_DSMCFG8_REG (0x37) 598ade6cc7SWeidong Wang #define AW88399_TESTIN_REG (0x38) 608ade6cc7SWeidong Wang #define AW88399_TESTOUT_REG (0x39) 618ade6cc7SWeidong Wang #define AW88399_MEMTEST_REG (0x3A) 628ade6cc7SWeidong Wang #define AW88399_VSNCTRL1_REG (0x3B) 638ade6cc7SWeidong Wang #define AW88399_ISNCTRL1_REG (0x3C) 648ade6cc7SWeidong Wang #define AW88399_ISNCTRL2_REG (0x3D) 658ade6cc7SWeidong Wang #define AW88399_DSPMADD_REG (0x40) 668ade6cc7SWeidong Wang #define AW88399_DSPMDAT_REG (0x41) 678ade6cc7SWeidong Wang #define AW88399_WDT_REG (0x42) 688ade6cc7SWeidong Wang #define AW88399_ACR1_REG (0x43) 698ade6cc7SWeidong Wang #define AW88399_ACR2_REG (0x44) 708ade6cc7SWeidong Wang #define AW88399_ASR1_REG (0x45) 718ade6cc7SWeidong Wang #define AW88399_ASR2_REG (0x46) 728ade6cc7SWeidong Wang #define AW88399_DSPCFG_REG (0x47) 738ade6cc7SWeidong Wang #define AW88399_ASR3_REG (0x48) 748ade6cc7SWeidong Wang #define AW88399_ASR4_REG (0x49) 758ade6cc7SWeidong Wang #define AW88399_DSPVCALB_REG (0x4A) 768ade6cc7SWeidong Wang #define AW88399_CRCCTRL_REG (0x4B) 778ade6cc7SWeidong Wang #define AW88399_DSPDBG1_REG (0x4C) 788ade6cc7SWeidong Wang #define AW88399_DSPDBG2_REG (0x4D) 798ade6cc7SWeidong Wang #define AW88399_DSPDBG3_REG (0x4E) 808ade6cc7SWeidong Wang #define AW88399_PLLCTRL1_REG (0x50) 818ade6cc7SWeidong Wang #define AW88399_PLLCTRL2_REG (0x51) 828ade6cc7SWeidong Wang #define AW88399_PLLCTRL3_REG (0x52) 838ade6cc7SWeidong Wang #define AW88399_CDACTRL1_REG (0x53) 848ade6cc7SWeidong Wang #define AW88399_CDACTRL2_REG (0x54) 858ade6cc7SWeidong Wang #define AW88399_CDACTRL3_REG (0x55) 868ade6cc7SWeidong Wang #define AW88399_SADCCTRL1_REG (0x56) 878ade6cc7SWeidong Wang #define AW88399_SADCCTRL2_REG (0x57) 888ade6cc7SWeidong Wang #define AW88399_BOPCTRL1_REG (0x58) 898ade6cc7SWeidong Wang #define AW88399_BOPCTRL2_REG (0x5A) 908ade6cc7SWeidong Wang #define AW88399_BOPCTRL3_REG (0x5B) 918ade6cc7SWeidong Wang #define AW88399_BOPCTRL4_REG (0x5C) 928ade6cc7SWeidong Wang #define AW88399_BOPCTRL5_REG (0x5D) 938ade6cc7SWeidong Wang #define AW88399_BOPCTRL6_REG (0x5E) 948ade6cc7SWeidong Wang #define AW88399_BOPCTRL7_REG (0x5F) 958ade6cc7SWeidong Wang #define AW88399_BSTCTRL1_REG (0x60) 968ade6cc7SWeidong Wang #define AW88399_BSTCTRL2_REG (0x61) 978ade6cc7SWeidong Wang #define AW88399_BSTCTRL3_REG (0x62) 988ade6cc7SWeidong Wang #define AW88399_BSTCTRL4_REG (0x63) 998ade6cc7SWeidong Wang #define AW88399_BSTCTRL5_REG (0x64) 1008ade6cc7SWeidong Wang #define AW88399_BSTCTRL6_REG (0x65) 1018ade6cc7SWeidong Wang #define AW88399_BSTCTRL7_REG (0x66) 1028ade6cc7SWeidong Wang #define AW88399_BSTCTRL8_REG (0x67) 1038ade6cc7SWeidong Wang #define AW88399_BSTCTRL9_REG (0x68) 1048ade6cc7SWeidong Wang #define AW88399_BSTCTRL10_REG (0x69) 1058ade6cc7SWeidong Wang #define AW88399_CPCTRL_REG (0x6A) 1068ade6cc7SWeidong Wang #define AW88399_EFWH_REG (0x6C) 1078ade6cc7SWeidong Wang #define AW88399_EFWM2_REG (0x6D) 1088ade6cc7SWeidong Wang #define AW88399_EFWM1_REG (0x6E) 1098ade6cc7SWeidong Wang #define AW88399_EFWL_REG (0x6F) 1108ade6cc7SWeidong Wang #define AW88399_TESTCTRL1_REG (0x70) 1118ade6cc7SWeidong Wang #define AW88399_TESTCTRL2_REG (0x71) 1128ade6cc7SWeidong Wang #define AW88399_EFCTRL1_REG (0x72) 1138ade6cc7SWeidong Wang #define AW88399_EFCTRL2_REG (0x73) 1148ade6cc7SWeidong Wang #define AW88399_EFRH4_REG (0x74) 1158ade6cc7SWeidong Wang #define AW88399_EFRH3_REG (0x75) 1168ade6cc7SWeidong Wang #define AW88399_EFRH2_REG (0x76) 1178ade6cc7SWeidong Wang #define AW88399_EFRH1_REG (0x77) 1188ade6cc7SWeidong Wang #define AW88399_EFRL4_REG (0x78) 1198ade6cc7SWeidong Wang #define AW88399_EFRL3_REG (0x79) 1208ade6cc7SWeidong Wang #define AW88399_EFRL2_REG (0x7A) 1218ade6cc7SWeidong Wang #define AW88399_EFRL1_REG (0x7B) 1228ade6cc7SWeidong Wang #define AW88399_TM_REG (0x7C) 1238ade6cc7SWeidong Wang #define AW88399_TM2_REG (0x7D) 1248ade6cc7SWeidong Wang 1258ade6cc7SWeidong Wang #define AW88399_REG_MAX (0x7E) 1268ade6cc7SWeidong Wang #define AW88399_MUTE_VOL (1023) 1278ade6cc7SWeidong Wang 1288ade6cc7SWeidong Wang #define AW88399_DSP_CFG_ADDR (0x9B00) 1298ade6cc7SWeidong Wang #define AW88399_DSP_REG_CFG_ADPZ_RA (0x9B68) 1308ade6cc7SWeidong Wang #define AW88399_DSP_FW_ADDR (0x8980) 1318ade6cc7SWeidong Wang #define AW88399_DSP_ROM_CHECK_ADDR (0x1F40) 1328ade6cc7SWeidong Wang #define AW88399_DSP_ROM_CHECK_DATA (0x4638) 1338ade6cc7SWeidong Wang 1348ade6cc7SWeidong Wang #define AW88399_CALI_RE_HBITS_MASK (~(0xFFFF0000)) 1358ade6cc7SWeidong Wang #define AW88399_CALI_RE_HBITS_SHIFT (16) 1368ade6cc7SWeidong Wang 1378ade6cc7SWeidong Wang #define AW88399_CALI_RE_LBITS_MASK (~(0xFFFF)) 1388ade6cc7SWeidong Wang #define AW88399_CALI_RE_LBITS_SHIFT (0) 1398ade6cc7SWeidong Wang 1408ade6cc7SWeidong Wang #define AW88399_I2STXEN_START_BIT (9) 1418ade6cc7SWeidong Wang #define AW88399_I2STXEN_BITS_LEN (1) 1428ade6cc7SWeidong Wang #define AW88399_I2STXEN_MASK \ 1438ade6cc7SWeidong Wang (~(((1<<AW88399_I2STXEN_BITS_LEN)-1) << AW88399_I2STXEN_START_BIT)) 1448ade6cc7SWeidong Wang 1458ade6cc7SWeidong Wang #define AW88399_I2STXEN_DISABLE (0) 1468ade6cc7SWeidong Wang #define AW88399_I2STXEN_DISABLE_VALUE \ 1478ade6cc7SWeidong Wang (AW88399_I2STXEN_DISABLE << AW88399_I2STXEN_START_BIT) 1488ade6cc7SWeidong Wang 1498ade6cc7SWeidong Wang #define AW88399_I2STXEN_ENABLE (1) 1508ade6cc7SWeidong Wang #define AW88399_I2STXEN_ENABLE_VALUE \ 1518ade6cc7SWeidong Wang (AW88399_I2STXEN_ENABLE << AW88399_I2STXEN_START_BIT) 1528ade6cc7SWeidong Wang 1538ade6cc7SWeidong Wang #define AW88399_VOL_START_BIT (0) 1548ade6cc7SWeidong Wang #define AW88399_VOL_BITS_LEN (10) 1558ade6cc7SWeidong Wang #define AW88399_VOL_MASK \ 1568ade6cc7SWeidong Wang (~(((1<<AW88399_VOL_BITS_LEN)-1) << AW88399_VOL_START_BIT)) 1578ade6cc7SWeidong Wang 1588ade6cc7SWeidong Wang #define AW88399_PWDN_START_BIT (0) 1598ade6cc7SWeidong Wang #define AW88399_PWDN_BITS_LEN (1) 1608ade6cc7SWeidong Wang #define AW88399_PWDN_MASK \ 1618ade6cc7SWeidong Wang (~(((1<<AW88399_PWDN_BITS_LEN)-1) << AW88399_PWDN_START_BIT)) 1628ade6cc7SWeidong Wang 1638ade6cc7SWeidong Wang #define AW88399_PWDN_POWER_DOWN (1) 1648ade6cc7SWeidong Wang #define AW88399_PWDN_POWER_DOWN_VALUE \ 1658ade6cc7SWeidong Wang (AW88399_PWDN_POWER_DOWN << AW88399_PWDN_START_BIT) 1668ade6cc7SWeidong Wang 1678ade6cc7SWeidong Wang #define AW88399_PWDN_WORKING (0) 1688ade6cc7SWeidong Wang #define AW88399_PWDN_WORKING_VALUE \ 1698ade6cc7SWeidong Wang (AW88399_PWDN_WORKING << AW88399_PWDN_START_BIT) 1708ade6cc7SWeidong Wang 1718ade6cc7SWeidong Wang #define AW88399_DSPBY_START_BIT (2) 1728ade6cc7SWeidong Wang #define AW88399_DSPBY_BITS_LEN (1) 1738ade6cc7SWeidong Wang #define AW88399_DSPBY_MASK \ 1748ade6cc7SWeidong Wang (~(((1<<AW88399_DSPBY_BITS_LEN)-1) << AW88399_DSPBY_START_BIT)) 1758ade6cc7SWeidong Wang 1768ade6cc7SWeidong Wang #define AW88399_DSPBY_WORKING (0) 1778ade6cc7SWeidong Wang #define AW88399_DSPBY_WORKING_VALUE \ 1788ade6cc7SWeidong Wang (AW88399_DSPBY_WORKING << AW88399_DSPBY_START_BIT) 1798ade6cc7SWeidong Wang 1808ade6cc7SWeidong Wang #define AW88399_DSPBY_BYPASS (1) 1818ade6cc7SWeidong Wang #define AW88399_DSPBY_BYPASS_VALUE \ 1828ade6cc7SWeidong Wang (AW88399_DSPBY_BYPASS << AW88399_DSPBY_START_BIT) 1838ade6cc7SWeidong Wang 1848ade6cc7SWeidong Wang #define AW88399_MEM_CLKSEL_START_BIT (3) 1858ade6cc7SWeidong Wang #define AW88399_MEM_CLKSEL_BITS_LEN (1) 1868ade6cc7SWeidong Wang #define AW88399_MEM_CLKSEL_MASK \ 1878ade6cc7SWeidong Wang (~(((1<<AW88399_MEM_CLKSEL_BITS_LEN)-1) << AW88399_MEM_CLKSEL_START_BIT)) 1888ade6cc7SWeidong Wang 1898ade6cc7SWeidong Wang #define AW88399_MEM_CLKSEL_OSCCLK (0) 1908ade6cc7SWeidong Wang #define AW88399_MEM_CLKSEL_OSCCLK_VALUE \ 1918ade6cc7SWeidong Wang (AW88399_MEM_CLKSEL_OSCCLK << AW88399_MEM_CLKSEL_START_BIT) 1928ade6cc7SWeidong Wang 1938ade6cc7SWeidong Wang #define AW88399_MEM_CLKSEL_DAPHCLK (1) 1948ade6cc7SWeidong Wang #define AW88399_MEM_CLKSEL_DAPHCLK_VALUE \ 1958ade6cc7SWeidong Wang (AW88399_MEM_CLKSEL_DAPHCLK << AW88399_MEM_CLKSEL_START_BIT) 1968ade6cc7SWeidong Wang 1978ade6cc7SWeidong Wang #define AW88399_DITHER_EN_START_BIT (15) 1988ade6cc7SWeidong Wang #define AW88399_DITHER_EN_BITS_LEN (1) 1998ade6cc7SWeidong Wang #define AW88399_DITHER_EN_MASK \ 2008ade6cc7SWeidong Wang (~(((1<<AW88399_DITHER_EN_BITS_LEN)-1) << AW88399_DITHER_EN_START_BIT)) 2018ade6cc7SWeidong Wang 2028ade6cc7SWeidong Wang #define AW88399_DITHER_EN_DISABLE (0) 2038ade6cc7SWeidong Wang #define AW88399_DITHER_EN_DISABLE_VALUE \ 2048ade6cc7SWeidong Wang (AW88399_DITHER_EN_DISABLE << AW88399_DITHER_EN_START_BIT) 2058ade6cc7SWeidong Wang 2068ade6cc7SWeidong Wang #define AW88399_DITHER_EN_ENABLE (1) 2078ade6cc7SWeidong Wang #define AW88399_DITHER_EN_ENABLE_VALUE \ 2088ade6cc7SWeidong Wang (AW88399_DITHER_EN_ENABLE << AW88399_DITHER_EN_START_BIT) 2098ade6cc7SWeidong Wang 2108ade6cc7SWeidong Wang #define AW88399_HMUTE_START_BIT (8) 2118ade6cc7SWeidong Wang #define AW88399_HMUTE_BITS_LEN (1) 2128ade6cc7SWeidong Wang #define AW88399_HMUTE_MASK \ 2138ade6cc7SWeidong Wang (~(((1<<AW88399_HMUTE_BITS_LEN)-1) << AW88399_HMUTE_START_BIT)) 2148ade6cc7SWeidong Wang 2158ade6cc7SWeidong Wang #define AW88399_HMUTE_DISABLE (0) 2168ade6cc7SWeidong Wang #define AW88399_HMUTE_DISABLE_VALUE \ 2178ade6cc7SWeidong Wang (AW88399_HMUTE_DISABLE << AW88399_HMUTE_START_BIT) 2188ade6cc7SWeidong Wang 2198ade6cc7SWeidong Wang #define AW88399_HMUTE_ENABLE (1) 2208ade6cc7SWeidong Wang #define AW88399_HMUTE_ENABLE_VALUE \ 2218ade6cc7SWeidong Wang (AW88399_HMUTE_ENABLE << AW88399_HMUTE_START_BIT) 2228ade6cc7SWeidong Wang 2238ade6cc7SWeidong Wang #define AW88399_EF_DBMD_START_BIT (2) 2248ade6cc7SWeidong Wang #define AW88399_EF_DBMD_BITS_LEN (1) 2258ade6cc7SWeidong Wang #define AW88399_EF_DBMD_MASK \ 2268ade6cc7SWeidong Wang (~(((1<<AW88399_EF_DBMD_BITS_LEN)-1) << AW88399_EF_DBMD_START_BIT)) 2278ade6cc7SWeidong Wang 2288ade6cc7SWeidong Wang #define AW88399_EF_DBMD_OR (1) 2298ade6cc7SWeidong Wang #define AW88399_EF_DBMD_OR_VALUE \ 2308ade6cc7SWeidong Wang (AW88399_EF_DBMD_OR << AW88399_EF_DBMD_START_BIT) 2318ade6cc7SWeidong Wang 2328ade6cc7SWeidong Wang #define AW88399_VDSEL_START_BIT (5) 2338ade6cc7SWeidong Wang #define AW88399_VDSEL_BITS_LEN (1) 2348ade6cc7SWeidong Wang #define AW88399_VDSEL_MASK \ 2358ade6cc7SWeidong Wang (~(((1<<AW88399_VDSEL_BITS_LEN)-1) << AW88399_VDSEL_START_BIT)) 2368ade6cc7SWeidong Wang 2378ade6cc7SWeidong Wang #define AW88399_EF_ISN_GESLP_H_START_BIT (0) 2388ade6cc7SWeidong Wang #define AW88399_EF_ISN_GESLP_H_BITS_LEN (10) 2398ade6cc7SWeidong Wang #define AW88399_EF_ISN_GESLP_H_MASK \ 2408ade6cc7SWeidong Wang (~(((1<<AW88399_EF_ISN_GESLP_H_BITS_LEN)-1) << AW88399_EF_ISN_GESLP_H_START_BIT)) 2418ade6cc7SWeidong Wang 2428ade6cc7SWeidong Wang /* EF_VSN_GESLP_H bit 9:0 (EFRH3 0x75) */ 2438ade6cc7SWeidong Wang #define AW88399_EF_VSN_GESLP_H_START_BIT (0) 2448ade6cc7SWeidong Wang #define AW88399_EF_VSN_GESLP_H_BITS_LEN (10) 2458ade6cc7SWeidong Wang #define AW88399_EF_VSN_GESLP_H_MASK \ 2468ade6cc7SWeidong Wang (~(((1<<AW88399_EF_VSN_GESLP_H_BITS_LEN)-1) << AW88399_EF_VSN_GESLP_H_START_BIT)) 2478ade6cc7SWeidong Wang 2488ade6cc7SWeidong Wang #define AW88399_EF_ISN_GESLP_L_START_BIT (0) 2498ade6cc7SWeidong Wang #define AW88399_EF_ISN_GESLP_L_BITS_LEN (10) 2508ade6cc7SWeidong Wang #define AW88399_EF_ISN_GESLP_L_MASK \ 2518ade6cc7SWeidong Wang (~(((1<<AW88399_EF_ISN_GESLP_L_BITS_LEN)-1) << AW88399_EF_ISN_GESLP_L_START_BIT)) 2528ade6cc7SWeidong Wang 2538ade6cc7SWeidong Wang /* EF_VSN_GESLP_L bit 9:0 (EFRL3 0x79) */ 2548ade6cc7SWeidong Wang #define AW88399_EF_VSN_GESLP_L_START_BIT (0) 2558ade6cc7SWeidong Wang #define AW88399_EF_VSN_GESLP_L_BITS_LEN (10) 2568ade6cc7SWeidong Wang #define AW88399_EF_VSN_GESLP_L_MASK \ 2578ade6cc7SWeidong Wang (~(((1<<AW88399_EF_VSN_GESLP_L_BITS_LEN)-1) << AW88399_EF_VSN_GESLP_L_START_BIT)) 2588ade6cc7SWeidong Wang 2598ade6cc7SWeidong Wang #define AW88399_INTERNAL_VSN_TRIM_H_START_BIT (9) 2608ade6cc7SWeidong Wang #define AW88399_INTERNAL_VSN_TRIM_H_BITS_LEN (6) 2618ade6cc7SWeidong Wang #define AW88399_INTERNAL_VSN_TRIM_H_MASK \ 2628ade6cc7SWeidong Wang (~(((1<<AW88399_INTERNAL_VSN_TRIM_H_BITS_LEN)-1) << AW88399_INTERNAL_VSN_TRIM_H_START_BIT)) 2638ade6cc7SWeidong Wang 2648ade6cc7SWeidong Wang #define AW88399_INTERNAL_VSN_TRIM_L_START_BIT (9) 2658ade6cc7SWeidong Wang #define AW88399_INTERNAL_VSN_TRIM_L_BITS_LEN (6) 2668ade6cc7SWeidong Wang #define AW88399_INTERNAL_VSN_TRIM_L_MASK \ 2678ade6cc7SWeidong Wang (~(((1<<AW88399_INTERNAL_VSN_TRIM_L_BITS_LEN)-1) << AW88399_INTERNAL_VSN_TRIM_L_START_BIT)) 2688ade6cc7SWeidong Wang 2698ade6cc7SWeidong Wang #define AW88399_RCV_MODE_START_BIT (7) 2708ade6cc7SWeidong Wang #define AW88399_RCV_MODE_BITS_LEN (1) 2718ade6cc7SWeidong Wang #define AW88399_RCV_MODE_MASK \ 2728ade6cc7SWeidong Wang (~(((1<<AW88399_RCV_MODE_BITS_LEN)-1) << AW88399_RCV_MODE_START_BIT)) 2738ade6cc7SWeidong Wang 2748ade6cc7SWeidong Wang #define AW88399_CLKI_START_BIT (4) 2758ade6cc7SWeidong Wang #define AW88399_NOCLKI_START_BIT (5) 2768ade6cc7SWeidong Wang #define AW88399_PLLI_START_BIT (0) 2778ade6cc7SWeidong Wang #define AW88399_PLLI_INT_VALUE (1) 2788ade6cc7SWeidong Wang #define AW88399_PLLI_INT_INTERRUPT \ 2798ade6cc7SWeidong Wang (AW88399_PLLI_INT_VALUE << AW88399_PLLI_START_BIT) 2808ade6cc7SWeidong Wang 2818ade6cc7SWeidong Wang #define AW88399_CLKI_INT_VALUE (1) 2828ade6cc7SWeidong Wang #define AW88399_CLKI_INT_INTERRUPT \ 2838ade6cc7SWeidong Wang (AW88399_CLKI_INT_VALUE << AW88399_CLKI_START_BIT) 2848ade6cc7SWeidong Wang 2858ade6cc7SWeidong Wang #define AW88399_NOCLKI_INT_VALUE (1) 2868ade6cc7SWeidong Wang #define AW88399_NOCLKI_INT_INTERRUPT \ 2878ade6cc7SWeidong Wang (AW88399_NOCLKI_INT_VALUE << AW88399_NOCLKI_START_BIT) 2888ade6cc7SWeidong Wang 2898ade6cc7SWeidong Wang #define AW88399_BIT_SYSINT_CHECK \ 2908ade6cc7SWeidong Wang (AW88399_PLLI_INT_INTERRUPT | \ 2918ade6cc7SWeidong Wang AW88399_CLKI_INT_INTERRUPT | \ 2928ade6cc7SWeidong Wang AW88399_NOCLKI_INT_INTERRUPT) 2938ade6cc7SWeidong Wang 2948ade6cc7SWeidong Wang #define AW88399_CRC_CHECK_START_BIT (12) 2958ade6cc7SWeidong Wang #define AW88399_CRC_CHECK_BITS_LEN (3) 2968ade6cc7SWeidong Wang #define AW88399_CRC_CHECK_BITS_MASK \ 2978ade6cc7SWeidong Wang (~(((1<<AW88399_CRC_CHECK_BITS_LEN)-1) << AW88399_CRC_CHECK_START_BIT)) 2988ade6cc7SWeidong Wang 2998ade6cc7SWeidong Wang #define AW88399_RCV_MODE_RECEIVER (1) 3008ade6cc7SWeidong Wang #define AW88399_RCV_MODE_RECEIVER_VALUE \ 3018ade6cc7SWeidong Wang (AW88399_RCV_MODE_RECEIVER << AW88399_RCV_MODE_START_BIT) 3028ade6cc7SWeidong Wang 3038ade6cc7SWeidong Wang #define AW88399_AMPPD_START_BIT (1) 3048ade6cc7SWeidong Wang #define AW88399_AMPPD_BITS_LEN (1) 3058ade6cc7SWeidong Wang #define AW88399_AMPPD_MASK \ 3068ade6cc7SWeidong Wang (~(((1<<AW88399_AMPPD_BITS_LEN)-1) << AW88399_AMPPD_START_BIT)) 3078ade6cc7SWeidong Wang 3088ade6cc7SWeidong Wang #define AW88399_AMPPD_WORKING (0) 3098ade6cc7SWeidong Wang #define AW88399_AMPPD_WORKING_VALUE \ 3108ade6cc7SWeidong Wang (AW88399_AMPPD_WORKING << AW88399_AMPPD_START_BIT) 3118ade6cc7SWeidong Wang 3128ade6cc7SWeidong Wang #define AW88399_AMPPD_POWER_DOWN (1) 3138ade6cc7SWeidong Wang #define AW88399_AMPPD_POWER_DOWN_VALUE \ 3148ade6cc7SWeidong Wang (AW88399_AMPPD_POWER_DOWN << AW88399_AMPPD_START_BIT) 3158ade6cc7SWeidong Wang 3168ade6cc7SWeidong Wang #define AW88399_RAM_CG_BYP_START_BIT (0) 3178ade6cc7SWeidong Wang #define AW88399_RAM_CG_BYP_BITS_LEN (1) 3188ade6cc7SWeidong Wang #define AW88399_RAM_CG_BYP_MASK \ 3198ade6cc7SWeidong Wang (~(((1<<AW88399_RAM_CG_BYP_BITS_LEN)-1) << AW88399_RAM_CG_BYP_START_BIT)) 3208ade6cc7SWeidong Wang 3218ade6cc7SWeidong Wang #define AW88399_RAM_CG_BYP_WORK (0) 3228ade6cc7SWeidong Wang #define AW88399_RAM_CG_BYP_WORK_VALUE \ 3238ade6cc7SWeidong Wang (AW88399_RAM_CG_BYP_WORK << AW88399_RAM_CG_BYP_START_BIT) 3248ade6cc7SWeidong Wang 3258ade6cc7SWeidong Wang #define AW88399_RAM_CG_BYP_BYPASS (1) 3268ade6cc7SWeidong Wang #define AW88399_RAM_CG_BYP_BYPASS_VALUE \ 3278ade6cc7SWeidong Wang (AW88399_RAM_CG_BYP_BYPASS << AW88399_RAM_CG_BYP_START_BIT) 3288ade6cc7SWeidong Wang 3298ade6cc7SWeidong Wang #define AW88399_CRC_END_ADDR_START_BIT (0) 3308ade6cc7SWeidong Wang #define AW88399_CRC_END_ADDR_BITS_LEN (12) 3318ade6cc7SWeidong Wang #define AW88399_CRC_END_ADDR_MASK \ 3328ade6cc7SWeidong Wang (~(((1<<AW88399_CRC_END_ADDR_BITS_LEN)-1) << AW88399_CRC_END_ADDR_START_BIT)) 3338ade6cc7SWeidong Wang 3348ade6cc7SWeidong Wang #define AW88399_CRC_CODE_EN_START_BIT (13) 3358ade6cc7SWeidong Wang #define AW88399_CRC_CODE_EN_BITS_LEN (1) 3368ade6cc7SWeidong Wang #define AW88399_CRC_CODE_EN_MASK \ 3378ade6cc7SWeidong Wang (~(((1<<AW88399_CRC_CODE_EN_BITS_LEN)-1) << AW88399_CRC_CODE_EN_START_BIT)) 3388ade6cc7SWeidong Wang 3398ade6cc7SWeidong Wang #define AW88399_CRC_CODE_EN_DISABLE (0) 3408ade6cc7SWeidong Wang #define AW88399_CRC_CODE_EN_DISABLE_VALUE \ 3418ade6cc7SWeidong Wang (AW88399_CRC_CODE_EN_DISABLE << AW88399_CRC_CODE_EN_START_BIT) 3428ade6cc7SWeidong Wang 3438ade6cc7SWeidong Wang #define AW88399_CRC_CODE_EN_ENABLE (1) 3448ade6cc7SWeidong Wang #define AW88399_CRC_CODE_EN_ENABLE_VALUE \ 3458ade6cc7SWeidong Wang (AW88399_CRC_CODE_EN_ENABLE << AW88399_CRC_CODE_EN_START_BIT) 3468ade6cc7SWeidong Wang 3478ade6cc7SWeidong Wang #define AW88399_CRC_CFG_EN_START_BIT (12) 3488ade6cc7SWeidong Wang #define AW88399_CRC_CFG_EN_BITS_LEN (1) 3498ade6cc7SWeidong Wang #define AW88399_CRC_CFG_EN_MASK \ 3508ade6cc7SWeidong Wang (~(((1<<AW88399_CRC_CFG_EN_BITS_LEN)-1) << AW88399_CRC_CFG_EN_START_BIT)) 3518ade6cc7SWeidong Wang 3528ade6cc7SWeidong Wang #define AW88399_CRC_CFG_EN_DISABLE (0) 3538ade6cc7SWeidong Wang #define AW88399_CRC_CFG_EN_DISABLE_VALUE \ 3548ade6cc7SWeidong Wang (AW88399_CRC_CFG_EN_DISABLE << AW88399_CRC_CFG_EN_START_BIT) 3558ade6cc7SWeidong Wang 3568ade6cc7SWeidong Wang #define AW88399_CRC_CFG_EN_ENABLE (1) 3578ade6cc7SWeidong Wang #define AW88399_CRC_CFG_EN_ENABLE_VALUE \ 3588ade6cc7SWeidong Wang (AW88399_CRC_CFG_EN_ENABLE << AW88399_CRC_CFG_EN_START_BIT) 3598ade6cc7SWeidong Wang 3608ade6cc7SWeidong Wang #define AW88399_OCDS_START_BIT (3) 3618ade6cc7SWeidong Wang #define AW88399_OCDS_OC (1) 3628ade6cc7SWeidong Wang #define AW88399_OCDS_OC_VALUE \ 3638ade6cc7SWeidong Wang (AW88399_OCDS_OC << AW88399_OCDS_START_BIT) 3648ade6cc7SWeidong Wang 3658ade6cc7SWeidong Wang #define AW88399_NOCLKS_START_BIT (5) 3668ade6cc7SWeidong Wang #define AW88399_NOCLKS_NO_CLOCK (1) 3678ade6cc7SWeidong Wang #define AW88399_NOCLKS_NO_CLOCK_VALUE \ 3688ade6cc7SWeidong Wang (AW88399_NOCLKS_NO_CLOCK << AW88399_NOCLKS_START_BIT) 3698ade6cc7SWeidong Wang 3708ade6cc7SWeidong Wang #define AW88399_SWS_START_BIT (8) 3718ade6cc7SWeidong Wang #define AW88399_SWS_SWITCHING (1) 3728ade6cc7SWeidong Wang #define AW88399_SWS_SWITCHING_VALUE \ 3738ade6cc7SWeidong Wang (AW88399_SWS_SWITCHING << AW88399_SWS_START_BIT) 3748ade6cc7SWeidong Wang 3758ade6cc7SWeidong Wang #define AW88399_BSTS_START_BIT (9) 3768ade6cc7SWeidong Wang #define AW88399_BSTS_FINISHED (1) 3778ade6cc7SWeidong Wang #define AW88399_BSTS_FINISHED_VALUE \ 3788ade6cc7SWeidong Wang (AW88399_BSTS_FINISHED << AW88399_BSTS_START_BIT) 3798ade6cc7SWeidong Wang 3808ade6cc7SWeidong Wang #define AW88399_UVLS_START_BIT (14) 3818ade6cc7SWeidong Wang #define AW88399_UVLS_NORMAL (0) 3828ade6cc7SWeidong Wang #define AW88399_UVLS_NORMAL_VALUE \ 3838ade6cc7SWeidong Wang (AW88399_UVLS_NORMAL << AW88399_UVLS_START_BIT) 3848ade6cc7SWeidong Wang 3858ade6cc7SWeidong Wang #define AW88399_BSTOCS_START_BIT (11) 3868ade6cc7SWeidong Wang #define AW88399_BSTOCS_OVER_CURRENT (1) 3878ade6cc7SWeidong Wang #define AW88399_BSTOCS_OVER_CURRENT_VALUE \ 3888ade6cc7SWeidong Wang (AW88399_BSTOCS_OVER_CURRENT << AW88399_BSTOCS_START_BIT) 3898ade6cc7SWeidong Wang 3908ade6cc7SWeidong Wang #define AW88399_OTHS_START_BIT (1) 3918ade6cc7SWeidong Wang #define AW88399_OTHS_OT (1) 3928ade6cc7SWeidong Wang #define AW88399_OTHS_OT_VALUE \ 3938ade6cc7SWeidong Wang (AW88399_OTHS_OT << AW88399_OTHS_START_BIT) 3948ade6cc7SWeidong Wang 3958ade6cc7SWeidong Wang #define AW88399_PLLS_START_BIT (0) 3968ade6cc7SWeidong Wang #define AW88399_PLLS_LOCKED (1) 3978ade6cc7SWeidong Wang #define AW88399_PLLS_LOCKED_VALUE \ 3988ade6cc7SWeidong Wang (AW88399_PLLS_LOCKED << AW88399_PLLS_START_BIT) 3998ade6cc7SWeidong Wang 4008ade6cc7SWeidong Wang #define AW88399_CLKS_START_BIT (4) 4018ade6cc7SWeidong Wang #define AW88399_CLKS_STABLE (1) 4028ade6cc7SWeidong Wang #define AW88399_CLKS_STABLE_VALUE \ 4038ade6cc7SWeidong Wang (AW88399_CLKS_STABLE << AW88399_CLKS_START_BIT) 4048ade6cc7SWeidong Wang 4058ade6cc7SWeidong Wang #define AW88399_BIT_PLL_CHECK \ 4068ade6cc7SWeidong Wang (AW88399_CLKS_STABLE_VALUE | \ 4078ade6cc7SWeidong Wang AW88399_PLLS_LOCKED_VALUE) 4088ade6cc7SWeidong Wang 4098ade6cc7SWeidong Wang #define AW88399_BIT_SYSST_CHECK_MASK \ 4108ade6cc7SWeidong Wang (~(AW88399_UVLS_NORMAL_VALUE | \ 4118ade6cc7SWeidong Wang AW88399_BSTOCS_OVER_CURRENT_VALUE | \ 4128ade6cc7SWeidong Wang AW88399_BSTS_FINISHED_VALUE | \ 4138ade6cc7SWeidong Wang AW88399_SWS_SWITCHING_VALUE | \ 4148ade6cc7SWeidong Wang AW88399_NOCLKS_NO_CLOCK_VALUE | \ 4158ade6cc7SWeidong Wang AW88399_CLKS_STABLE_VALUE | \ 4168ade6cc7SWeidong Wang AW88399_OCDS_OC_VALUE | \ 4178ade6cc7SWeidong Wang AW88399_OTHS_OT_VALUE | \ 4188ade6cc7SWeidong Wang AW88399_PLLS_LOCKED_VALUE)) 4198ade6cc7SWeidong Wang 4208ade6cc7SWeidong Wang #define AW88399_BIT_SYSST_NOSWS_CHECK \ 4218ade6cc7SWeidong Wang (AW88399_BSTS_FINISHED_VALUE | \ 4228ade6cc7SWeidong Wang AW88399_CLKS_STABLE_VALUE | \ 4238ade6cc7SWeidong Wang AW88399_PLLS_LOCKED_VALUE) 4248ade6cc7SWeidong Wang 4258ade6cc7SWeidong Wang #define AW88399_BIT_SYSST_SWS_CHECK \ 4268ade6cc7SWeidong Wang (AW88399_BSTS_FINISHED_VALUE | \ 4278ade6cc7SWeidong Wang AW88399_CLKS_STABLE_VALUE | \ 4288ade6cc7SWeidong Wang AW88399_PLLS_LOCKED_VALUE | \ 4298ade6cc7SWeidong Wang AW88399_SWS_SWITCHING_VALUE) 4308ade6cc7SWeidong Wang 4318ade6cc7SWeidong Wang #define AW88399_CCO_MUX_START_BIT (14) 4328ade6cc7SWeidong Wang #define AW88399_CCO_MUX_BITS_LEN (1) 4338ade6cc7SWeidong Wang #define AW88399_CCO_MUX_MASK \ 4348ade6cc7SWeidong Wang (~(((1<<AW88399_CCO_MUX_BITS_LEN)-1) << AW88399_CCO_MUX_START_BIT)) 4358ade6cc7SWeidong Wang 4368ade6cc7SWeidong Wang #define AW88399_CCO_MUX_DIVIDED (0) 4378ade6cc7SWeidong Wang #define AW88399_CCO_MUX_DIVIDED_VALUE \ 4388ade6cc7SWeidong Wang (AW88399_CCO_MUX_DIVIDED << AW88399_CCO_MUX_START_BIT) 4398ade6cc7SWeidong Wang 4408ade6cc7SWeidong Wang #define AW88399_CCO_MUX_BYPASS (1) 4418ade6cc7SWeidong Wang #define AW88399_CCO_MUX_BYPASS_VALUE \ 4428ade6cc7SWeidong Wang (AW88399_CCO_MUX_BYPASS << AW88399_CCO_MUX_START_BIT) 4438ade6cc7SWeidong Wang 4448ade6cc7SWeidong Wang #define AW88399_NOISE_GATE_EN_START_BIT (13) 4458ade6cc7SWeidong Wang #define AW88399_NOISE_GATE_EN_BITS_LEN (1) 4468ade6cc7SWeidong Wang #define AW88399_NOISE_GATE_EN_MASK \ 4478ade6cc7SWeidong Wang (~(((1<<AW88399_NOISE_GATE_EN_BITS_LEN)-1) << AW88399_NOISE_GATE_EN_START_BIT)) 4488ade6cc7SWeidong Wang 4498ade6cc7SWeidong Wang #define AW88399_WDT_CNT_START_BIT (0) 4508ade6cc7SWeidong Wang #define AW88399_WDT_CNT_BITS_LEN (8) 4518ade6cc7SWeidong Wang #define AW88399_WDT_CNT_MASK \ 4528ade6cc7SWeidong Wang (~(((1<<AW88399_WDT_CNT_BITS_LEN)-1) << AW88399_WDT_CNT_START_BIT)) 4538ade6cc7SWeidong Wang 4548ade6cc7SWeidong Wang #define AW88399_VOLUME_STEP_DB (64) 4558ade6cc7SWeidong Wang #define AW88399_VOL_DEFAULT_VALUE (0) 4568ade6cc7SWeidong Wang #define AW88399_DSP_ODD_NUM_BIT_TEST (0x5555) 4578ade6cc7SWeidong Wang #define AW88399_EF_ISN_GESLP_SIGN_MASK (~(1 << 9)) 4588ade6cc7SWeidong Wang #define AW88399_EF_ISN_GESLP_SIGN_NEG (0xfe00) 4598ade6cc7SWeidong Wang 4608ade6cc7SWeidong Wang #define AW88399_EF_VSN_GESLP_SIGN_MASK (~(1 << 9)) 4618ade6cc7SWeidong Wang #define AW88399_EF_VSN_GESLP_SIGN_NEG (0xfe00) 4628ade6cc7SWeidong Wang 4638ade6cc7SWeidong Wang #define AW88399_TEM4_SIGN_MASK (~(1 << 5)) 4648ade6cc7SWeidong Wang #define AW88399_TEM4_SIGN_NEG (0xffc0) 4658ade6cc7SWeidong Wang 4668ade6cc7SWeidong Wang #define AW88399_ICABLK_FACTOR (1) 4678ade6cc7SWeidong Wang #define AW88399_VCABLK_FACTOR (1) 4688ade6cc7SWeidong Wang #define AW88399_VCABLK_DAC_FACTOR (2) 4698ade6cc7SWeidong Wang 4708ade6cc7SWeidong Wang #define AW88399_VCALB_ADJ_FACTOR (12) 4718ade6cc7SWeidong Wang #define AW88399_VCALB_ACCURACY (1 << 12) 4728ade6cc7SWeidong Wang 4738ade6cc7SWeidong Wang #define AW88399_ISCAL_FACTOR (3125) 4748ade6cc7SWeidong Wang #define AW88399_VSCAL_FACTOR (18875) 4758ade6cc7SWeidong Wang #define AW88399_ISCAL_DAC_FACTOR (3125) 4768ade6cc7SWeidong Wang #define AW88399_VSCAL_DAC_FACTOR (12600) 4778ade6cc7SWeidong Wang #define AW88399_CABL_BASE_VALUE (1000) 4788ade6cc7SWeidong Wang 4798ade6cc7SWeidong Wang #define AW88399_DEV_DEFAULT_CH (0) 4808ade6cc7SWeidong Wang #define AW88399_DEV_DSP_CHECK_MAX (5) 4818ade6cc7SWeidong Wang #define AW88399_MAX_RAM_WRITE_BYTE_SIZE (128) 4828ade6cc7SWeidong Wang #define AW88399_DSP_RE_SHIFT (12) 4838ade6cc7SWeidong Wang #define AW88399_CALI_RE_MAX (15000) 4848ade6cc7SWeidong Wang #define AW88399_CALI_RE_MIN (4000) 4858ade6cc7SWeidong Wang #define AW_FW_ADDR_LEN (4) 4868ade6cc7SWeidong Wang #define AW88399_DSP_RE_TO_SHOW_RE(re, shift) (((re) * (1000)) >> (shift)) 4878ade6cc7SWeidong Wang #define AW88399_SHOW_RE_TO_DSP_RE(re, shift) (((re) << shift) / (1000)) 4888ade6cc7SWeidong Wang #define AW88399_CRC_CHECK_PASS_VAL (0x4) 4898ade6cc7SWeidong Wang 4908ade6cc7SWeidong Wang #define AW88399_CRC_CFG_BASE_ADDR (0xD80) 4918ade6cc7SWeidong Wang #define AW88399_CRC_FW_BASE_ADDR (0x4C0) 4928ade6cc7SWeidong Wang #define AW88399_ACF_FILE "aw88399_acf.bin" 4938ade6cc7SWeidong Wang #define AW88399_DEV_SYSST_CHECK_MAX (10) 4948ade6cc7SWeidong Wang 4958ade6cc7SWeidong Wang #define AW88399_I2C_NAME "aw88399" 4968ade6cc7SWeidong Wang 4978ade6cc7SWeidong Wang #define AW88399_START_RETRIES (5) 4988ade6cc7SWeidong Wang #define AW88399_START_WORK_DELAY_MS (0) 4998ade6cc7SWeidong Wang 5008ade6cc7SWeidong Wang #define AW88399_RATES (SNDRV_PCM_RATE_8000_48000 | \ 5018ade6cc7SWeidong Wang SNDRV_PCM_RATE_96000) 5028ade6cc7SWeidong Wang #define AW88399_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ 5038ade6cc7SWeidong Wang SNDRV_PCM_FMTBIT_S24_LE | \ 5048ade6cc7SWeidong Wang SNDRV_PCM_FMTBIT_S32_LE) 5058ade6cc7SWeidong Wang 5068ade6cc7SWeidong Wang #define FADE_TIME_MAX 100000 5078ade6cc7SWeidong Wang #define FADE_TIME_MIN 0 5088ade6cc7SWeidong Wang 5098ade6cc7SWeidong Wang #define AW88399_PROFILE_EXT(xname, profile_info, profile_get, profile_set) \ 5108ade6cc7SWeidong Wang { \ 5118ade6cc7SWeidong Wang .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 5128ade6cc7SWeidong Wang .name = xname, \ 5138ade6cc7SWeidong Wang .info = profile_info, \ 5148ade6cc7SWeidong Wang .get = profile_get, \ 5158ade6cc7SWeidong Wang .put = profile_set, \ 5168ade6cc7SWeidong Wang } 5178ade6cc7SWeidong Wang 5188ade6cc7SWeidong Wang enum { 5198ade6cc7SWeidong Wang AW_EF_AND_CHECK = 0, 5208ade6cc7SWeidong Wang AW_EF_OR_CHECK, 5218ade6cc7SWeidong Wang }; 5228ade6cc7SWeidong Wang 5238ade6cc7SWeidong Wang enum { 5248ade6cc7SWeidong Wang AW88399_DEV_VDSEL_DAC = 0, 525*b729598cSWeidong Wang AW88399_DEV_VDSEL_VSENSE = 32, 5268ade6cc7SWeidong Wang }; 5278ade6cc7SWeidong Wang 5288ade6cc7SWeidong Wang enum { 5298ade6cc7SWeidong Wang AW88399_DSP_CRC_NA = 0, 5308ade6cc7SWeidong Wang AW88399_DSP_CRC_OK = 1, 5318ade6cc7SWeidong Wang }; 5328ade6cc7SWeidong Wang 5338ade6cc7SWeidong Wang enum { 5348ade6cc7SWeidong Wang AW88399_DSP_FW_UPDATE_OFF = 0, 5358ade6cc7SWeidong Wang AW88399_DSP_FW_UPDATE_ON = 1, 5368ade6cc7SWeidong Wang }; 5378ade6cc7SWeidong Wang 5388ade6cc7SWeidong Wang enum { 5398ade6cc7SWeidong Wang AW88399_FORCE_UPDATE_OFF = 0, 5408ade6cc7SWeidong Wang AW88399_FORCE_UPDATE_ON = 1, 5418ade6cc7SWeidong Wang }; 5428ade6cc7SWeidong Wang 5438ade6cc7SWeidong Wang enum { 5448ade6cc7SWeidong Wang AW88399_1000_US = 1000, 5458ade6cc7SWeidong Wang AW88399_2000_US = 2000, 5468ade6cc7SWeidong Wang AW88399_3000_US = 3000, 5478ade6cc7SWeidong Wang AW88399_4000_US = 4000, 5488ade6cc7SWeidong Wang }; 5498ade6cc7SWeidong Wang 5508ade6cc7SWeidong Wang enum AW88399_DEV_STATUS { 5518ade6cc7SWeidong Wang AW88399_DEV_PW_OFF = 0, 5528ade6cc7SWeidong Wang AW88399_DEV_PW_ON, 5538ade6cc7SWeidong Wang }; 5548ade6cc7SWeidong Wang 5558ade6cc7SWeidong Wang enum AW88399_DEV_FW_STATUS { 5568ade6cc7SWeidong Wang AW88399_DEV_FW_FAILED = 0, 5578ade6cc7SWeidong Wang AW88399_DEV_FW_OK, 5588ade6cc7SWeidong Wang }; 5598ade6cc7SWeidong Wang 5608ade6cc7SWeidong Wang enum AW88399_DEV_MEMCLK { 5618ade6cc7SWeidong Wang AW88399_DEV_MEMCLK_OSC = 0, 5628ade6cc7SWeidong Wang AW88399_DEV_MEMCLK_PLL = 1, 5638ade6cc7SWeidong Wang }; 5648ade6cc7SWeidong Wang 5658ade6cc7SWeidong Wang enum AW88399_DEV_DSP_CFG { 5668ade6cc7SWeidong Wang AW88399_DEV_DSP_WORK = 0, 5678ade6cc7SWeidong Wang AW88399_DEV_DSP_BYPASS = 1, 5688ade6cc7SWeidong Wang }; 5698ade6cc7SWeidong Wang 5708ade6cc7SWeidong Wang enum { 5718ade6cc7SWeidong Wang AW88399_DSP_16_DATA = 0, 5728ade6cc7SWeidong Wang AW88399_DSP_32_DATA = 1, 5738ade6cc7SWeidong Wang }; 5748ade6cc7SWeidong Wang 5758ade6cc7SWeidong Wang enum { 5768ade6cc7SWeidong Wang AW88399_NOT_RCV_MODE = 0, 5778ade6cc7SWeidong Wang AW88399_RCV_MODE = 1, 5788ade6cc7SWeidong Wang }; 5798ade6cc7SWeidong Wang 5808ade6cc7SWeidong Wang enum { 5818ade6cc7SWeidong Wang AW88399_SYNC_START = 0, 5828ade6cc7SWeidong Wang AW88399_ASYNC_START, 5838ade6cc7SWeidong Wang }; 5848ade6cc7SWeidong Wang 5858ade6cc7SWeidong Wang struct aw88399 { 5868ade6cc7SWeidong Wang struct aw_device *aw_pa; 5878ade6cc7SWeidong Wang struct mutex lock; 5888ade6cc7SWeidong Wang struct gpio_desc *reset_gpio; 5898ade6cc7SWeidong Wang struct delayed_work start_work; 5908ade6cc7SWeidong Wang struct regmap *regmap; 5918ade6cc7SWeidong Wang struct aw_container *aw_cfg; 5928ade6cc7SWeidong Wang 5938ade6cc7SWeidong Wang unsigned int check_val; 5948ade6cc7SWeidong Wang unsigned int crc_init_val; 5958ade6cc7SWeidong Wang unsigned int vcalb_init_val; 5968ade6cc7SWeidong Wang unsigned int dither_st; 5978ade6cc7SWeidong Wang }; 5988ade6cc7SWeidong Wang 5998ade6cc7SWeidong Wang #endif 600