1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // aw88399.c -- ALSA SoC AW88399 codec support 4 // 5 // Copyright (c) 2023 AWINIC Technology CO., LTD 6 // 7 // Author: Weidong Wang <wangweidong.a@awinic.com> 8 // 9 10 #include <linux/crc32.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/i2c.h> 13 #include <linux/firmware.h> 14 #include <linux/minmax.h> 15 #include <linux/regmap.h> 16 #include <linux/sort.h> 17 #include <sound/soc.h> 18 #include "aw88399.h" 19 #include "aw88395/aw88395_device.h" 20 21 static const struct regmap_config aw88399_remap_config = { 22 .val_bits = 16, 23 .reg_bits = 8, 24 .max_register = AW88399_REG_MAX, 25 .reg_format_endian = REGMAP_ENDIAN_LITTLE, 26 .val_format_endian = REGMAP_ENDIAN_BIG, 27 }; 28 29 static int aw_dev_dsp_write_16bit(struct aw_device *aw_dev, 30 unsigned short dsp_addr, unsigned int dsp_data) 31 { 32 int ret; 33 34 ret = regmap_write(aw_dev->regmap, AW88399_DSPMADD_REG, dsp_addr); 35 if (ret) { 36 dev_err(aw_dev->dev, "%s write addr error, ret=%d", __func__, ret); 37 return ret; 38 } 39 40 ret = regmap_write(aw_dev->regmap, AW88399_DSPMDAT_REG, (u16)dsp_data); 41 if (ret) { 42 dev_err(aw_dev->dev, "%s write data error, ret=%d", __func__, ret); 43 return ret; 44 } 45 46 return 0; 47 } 48 49 static int aw_dev_dsp_write_32bit(struct aw_device *aw_dev, 50 unsigned short dsp_addr, unsigned int dsp_data) 51 { 52 unsigned int temp_data; 53 int ret; 54 55 ret = regmap_write(aw_dev->regmap, AW88399_DSPMADD_REG, dsp_addr); 56 if (ret) { 57 dev_err(aw_dev->dev, "%s write addr error, ret=%d", __func__, ret); 58 return ret; 59 } 60 61 temp_data = dsp_data & AW88395_DSP_16_DATA_MASK; 62 ret = regmap_write(aw_dev->regmap, AW88399_DSPMDAT_REG, temp_data); 63 if (ret) { 64 dev_err(aw_dev->dev, "%s write datal error, ret=%d", __func__, ret); 65 return ret; 66 } 67 68 temp_data = dsp_data >> 16; 69 ret = regmap_write(aw_dev->regmap, AW88399_DSPMDAT_REG, temp_data); 70 if (ret) 71 dev_err(aw_dev->dev, "%s write datah error, ret=%d", __func__, ret); 72 73 return ret; 74 } 75 76 static int aw_dev_dsp_write(struct aw_device *aw_dev, 77 unsigned short dsp_addr, unsigned int dsp_data, unsigned char data_type) 78 { 79 unsigned int reg_value; 80 int ret; 81 82 mutex_lock(&aw_dev->dsp_lock); 83 switch (data_type) { 84 case AW88395_DSP_16_DATA: 85 ret = aw_dev_dsp_write_16bit(aw_dev, dsp_addr, dsp_data); 86 if (ret) 87 dev_err(aw_dev->dev, "write dsp_addr[0x%x] 16-bit dsp_data[0x%x] failed", 88 dsp_addr, dsp_data); 89 break; 90 case AW88395_DSP_32_DATA: 91 ret = aw_dev_dsp_write_32bit(aw_dev, dsp_addr, dsp_data); 92 if (ret) 93 dev_err(aw_dev->dev, "write dsp_addr[0x%x] 32-bit dsp_data[0x%x] failed", 94 dsp_addr, dsp_data); 95 break; 96 default: 97 dev_err(aw_dev->dev, "data type[%d] unsupported", data_type); 98 ret = -EINVAL; 99 break; 100 } 101 102 /* clear dsp chip select state */ 103 if (regmap_read(aw_dev->regmap, 0x00, ®_value)) 104 dev_err(aw_dev->dev, "%s fail to clear chip state. Err=%d\n", __func__, ret); 105 mutex_unlock(&aw_dev->dsp_lock); 106 107 return ret; 108 } 109 110 static int aw_dev_dsp_read_16bit(struct aw_device *aw_dev, 111 unsigned short dsp_addr, unsigned int *dsp_data) 112 { 113 unsigned int temp_data; 114 int ret; 115 116 ret = regmap_write(aw_dev->regmap, AW88399_DSPMADD_REG, dsp_addr); 117 if (ret) { 118 dev_err(aw_dev->dev, "%s write error, ret=%d", __func__, ret); 119 return ret; 120 } 121 122 ret = regmap_read(aw_dev->regmap, AW88399_DSPMDAT_REG, &temp_data); 123 if (ret) { 124 dev_err(aw_dev->dev, "%s read error, ret=%d", __func__, ret); 125 return ret; 126 } 127 *dsp_data = temp_data; 128 129 return 0; 130 } 131 132 static int aw_dev_dsp_read_32bit(struct aw_device *aw_dev, 133 unsigned short dsp_addr, unsigned int *dsp_data) 134 { 135 unsigned int temp_data; 136 int ret; 137 138 ret = regmap_write(aw_dev->regmap, AW88399_DSPMADD_REG, dsp_addr); 139 if (ret) { 140 dev_err(aw_dev->dev, "%s write error, ret=%d", __func__, ret); 141 return ret; 142 } 143 144 ret = regmap_read(aw_dev->regmap, AW88399_DSPMDAT_REG, &temp_data); 145 if (ret) { 146 dev_err(aw_dev->dev, "%s read error, ret=%d", __func__, ret); 147 return ret; 148 } 149 *dsp_data = temp_data; 150 151 ret = regmap_read(aw_dev->regmap, AW88399_DSPMDAT_REG, &temp_data); 152 if (ret) { 153 dev_err(aw_dev->dev, "%s read error, ret=%d", __func__, ret); 154 return ret; 155 } 156 *dsp_data |= (temp_data << 16); 157 158 return 0; 159 } 160 161 static int aw_dev_dsp_read(struct aw_device *aw_dev, 162 unsigned short dsp_addr, unsigned int *dsp_data, unsigned char data_type) 163 { 164 u32 reg_value; 165 int ret; 166 167 mutex_lock(&aw_dev->dsp_lock); 168 switch (data_type) { 169 case AW88399_DSP_16_DATA: 170 ret = aw_dev_dsp_read_16bit(aw_dev, dsp_addr, dsp_data); 171 if (ret) 172 dev_err(aw_dev->dev, "read dsp_addr[0x%x] 16-bit dsp_data[0x%x] failed", 173 (u32)dsp_addr, *dsp_data); 174 break; 175 case AW88399_DSP_32_DATA: 176 ret = aw_dev_dsp_read_32bit(aw_dev, dsp_addr, dsp_data); 177 if (ret) 178 dev_err(aw_dev->dev, "read dsp_addr[0x%x] 32r-bit dsp_data[0x%x] failed", 179 (u32)dsp_addr, *dsp_data); 180 break; 181 default: 182 dev_err(aw_dev->dev, "data type[%d] unsupported", data_type); 183 ret = -EINVAL; 184 break; 185 } 186 187 /* clear dsp chip select state */ 188 if (regmap_read(aw_dev->regmap, AW88399_ID_REG, ®_value)) 189 dev_err(aw_dev->dev, "%s fail to clear chip state. ret=%d\n", __func__, ret); 190 mutex_unlock(&aw_dev->dsp_lock); 191 192 return ret; 193 } 194 195 static void aw_dev_pwd(struct aw_device *aw_dev, bool pwd) 196 { 197 int ret; 198 199 if (pwd) 200 ret = regmap_update_bits(aw_dev->regmap, AW88399_SYSCTRL_REG, 201 ~AW88399_PWDN_MASK, AW88399_PWDN_POWER_DOWN_VALUE); 202 else 203 ret = regmap_update_bits(aw_dev->regmap, AW88399_SYSCTRL_REG, 204 ~AW88399_PWDN_MASK, AW88399_PWDN_WORKING_VALUE); 205 206 if (ret) 207 dev_dbg(aw_dev->dev, "%s failed", __func__); 208 } 209 210 static void aw_dev_get_int_status(struct aw_device *aw_dev, unsigned short *int_status) 211 { 212 unsigned int reg_val; 213 int ret; 214 215 ret = regmap_read(aw_dev->regmap, AW88399_SYSINT_REG, ®_val); 216 if (ret) 217 dev_err(aw_dev->dev, "read interrupt reg fail, ret=%d", ret); 218 else 219 *int_status = reg_val; 220 221 dev_dbg(aw_dev->dev, "read interrupt reg=0x%04x", *int_status); 222 } 223 224 static void aw_dev_clear_int_status(struct aw_device *aw_dev) 225 { 226 u16 int_status; 227 228 /* read int status and clear */ 229 aw_dev_get_int_status(aw_dev, &int_status); 230 /* make sure int status is clear */ 231 aw_dev_get_int_status(aw_dev, &int_status); 232 if (int_status) 233 dev_dbg(aw_dev->dev, "int status(%d) is not cleaned.\n", int_status); 234 } 235 236 static int aw_dev_get_iis_status(struct aw_device *aw_dev) 237 { 238 unsigned int reg_val; 239 int ret; 240 241 ret = regmap_read(aw_dev->regmap, AW88399_SYSST_REG, ®_val); 242 if (ret) 243 return ret; 244 if ((reg_val & AW88399_BIT_PLL_CHECK) != AW88399_BIT_PLL_CHECK) { 245 dev_err(aw_dev->dev, "check pll lock fail, reg_val:0x%04x", reg_val); 246 return -EINVAL; 247 } 248 249 return 0; 250 } 251 252 static int aw_dev_check_mode1_pll(struct aw_device *aw_dev) 253 { 254 int ret, i; 255 256 for (i = 0; i < AW88399_DEV_SYSST_CHECK_MAX; i++) { 257 ret = aw_dev_get_iis_status(aw_dev); 258 if (ret) { 259 dev_err(aw_dev->dev, "mode1 iis signal check error"); 260 usleep_range(AW88399_2000_US, AW88399_2000_US + 10); 261 } else { 262 return 0; 263 } 264 } 265 266 return -EPERM; 267 } 268 269 static int aw_dev_check_mode2_pll(struct aw_device *aw_dev) 270 { 271 unsigned int reg_val; 272 int ret, i; 273 274 ret = regmap_read(aw_dev->regmap, AW88399_PLLCTRL2_REG, ®_val); 275 if (ret) 276 return ret; 277 278 reg_val &= (~AW88399_CCO_MUX_MASK); 279 if (reg_val == AW88399_CCO_MUX_DIVIDED_VALUE) { 280 dev_dbg(aw_dev->dev, "CCO_MUX is already divider"); 281 return -EPERM; 282 } 283 284 /* change mode2 */ 285 ret = regmap_update_bits(aw_dev->regmap, AW88399_PLLCTRL2_REG, 286 ~AW88399_CCO_MUX_MASK, AW88399_CCO_MUX_DIVIDED_VALUE); 287 if (ret) 288 return ret; 289 290 for (i = 0; i < AW88399_DEV_SYSST_CHECK_MAX; i++) { 291 ret = aw_dev_get_iis_status(aw_dev); 292 if (ret) { 293 dev_err(aw_dev->dev, "mode2 iis signal check error"); 294 usleep_range(AW88399_2000_US, AW88399_2000_US + 10); 295 } else { 296 break; 297 } 298 } 299 300 /* change mode1 */ 301 regmap_update_bits(aw_dev->regmap, AW88399_PLLCTRL2_REG, 302 ~AW88399_CCO_MUX_MASK, AW88399_CCO_MUX_BYPASS_VALUE); 303 if (ret == 0) { 304 usleep_range(AW88399_2000_US, AW88399_2000_US + 10); 305 for (i = 0; i < AW88399_DEV_SYSST_CHECK_MAX; i++) { 306 ret = aw_dev_get_iis_status(aw_dev); 307 if (ret) { 308 dev_err(aw_dev->dev, "mode2 switch to mode1, iis signal check error"); 309 usleep_range(AW88399_2000_US, AW88399_2000_US + 10); 310 } else { 311 break; 312 } 313 } 314 } 315 316 return ret; 317 } 318 319 static int aw_dev_check_syspll(struct aw_device *aw_dev) 320 { 321 int ret; 322 323 ret = aw_dev_check_mode1_pll(aw_dev); 324 if (ret) { 325 dev_dbg(aw_dev->dev, "mode1 check iis failed try switch to mode2 check"); 326 ret = aw_dev_check_mode2_pll(aw_dev); 327 if (ret) { 328 dev_err(aw_dev->dev, "mode2 check iis failed"); 329 return ret; 330 } 331 } 332 333 return 0; 334 } 335 336 static int aw_dev_check_sysst(struct aw_device *aw_dev) 337 { 338 unsigned int check_val; 339 unsigned int reg_val; 340 int ret, i; 341 342 ret = regmap_read(aw_dev->regmap, AW88399_PWMCTRL3_REG, ®_val); 343 if (ret) 344 return ret; 345 346 if (reg_val & (~AW88399_NOISE_GATE_EN_MASK)) 347 check_val = AW88399_BIT_SYSST_NOSWS_CHECK; 348 else 349 check_val = AW88399_BIT_SYSST_SWS_CHECK; 350 351 for (i = 0; i < AW88399_DEV_SYSST_CHECK_MAX; i++) { 352 ret = regmap_read(aw_dev->regmap, AW88399_SYSST_REG, ®_val); 353 if (ret) 354 return ret; 355 356 if ((reg_val & (~AW88399_BIT_SYSST_CHECK_MASK) & check_val) != check_val) { 357 dev_err(aw_dev->dev, "check sysst fail, cnt=%d, reg_val=0x%04x, check:0x%x", 358 i, reg_val, AW88399_BIT_SYSST_NOSWS_CHECK); 359 usleep_range(AW88399_2000_US, AW88399_2000_US + 10); 360 } else { 361 return 0; 362 } 363 } 364 365 return -EPERM; 366 } 367 368 static void aw_dev_amppd(struct aw_device *aw_dev, bool amppd) 369 { 370 int ret; 371 372 if (amppd) 373 ret = regmap_update_bits(aw_dev->regmap, AW88399_SYSCTRL_REG, 374 ~AW88399_AMPPD_MASK, AW88399_AMPPD_POWER_DOWN_VALUE); 375 else 376 ret = regmap_update_bits(aw_dev->regmap, AW88399_SYSCTRL_REG, 377 ~AW88399_AMPPD_MASK, AW88399_AMPPD_WORKING_VALUE); 378 379 if (ret) 380 dev_dbg(aw_dev->dev, "%s failed", __func__); 381 } 382 383 static void aw_dev_dsp_enable(struct aw_device *aw_dev, bool is_enable) 384 { 385 int ret; 386 387 if (is_enable) 388 ret = regmap_update_bits(aw_dev->regmap, AW88399_SYSCTRL_REG, 389 ~AW88399_DSPBY_MASK, AW88399_DSPBY_WORKING_VALUE); 390 else 391 ret = regmap_update_bits(aw_dev->regmap, AW88399_SYSCTRL_REG, 392 ~AW88399_DSPBY_MASK, AW88399_DSPBY_BYPASS_VALUE); 393 394 if (ret) 395 dev_dbg(aw_dev->dev, "%s failed\n", __func__); 396 } 397 398 static int aw88399_dev_get_icalk(struct aw88399 *aw88399, int16_t *icalk) 399 { 400 uint16_t icalkh_val, icalkl_val, icalk_val; 401 struct aw_device *aw_dev = aw88399->aw_pa; 402 unsigned int reg_val; 403 int ret; 404 405 ret = regmap_read(aw_dev->regmap, AW88399_EFRH4_REG, ®_val); 406 if (ret) 407 return ret; 408 icalkh_val = reg_val & (~AW88399_EF_ISN_GESLP_H_MASK); 409 410 ret = regmap_read(aw_dev->regmap, AW88399_EFRL4_REG, ®_val); 411 if (ret) 412 return ret; 413 icalkl_val = reg_val & (~AW88399_EF_ISN_GESLP_L_MASK); 414 415 if (aw88399->check_val == AW_EF_AND_CHECK) 416 icalk_val = icalkh_val & icalkl_val; 417 else 418 icalk_val = icalkh_val | icalkl_val; 419 420 if (icalk_val & (~AW88399_EF_ISN_GESLP_SIGN_MASK)) 421 icalk_val = icalk_val | AW88399_EF_ISN_GESLP_SIGN_NEG; 422 *icalk = (int16_t)icalk_val; 423 424 return 0; 425 } 426 427 static int aw88399_dev_get_vcalk(struct aw88399 *aw88399, int16_t *vcalk) 428 { 429 uint16_t vcalkh_val, vcalkl_val, vcalk_val; 430 struct aw_device *aw_dev = aw88399->aw_pa; 431 unsigned int reg_val; 432 int ret; 433 434 ret = regmap_read(aw_dev->regmap, AW88399_EFRH3_REG, ®_val); 435 if (ret) 436 return ret; 437 438 vcalkh_val = reg_val & (~AW88399_EF_VSN_GESLP_H_MASK); 439 440 ret = regmap_read(aw_dev->regmap, AW88399_EFRL3_REG, ®_val); 441 if (ret) 442 return ret; 443 444 vcalkl_val = reg_val & (~AW88399_EF_VSN_GESLP_L_MASK); 445 446 if (aw88399->check_val == AW_EF_AND_CHECK) 447 vcalk_val = vcalkh_val & vcalkl_val; 448 else 449 vcalk_val = vcalkh_val | vcalkl_val; 450 451 if (vcalk_val & AW88399_EF_VSN_GESLP_SIGN_MASK) 452 vcalk_val = vcalk_val | AW88399_EF_VSN_GESLP_SIGN_NEG; 453 *vcalk = (int16_t)vcalk_val; 454 455 return 0; 456 } 457 458 static int aw88399_dev_get_internal_vcalk(struct aw88399 *aw88399, int16_t *vcalk) 459 { 460 uint16_t vcalkh_val, vcalkl_val, vcalk_val; 461 struct aw_device *aw_dev = aw88399->aw_pa; 462 unsigned int reg_val; 463 int ret; 464 465 ret = regmap_read(aw_dev->regmap, AW88399_EFRH2_REG, ®_val); 466 if (ret) 467 return ret; 468 vcalkh_val = reg_val & (~AW88399_INTERNAL_VSN_TRIM_H_MASK); 469 470 ret = regmap_read(aw_dev->regmap, AW88399_EFRL2_REG, ®_val); 471 if (ret) 472 return ret; 473 vcalkl_val = reg_val & (~AW88399_INTERNAL_VSN_TRIM_L_MASK); 474 475 if (aw88399->check_val == AW_EF_AND_CHECK) 476 vcalk_val = (vcalkh_val >> AW88399_INTERNAL_VSN_TRIM_H_START_BIT) & 477 (vcalkl_val >> AW88399_INTERNAL_VSN_TRIM_L_START_BIT); 478 else 479 vcalk_val = (vcalkh_val >> AW88399_INTERNAL_VSN_TRIM_H_START_BIT) | 480 (vcalkl_val >> AW88399_INTERNAL_VSN_TRIM_L_START_BIT); 481 482 if (vcalk_val & (~AW88399_TEM4_SIGN_MASK)) 483 vcalk_val = vcalk_val | AW88399_TEM4_SIGN_NEG; 484 485 *vcalk = (int16_t)vcalk_val; 486 487 return 0; 488 } 489 490 static int aw_dev_set_vcalb(struct aw88399 *aw88399) 491 { 492 struct aw_device *aw_dev = aw88399->aw_pa; 493 unsigned int vsense_select, vsense_value; 494 int32_t ical_k, vcal_k, vcalb; 495 int16_t icalk, vcalk; 496 uint16_t reg_val; 497 int ret; 498 499 ret = regmap_read(aw_dev->regmap, AW88399_VSNCTRL1_REG, &vsense_value); 500 if (ret) 501 return ret; 502 503 vsense_select = vsense_value & (~AW88399_VDSEL_MASK); 504 505 ret = aw88399_dev_get_icalk(aw88399, &icalk); 506 if (ret) { 507 dev_err(aw_dev->dev, "get icalk failed\n"); 508 return ret; 509 } 510 511 ical_k = icalk * AW88399_ICABLK_FACTOR + AW88399_CABL_BASE_VALUE; 512 513 switch (vsense_select) { 514 case AW88399_DEV_VDSEL_VSENSE: 515 ret = aw88399_dev_get_vcalk(aw88399, &vcalk); 516 vcal_k = vcalk * AW88399_VCABLK_FACTOR + AW88399_CABL_BASE_VALUE; 517 vcalb = AW88399_VCALB_ACCURACY * AW88399_VSCAL_FACTOR / AW88399_ISCAL_FACTOR * 518 ical_k / vcal_k * aw88399->vcalb_init_val; 519 break; 520 case AW88399_DEV_VDSEL_DAC: 521 ret = aw88399_dev_get_internal_vcalk(aw88399, &vcalk); 522 vcal_k = vcalk * AW88399_VCABLK_DAC_FACTOR + AW88399_CABL_BASE_VALUE; 523 vcalb = AW88399_VCALB_ACCURACY * AW88399_VSCAL_DAC_FACTOR / 524 AW88399_ISCAL_DAC_FACTOR * ical_k / 525 vcal_k * aw88399->vcalb_init_val; 526 break; 527 default: 528 dev_err(aw_dev->dev, "%s: unsupported vsense\n", __func__); 529 ret = -EINVAL; 530 break; 531 } 532 if (ret) 533 return ret; 534 535 vcalb = vcalb >> AW88399_VCALB_ADJ_FACTOR; 536 reg_val = (uint32_t)vcalb; 537 538 regmap_write(aw_dev->regmap, AW88399_DSPVCALB_REG, reg_val); 539 540 return 0; 541 } 542 543 static int aw_dev_update_cali_re(struct aw_cali_desc *cali_desc) 544 { 545 struct aw_device *aw_dev = 546 container_of(cali_desc, struct aw_device, cali_desc); 547 uint16_t re_lbits, re_hbits; 548 u32 cali_re; 549 int ret; 550 551 if ((aw_dev->cali_desc.cali_re >= AW88399_CALI_RE_MAX) || 552 (aw_dev->cali_desc.cali_re <= AW88399_CALI_RE_MIN)) 553 return -EINVAL; 554 555 cali_re = AW88399_SHOW_RE_TO_DSP_RE((aw_dev->cali_desc.cali_re + 556 aw_dev->cali_desc.ra), AW88399_DSP_RE_SHIFT); 557 558 re_hbits = (cali_re & (~AW88399_CALI_RE_HBITS_MASK)) >> AW88399_CALI_RE_HBITS_SHIFT; 559 re_lbits = (cali_re & (~AW88399_CALI_RE_LBITS_MASK)) >> AW88399_CALI_RE_LBITS_SHIFT; 560 561 ret = regmap_write(aw_dev->regmap, AW88399_ACR1_REG, re_hbits); 562 if (ret) { 563 dev_err(aw_dev->dev, "set cali re error"); 564 return ret; 565 } 566 567 ret = regmap_write(aw_dev->regmap, AW88399_ACR2_REG, re_lbits); 568 if (ret) 569 dev_err(aw_dev->dev, "set cali re error"); 570 571 return ret; 572 } 573 574 static int aw_dev_fw_crc_check(struct aw_device *aw_dev) 575 { 576 uint16_t check_val, fw_len_val; 577 unsigned int reg_val; 578 int ret; 579 580 /* calculate fw_end_addr */ 581 fw_len_val = ((aw_dev->dsp_fw_len / AW_FW_ADDR_LEN) - 1) + AW88399_CRC_FW_BASE_ADDR; 582 583 /* write fw_end_addr to crc_end_addr */ 584 ret = regmap_update_bits(aw_dev->regmap, AW88399_CRCCTRL_REG, 585 ~AW88399_CRC_END_ADDR_MASK, fw_len_val); 586 if (ret) 587 return ret; 588 /* enable fw crc check */ 589 ret = regmap_update_bits(aw_dev->regmap, AW88399_CRCCTRL_REG, 590 ~AW88399_CRC_CODE_EN_MASK, AW88399_CRC_CODE_EN_ENABLE_VALUE); 591 592 usleep_range(AW88399_2000_US, AW88399_2000_US + 10); 593 594 /* read crc check result */ 595 regmap_read(aw_dev->regmap, AW88399_HAGCST_REG, ®_val); 596 if (ret) 597 return ret; 598 599 check_val = (reg_val & (~AW88399_CRC_CHECK_BITS_MASK)) >> AW88399_CRC_CHECK_START_BIT; 600 601 /* disable fw crc check */ 602 ret = regmap_update_bits(aw_dev->regmap, AW88399_CRCCTRL_REG, 603 ~AW88399_CRC_CODE_EN_MASK, AW88399_CRC_CODE_EN_DISABLE_VALUE); 604 if (ret) 605 return ret; 606 607 if (check_val != AW88399_CRC_CHECK_PASS_VAL) { 608 dev_err(aw_dev->dev, "%s failed, check_val 0x%x != 0x%x", 609 __func__, check_val, AW88399_CRC_CHECK_PASS_VAL); 610 ret = -EINVAL; 611 } 612 613 return ret; 614 } 615 616 static int aw_dev_cfg_crc_check(struct aw_device *aw_dev) 617 { 618 uint16_t check_val, cfg_len_val; 619 unsigned int reg_val; 620 int ret; 621 622 /* calculate cfg end addr */ 623 cfg_len_val = ((aw_dev->dsp_cfg_len / AW_FW_ADDR_LEN) - 1) + AW88399_CRC_CFG_BASE_ADDR; 624 625 /* write cfg_end_addr to crc_end_addr */ 626 ret = regmap_update_bits(aw_dev->regmap, AW88399_CRCCTRL_REG, 627 ~AW88399_CRC_END_ADDR_MASK, cfg_len_val); 628 if (ret) 629 return ret; 630 631 /* enable cfg crc check */ 632 ret = regmap_update_bits(aw_dev->regmap, AW88399_CRCCTRL_REG, 633 ~AW88399_CRC_CFG_EN_MASK, AW88399_CRC_CFG_EN_ENABLE_VALUE); 634 if (ret) 635 return ret; 636 637 usleep_range(AW88399_1000_US, AW88399_1000_US + 10); 638 639 /* read crc check result */ 640 ret = regmap_read(aw_dev->regmap, AW88399_HAGCST_REG, ®_val); 641 if (ret) 642 return ret; 643 644 check_val = (reg_val & (~AW88399_CRC_CHECK_BITS_MASK)) >> AW88399_CRC_CHECK_START_BIT; 645 646 /* disable cfg crc check */ 647 ret = regmap_update_bits(aw_dev->regmap, AW88399_CRCCTRL_REG, 648 ~AW88399_CRC_CFG_EN_MASK, AW88399_CRC_CFG_EN_DISABLE_VALUE); 649 if (ret) 650 return ret; 651 652 if (check_val != AW88399_CRC_CHECK_PASS_VAL) { 653 dev_err(aw_dev->dev, "crc_check failed, check val 0x%x != 0x%x", 654 check_val, AW88399_CRC_CHECK_PASS_VAL); 655 ret = -EINVAL; 656 } 657 658 return ret; 659 } 660 661 static int aw_dev_hw_crc_check(struct aw88399 *aw88399) 662 { 663 struct aw_device *aw_dev = aw88399->aw_pa; 664 int ret; 665 666 ret = regmap_update_bits(aw_dev->regmap, AW88399_I2SCFG1_REG, 667 ~AW88399_RAM_CG_BYP_MASK, AW88399_RAM_CG_BYP_BYPASS_VALUE); 668 if (ret) 669 return ret; 670 671 ret = aw_dev_fw_crc_check(aw_dev); 672 if (ret) { 673 dev_err(aw_dev->dev, "fw_crc_check failed\n"); 674 goto crc_check_failed; 675 } 676 677 ret = aw_dev_cfg_crc_check(aw_dev); 678 if (ret) { 679 dev_err(aw_dev->dev, "cfg_crc_check failed\n"); 680 goto crc_check_failed; 681 } 682 683 ret = regmap_write(aw_dev->regmap, AW88399_CRCCTRL_REG, aw88399->crc_init_val); 684 if (ret) 685 return ret; 686 687 ret = regmap_update_bits(aw_dev->regmap, AW88399_I2SCFG1_REG, 688 ~AW88399_RAM_CG_BYP_MASK, AW88399_RAM_CG_BYP_WORK_VALUE); 689 690 return ret; 691 692 crc_check_failed: 693 regmap_update_bits(aw_dev->regmap, AW88399_I2SCFG1_REG, 694 ~AW88399_RAM_CG_BYP_MASK, AW88399_RAM_CG_BYP_WORK_VALUE); 695 return ret; 696 } 697 698 static void aw_dev_i2s_tx_enable(struct aw_device *aw_dev, bool flag) 699 { 700 int ret; 701 702 if (flag) 703 ret = regmap_update_bits(aw_dev->regmap, AW88399_I2SCTRL3_REG, 704 ~AW88399_I2STXEN_MASK, AW88399_I2STXEN_ENABLE_VALUE); 705 else 706 ret = regmap_update_bits(aw_dev->regmap, AW88399_I2SCFG1_REG, 707 ~AW88399_I2STXEN_MASK, AW88399_I2STXEN_DISABLE_VALUE); 708 709 if (ret) 710 dev_dbg(aw_dev->dev, "%s failed", __func__); 711 } 712 713 static int aw_dev_get_dsp_status(struct aw_device *aw_dev) 714 { 715 unsigned int reg_val; 716 int ret; 717 718 ret = regmap_read(aw_dev->regmap, AW88399_WDT_REG, ®_val); 719 if (ret) 720 return ret; 721 if (!(reg_val & (~AW88399_WDT_CNT_MASK))) 722 return -EPERM; 723 724 return 0; 725 } 726 727 static int aw_dev_dsp_check(struct aw_device *aw_dev) 728 { 729 int ret, i; 730 731 switch (aw_dev->dsp_cfg) { 732 case AW88399_DEV_DSP_BYPASS: 733 dev_dbg(aw_dev->dev, "dsp bypass"); 734 ret = 0; 735 break; 736 case AW88399_DEV_DSP_WORK: 737 aw_dev_dsp_enable(aw_dev, false); 738 aw_dev_dsp_enable(aw_dev, true); 739 usleep_range(AW88399_1000_US, AW88399_1000_US + 10); 740 for (i = 0; i < AW88399_DEV_DSP_CHECK_MAX; i++) { 741 ret = aw_dev_get_dsp_status(aw_dev); 742 if (ret) { 743 dev_err(aw_dev->dev, "dsp wdt status error=%d", ret); 744 usleep_range(AW88399_2000_US, AW88399_2000_US + 10); 745 } 746 } 747 break; 748 default: 749 dev_err(aw_dev->dev, "unknown dsp cfg=%d", aw_dev->dsp_cfg); 750 ret = -EINVAL; 751 break; 752 } 753 754 return ret; 755 } 756 757 static int aw_dev_set_volume(struct aw_device *aw_dev, unsigned int value) 758 { 759 struct aw_volume_desc *vol_desc = &aw_dev->volume_desc; 760 unsigned int reg_value; 761 u16 real_value; 762 int ret; 763 764 real_value = min((value + vol_desc->init_volume), (unsigned int)AW88399_MUTE_VOL); 765 766 ret = regmap_read(aw_dev->regmap, AW88399_SYSCTRL2_REG, ®_value); 767 if (ret) 768 return ret; 769 770 dev_dbg(aw_dev->dev, "value 0x%x , reg:0x%x", value, real_value); 771 772 real_value = (real_value << AW88399_VOL_START_BIT) | (reg_value & AW88399_VOL_MASK); 773 774 ret = regmap_write(aw_dev->regmap, AW88399_SYSCTRL2_REG, real_value); 775 776 return ret; 777 } 778 779 static void aw_dev_fade_in(struct aw_device *aw_dev) 780 { 781 struct aw_volume_desc *desc = &aw_dev->volume_desc; 782 u16 fade_in_vol = desc->ctl_volume; 783 int fade_step = aw_dev->fade_step; 784 int i; 785 786 if (fade_step == 0 || aw_dev->fade_in_time == 0) { 787 aw_dev_set_volume(aw_dev, fade_in_vol); 788 return; 789 } 790 791 for (i = AW88399_MUTE_VOL; i >= fade_in_vol; i -= fade_step) { 792 aw_dev_set_volume(aw_dev, i); 793 usleep_range(aw_dev->fade_in_time, aw_dev->fade_in_time + 10); 794 } 795 796 if (i != fade_in_vol) 797 aw_dev_set_volume(aw_dev, fade_in_vol); 798 } 799 800 static void aw_dev_fade_out(struct aw_device *aw_dev) 801 { 802 struct aw_volume_desc *desc = &aw_dev->volume_desc; 803 int fade_step = aw_dev->fade_step; 804 int i; 805 806 if (fade_step == 0 || aw_dev->fade_out_time == 0) { 807 aw_dev_set_volume(aw_dev, AW88399_MUTE_VOL); 808 return; 809 } 810 811 for (i = desc->ctl_volume; i <= AW88399_MUTE_VOL; i += fade_step) { 812 aw_dev_set_volume(aw_dev, i); 813 usleep_range(aw_dev->fade_out_time, aw_dev->fade_out_time + 10); 814 } 815 816 if (i != AW88399_MUTE_VOL) { 817 aw_dev_set_volume(aw_dev, AW88399_MUTE_VOL); 818 usleep_range(aw_dev->fade_out_time, aw_dev->fade_out_time + 10); 819 } 820 } 821 822 static void aw88399_dev_mute(struct aw_device *aw_dev, bool is_mute) 823 { 824 if (is_mute) { 825 aw_dev_fade_out(aw_dev); 826 regmap_update_bits(aw_dev->regmap, AW88399_SYSCTRL_REG, 827 ~AW88399_HMUTE_MASK, AW88399_HMUTE_ENABLE_VALUE); 828 } else { 829 regmap_update_bits(aw_dev->regmap, AW88399_SYSCTRL_REG, 830 ~AW88399_HMUTE_MASK, AW88399_HMUTE_DISABLE_VALUE); 831 aw_dev_fade_in(aw_dev); 832 } 833 } 834 835 static void aw88399_dev_set_dither(struct aw88399 *aw88399, bool dither) 836 { 837 struct aw_device *aw_dev = aw88399->aw_pa; 838 839 if (dither) 840 regmap_update_bits(aw_dev->regmap, AW88399_DBGCTRL_REG, 841 ~AW88399_DITHER_EN_MASK, AW88399_DITHER_EN_ENABLE_VALUE); 842 else 843 regmap_update_bits(aw_dev->regmap, AW88399_DBGCTRL_REG, 844 ~AW88399_DITHER_EN_MASK, AW88399_DITHER_EN_DISABLE_VALUE); 845 } 846 847 static int aw88399_dev_start(struct aw88399 *aw88399) 848 { 849 struct aw_device *aw_dev = aw88399->aw_pa; 850 int ret; 851 852 if (aw_dev->status == AW88399_DEV_PW_ON) { 853 dev_dbg(aw_dev->dev, "already power on"); 854 return 0; 855 } 856 857 aw88399_dev_set_dither(aw88399, false); 858 859 /* power on */ 860 aw_dev_pwd(aw_dev, false); 861 usleep_range(AW88399_2000_US, AW88399_2000_US + 10); 862 863 ret = aw_dev_check_syspll(aw_dev); 864 if (ret) { 865 dev_err(aw_dev->dev, "pll check failed cannot start"); 866 goto pll_check_fail; 867 } 868 869 /* amppd on */ 870 aw_dev_amppd(aw_dev, false); 871 usleep_range(AW88399_1000_US, AW88399_1000_US + 50); 872 873 /* check i2s status */ 874 ret = aw_dev_check_sysst(aw_dev); 875 if (ret) { 876 dev_err(aw_dev->dev, "sysst check failed"); 877 goto sysst_check_fail; 878 } 879 880 if (aw_dev->dsp_cfg == AW88399_DEV_DSP_WORK) { 881 ret = aw_dev_hw_crc_check(aw88399); 882 if (ret) { 883 dev_err(aw_dev->dev, "dsp crc check failed"); 884 goto crc_check_fail; 885 } 886 aw_dev_dsp_enable(aw_dev, false); 887 aw_dev_set_vcalb(aw88399); 888 aw_dev_update_cali_re(&aw_dev->cali_desc); 889 890 ret = aw_dev_dsp_check(aw_dev); 891 if (ret) { 892 dev_err(aw_dev->dev, "dsp status check failed"); 893 goto dsp_check_fail; 894 } 895 } else { 896 dev_dbg(aw_dev->dev, "start pa with dsp bypass"); 897 } 898 899 /* enable tx feedback */ 900 aw_dev_i2s_tx_enable(aw_dev, true); 901 902 if (aw88399->dither_st == AW88399_DITHER_EN_ENABLE_VALUE) 903 aw88399_dev_set_dither(aw88399, true); 904 905 /* close mute */ 906 aw88399_dev_mute(aw_dev, false); 907 /* clear inturrupt */ 908 aw_dev_clear_int_status(aw_dev); 909 aw_dev->status = AW88399_DEV_PW_ON; 910 911 return 0; 912 913 dsp_check_fail: 914 crc_check_fail: 915 aw_dev_dsp_enable(aw_dev, false); 916 sysst_check_fail: 917 aw_dev_clear_int_status(aw_dev); 918 aw_dev_amppd(aw_dev, true); 919 pll_check_fail: 920 aw_dev_pwd(aw_dev, true); 921 aw_dev->status = AW88399_DEV_PW_OFF; 922 923 return ret; 924 } 925 926 static int aw_dev_dsp_update_container(struct aw_device *aw_dev, 927 unsigned char *data, unsigned int len, unsigned short base) 928 { 929 u32 tmp_len; 930 int i, ret; 931 932 mutex_lock(&aw_dev->dsp_lock); 933 ret = regmap_write(aw_dev->regmap, AW88399_DSPMADD_REG, base); 934 if (ret) 935 goto error_operation; 936 937 for (i = 0; i < len; i += AW88399_MAX_RAM_WRITE_BYTE_SIZE) { 938 tmp_len = min(len - i, AW88399_MAX_RAM_WRITE_BYTE_SIZE); 939 ret = regmap_raw_write(aw_dev->regmap, AW88399_DSPMDAT_REG, 940 &data[i], tmp_len); 941 if (ret) 942 goto error_operation; 943 } 944 mutex_unlock(&aw_dev->dsp_lock); 945 946 return 0; 947 948 error_operation: 949 mutex_unlock(&aw_dev->dsp_lock); 950 return ret; 951 } 952 953 static int aw_dev_get_ra(struct aw_cali_desc *cali_desc) 954 { 955 struct aw_device *aw_dev = 956 container_of(cali_desc, struct aw_device, cali_desc); 957 u32 dsp_ra; 958 int ret; 959 960 ret = aw_dev_dsp_read(aw_dev, AW88399_DSP_REG_CFG_ADPZ_RA, 961 &dsp_ra, AW88399_DSP_32_DATA); 962 if (ret) { 963 dev_err(aw_dev->dev, "read ra error"); 964 return ret; 965 } 966 967 cali_desc->ra = AW88399_DSP_RE_TO_SHOW_RE(dsp_ra, 968 AW88399_DSP_RE_SHIFT); 969 970 return 0; 971 } 972 973 static int aw_dev_dsp_update_cfg(struct aw_device *aw_dev, 974 unsigned char *data, unsigned int len) 975 { 976 int ret; 977 978 dev_dbg(aw_dev->dev, "dsp config len:%d", len); 979 980 if (!len || !data) { 981 dev_err(aw_dev->dev, "dsp config data is null or len is 0"); 982 return -EINVAL; 983 } 984 985 ret = aw_dev_dsp_update_container(aw_dev, data, len, AW88399_DSP_CFG_ADDR); 986 if (ret) 987 return ret; 988 989 aw_dev->dsp_cfg_len = len; 990 991 ret = aw_dev_get_ra(&aw_dev->cali_desc); 992 993 return ret; 994 } 995 996 static int aw_dev_dsp_update_fw(struct aw_device *aw_dev, 997 unsigned char *data, unsigned int len) 998 { 999 int ret; 1000 1001 dev_dbg(aw_dev->dev, "dsp firmware len:%d", len); 1002 1003 if (!len || !data) { 1004 dev_err(aw_dev->dev, "dsp firmware data is null or len is 0"); 1005 return -EINVAL; 1006 } 1007 1008 aw_dev->dsp_fw_len = len; 1009 ret = aw_dev_dsp_update_container(aw_dev, data, len, AW88399_DSP_FW_ADDR); 1010 1011 return ret; 1012 } 1013 1014 static int aw_dev_check_sram(struct aw_device *aw_dev) 1015 { 1016 unsigned int reg_val; 1017 1018 mutex_lock(&aw_dev->dsp_lock); 1019 /* read dsp_rom_check_reg */ 1020 aw_dev_dsp_read_16bit(aw_dev, AW88399_DSP_ROM_CHECK_ADDR, ®_val); 1021 if (reg_val != AW88399_DSP_ROM_CHECK_DATA) { 1022 dev_err(aw_dev->dev, "check dsp rom failed, read[0x%x] != check[0x%x]", 1023 reg_val, AW88399_DSP_ROM_CHECK_DATA); 1024 goto error; 1025 } 1026 1027 /* check dsp_cfg_base_addr */ 1028 aw_dev_dsp_write_16bit(aw_dev, AW88399_DSP_CFG_ADDR, AW88399_DSP_ODD_NUM_BIT_TEST); 1029 aw_dev_dsp_read_16bit(aw_dev, AW88399_DSP_CFG_ADDR, ®_val); 1030 if (reg_val != AW88399_DSP_ODD_NUM_BIT_TEST) { 1031 dev_err(aw_dev->dev, "check dsp cfg failed, read[0x%x] != write[0x%x]", 1032 reg_val, AW88399_DSP_ODD_NUM_BIT_TEST); 1033 goto error; 1034 } 1035 mutex_unlock(&aw_dev->dsp_lock); 1036 1037 return 0; 1038 error: 1039 mutex_unlock(&aw_dev->dsp_lock); 1040 return -EPERM; 1041 } 1042 1043 static void aw_dev_select_memclk(struct aw_device *aw_dev, unsigned char flag) 1044 { 1045 int ret; 1046 1047 switch (flag) { 1048 case AW88399_DEV_MEMCLK_PLL: 1049 ret = regmap_update_bits(aw_dev->regmap, AW88399_DBGCTRL_REG, 1050 ~AW88399_MEM_CLKSEL_MASK, 1051 AW88399_MEM_CLKSEL_DAPHCLK_VALUE); 1052 if (ret) 1053 dev_err(aw_dev->dev, "memclk select pll failed"); 1054 break; 1055 case AW88399_DEV_MEMCLK_OSC: 1056 ret = regmap_update_bits(aw_dev->regmap, AW88399_DBGCTRL_REG, 1057 ~AW88399_MEM_CLKSEL_MASK, 1058 AW88399_MEM_CLKSEL_OSCCLK_VALUE); 1059 if (ret) 1060 dev_err(aw_dev->dev, "memclk select OSC failed"); 1061 break; 1062 default: 1063 dev_err(aw_dev->dev, "unknown memclk config, flag=0x%x", flag); 1064 break; 1065 } 1066 } 1067 1068 static void aw_dev_get_cur_mode_st(struct aw_device *aw_dev) 1069 { 1070 struct aw_profctrl_desc *profctrl_desc = &aw_dev->profctrl_desc; 1071 unsigned int reg_val; 1072 int ret; 1073 1074 ret = regmap_read(aw_dev->regmap, AW88399_SYSCTRL_REG, ®_val); 1075 if (ret) { 1076 dev_dbg(aw_dev->dev, "%s failed", __func__); 1077 return; 1078 } 1079 if ((reg_val & (~AW88399_RCV_MODE_MASK)) == AW88399_RCV_MODE_RECEIVER_VALUE) 1080 profctrl_desc->cur_mode = AW88399_RCV_MODE; 1081 else 1082 profctrl_desc->cur_mode = AW88399_NOT_RCV_MODE; 1083 } 1084 1085 static int aw_dev_update_reg_container(struct aw88399 *aw88399, 1086 unsigned char *data, unsigned int len) 1087 { 1088 struct aw_device *aw_dev = aw88399->aw_pa; 1089 struct aw_volume_desc *vol_desc = &aw_dev->volume_desc; 1090 u16 read_vol, reg_val; 1091 int data_len, i, ret; 1092 int16_t *reg_data; 1093 u8 reg_addr; 1094 1095 reg_data = (int16_t *)data; 1096 data_len = len >> 1; 1097 1098 if (data_len & 0x1) { 1099 dev_err(aw_dev->dev, "data len:%d unsupported", data_len); 1100 return -EINVAL; 1101 } 1102 1103 for (i = 0; i < data_len; i += 2) { 1104 reg_addr = reg_data[i]; 1105 reg_val = reg_data[i + 1]; 1106 1107 if (reg_addr == AW88399_DSPVCALB_REG) { 1108 aw88399->vcalb_init_val = reg_val; 1109 continue; 1110 } 1111 1112 if (reg_addr == AW88399_SYSCTRL_REG) { 1113 if (reg_val & (~AW88399_DSPBY_MASK)) 1114 aw_dev->dsp_cfg = AW88399_DEV_DSP_BYPASS; 1115 else 1116 aw_dev->dsp_cfg = AW88399_DEV_DSP_WORK; 1117 1118 reg_val &= (AW88399_HMUTE_MASK | AW88399_PWDN_MASK | 1119 AW88399_DSPBY_MASK); 1120 reg_val |= (AW88399_HMUTE_ENABLE_VALUE | AW88399_PWDN_POWER_DOWN_VALUE | 1121 AW88399_DSPBY_BYPASS_VALUE); 1122 } 1123 1124 if (reg_addr == AW88399_I2SCTRL3_REG) { 1125 reg_val &= AW88399_I2STXEN_MASK; 1126 reg_val |= AW88399_I2STXEN_DISABLE_VALUE; 1127 } 1128 1129 if (reg_addr == AW88399_SYSCTRL2_REG) { 1130 read_vol = (reg_val & (~AW88399_VOL_MASK)) >> 1131 AW88399_VOL_START_BIT; 1132 aw_dev->volume_desc.init_volume = read_vol; 1133 } 1134 1135 if (reg_addr == AW88399_DBGCTRL_REG) { 1136 if ((reg_val & (~AW88399_EF_DBMD_MASK)) == AW88399_EF_DBMD_OR_VALUE) 1137 aw88399->check_val = AW_EF_OR_CHECK; 1138 else 1139 aw88399->check_val = AW_EF_AND_CHECK; 1140 1141 aw88399->dither_st = reg_val & (~AW88399_DITHER_EN_MASK); 1142 } 1143 1144 if (reg_addr == AW88399_CRCCTRL_REG) 1145 aw88399->crc_init_val = reg_val; 1146 1147 ret = regmap_write(aw_dev->regmap, reg_addr, reg_val); 1148 if (ret) 1149 return ret; 1150 } 1151 1152 aw_dev_pwd(aw_dev, false); 1153 usleep_range(AW88399_1000_US, AW88399_1000_US + 10); 1154 1155 aw_dev_get_cur_mode_st(aw_dev); 1156 1157 if (aw_dev->prof_cur != aw_dev->prof_index) 1158 vol_desc->ctl_volume = 0; 1159 else 1160 aw_dev_set_volume(aw_dev, vol_desc->ctl_volume); 1161 1162 return 0; 1163 } 1164 1165 static int aw_dev_reg_update(struct aw88399 *aw88399, 1166 unsigned char *data, unsigned int len) 1167 { 1168 int ret; 1169 1170 if (!len || !data) { 1171 dev_err(aw88399->aw_pa->dev, "reg data is null or len is 0"); 1172 return -EINVAL; 1173 } 1174 1175 ret = aw_dev_update_reg_container(aw88399, data, len); 1176 if (ret) 1177 dev_err(aw88399->aw_pa->dev, "reg update failed"); 1178 1179 return ret; 1180 } 1181 1182 static int aw88399_dev_get_prof_name(struct aw_device *aw_dev, int index, char **prof_name) 1183 { 1184 struct aw_prof_info *prof_info = &aw_dev->prof_info; 1185 struct aw_prof_desc *prof_desc; 1186 1187 if ((index >= aw_dev->prof_info.count) || (index < 0)) { 1188 dev_err(aw_dev->dev, "index[%d] overflow count[%d]", 1189 index, aw_dev->prof_info.count); 1190 return -EINVAL; 1191 } 1192 1193 prof_desc = &aw_dev->prof_info.prof_desc[index]; 1194 1195 *prof_name = prof_info->prof_name_list[prof_desc->id]; 1196 1197 return 0; 1198 } 1199 1200 static int aw88399_dev_get_prof_data(struct aw_device *aw_dev, int index, 1201 struct aw_prof_desc **prof_desc) 1202 { 1203 if ((index >= aw_dev->prof_info.count) || (index < 0)) { 1204 dev_err(aw_dev->dev, "%s: index[%d] overflow count[%d]\n", 1205 __func__, index, aw_dev->prof_info.count); 1206 return -EINVAL; 1207 } 1208 1209 *prof_desc = &aw_dev->prof_info.prof_desc[index]; 1210 1211 return 0; 1212 } 1213 1214 static int aw88399_dev_fw_update(struct aw88399 *aw88399, bool up_dsp_fw_en, bool force_up_en) 1215 { 1216 struct aw_device *aw_dev = aw88399->aw_pa; 1217 struct aw_prof_desc *prof_index_desc; 1218 struct aw_sec_data_desc *sec_desc; 1219 char *prof_name; 1220 int ret; 1221 1222 if ((aw_dev->prof_cur == aw_dev->prof_index) && 1223 (force_up_en == AW88399_FORCE_UPDATE_OFF)) { 1224 dev_dbg(aw_dev->dev, "scene no change, not update"); 1225 return 0; 1226 } 1227 1228 if (aw_dev->fw_status == AW88399_DEV_FW_FAILED) { 1229 dev_err(aw_dev->dev, "fw status[%d] error", aw_dev->fw_status); 1230 return -EPERM; 1231 } 1232 1233 ret = aw88399_dev_get_prof_name(aw_dev, aw_dev->prof_index, &prof_name); 1234 if (ret) 1235 return ret; 1236 1237 dev_dbg(aw_dev->dev, "start update %s", prof_name); 1238 1239 ret = aw88399_dev_get_prof_data(aw_dev, aw_dev->prof_index, &prof_index_desc); 1240 if (ret) 1241 return ret; 1242 1243 /* update reg */ 1244 sec_desc = prof_index_desc->sec_desc; 1245 ret = aw_dev_reg_update(aw88399, sec_desc[AW88395_DATA_TYPE_REG].data, 1246 sec_desc[AW88395_DATA_TYPE_REG].len); 1247 if (ret) { 1248 dev_err(aw_dev->dev, "update reg failed"); 1249 return ret; 1250 } 1251 1252 aw88399_dev_mute(aw_dev, true); 1253 1254 if (aw_dev->dsp_cfg == AW88399_DEV_DSP_WORK) 1255 aw_dev_dsp_enable(aw_dev, false); 1256 1257 aw_dev_select_memclk(aw_dev, AW88399_DEV_MEMCLK_OSC); 1258 1259 ret = aw_dev_check_sram(aw_dev); 1260 if (ret) { 1261 dev_err(aw_dev->dev, "check sram failed"); 1262 goto error; 1263 } 1264 1265 if (up_dsp_fw_en) { 1266 dev_dbg(aw_dev->dev, "fw_ver: [%x]", prof_index_desc->fw_ver); 1267 ret = aw_dev_dsp_update_fw(aw_dev, sec_desc[AW88395_DATA_TYPE_DSP_FW].data, 1268 sec_desc[AW88395_DATA_TYPE_DSP_FW].len); 1269 if (ret) { 1270 dev_err(aw_dev->dev, "update dsp fw failed"); 1271 goto error; 1272 } 1273 } 1274 1275 /* update dsp config */ 1276 ret = aw_dev_dsp_update_cfg(aw_dev, sec_desc[AW88395_DATA_TYPE_DSP_CFG].data, 1277 sec_desc[AW88395_DATA_TYPE_DSP_CFG].len); 1278 if (ret) { 1279 dev_err(aw_dev->dev, "update dsp cfg failed"); 1280 goto error; 1281 } 1282 1283 aw_dev_select_memclk(aw_dev, AW88399_DEV_MEMCLK_PLL); 1284 1285 aw_dev->prof_cur = aw_dev->prof_index; 1286 1287 return 0; 1288 1289 error: 1290 aw_dev_select_memclk(aw_dev, AW88399_DEV_MEMCLK_PLL); 1291 return ret; 1292 } 1293 1294 static void aw88399_start_pa(struct aw88399 *aw88399) 1295 { 1296 int ret, i; 1297 1298 for (i = 0; i < AW88399_START_RETRIES; i++) { 1299 ret = aw88399_dev_start(aw88399); 1300 if (ret) { 1301 dev_err(aw88399->aw_pa->dev, "aw88399 device start failed. retry = %d", i); 1302 ret = aw88399_dev_fw_update(aw88399, AW88399_DSP_FW_UPDATE_ON, true); 1303 if (ret) { 1304 dev_err(aw88399->aw_pa->dev, "fw update failed"); 1305 continue; 1306 } 1307 } else { 1308 dev_dbg(aw88399->aw_pa->dev, "start success\n"); 1309 break; 1310 } 1311 } 1312 } 1313 1314 static void aw88399_startup_work(struct work_struct *work) 1315 { 1316 struct aw88399 *aw88399 = 1317 container_of(work, struct aw88399, start_work.work); 1318 1319 mutex_lock(&aw88399->lock); 1320 aw88399_start_pa(aw88399); 1321 mutex_unlock(&aw88399->lock); 1322 } 1323 1324 static void aw88399_start(struct aw88399 *aw88399, bool sync_start) 1325 { 1326 int ret; 1327 1328 if (aw88399->aw_pa->fw_status != AW88399_DEV_FW_OK) 1329 return; 1330 1331 if (aw88399->aw_pa->status == AW88399_DEV_PW_ON) 1332 return; 1333 1334 ret = aw88399_dev_fw_update(aw88399, AW88399_DSP_FW_UPDATE_OFF, true); 1335 if (ret) { 1336 dev_err(aw88399->aw_pa->dev, "fw update failed."); 1337 return; 1338 } 1339 1340 if (sync_start == AW88399_SYNC_START) 1341 aw88399_start_pa(aw88399); 1342 else 1343 queue_delayed_work(system_wq, 1344 &aw88399->start_work, 1345 AW88399_START_WORK_DELAY_MS); 1346 } 1347 1348 static int aw_dev_check_sysint(struct aw_device *aw_dev) 1349 { 1350 u16 reg_val; 1351 1352 aw_dev_get_int_status(aw_dev, ®_val); 1353 if (reg_val & AW88399_BIT_SYSINT_CHECK) { 1354 dev_err(aw_dev->dev, "pa stop check fail:0x%04x", reg_val); 1355 return -EINVAL; 1356 } 1357 1358 return 0; 1359 } 1360 1361 static int aw88399_stop(struct aw_device *aw_dev) 1362 { 1363 struct aw_sec_data_desc *dsp_cfg = 1364 &aw_dev->prof_info.prof_desc[aw_dev->prof_cur].sec_desc[AW88395_DATA_TYPE_DSP_CFG]; 1365 struct aw_sec_data_desc *dsp_fw = 1366 &aw_dev->prof_info.prof_desc[aw_dev->prof_cur].sec_desc[AW88395_DATA_TYPE_DSP_FW]; 1367 int int_st; 1368 1369 if (aw_dev->status == AW88399_DEV_PW_OFF) { 1370 dev_dbg(aw_dev->dev, "already power off"); 1371 return 0; 1372 } 1373 1374 aw_dev->status = AW88399_DEV_PW_OFF; 1375 1376 aw88399_dev_mute(aw_dev, true); 1377 usleep_range(AW88399_4000_US, AW88399_4000_US + 100); 1378 1379 aw_dev_i2s_tx_enable(aw_dev, false); 1380 usleep_range(AW88399_1000_US, AW88399_1000_US + 100); 1381 1382 int_st = aw_dev_check_sysint(aw_dev); 1383 1384 aw_dev_dsp_enable(aw_dev, false); 1385 1386 aw_dev_amppd(aw_dev, true); 1387 1388 if (int_st) { 1389 aw_dev_select_memclk(aw_dev, AW88399_DEV_MEMCLK_OSC); 1390 aw_dev_dsp_update_fw(aw_dev, dsp_fw->data, dsp_fw->len); 1391 aw_dev_dsp_update_cfg(aw_dev, dsp_cfg->data, dsp_cfg->len); 1392 aw_dev_select_memclk(aw_dev, AW88399_DEV_MEMCLK_PLL); 1393 } 1394 1395 aw_dev_pwd(aw_dev, true); 1396 1397 return 0; 1398 } 1399 1400 static struct snd_soc_dai_driver aw88399_dai[] = { 1401 { 1402 .name = "aw88399-aif", 1403 .id = 1, 1404 .playback = { 1405 .stream_name = "Speaker_Playback", 1406 .channels_min = 1, 1407 .channels_max = 2, 1408 .rates = AW88399_RATES, 1409 .formats = AW88399_FORMATS, 1410 }, 1411 .capture = { 1412 .stream_name = "Speaker_Capture", 1413 .channels_min = 1, 1414 .channels_max = 2, 1415 .rates = AW88399_RATES, 1416 .formats = AW88399_FORMATS, 1417 }, 1418 }, 1419 }; 1420 1421 static void aw_cali_svc_run_mute(struct aw_device *aw_dev, uint16_t cali_result) 1422 { 1423 if (cali_result == CALI_RESULT_ERROR) 1424 aw88399_dev_mute(aw_dev, true); 1425 else if (cali_result == CALI_RESULT_NORMAL) 1426 aw88399_dev_mute(aw_dev, false); 1427 } 1428 1429 static int aw_cali_svc_get_cali_cfg(struct aw_device *aw_dev) 1430 { 1431 struct cali_cfg *cali_cfg = &aw_dev->cali_desc.cali_cfg; 1432 int ret; 1433 1434 ret = aw_dev_dsp_read(aw_dev, AW88399_DSP_REG_CFG_MBMEC_ACTAMPTH, 1435 &cali_cfg->data[0], AW88399_DSP_32_DATA); 1436 if (ret) 1437 return ret; 1438 1439 ret = aw_dev_dsp_read(aw_dev, AW88399_DSP_REG_CFG_MBMEC_NOISEAMPTH, 1440 &cali_cfg->data[1], AW88399_DSP_32_DATA); 1441 if (ret) 1442 return ret; 1443 1444 ret = aw_dev_dsp_read(aw_dev, AW88399_DSP_REG_CFG_ADPZ_USTEPN, 1445 &cali_cfg->data[2], AW88399_DSP_16_DATA); 1446 if (ret) 1447 return ret; 1448 1449 ret = aw_dev_dsp_read(aw_dev, AW88399_DSP_REG_CFG_RE_ALPHA, 1450 &cali_cfg->data[3], AW88399_DSP_16_DATA); 1451 1452 return ret; 1453 } 1454 1455 static int aw_cali_svc_set_cali_cfg(struct aw_device *aw_dev, 1456 struct cali_cfg cali_cfg) 1457 { 1458 int ret; 1459 1460 ret = aw_dev_dsp_write(aw_dev, AW88399_DSP_REG_CFG_MBMEC_ACTAMPTH, 1461 cali_cfg.data[0], AW88399_DSP_32_DATA); 1462 if (ret) 1463 return ret; 1464 1465 ret = aw_dev_dsp_write(aw_dev, AW88399_DSP_REG_CFG_MBMEC_NOISEAMPTH, 1466 cali_cfg.data[1], AW88399_DSP_32_DATA); 1467 if (ret) 1468 return ret; 1469 1470 ret = aw_dev_dsp_write(aw_dev, AW88399_DSP_REG_CFG_ADPZ_USTEPN, 1471 cali_cfg.data[2], AW88399_DSP_16_DATA); 1472 if (ret) 1473 return ret; 1474 1475 ret = aw_dev_dsp_write(aw_dev, AW88399_DSP_REG_CFG_RE_ALPHA, 1476 cali_cfg.data[3], AW88399_DSP_16_DATA); 1477 1478 return ret; 1479 } 1480 1481 static int aw_cali_svc_cali_en(struct aw_device *aw_dev, bool cali_en) 1482 { 1483 struct cali_cfg set_cfg; 1484 int ret; 1485 1486 aw_dev_dsp_enable(aw_dev, false); 1487 if (cali_en) { 1488 regmap_update_bits(aw_dev->regmap, AW88399_DBGCTRL_REG, 1489 ~AW883XX_DSP_NG_EN_MASK, AW883XX_DSP_NG_EN_DISABLE_VALUE); 1490 aw_dev_dsp_write(aw_dev, AW88399_DSP_LOW_POWER_SWITCH_CFG_ADDR, 1491 AW88399_DSP_LOW_POWER_SWITCH_DISABLE, AW88399_DSP_16_DATA); 1492 1493 ret = aw_cali_svc_get_cali_cfg(aw_dev); 1494 if (ret) { 1495 dev_err(aw_dev->dev, "get cali cfg failed\n"); 1496 aw_dev_dsp_enable(aw_dev, true); 1497 return ret; 1498 } 1499 set_cfg.data[0] = 0; 1500 set_cfg.data[1] = 0; 1501 set_cfg.data[2] = -1; 1502 set_cfg.data[3] = 1; 1503 1504 ret = aw_cali_svc_set_cali_cfg(aw_dev, set_cfg); 1505 if (ret) { 1506 dev_err(aw_dev->dev, "set cali cfg failed\n"); 1507 aw_cali_svc_set_cali_cfg(aw_dev, aw_dev->cali_desc.cali_cfg); 1508 aw_dev_dsp_enable(aw_dev, true); 1509 return ret; 1510 } 1511 } else { 1512 aw_cali_svc_set_cali_cfg(aw_dev, aw_dev->cali_desc.cali_cfg); 1513 } 1514 1515 aw_dev_dsp_enable(aw_dev, true); 1516 1517 return 0; 1518 } 1519 1520 static int aw_cali_svc_cali_run_dsp_vol(struct aw_device *aw_dev, bool enable) 1521 { 1522 unsigned int reg_val; 1523 int ret; 1524 1525 if (enable) { 1526 ret = regmap_read(aw_dev->regmap, AW88399_DSPCFG_REG, ®_val); 1527 if (ret) { 1528 dev_err(aw_dev->dev, "read reg 0x%x failed\n", AW88399_DSPCFG_REG); 1529 return ret; 1530 } 1531 1532 aw_dev->cali_desc.store_vol = reg_val & (~AW88399_DSP_VOL_MASK); 1533 ret = regmap_update_bits(aw_dev->regmap, AW88399_DSPCFG_REG, 1534 ~AW88399_DSP_VOL_MASK, AW88399_DSP_VOL_MUTE); 1535 } else { 1536 ret = regmap_update_bits(aw_dev->regmap, AW88399_DSPCFG_REG, 1537 ~AW88399_DSP_VOL_MASK, aw_dev->cali_desc.store_vol); 1538 } 1539 1540 return ret; 1541 } 1542 1543 static void aw_cali_svc_backup_info(struct aw_device *aw_dev) 1544 { 1545 struct aw_cali_backup_desc *backup_desc = &aw_dev->cali_desc.backup_info; 1546 unsigned int reg_val, dsp_val; 1547 1548 regmap_read(aw_dev->regmap, AW88399_DBGCTRL_REG, ®_val); 1549 backup_desc->dsp_ng_cfg = reg_val & (~AW883XX_DSP_NG_EN_MASK); 1550 1551 aw_dev_dsp_read(aw_dev, AW88399_DSP_LOW_POWER_SWITCH_CFG_ADDR, 1552 &dsp_val, AW88399_DSP_16_DATA); 1553 1554 backup_desc->dsp_lp_cfg = dsp_val; 1555 } 1556 1557 static void aw_cali_svc_recover_info(struct aw_device *aw_dev) 1558 { 1559 struct aw_cali_backup_desc *backup_desc = &aw_dev->cali_desc.backup_info; 1560 1561 regmap_update_bits(aw_dev->regmap, AW88399_DBGCTRL_REG, 1562 ~AW883XX_DSP_NG_EN_MASK, backup_desc->dsp_ng_cfg); 1563 1564 aw_dev_dsp_write(aw_dev, AW88399_DSP_LOW_POWER_SWITCH_CFG_ADDR, 1565 backup_desc->dsp_lp_cfg, AW88399_DSP_16_DATA); 1566 } 1567 1568 static int aw_cali_svc_cali_re_mode_enable(struct aw_device *aw_dev, bool is_enable) 1569 { 1570 int ret; 1571 1572 if (is_enable) { 1573 ret = aw_dev_check_syspll(aw_dev); 1574 if (ret) { 1575 dev_err(aw_dev->dev, "pll check failed cannot start\n"); 1576 return ret; 1577 } 1578 1579 ret = aw_dev_get_dsp_status(aw_dev); 1580 if (ret) { 1581 dev_err(aw_dev->dev, "dsp status error\n"); 1582 return ret; 1583 } 1584 1585 aw_cali_svc_backup_info(aw_dev); 1586 ret = aw_cali_svc_cali_en(aw_dev, true); 1587 if (ret) { 1588 dev_err(aw_dev->dev, "aw_cali_svc_cali_en failed\n"); 1589 return ret; 1590 } 1591 1592 ret = aw_cali_svc_cali_run_dsp_vol(aw_dev, true); 1593 if (ret) { 1594 aw_cali_svc_cali_en(aw_dev, false); 1595 return ret; 1596 } 1597 1598 } else { 1599 aw_cali_svc_cali_run_dsp_vol(aw_dev, false); 1600 aw_cali_svc_recover_info(aw_dev); 1601 aw_cali_svc_cali_en(aw_dev, false); 1602 } 1603 1604 return 0; 1605 } 1606 1607 static int aw_cali_svc_get_dev_re(struct aw_device *aw_dev, uint32_t *re) 1608 { 1609 uint32_t dsp_re, show_re; 1610 int ret; 1611 1612 ret = aw_dev_dsp_read(aw_dev, AW88399_DSP_REG_CALRE, &dsp_re, AW88399_DSP_16_DATA); 1613 if (ret) 1614 return ret; 1615 1616 show_re = AW88399_DSP_RE_TO_SHOW_RE(dsp_re, AW88399_DSP_REG_CALRE_SHIFT); 1617 1618 *re = (uint32_t)(show_re - aw_dev->cali_desc.ra); 1619 1620 return 0; 1621 } 1622 1623 static void aw_cali_svc_del_max_min_ave_algo(uint32_t *data, int data_size, uint32_t *dsp_re) 1624 { 1625 int sum = 0, i; 1626 1627 for (i = 1; i < data_size - 1; i++) 1628 sum += data[i]; 1629 1630 *dsp_re = sum / (data_size - AW_CALI_DATA_SUM_RM); 1631 } 1632 1633 static int aw_cali_svc_get_iv_st(struct aw_device *aw_dev) 1634 { 1635 unsigned int reg_data; 1636 int ret, i; 1637 1638 for (i = 0; i < AW_GET_IV_CNT_MAX; i++) { 1639 ret = regmap_read(aw_dev->regmap, AW88399_ASR1_REG, ®_data); 1640 if (ret) { 1641 dev_err(aw_dev->dev, "read 0x%x failed\n", AW88399_ASR1_REG); 1642 return ret; 1643 } 1644 1645 reg_data &= (~AW88399_REABS_MASK); 1646 if (!reg_data) 1647 return 0; 1648 msleep(30); 1649 } 1650 1651 dev_err(aw_dev->dev, "IV data abnormal, please check\n"); 1652 1653 return -EINVAL; 1654 } 1655 1656 static int compare_ints(const void *a, const void *b) 1657 { 1658 return *(int *)a - *(int *)b; 1659 } 1660 1661 static int aw_cali_svc_get_smooth_cali_re(struct aw_device *aw_dev) 1662 { 1663 uint32_t re_temp[AW_CALI_READ_CNT_MAX]; 1664 uint32_t dsp_re; 1665 int ret, i; 1666 1667 for (i = 0; i < AW_CALI_READ_CNT_MAX; i++) { 1668 ret = aw_cali_svc_get_dev_re(aw_dev, &re_temp[i]); 1669 if (ret) 1670 goto cali_re_fail; 1671 msleep(30); 1672 } 1673 1674 sort(re_temp, AW_CALI_READ_CNT_MAX, sizeof(uint32_t), compare_ints, NULL); 1675 1676 aw_cali_svc_del_max_min_ave_algo(re_temp, AW_CALI_READ_CNT_MAX, &dsp_re); 1677 1678 ret = aw_cali_svc_get_iv_st(aw_dev); 1679 if (ret) { 1680 dev_err(aw_dev->dev, "get iv data failed"); 1681 goto cali_re_fail; 1682 } 1683 1684 if (dsp_re < AW88399_CALI_RE_MIN || dsp_re > AW88399_CALI_RE_MAX) { 1685 dev_err(aw_dev->dev, "out range re value: [%d]mohm\n", dsp_re); 1686 aw_dev->cali_desc.cali_re = dsp_re; 1687 aw_dev->cali_desc.cali_result = CALI_RESULT_ERROR; 1688 aw_cali_svc_run_mute(aw_dev, aw_dev->cali_desc.cali_result); 1689 1690 return 0; 1691 } 1692 1693 aw_dev->cali_desc.cali_result = CALI_RESULT_NORMAL; 1694 1695 aw_dev->cali_desc.cali_re = dsp_re; 1696 dev_dbg(aw_dev->dev, "re[%d]mohm\n", aw_dev->cali_desc.cali_re); 1697 1698 aw_dev_dsp_enable(aw_dev, false); 1699 aw_dev_update_cali_re(&aw_dev->cali_desc); 1700 aw_dev_dsp_enable(aw_dev, true); 1701 1702 return 0; 1703 1704 cali_re_fail: 1705 aw_dev->cali_desc.cali_result = CALI_RESULT_ERROR; 1706 aw_cali_svc_run_mute(aw_dev, aw_dev->cali_desc.cali_result); 1707 return -EINVAL; 1708 } 1709 1710 static int aw_cali_svc_dev_cali_re(struct aw88399 *aw88399) 1711 { 1712 struct aw_device *aw_dev = aw88399->aw_pa; 1713 struct aw_cali_desc *cali_desc = &aw_dev->cali_desc; 1714 int ret; 1715 1716 if (cali_desc->cali_running) { 1717 dev_err(aw_dev->dev, "calibration in progress\n"); 1718 return -EINVAL; 1719 } 1720 1721 cali_desc->cali_running = true; 1722 aw_cali_svc_run_mute(aw_dev, CALI_RESULT_NORMAL); 1723 1724 ret = aw_cali_svc_cali_re_mode_enable(aw_dev, true); 1725 if (ret) { 1726 dev_err(aw_dev->dev, "start cali re failed\n"); 1727 goto re_mode_err; 1728 } 1729 1730 msleep(1000); 1731 1732 ret = aw_cali_svc_get_smooth_cali_re(aw_dev); 1733 if (ret) 1734 dev_err(aw_dev->dev, "get cali re failed\n"); 1735 1736 aw_cali_svc_cali_re_mode_enable(aw_dev, false); 1737 1738 re_mode_err: 1739 cali_desc->cali_running = false; 1740 1741 return ret; 1742 } 1743 1744 static int aw88399_get_fade_in_time(struct snd_kcontrol *kcontrol, 1745 struct snd_ctl_elem_value *ucontrol) 1746 { 1747 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 1748 struct aw88399 *aw88399 = snd_soc_component_get_drvdata(component); 1749 struct aw_device *aw_dev = aw88399->aw_pa; 1750 1751 ucontrol->value.integer.value[0] = aw_dev->fade_in_time; 1752 1753 return 0; 1754 } 1755 1756 static int aw88399_set_fade_in_time(struct snd_kcontrol *kcontrol, 1757 struct snd_ctl_elem_value *ucontrol) 1758 { 1759 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 1760 struct aw88399 *aw88399 = snd_soc_component_get_drvdata(component); 1761 struct soc_mixer_control *mc = 1762 (struct soc_mixer_control *)kcontrol->private_value; 1763 struct aw_device *aw_dev = aw88399->aw_pa; 1764 int time; 1765 1766 time = ucontrol->value.integer.value[0]; 1767 1768 if (time < mc->min || time > mc->max) 1769 return -EINVAL; 1770 1771 if (time != aw_dev->fade_in_time) { 1772 aw_dev->fade_in_time = time; 1773 return 1; 1774 } 1775 1776 return 0; 1777 } 1778 1779 static int aw88399_get_fade_out_time(struct snd_kcontrol *kcontrol, 1780 struct snd_ctl_elem_value *ucontrol) 1781 { 1782 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 1783 struct aw88399 *aw88399 = snd_soc_component_get_drvdata(component); 1784 struct aw_device *aw_dev = aw88399->aw_pa; 1785 1786 ucontrol->value.integer.value[0] = aw_dev->fade_out_time; 1787 1788 return 0; 1789 } 1790 1791 static int aw88399_set_fade_out_time(struct snd_kcontrol *kcontrol, 1792 struct snd_ctl_elem_value *ucontrol) 1793 { 1794 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 1795 struct aw88399 *aw88399 = snd_soc_component_get_drvdata(component); 1796 struct soc_mixer_control *mc = 1797 (struct soc_mixer_control *)kcontrol->private_value; 1798 struct aw_device *aw_dev = aw88399->aw_pa; 1799 int time; 1800 1801 time = ucontrol->value.integer.value[0]; 1802 if (time < mc->min || time > mc->max) 1803 return -EINVAL; 1804 1805 if (time != aw_dev->fade_out_time) { 1806 aw_dev->fade_out_time = time; 1807 return 1; 1808 } 1809 1810 return 0; 1811 } 1812 1813 static int aw88399_dev_set_profile_index(struct aw_device *aw_dev, int index) 1814 { 1815 /* check the index whether is valid */ 1816 if ((index >= aw_dev->prof_info.count) || (index < 0)) 1817 return -EINVAL; 1818 /* check the index whether change */ 1819 if (aw_dev->prof_index == index) 1820 return -EINVAL; 1821 1822 aw_dev->prof_index = index; 1823 dev_dbg(aw_dev->dev, "set prof[%s]", 1824 aw_dev->prof_info.prof_name_list[aw_dev->prof_info.prof_desc[index].id]); 1825 1826 return 0; 1827 } 1828 1829 static int aw88399_profile_info(struct snd_kcontrol *kcontrol, 1830 struct snd_ctl_elem_info *uinfo) 1831 { 1832 struct snd_soc_component *codec = snd_soc_kcontrol_component(kcontrol); 1833 struct aw88399 *aw88399 = snd_soc_component_get_drvdata(codec); 1834 char *prof_name; 1835 int count, ret; 1836 1837 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1838 uinfo->count = 1; 1839 1840 count = aw88399->aw_pa->prof_info.count; 1841 if (count <= 0) { 1842 uinfo->value.enumerated.items = 0; 1843 return 0; 1844 } 1845 1846 uinfo->value.enumerated.items = count; 1847 1848 if (uinfo->value.enumerated.item >= count) 1849 uinfo->value.enumerated.item = count - 1; 1850 1851 count = uinfo->value.enumerated.item; 1852 1853 ret = aw88399_dev_get_prof_name(aw88399->aw_pa, count, &prof_name); 1854 if (ret) { 1855 strscpy(uinfo->value.enumerated.name, "null"); 1856 return 0; 1857 } 1858 1859 strscpy(uinfo->value.enumerated.name, prof_name); 1860 1861 return 0; 1862 } 1863 1864 static int aw88399_profile_get(struct snd_kcontrol *kcontrol, 1865 struct snd_ctl_elem_value *ucontrol) 1866 { 1867 struct snd_soc_component *codec = snd_soc_kcontrol_component(kcontrol); 1868 struct aw88399 *aw88399 = snd_soc_component_get_drvdata(codec); 1869 1870 ucontrol->value.integer.value[0] = aw88399->aw_pa->prof_index; 1871 1872 return 0; 1873 } 1874 1875 static int aw88399_profile_set(struct snd_kcontrol *kcontrol, 1876 struct snd_ctl_elem_value *ucontrol) 1877 { 1878 struct snd_soc_component *codec = snd_soc_kcontrol_component(kcontrol); 1879 struct aw88399 *aw88399 = snd_soc_component_get_drvdata(codec); 1880 int ret; 1881 1882 mutex_lock(&aw88399->lock); 1883 ret = aw88399_dev_set_profile_index(aw88399->aw_pa, ucontrol->value.integer.value[0]); 1884 if (ret) { 1885 dev_dbg(codec->dev, "profile index does not change"); 1886 mutex_unlock(&aw88399->lock); 1887 return 0; 1888 } 1889 1890 if (aw88399->aw_pa->status) { 1891 aw88399_stop(aw88399->aw_pa); 1892 aw88399_start(aw88399, AW88399_SYNC_START); 1893 } 1894 1895 mutex_unlock(&aw88399->lock); 1896 1897 return 1; 1898 } 1899 1900 static int aw88399_volume_get(struct snd_kcontrol *kcontrol, 1901 struct snd_ctl_elem_value *ucontrol) 1902 { 1903 struct snd_soc_component *codec = snd_soc_kcontrol_component(kcontrol); 1904 struct aw88399 *aw88399 = snd_soc_component_get_drvdata(codec); 1905 struct aw_volume_desc *vol_desc = &aw88399->aw_pa->volume_desc; 1906 1907 ucontrol->value.integer.value[0] = vol_desc->ctl_volume; 1908 1909 return 0; 1910 } 1911 1912 static int aw88399_volume_set(struct snd_kcontrol *kcontrol, 1913 struct snd_ctl_elem_value *ucontrol) 1914 { 1915 struct snd_soc_component *codec = snd_soc_kcontrol_component(kcontrol); 1916 struct aw88399 *aw88399 = snd_soc_component_get_drvdata(codec); 1917 struct aw_volume_desc *vol_desc = &aw88399->aw_pa->volume_desc; 1918 struct soc_mixer_control *mc = 1919 (struct soc_mixer_control *)kcontrol->private_value; 1920 int value; 1921 1922 value = ucontrol->value.integer.value[0]; 1923 if (value < mc->min || value > mc->max) 1924 return -EINVAL; 1925 1926 if (vol_desc->ctl_volume != value) { 1927 vol_desc->ctl_volume = value; 1928 aw_dev_set_volume(aw88399->aw_pa, vol_desc->ctl_volume); 1929 1930 return 1; 1931 } 1932 1933 return 0; 1934 } 1935 1936 static int aw88399_get_fade_step(struct snd_kcontrol *kcontrol, 1937 struct snd_ctl_elem_value *ucontrol) 1938 { 1939 struct snd_soc_component *codec = snd_soc_kcontrol_component(kcontrol); 1940 struct aw88399 *aw88399 = snd_soc_component_get_drvdata(codec); 1941 1942 ucontrol->value.integer.value[0] = aw88399->aw_pa->fade_step; 1943 1944 return 0; 1945 } 1946 1947 static int aw88399_set_fade_step(struct snd_kcontrol *kcontrol, 1948 struct snd_ctl_elem_value *ucontrol) 1949 { 1950 struct snd_soc_component *codec = snd_soc_kcontrol_component(kcontrol); 1951 struct aw88399 *aw88399 = snd_soc_component_get_drvdata(codec); 1952 struct soc_mixer_control *mc = 1953 (struct soc_mixer_control *)kcontrol->private_value; 1954 int value; 1955 1956 value = ucontrol->value.integer.value[0]; 1957 if (value < mc->min || value > mc->max) 1958 return -EINVAL; 1959 1960 if (aw88399->aw_pa->fade_step != value) { 1961 aw88399->aw_pa->fade_step = value; 1962 return 1; 1963 } 1964 1965 return 0; 1966 } 1967 1968 static int aw88399_re_get(struct snd_kcontrol *kcontrol, 1969 struct snd_ctl_elem_value *ucontrol) 1970 { 1971 struct snd_soc_component *codec = snd_soc_kcontrol_component(kcontrol); 1972 struct aw88399 *aw88399 = snd_soc_component_get_drvdata(codec); 1973 struct aw_device *aw_dev = aw88399->aw_pa; 1974 1975 ucontrol->value.integer.value[0] = aw_dev->cali_desc.cali_re; 1976 1977 return 0; 1978 } 1979 1980 static int aw88399_re_set(struct snd_kcontrol *kcontrol, 1981 struct snd_ctl_elem_value *ucontrol) 1982 { 1983 struct snd_soc_component *codec = snd_soc_kcontrol_component(kcontrol); 1984 struct aw88399 *aw88399 = snd_soc_component_get_drvdata(codec); 1985 struct soc_mixer_control *mc = 1986 (struct soc_mixer_control *)kcontrol->private_value; 1987 struct aw_device *aw_dev = aw88399->aw_pa; 1988 int value; 1989 1990 value = ucontrol->value.integer.value[0]; 1991 if (value < mc->min || value > mc->max) 1992 return -EINVAL; 1993 1994 if (aw_dev->cali_desc.cali_re != value) { 1995 aw_dev->cali_desc.cali_re = value; 1996 return 1; 1997 } 1998 1999 return 0; 2000 } 2001 2002 static int aw88399_calib_switch_get(struct snd_kcontrol *kcontrol, 2003 struct snd_ctl_elem_value *ucontrol) 2004 { 2005 struct snd_soc_component *codec = snd_soc_kcontrol_component(kcontrol); 2006 struct aw88399 *aw88399 = snd_soc_component_get_drvdata(codec); 2007 struct aw_device *aw_dev = aw88399->aw_pa; 2008 2009 ucontrol->value.integer.value[0] = aw_dev->cali_desc.cali_switch; 2010 2011 return 0; 2012 } 2013 2014 static int aw88399_calib_switch_set(struct snd_kcontrol *kcontrol, 2015 struct snd_ctl_elem_value *ucontrol) 2016 { 2017 struct snd_soc_component *codec = snd_soc_kcontrol_component(kcontrol); 2018 struct aw88399 *aw88399 = snd_soc_component_get_drvdata(codec); 2019 struct aw_device *aw_dev = aw88399->aw_pa; 2020 2021 if (aw_dev->cali_desc.cali_switch == ucontrol->value.integer.value[0]) 2022 return 0; 2023 2024 aw_dev->cali_desc.cali_switch = ucontrol->value.integer.value[0]; 2025 2026 return 1; 2027 } 2028 2029 static int aw88399_calib_get(struct snd_kcontrol *kcontrol, 2030 struct snd_ctl_elem_value *ucontrol) 2031 { 2032 /* do nothing */ 2033 return 0; 2034 } 2035 2036 static int aw88399_calib_set(struct snd_kcontrol *kcontrol, 2037 struct snd_ctl_elem_value *ucontrol) 2038 { 2039 struct snd_soc_component *codec = snd_soc_kcontrol_component(kcontrol); 2040 struct aw88399 *aw88399 = snd_soc_component_get_drvdata(codec); 2041 struct aw_device *aw_dev = aw88399->aw_pa; 2042 2043 if (aw_dev->status && aw_dev->cali_desc.cali_switch) 2044 aw_cali_svc_dev_cali_re(aw88399); 2045 2046 return 0; 2047 } 2048 2049 static int aw88399_dev_init(struct aw88399 *aw88399, struct aw_container *aw_cfg) 2050 { 2051 struct aw_device *aw_dev = aw88399->aw_pa; 2052 int ret; 2053 2054 ret = aw88395_dev_cfg_load(aw_dev, aw_cfg); 2055 if (ret) { 2056 dev_err(aw_dev->dev, "aw_dev acf parse failed"); 2057 return -EINVAL; 2058 } 2059 aw_dev->fade_in_time = AW88399_1000_US / 10; 2060 aw_dev->fade_out_time = AW88399_1000_US >> 1; 2061 aw_dev->prof_cur = aw_dev->prof_info.prof_desc[0].id; 2062 aw_dev->prof_index = aw_dev->prof_info.prof_desc[0].id; 2063 2064 ret = aw88399_dev_fw_update(aw88399, AW88399_FORCE_UPDATE_ON, AW88399_DSP_FW_UPDATE_ON); 2065 if (ret) { 2066 dev_err(aw_dev->dev, "fw update failed ret = %d\n", ret); 2067 return ret; 2068 } 2069 2070 aw88399_dev_mute(aw_dev, true); 2071 2072 /* close tx feedback */ 2073 aw_dev_i2s_tx_enable(aw_dev, false); 2074 usleep_range(AW88399_1000_US, AW88399_1000_US + 100); 2075 2076 /* enable amppd */ 2077 aw_dev_amppd(aw_dev, true); 2078 2079 /* close dsp */ 2080 aw_dev_dsp_enable(aw_dev, false); 2081 /* set power down */ 2082 aw_dev_pwd(aw_dev, true); 2083 2084 return 0; 2085 } 2086 2087 static int aw88399_request_firmware_file(struct aw88399 *aw88399) 2088 { 2089 const struct firmware *cont = NULL; 2090 int ret; 2091 2092 aw88399->aw_pa->fw_status = AW88399_DEV_FW_FAILED; 2093 2094 ret = request_firmware(&cont, AW88399_ACF_FILE, aw88399->aw_pa->dev); 2095 if (ret) { 2096 dev_err(aw88399->aw_pa->dev, "request [%s] failed!", AW88399_ACF_FILE); 2097 return ret; 2098 } 2099 2100 dev_dbg(aw88399->aw_pa->dev, "loaded %s - size: %zu\n", 2101 AW88399_ACF_FILE, cont ? cont->size : 0); 2102 2103 aw88399->aw_cfg = devm_kzalloc(aw88399->aw_pa->dev, 2104 struct_size(aw88399->aw_cfg, data, cont->size), GFP_KERNEL); 2105 if (!aw88399->aw_cfg) { 2106 release_firmware(cont); 2107 return -ENOMEM; 2108 } 2109 aw88399->aw_cfg->len = (int)cont->size; 2110 memcpy(aw88399->aw_cfg->data, cont->data, cont->size); 2111 release_firmware(cont); 2112 2113 ret = aw88395_dev_load_acf_check(aw88399->aw_pa, aw88399->aw_cfg); 2114 if (ret) { 2115 dev_err(aw88399->aw_pa->dev, "load [%s] failed!", AW88399_ACF_FILE); 2116 return ret; 2117 } 2118 2119 mutex_lock(&aw88399->lock); 2120 /* aw device init */ 2121 ret = aw88399_dev_init(aw88399, aw88399->aw_cfg); 2122 if (ret) 2123 dev_err(aw88399->aw_pa->dev, "dev init failed"); 2124 mutex_unlock(&aw88399->lock); 2125 2126 return ret; 2127 } 2128 2129 static const struct snd_kcontrol_new aw88399_controls[] = { 2130 SOC_SINGLE_EXT("PCM Playback Volume", AW88399_SYSCTRL2_REG, 2131 6, AW88399_MUTE_VOL, 0, aw88399_volume_get, 2132 aw88399_volume_set), 2133 SOC_SINGLE_EXT("Fade Step", 0, 0, AW88399_MUTE_VOL, 0, 2134 aw88399_get_fade_step, aw88399_set_fade_step), 2135 SOC_SINGLE_EXT("Volume Ramp Up Step", 0, 0, FADE_TIME_MAX, FADE_TIME_MIN, 2136 aw88399_get_fade_in_time, aw88399_set_fade_in_time), 2137 SOC_SINGLE_EXT("Volume Ramp Down Step", 0, 0, FADE_TIME_MAX, FADE_TIME_MIN, 2138 aw88399_get_fade_out_time, aw88399_set_fade_out_time), 2139 SOC_SINGLE_EXT("Calib", 0, 0, AW88399_CALI_RE_MAX, 0, 2140 aw88399_re_get, aw88399_re_set), 2141 SOC_SINGLE_BOOL_EXT("Calib Switch", 0, 2142 aw88399_calib_switch_get, aw88399_calib_switch_set), 2143 SOC_SINGLE_EXT("Trigger Calib", SND_SOC_NOPM, 0, 1, 0, 2144 aw88399_calib_get, aw88399_calib_set), 2145 AW88399_PROFILE_EXT("AW88399 Profile Set", aw88399_profile_info, 2146 aw88399_profile_get, aw88399_profile_set), 2147 }; 2148 2149 static int aw88399_playback_event(struct snd_soc_dapm_widget *w, 2150 struct snd_kcontrol *k, int event) 2151 { 2152 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 2153 struct aw88399 *aw88399 = snd_soc_component_get_drvdata(component); 2154 2155 mutex_lock(&aw88399->lock); 2156 switch (event) { 2157 case SND_SOC_DAPM_PRE_PMU: 2158 aw88399_start(aw88399, AW88399_ASYNC_START); 2159 break; 2160 case SND_SOC_DAPM_POST_PMD: 2161 aw88399_stop(aw88399->aw_pa); 2162 break; 2163 default: 2164 break; 2165 } 2166 mutex_unlock(&aw88399->lock); 2167 2168 return 0; 2169 } 2170 2171 static const struct snd_soc_dapm_widget aw88399_dapm_widgets[] = { 2172 /* playback */ 2173 SND_SOC_DAPM_AIF_IN_E("AIF_RX", "Speaker_Playback", 0, 0, 0, 0, 2174 aw88399_playback_event, 2175 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 2176 SND_SOC_DAPM_OUTPUT("DAC Output"), 2177 2178 /* capture */ 2179 SND_SOC_DAPM_AIF_OUT("AIF_TX", "Speaker_Capture", 0, SND_SOC_NOPM, 0, 0), 2180 SND_SOC_DAPM_INPUT("ADC Input"), 2181 }; 2182 2183 static const struct snd_soc_dapm_route aw88399_audio_map[] = { 2184 {"DAC Output", NULL, "AIF_RX"}, 2185 {"AIF_TX", NULL, "ADC Input"}, 2186 }; 2187 2188 static int aw88399_codec_probe(struct snd_soc_component *component) 2189 { 2190 struct aw88399 *aw88399 = snd_soc_component_get_drvdata(component); 2191 int ret; 2192 2193 INIT_DELAYED_WORK(&aw88399->start_work, aw88399_startup_work); 2194 2195 ret = aw88399_request_firmware_file(aw88399); 2196 if (ret) 2197 dev_err(aw88399->aw_pa->dev, "%s failed\n", __func__); 2198 2199 return ret; 2200 } 2201 2202 static void aw88399_codec_remove(struct snd_soc_component *aw_codec) 2203 { 2204 struct aw88399 *aw88399 = snd_soc_component_get_drvdata(aw_codec); 2205 2206 cancel_delayed_work_sync(&aw88399->start_work); 2207 } 2208 2209 static const struct snd_soc_component_driver soc_codec_dev_aw88399 = { 2210 .probe = aw88399_codec_probe, 2211 .remove = aw88399_codec_remove, 2212 .dapm_widgets = aw88399_dapm_widgets, 2213 .num_dapm_widgets = ARRAY_SIZE(aw88399_dapm_widgets), 2214 .dapm_routes = aw88399_audio_map, 2215 .num_dapm_routes = ARRAY_SIZE(aw88399_audio_map), 2216 .controls = aw88399_controls, 2217 .num_controls = ARRAY_SIZE(aw88399_controls), 2218 }; 2219 2220 static void aw88399_hw_reset(struct aw88399 *aw88399) 2221 { 2222 if (aw88399->reset_gpio) { 2223 gpiod_set_value_cansleep(aw88399->reset_gpio, 1); 2224 usleep_range(AW88399_1000_US, AW88399_1000_US + 10); 2225 gpiod_set_value_cansleep(aw88399->reset_gpio, 0); 2226 usleep_range(AW88399_1000_US, AW88399_1000_US + 10); 2227 gpiod_set_value_cansleep(aw88399->reset_gpio, 1); 2228 usleep_range(AW88399_1000_US, AW88399_1000_US + 10); 2229 } 2230 } 2231 2232 static void aw88399_parse_channel_dt(struct aw_device *aw_dev) 2233 { 2234 struct device_node *np = aw_dev->dev->of_node; 2235 u32 channel_value; 2236 2237 of_property_read_u32(np, "awinic,audio-channel", &channel_value); 2238 aw_dev->channel = channel_value; 2239 } 2240 2241 static int aw88399_init(struct aw88399 *aw88399, struct i2c_client *i2c, struct regmap *regmap) 2242 { 2243 struct aw_device *aw_dev; 2244 unsigned int chip_id; 2245 int ret; 2246 2247 ret = regmap_read(regmap, AW88399_ID_REG, &chip_id); 2248 if (ret) { 2249 dev_err(&i2c->dev, "%s read chipid error. ret = %d", __func__, ret); 2250 return ret; 2251 } 2252 if (chip_id != AW88399_CHIP_ID) { 2253 dev_err(&i2c->dev, "unsupported device"); 2254 return -ENXIO; 2255 } 2256 dev_dbg(&i2c->dev, "chip id = %x\n", chip_id); 2257 2258 aw_dev = devm_kzalloc(&i2c->dev, sizeof(*aw_dev), GFP_KERNEL); 2259 if (!aw_dev) 2260 return -ENOMEM; 2261 aw88399->aw_pa = aw_dev; 2262 2263 aw_dev->i2c = i2c; 2264 aw_dev->dev = &i2c->dev; 2265 aw_dev->regmap = regmap; 2266 mutex_init(&aw_dev->dsp_lock); 2267 2268 aw_dev->chip_id = chip_id; 2269 aw_dev->acf = NULL; 2270 aw_dev->prof_info.prof_desc = NULL; 2271 aw_dev->prof_info.count = 0; 2272 aw_dev->prof_info.prof_type = AW88395_DEV_NONE_TYPE_ID; 2273 aw_dev->channel = AW88399_DEV_DEFAULT_CH; 2274 aw_dev->fw_status = AW88399_DEV_FW_FAILED; 2275 2276 aw_dev->fade_step = AW88399_VOLUME_STEP_DB; 2277 aw_dev->volume_desc.ctl_volume = AW88399_VOL_DEFAULT_VALUE; 2278 2279 aw88399_parse_channel_dt(aw_dev); 2280 2281 return 0; 2282 } 2283 2284 static int aw88399_i2c_probe(struct i2c_client *i2c) 2285 { 2286 struct aw88399 *aw88399; 2287 int ret; 2288 2289 if (!i2c_check_functionality(i2c->adapter, I2C_FUNC_I2C)) 2290 return dev_err_probe(&i2c->dev, -ENXIO, "check_functionality failed"); 2291 2292 aw88399 = devm_kzalloc(&i2c->dev, sizeof(*aw88399), GFP_KERNEL); 2293 if (!aw88399) 2294 return -ENOMEM; 2295 2296 mutex_init(&aw88399->lock); 2297 2298 i2c_set_clientdata(i2c, aw88399); 2299 2300 aw88399->reset_gpio = devm_gpiod_get_optional(&i2c->dev, "reset", GPIOD_OUT_LOW); 2301 if (IS_ERR(aw88399->reset_gpio)) 2302 return dev_err_probe(&i2c->dev, PTR_ERR(aw88399->reset_gpio), 2303 "reset gpio not defined\n"); 2304 aw88399_hw_reset(aw88399); 2305 2306 aw88399->regmap = devm_regmap_init_i2c(i2c, &aw88399_remap_config); 2307 if (IS_ERR(aw88399->regmap)) 2308 return dev_err_probe(&i2c->dev, PTR_ERR(aw88399->regmap), 2309 "failed to init regmap\n"); 2310 2311 /* aw pa init */ 2312 ret = aw88399_init(aw88399, i2c, aw88399->regmap); 2313 if (ret) 2314 return ret; 2315 2316 ret = devm_snd_soc_register_component(&i2c->dev, 2317 &soc_codec_dev_aw88399, 2318 aw88399_dai, ARRAY_SIZE(aw88399_dai)); 2319 if (ret) 2320 dev_err(&i2c->dev, "failed to register aw88399: %d", ret); 2321 2322 return ret; 2323 } 2324 2325 static const struct i2c_device_id aw88399_i2c_id[] = { 2326 { AW88399_I2C_NAME }, 2327 { } 2328 }; 2329 MODULE_DEVICE_TABLE(i2c, aw88399_i2c_id); 2330 2331 #ifdef CONFIG_ACPI 2332 static const struct acpi_device_id aw88399_acpi_match[] = { 2333 { "AWDZ8399", 0 }, 2334 { }, 2335 }; 2336 MODULE_DEVICE_TABLE(acpi, aw88399_acpi_match); 2337 #endif 2338 2339 static struct i2c_driver aw88399_i2c_driver = { 2340 .driver = { 2341 .name = AW88399_I2C_NAME, 2342 .acpi_match_table = ACPI_PTR(aw88399_acpi_match), 2343 }, 2344 .probe = aw88399_i2c_probe, 2345 .id_table = aw88399_i2c_id, 2346 }; 2347 module_i2c_driver(aw88399_i2c_driver); 2348 2349 MODULE_DESCRIPTION("ASoC AW88399 Smart PA Driver"); 2350 MODULE_LICENSE("GPL v2"); 2351