xref: /linux/sound/soc/codecs/alc5632.h (revision 94d5f7c0255bd712d68732a0180558d45fe6eac5)
1*94d5f7c0SLeon Romanovsky /*
2*94d5f7c0SLeon Romanovsky * alc5632.h  --  ALC5632 ALSA SoC Audio Codec
3*94d5f7c0SLeon Romanovsky *
4*94d5f7c0SLeon Romanovsky * Copyright (C) 2011 The AC100 Kernel Team <ac100@lists.lauchpad.net>
5*94d5f7c0SLeon Romanovsky *
6*94d5f7c0SLeon Romanovsky * Authors:  Leon Romanovsky <leon@leon.nu>
7*94d5f7c0SLeon Romanovsky *           Andrey Danin <danindrey@mail.ru>
8*94d5f7c0SLeon Romanovsky *           Ilya Petrov <ilya.muromec@gmail.com>
9*94d5f7c0SLeon Romanovsky *           Marc Dietrich <marvin24@gmx.de>
10*94d5f7c0SLeon Romanovsky *
11*94d5f7c0SLeon Romanovsky * Based on alc5623.h by Arnaud Patard
12*94d5f7c0SLeon Romanovsky *
13*94d5f7c0SLeon Romanovsky * This program is free software; you can redistribute it and/or modify
14*94d5f7c0SLeon Romanovsky * it under the terms of the GNU General Public License version 2 as
15*94d5f7c0SLeon Romanovsky * published by the Free Software Foundation.
16*94d5f7c0SLeon Romanovsky */
17*94d5f7c0SLeon Romanovsky 
18*94d5f7c0SLeon Romanovsky #ifndef _ALC5632_H
19*94d5f7c0SLeon Romanovsky #define _ALC5632_H
20*94d5f7c0SLeon Romanovsky 
21*94d5f7c0SLeon Romanovsky #define ALC5632_RESET				0x00
22*94d5f7c0SLeon Romanovsky /* speaker output vol		   2    2           */
23*94d5f7c0SLeon Romanovsky /* line output vol                      4    2      */
24*94d5f7c0SLeon Romanovsky /* HP output vol		   4    0    4      */
25*94d5f7c0SLeon Romanovsky #define ALC5632_SPK_OUT_VOL			0x02 /* spe out vol */
26*94d5f7c0SLeon Romanovsky #define ALC5632_SPK_OUT_VOL_STEP		1.5
27*94d5f7c0SLeon Romanovsky #define ALC5632_HP_OUT_VOL			0x04 /* hp out vol */
28*94d5f7c0SLeon Romanovsky #define ALC5632_AUX_OUT_VOL			0x06 /* aux out vol */
29*94d5f7c0SLeon Romanovsky #define ALC5632_PHONE_IN_VOL			0x08 /* phone in vol */
30*94d5f7c0SLeon Romanovsky #define ALC5632_LINE_IN_VOL			0x0A /* line in vol */
31*94d5f7c0SLeon Romanovsky #define ALC5632_STEREO_DAC_IN_VOL		0x0C /* stereo dac in vol */
32*94d5f7c0SLeon Romanovsky #define ALC5632_MIC_VOL				0x0E /* mic in vol */
33*94d5f7c0SLeon Romanovsky /* stero dac/mic routing */
34*94d5f7c0SLeon Romanovsky #define ALC5632_MIC_ROUTING_CTRL		0x10
35*94d5f7c0SLeon Romanovsky #define ALC5632_MIC_ROUTE_MONOMIX		(1 << 0)
36*94d5f7c0SLeon Romanovsky #define ALC5632_MIC_ROUTE_SPK			(1 << 1)
37*94d5f7c0SLeon Romanovsky #define ALC5632_MIC_ROUTE_HP			(1 << 2)
38*94d5f7c0SLeon Romanovsky 
39*94d5f7c0SLeon Romanovsky #define ALC5632_ADC_REC_GAIN			0x12 /* rec gain */
40*94d5f7c0SLeon Romanovsky #define ALC5632_ADC_REC_GAIN_RANGE		0x1F1F
41*94d5f7c0SLeon Romanovsky #define ALC5632_ADC_REC_GAIN_BASE		(-16.5)
42*94d5f7c0SLeon Romanovsky #define ALC5632_ADC_REC_GAIN_STEP		1.5
43*94d5f7c0SLeon Romanovsky 
44*94d5f7c0SLeon Romanovsky #define ALC5632_ADC_REC_MIXER			0x14 /* mixer control */
45*94d5f7c0SLeon Romanovsky #define ALC5632_ADC_REC_MIC1			(1 << 6)
46*94d5f7c0SLeon Romanovsky #define ALC5632_ADC_REC_MIC2			(1 << 5)
47*94d5f7c0SLeon Romanovsky #define ALC5632_ADC_REC_LINE_IN			(1 << 4)
48*94d5f7c0SLeon Romanovsky #define ALC5632_ADC_REC_AUX			(1 << 3)
49*94d5f7c0SLeon Romanovsky #define ALC5632_ADC_REC_HP			(1 << 2)
50*94d5f7c0SLeon Romanovsky #define ALC5632_ADC_REC_SPK			(1 << 1)
51*94d5f7c0SLeon Romanovsky #define ALC5632_ADC_REC_MONOMIX			(1 << 0)
52*94d5f7c0SLeon Romanovsky 
53*94d5f7c0SLeon Romanovsky #define ALC5632_VOICE_DAC_VOL			0x18 /* voice dac vol */
54*94d5f7c0SLeon Romanovsky /* ALC5632_OUTPUT_MIXER_CTRL :			*/
55*94d5f7c0SLeon Romanovsky /* same remark as for reg 2 line vs speaker	*/
56*94d5f7c0SLeon Romanovsky #define ALC5632_OUTPUT_MIXER_CTRL		0x1C /* out mix ctrl */
57*94d5f7c0SLeon Romanovsky #define ALC5632_OUTPUT_MIXER_RP			(1 << 14)
58*94d5f7c0SLeon Romanovsky #define ALC5632_OUTPUT_MIXER_WEEK		(1 << 12)
59*94d5f7c0SLeon Romanovsky #define ALC5632_OUTPUT_MIXER_HP			(1 << 10)
60*94d5f7c0SLeon Romanovsky #define ALC5632_OUTPUT_MIXER_AUX_SPK		(2 <<  6)
61*94d5f7c0SLeon Romanovsky #define ALC5632_OUTPUT_MIXER_AUX_HP_LR          (1 << 6)
62*94d5f7c0SLeon Romanovsky #define ALC5632_OUTPUT_MIXER_HP_R               (1 << 8)
63*94d5f7c0SLeon Romanovsky #define ALC5632_OUTPUT_MIXER_HP_L               (1 << 9)
64*94d5f7c0SLeon Romanovsky 
65*94d5f7c0SLeon Romanovsky #define ALC5632_MIC_CTRL			0x22 /* mic phone ctrl */
66*94d5f7c0SLeon Romanovsky #define ALC5632_MIC_BOOST_BYPASS		0
67*94d5f7c0SLeon Romanovsky #define ALC5632_MIC_BOOST_20DB			1
68*94d5f7c0SLeon Romanovsky #define ALC5632_MIC_BOOST_30DB			2
69*94d5f7c0SLeon Romanovsky #define ALC5632_MIC_BOOST_40DB			3
70*94d5f7c0SLeon Romanovsky 
71*94d5f7c0SLeon Romanovsky #define ALC5632_DIGI_BOOST_CTRL			0x24 /* digi mic / bost ctl */
72*94d5f7c0SLeon Romanovsky #define ALC5632_MIC_BOOST_RANGE			7
73*94d5f7c0SLeon Romanovsky #define ALC5632_MIC_BOOST_STEP			6
74*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_DOWN_CTRL_STATUS		0x26
75*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_DOWN_CTRL_STATUS_MASK	0xEF00
76*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_VREF_PR3			(1 << 11)
77*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_VREF_PR2			(1 << 10)
78*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_VREF_STATUS			(1 << 3)
79*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_AMIX_STATUS			(1 << 2)
80*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_DAC_STATUS			(1 << 1)
81*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADC_STATUS			(1 << 0)
82*94d5f7c0SLeon Romanovsky /* stereo/voice DAC / stereo adc func ctrl */
83*94d5f7c0SLeon Romanovsky #define ALC5632_DAC_FUNC_SELECT			0x2E
84*94d5f7c0SLeon Romanovsky 
85*94d5f7c0SLeon Romanovsky /* Main serial data port ctrl (i2s) */
86*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_CONTROL			0x34
87*94d5f7c0SLeon Romanovsky 
88*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_SDP_MASTER_MODE		(0 << 15)
89*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_SDP_SLAVE_MODE		(1 << 15)
90*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_SADLRCK_MODE		(1 << 14)
91*94d5f7c0SLeon Romanovsky /* 0:voice, 1:main */
92*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_MAIN_I2S_SYSCLK_SEL		(1 <<  8)
93*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_MAIN_I2S_BCLK_POL_CTRL	(1 <<  7)
94*94d5f7c0SLeon Romanovsky /* 0:normal, 1:invert */
95*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_MAIN_I2S_LRCK_INV		(1 <<  6)
96*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_I2S_DL_MASK			(3 <<  2)
97*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_I2S_DL_8			(3 <<  2)
98*94d5f7c0SLeon Romanovsky #define	ALC5632_DAI_I2S_DL_24			(2 <<  2)
99*94d5f7c0SLeon Romanovsky #define	ALC5632_DAI_I2S_DL_20			(1 <<  2)
100*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_I2S_DL_16			(0 <<  2)
101*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_I2S_DF_MASK			(3 <<  0)
102*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_I2S_DF_PCM_B		(3 <<  0)
103*94d5f7c0SLeon Romanovsky #define	ALC5632_DAI_I2S_DF_PCM_A		(2 <<  0)
104*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_I2S_DF_LEFT			(1 <<  0)
105*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_I2S_DF_I2S			(0 <<  0)
106*94d5f7c0SLeon Romanovsky /* extend serial data port control (VoDAC_i2c/pcm) */
107*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_CONTROL2			0x36
108*94d5f7c0SLeon Romanovsky /* 0:gpio func, 1:voice pcm */
109*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_VOICE_PCM_ENABLE		(1 << 15)
110*94d5f7c0SLeon Romanovsky /* 0:master, 1:slave */
111*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_VOICE_MODE_SEL		(1 << 14)
112*94d5f7c0SLeon Romanovsky /* 0:disable, 1:enable */
113*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_HPF_CLK_CTRL		(1 << 13)
114*94d5f7c0SLeon Romanovsky /* 0:main, 1:voice */
115*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_VOICE_I2S_SYSCLK_SEL	(1 <<  8)
116*94d5f7c0SLeon Romanovsky /* 0:normal, 1:invert */
117*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_VOICE_VBCLK_SYSCLK_SEL	(1 <<  7)
118*94d5f7c0SLeon Romanovsky /* 0:normal, 1:invert */
119*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_VOICE_I2S_LR_INV		(1 <<  6)
120*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_VOICE_DL_MASK		(3 <<  2)
121*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_VOICE_DL_16			(0 <<  2)
122*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_VOICE_DL_20			(1 <<  2)
123*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_VOICE_DL_24			(2 <<  2)
124*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_VOICE_DL_8			(3 <<  2)
125*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_VOICE_DF_MASK		(3 <<  0)
126*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_VOICE_DF_I2S		(0 <<  0)
127*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_VOICE_DF_LEFT		(1 <<  0)
128*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_VOICE_DF_PCM_A		(2 <<  0)
129*94d5f7c0SLeon Romanovsky #define ALC5632_DAI_VOICE_DF_PCM_B		(3 <<  0)
130*94d5f7c0SLeon Romanovsky 
131*94d5f7c0SLeon Romanovsky #define	ALC5632_PWR_MANAG_ADD1			0x3A
132*94d5f7c0SLeon Romanovsky #define	ALC5632_PWR_MANAG_ADD1_MASK		0xEFFF
133*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD1_DAC_L_EN		(1 << 15)
134*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD1_DAC_R_EN		(1 << 14)
135*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD1_ZERO_CROSS		(1 << 13)
136*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD1_MAIN_I2S_EN		(1 << 11)
137*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD1_SPK_AMP_EN		(1 << 10)
138*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD1_HP_OUT_AMP		(1 <<  9)
139*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD1_HP_OUT_ENH_AMP		(1 <<  8)
140*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD1_VOICE_DAC_MIX		(1 <<  7)
141*94d5f7c0SLeon Romanovsky #define	ALC5632_PWR_ADD1_SOFTGEN_EN		(1 <<  6)
142*94d5f7c0SLeon Romanovsky #define	ALC5632_PWR_ADD1_MIC1_SHORT_CURR	(1 <<  5)
143*94d5f7c0SLeon Romanovsky #define	ALC5632_PWR_ADD1_MIC2_SHORT_CURR	(1 <<  4)
144*94d5f7c0SLeon Romanovsky #define	ALC5632_PWR_ADD1_MIC1_EN		(1 <<  3)
145*94d5f7c0SLeon Romanovsky #define	ALC5632_PWR_ADD1_MIC2_EN		(1 <<  2)
146*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD1_MAIN_BIAS		(1 <<  1)
147*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD1_DAC_REF		(1 <<  0)
148*94d5f7c0SLeon Romanovsky 
149*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_MANAG_ADD2			0x3C
150*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_MANAG_ADD2_MASK		0x7FFF
151*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD2_PLL1			(1 << 15)
152*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD2_PLL2			(1 << 14)
153*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD2_VREF			(1 << 13)
154*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD2_OVT_DET		(1 << 12)
155*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD2_VOICE_DAC		(1 << 10)
156*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD2_L_DAC_CLK		(1 <<  9)
157*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD2_R_DAC_CLK		(1 <<  8)
158*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD2_L_ADC_CLK_GAIN		(1 <<  7)
159*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD2_R_ADC_CLK_GAIN		(1 <<  6)
160*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD2_L_HP_MIXER		(1 <<  5)
161*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD2_R_HP_MIXER		(1 <<  4)
162*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD2_SPK_MIXER		(1 <<  3)
163*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD2_MONO_MIXER		(1 <<  2)
164*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD2_L_ADC_REC_MIXER	(1 <<  1)
165*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD2_R_ADC_REC_MIXER	(1 <<  0)
166*94d5f7c0SLeon Romanovsky 
167*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_MANAG_ADD3			0x3E
168*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_MANAG_ADD3_MASK		0x7CFF
169*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD3_AUXOUT_VOL		(1 << 14)
170*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD3_SPK_L_OUT		(1 << 13)
171*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD3_SPK_R_OUT		(1 << 12)
172*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD3_HP_L_OUT_VOL		(1 << 11)
173*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD3_HP_R_OUT_VOL		(1 << 10)
174*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD3_LINEIN_L_VOL		(1 <<  7)
175*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD3_LINEIN_R_VOL		(1 <<  6)
176*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD3_AUXIN_VOL		(1 <<  5)
177*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD3_AUXIN_MIX		(1 <<  4)
178*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD3_MIC1_VOL		(1 <<  3)
179*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD3_MIC2_VOL		(1 <<  2)
180*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD3_MIC1_BOOST_AD		(1 <<  1)
181*94d5f7c0SLeon Romanovsky #define ALC5632_PWR_ADD3_MIC2_BOOST_AD		(1 <<  0)
182*94d5f7c0SLeon Romanovsky 
183*94d5f7c0SLeon Romanovsky #define ALC5632_GPCR1				0x40
184*94d5f7c0SLeon Romanovsky #define ALC5632_GPCR1_CLK_SYS_SRC_SEL_PLL1	(1 << 15)
185*94d5f7c0SLeon Romanovsky #define ALC5632_GPCR1_CLK_SYS_SRC_SEL_MCLK	(0 << 15)
186*94d5f7c0SLeon Romanovsky #define ALC5632_GPCR1_DAC_HI_FLT_EN		(1 << 10)
187*94d5f7c0SLeon Romanovsky #define ALC5632_GPCR1_SPK_AMP_CTRL		(7 <<  1)
188*94d5f7c0SLeon Romanovsky #define ALC5632_GPCR1_VDD_100			(5 <<  1)
189*94d5f7c0SLeon Romanovsky #define ALC5632_GPCR1_VDD_125			(4 <<  1)
190*94d5f7c0SLeon Romanovsky #define ALC5632_GPCR1_VDD_150			(3 <<  1)
191*94d5f7c0SLeon Romanovsky #define ALC5632_GPCR1_VDD_175			(2 <<  1)
192*94d5f7c0SLeon Romanovsky #define ALC5632_GPCR1_VDD_200			(1 <<  1)
193*94d5f7c0SLeon Romanovsky #define ALC5632_GPCR1_VDD_225			(0 <<  1)
194*94d5f7c0SLeon Romanovsky 
195*94d5f7c0SLeon Romanovsky #define	ALC5632_GPCR2				0x42
196*94d5f7c0SLeon Romanovsky #define ALC5632_GPCR2_PLL1_SOUR_SEL		(3 << 12)
197*94d5f7c0SLeon Romanovsky #define ALC5632_PLL_FR_MCLK			(0 << 12)
198*94d5f7c0SLeon Romanovsky #define ALC5632_PLL_FR_BCLK			(2 << 12)
199*94d5f7c0SLeon Romanovsky #define ALC5632_PLL_FR_VBCLK			(3 << 12)
200*94d5f7c0SLeon Romanovsky #define ALC5632_GPCR2_CLK_PLL_PRE_DIV1		(0 <<  0)
201*94d5f7c0SLeon Romanovsky 
202*94d5f7c0SLeon Romanovsky #define ALC5632_PLL1_CTRL			0x44
203*94d5f7c0SLeon Romanovsky #define ALC5632_PLL1_CTRL_N_VAL(n)		(((n) & 0x0f) << 8)
204*94d5f7c0SLeon Romanovsky #define ALC5632_PLL1_M_BYPASS			(1 <<  7)
205*94d5f7c0SLeon Romanovsky #define ALC5632_PLL1_CTRL_K_VAL(k)		(((k) & 0x07) << 4)
206*94d5f7c0SLeon Romanovsky #define ALC5632_PLL1_CTRL_M_VAL(m)		(((m) & 0x0f) << 0)
207*94d5f7c0SLeon Romanovsky 
208*94d5f7c0SLeon Romanovsky #define ALC5632_PLL2_CTRL			0x46
209*94d5f7c0SLeon Romanovsky #define ALC5632_PLL2_EN				(1 << 15)
210*94d5f7c0SLeon Romanovsky #define ALC5632_PLL2_RATIO			(0 << 15)
211*94d5f7c0SLeon Romanovsky 
212*94d5f7c0SLeon Romanovsky #define ALC5632_GPIO_PIN_CONFIG			0x4C
213*94d5f7c0SLeon Romanovsky #define ALC5632_GPIO_PIN_POLARITY		0x4E
214*94d5f7c0SLeon Romanovsky #define ALC5632_GPIO_PIN_STICKY			0x50
215*94d5f7c0SLeon Romanovsky #define ALC5632_GPIO_PIN_WAKEUP			0x52
216*94d5f7c0SLeon Romanovsky #define ALC5632_GPIO_PIN_STATUS			0x54
217*94d5f7c0SLeon Romanovsky #define ALC5632_GPIO_PIN_SHARING		0x56
218*94d5f7c0SLeon Romanovsky #define	ALC5632_OVER_CURR_STATUS		0x58
219*94d5f7c0SLeon Romanovsky #define ALC5632_SOFTVOL_CTRL			0x5A
220*94d5f7c0SLeon Romanovsky #define ALC5632_GPIO_OUPUT_PIN_CTRL		0x5C
221*94d5f7c0SLeon Romanovsky 
222*94d5f7c0SLeon Romanovsky #define ALC5632_MISC_CTRL			0x5E
223*94d5f7c0SLeon Romanovsky #define ALC5632_MISC_DISABLE_FAST_VREG		(1 << 15)
224*94d5f7c0SLeon Romanovsky #define ALC5632_MISC_AVC_TRGT_SEL		(3 << 12)
225*94d5f7c0SLeon Romanovsky #define ALC5632_MISC_AVC_TRGT_RIGHT		(1 << 12)
226*94d5f7c0SLeon Romanovsky #define ALC5632_MISC_AVC_TRGT_LEFT		(2 << 12)
227*94d5f7c0SLeon Romanovsky #define ALC5632_MISC_AVC_TRGT_BOTH		(3 << 12)
228*94d5f7c0SLeon Romanovsky #define ALC5632_MISC_HP_DEPOP_MODE1_EN		(1 <<  9)
229*94d5f7c0SLeon Romanovsky #define ALC5632_MISC_HP_DEPOP_MODE2_EN		(1 <<  8)
230*94d5f7c0SLeon Romanovsky #define ALC5632_MISC_HP_DEPOP_MUTE_L		(1 <<  7)
231*94d5f7c0SLeon Romanovsky #define ALC5632_MISC_HP_DEPOP_MUTE_R		(1 <<  6)
232*94d5f7c0SLeon Romanovsky #define ALC5632_MISC_HP_DEPOP_MUTE		(1 <<  5)
233*94d5f7c0SLeon Romanovsky #define ALC5632_MISC_GPIO_WAKEUP_CTRL		(1 <<  1)
234*94d5f7c0SLeon Romanovsky #define ALC5632_MISC_IRQOUT_INV_CTRL		(1 <<  0)
235*94d5f7c0SLeon Romanovsky 
236*94d5f7c0SLeon Romanovsky #define ALC5632_DAC_CLK_CTRL1			0x60
237*94d5f7c0SLeon Romanovsky #define ALC5632_DAC_CLK_CTRL2			0x62
238*94d5f7c0SLeon Romanovsky #define ALC5632_DAC_CLK_CTRL2_DIV1_2		(1 << 0)
239*94d5f7c0SLeon Romanovsky #define ALC5632_VOICE_DAC_PCM_CLK_CTRL1		0x64
240*94d5f7c0SLeon Romanovsky #define ALC5632_PSEUDO_SPATIAL_CTRL		0x68
241*94d5f7c0SLeon Romanovsky #define ALC5632_HID_CTRL_INDEX			0x6A
242*94d5f7c0SLeon Romanovsky #define ALC5632_HID_CTRL_DATA			0x6C
243*94d5f7c0SLeon Romanovsky #define ALC5632_EQ_CTRL				0x6E
244*94d5f7c0SLeon Romanovsky 
245*94d5f7c0SLeon Romanovsky /* undocumented */
246*94d5f7c0SLeon Romanovsky #define ALC5632_VENDOR_ID1			0x7C
247*94d5f7c0SLeon Romanovsky #define ALC5632_VENDOR_ID2			0x7E
248*94d5f7c0SLeon Romanovsky 
249*94d5f7c0SLeon Romanovsky #endif
250