1*af3acca3SDaniel Baluta /* SPDX-License-Identifier: GPL-2.0 2*af3acca3SDaniel Baluta * 392088477SDaniel Baluta * Audio driver header for AK5558 492088477SDaniel Baluta * 592088477SDaniel Baluta * Copyright (C) 2016 Asahi Kasei Microdevices Corporation 692088477SDaniel Baluta * Copyright 2018 NXP 792088477SDaniel Baluta */ 892088477SDaniel Baluta 992088477SDaniel Baluta #ifndef _AK5558_H 1092088477SDaniel Baluta #define _AK5558_H 1192088477SDaniel Baluta 1292088477SDaniel Baluta #define AK5558_00_POWER_MANAGEMENT1 0x00 1392088477SDaniel Baluta #define AK5558_01_POWER_MANAGEMENT2 0x01 1492088477SDaniel Baluta #define AK5558_02_CONTROL1 0x02 1592088477SDaniel Baluta #define AK5558_03_CONTROL2 0x03 1692088477SDaniel Baluta #define AK5558_04_CONTROL3 0x04 1792088477SDaniel Baluta #define AK5558_05_DSD 0x05 1892088477SDaniel Baluta 1992088477SDaniel Baluta /* AK5558_02_CONTROL1 fields */ 2092088477SDaniel Baluta #define AK5558_DIF GENMASK(1, 1) 2192088477SDaniel Baluta #define AK5558_DIF_MSB_MODE (0 << 1) 2292088477SDaniel Baluta #define AK5558_DIF_I2S_MODE (1 << 1) 2392088477SDaniel Baluta 2492088477SDaniel Baluta #define AK5558_BITS GENMASK(2, 2) 2592088477SDaniel Baluta #define AK5558_DIF_24BIT_MODE (0 << 2) 2692088477SDaniel Baluta #define AK5558_DIF_32BIT_MODE (1 << 2) 2792088477SDaniel Baluta 2892088477SDaniel Baluta #define AK5558_CKS GENMASK(6, 3) 2992088477SDaniel Baluta #define AK5558_CKS_128FS_192KHZ (0 << 3) 3092088477SDaniel Baluta #define AK5558_CKS_192FS_192KHZ (1 << 3) 3192088477SDaniel Baluta #define AK5558_CKS_256FS_48KHZ (2 << 3) 3292088477SDaniel Baluta #define AK5558_CKS_256FS_96KHZ (3 << 3) 3392088477SDaniel Baluta #define AK5558_CKS_384FS_96KHZ (4 << 3) 3492088477SDaniel Baluta #define AK5558_CKS_384FS_48KHZ (5 << 3) 3592088477SDaniel Baluta #define AK5558_CKS_512FS_48KHZ (6 << 3) 3692088477SDaniel Baluta #define AK5558_CKS_768FS_48KHZ (7 << 3) 3792088477SDaniel Baluta #define AK5558_CKS_64FS_384KHZ (8 << 3) 3892088477SDaniel Baluta #define AK5558_CKS_32FS_768KHZ (9 << 3) 3992088477SDaniel Baluta #define AK5558_CKS_96FS_384KHZ (10 << 3) 4092088477SDaniel Baluta #define AK5558_CKS_48FS_768KHZ (11 << 3) 4192088477SDaniel Baluta #define AK5558_CKS_64FS_768KHZ (12 << 3) 4292088477SDaniel Baluta #define AK5558_CKS_1024FS_16KHZ (13 << 3) 4392088477SDaniel Baluta #define AK5558_CKS_AUTO (15 << 3) 4492088477SDaniel Baluta 4592088477SDaniel Baluta /* AK5558_03_CONTROL2 fields */ 4692088477SDaniel Baluta #define AK5558_MODE_BITS GENMASK(6, 5) 4792088477SDaniel Baluta #define AK5558_MODE_NORMAL (0 << 5) 4892088477SDaniel Baluta #define AK5558_MODE_TDM128 (1 << 5) 4992088477SDaniel Baluta #define AK5558_MODE_TDM256 (2 << 5) 5092088477SDaniel Baluta #define AK5558_MODE_TDM512 (3 << 5) 5192088477SDaniel Baluta 5292088477SDaniel Baluta #endif 53