xref: /linux/sound/soc/codecs/ak4458.c (revision f4738f56d1dc62aaba69b33702a5ab098f1b8c63)
1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // Audio driver for AK4458 DAC
4 //
5 // Copyright (C) 2016 Asahi Kasei Microdevices Corporation
6 // Copyright 2018 NXP
7 
8 #include <linux/delay.h>
9 #include <linux/gpio/consumer.h>
10 #include <linux/i2c.h>
11 #include <linux/module.h>
12 #include <linux/of_device.h>
13 #include <linux/of_gpio.h>
14 #include <linux/pm_runtime.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/reset.h>
17 #include <linux/slab.h>
18 #include <sound/initval.h>
19 #include <sound/pcm_params.h>
20 #include <sound/soc.h>
21 #include <sound/soc-dapm.h>
22 #include <sound/tlv.h>
23 
24 #include "ak4458.h"
25 
26 #define AK4458_NUM_SUPPLIES 2
27 static const char *ak4458_supply_names[AK4458_NUM_SUPPLIES] = {
28 	"DVDD",
29 	"AVDD",
30 };
31 
32 enum ak4458_type {
33 	AK4458 = 0,
34 	AK4497 = 1,
35 };
36 
37 struct ak4458_drvdata {
38 	struct snd_soc_dai_driver *dai_drv;
39 	const struct snd_soc_component_driver *comp_drv;
40 	enum ak4458_type type;
41 };
42 
43 /* AK4458 Codec Private Data */
44 struct ak4458_priv {
45 	struct regulator_bulk_data supplies[AK4458_NUM_SUPPLIES];
46 	const struct ak4458_drvdata *drvdata;
47 	struct device *dev;
48 	struct regmap *regmap;
49 	struct gpio_desc *reset_gpiod;
50 	struct reset_control *reset;
51 	struct gpio_desc *mute_gpiod;
52 	int digfil;	/* SSLOW, SD, SLOW bits */
53 	int fs;		/* sampling rate */
54 	int fmt;
55 	int slots;
56 	int slot_width;
57 	u32 dsd_path;    /* For ak4497 */
58 };
59 
60 static const struct reg_default ak4458_reg_defaults[] = {
61 	{ 0x00, 0x0C },	/*	0x00	AK4458_00_CONTROL1	*/
62 	{ 0x01, 0x22 },	/*	0x01	AK4458_01_CONTROL2	*/
63 	{ 0x02, 0x00 },	/*	0x02	AK4458_02_CONTROL3	*/
64 	{ 0x03, 0xFF },	/*	0x03	AK4458_03_LCHATT	*/
65 	{ 0x04, 0xFF },	/*	0x04	AK4458_04_RCHATT	*/
66 	{ 0x05, 0x00 },	/*	0x05	AK4458_05_CONTROL4	*/
67 	{ 0x06, 0x00 },	/*	0x06	AK4458_06_DSD1		*/
68 	{ 0x07, 0x03 },	/*	0x07	AK4458_07_CONTROL5	*/
69 	{ 0x08, 0x00 },	/*	0x08	AK4458_08_SOUND_CONTROL	*/
70 	{ 0x09, 0x00 },	/*	0x09	AK4458_09_DSD2		*/
71 	{ 0x0A, 0x0D },	/*	0x0A	AK4458_0A_CONTROL6	*/
72 	{ 0x0B, 0x0C },	/*	0x0B	AK4458_0B_CONTROL7	*/
73 	{ 0x0C, 0x00 },	/*	0x0C	AK4458_0C_CONTROL8	*/
74 	{ 0x0D, 0x00 },	/*	0x0D	AK4458_0D_CONTROL9	*/
75 	{ 0x0E, 0x50 },	/*	0x0E	AK4458_0E_CONTROL10	*/
76 	{ 0x0F, 0xFF },	/*	0x0F	AK4458_0F_L2CHATT	*/
77 	{ 0x10, 0xFF },	/*	0x10	AK4458_10_R2CHATT	*/
78 	{ 0x11, 0xFF },	/*	0x11	AK4458_11_L3CHATT	*/
79 	{ 0x12, 0xFF },	/*	0x12	AK4458_12_R3CHATT	*/
80 	{ 0x13, 0xFF },	/*	0x13	AK4458_13_L4CHATT	*/
81 	{ 0x14, 0xFF },	/*	0x14	AK4458_14_R4CHATT	*/
82 };
83 
84 /*
85  * Volume control:
86  * from -127 to 0 dB in 0.5 dB steps (mute instead of -127.5 dB)
87  */
88 static DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
89 
90 /*
91  * DEM1 bit DEM0 bit Mode
92  * 0 0 44.1kHz
93  * 0 1 OFF (default)
94  * 1 0 48kHz
95  * 1 1 32kHz
96  */
97 static const char * const ak4458_dem_select_texts[] = {
98 	"44.1kHz", "OFF", "48kHz", "32kHz"
99 };
100 
101 /*
102  * SSLOW, SD, SLOW bits Digital Filter Setting
103  * 0, 0, 0 : Sharp Roll-Off Filter
104  * 0, 0, 1 : Slow Roll-Off Filter
105  * 0, 1, 0 : Short delay Sharp Roll-Off Filter
106  * 0, 1, 1 : Short delay Slow Roll-Off Filter
107  * 1, *, * : Super Slow Roll-Off Filter
108  */
109 static const char * const ak4458_digfil_select_texts[] = {
110 	"Sharp Roll-Off Filter",
111 	"Slow Roll-Off Filter",
112 	"Short delay Sharp Roll-Off Filter",
113 	"Short delay Slow Roll-Off Filter",
114 	"Super Slow Roll-Off Filter"
115 };
116 
117 /*
118  * DZFB: Inverting Enable of DZF
119  * 0: DZF goes H at Zero Detection
120  * 1: DZF goes L at Zero Detection
121  */
122 static const char * const ak4458_dzfb_select_texts[] = {"H", "L"};
123 
124 /*
125  * SC1-0 bits: Sound Mode Setting
126  * 0 0 : Sound Mode 0
127  * 0 1 : Sound Mode 1
128  * 1 0 : Sound Mode 2
129  * 1 1 : Reserved
130  */
131 static const char * const ak4458_sc_select_texts[] = {
132 	"Sound Mode 0", "Sound Mode 1", "Sound Mode 2"
133 };
134 
135 /* FIR2-0 bits: FIR Filter Mode Setting */
136 static const char * const ak4458_fir_select_texts[] = {
137 	"Mode 0", "Mode 1", "Mode 2", "Mode 3",
138 	"Mode 4", "Mode 5", "Mode 6", "Mode 7",
139 };
140 
141 /* ATS1-0 bits Attenuation Speed */
142 static const char * const ak4458_ats_select_texts[] = {
143 	"4080/fs", "2040/fs", "510/fs", "255/fs",
144 };
145 
146 /* DIF2 bit Audio Interface Format Setting(BICK fs) */
147 static const char * const ak4458_dif_select_texts[] = {"32fs,48fs", "64fs",};
148 
149 static const struct soc_enum ak4458_dac1_dem_enum =
150 	SOC_ENUM_SINGLE(AK4458_01_CONTROL2, 1,
151 			ARRAY_SIZE(ak4458_dem_select_texts),
152 			ak4458_dem_select_texts);
153 static const struct soc_enum ak4458_dac2_dem_enum =
154 	SOC_ENUM_SINGLE(AK4458_0A_CONTROL6, 0,
155 			ARRAY_SIZE(ak4458_dem_select_texts),
156 			ak4458_dem_select_texts);
157 static const struct soc_enum ak4458_dac3_dem_enum =
158 	SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 4,
159 			ARRAY_SIZE(ak4458_dem_select_texts),
160 			ak4458_dem_select_texts);
161 static const struct soc_enum ak4458_dac4_dem_enum =
162 	SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 6,
163 			ARRAY_SIZE(ak4458_dem_select_texts),
164 			ak4458_dem_select_texts);
165 static const struct soc_enum ak4458_digfil_enum =
166 	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(ak4458_digfil_select_texts),
167 			    ak4458_digfil_select_texts);
168 static const struct soc_enum ak4458_dzfb_enum =
169 	SOC_ENUM_SINGLE(AK4458_02_CONTROL3, 2,
170 			ARRAY_SIZE(ak4458_dzfb_select_texts),
171 			ak4458_dzfb_select_texts);
172 static const struct soc_enum ak4458_sm_enum =
173 	SOC_ENUM_SINGLE(AK4458_08_SOUND_CONTROL, 0,
174 			ARRAY_SIZE(ak4458_sc_select_texts),
175 			ak4458_sc_select_texts);
176 static const struct soc_enum ak4458_fir_enum =
177 	SOC_ENUM_SINGLE(AK4458_0C_CONTROL8, 0,
178 			ARRAY_SIZE(ak4458_fir_select_texts),
179 			ak4458_fir_select_texts);
180 static const struct soc_enum ak4458_ats_enum =
181 	SOC_ENUM_SINGLE(AK4458_0B_CONTROL7, 6,
182 			ARRAY_SIZE(ak4458_ats_select_texts),
183 			ak4458_ats_select_texts);
184 static const struct soc_enum ak4458_dif_enum =
185 	SOC_ENUM_SINGLE(AK4458_00_CONTROL1, 3,
186 			ARRAY_SIZE(ak4458_dif_select_texts),
187 			ak4458_dif_select_texts);
188 
189 static int get_digfil(struct snd_kcontrol *kcontrol,
190 		      struct snd_ctl_elem_value *ucontrol)
191 {
192 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
193 	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
194 
195 	ucontrol->value.enumerated.item[0] = ak4458->digfil;
196 
197 	return 0;
198 }
199 
200 static int set_digfil(struct snd_kcontrol *kcontrol,
201 		      struct snd_ctl_elem_value *ucontrol)
202 {
203 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
204 	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
205 	int num;
206 
207 	num = ucontrol->value.enumerated.item[0];
208 	if (num > 4)
209 		return -EINVAL;
210 
211 	ak4458->digfil = num;
212 
213 	/* write SD bit */
214 	snd_soc_component_update_bits(component, AK4458_01_CONTROL2,
215 			    AK4458_SD_MASK,
216 			    ((ak4458->digfil & 0x02) << 4));
217 
218 	/* write SLOW bit */
219 	snd_soc_component_update_bits(component, AK4458_02_CONTROL3,
220 			    AK4458_SLOW_MASK,
221 			    (ak4458->digfil & 0x01));
222 
223 	/* write SSLOW bit */
224 	snd_soc_component_update_bits(component, AK4458_05_CONTROL4,
225 			    AK4458_SSLOW_MASK,
226 			    ((ak4458->digfil & 0x04) >> 2));
227 
228 	return 0;
229 }
230 
231 static const struct snd_kcontrol_new ak4458_snd_controls[] = {
232 	SOC_DOUBLE_R_TLV("DAC1 Playback Volume", AK4458_03_LCHATT,
233 			 AK4458_04_RCHATT, 0, 0xFF, 0, dac_tlv),
234 	SOC_DOUBLE_R_TLV("DAC2 Playback Volume", AK4458_0F_L2CHATT,
235 			 AK4458_10_R2CHATT, 0, 0xFF, 0, dac_tlv),
236 	SOC_DOUBLE_R_TLV("DAC3 Playback Volume", AK4458_11_L3CHATT,
237 			 AK4458_12_R3CHATT, 0, 0xFF, 0, dac_tlv),
238 	SOC_DOUBLE_R_TLV("DAC4 Playback Volume", AK4458_13_L4CHATT,
239 			 AK4458_14_R4CHATT, 0, 0xFF, 0, dac_tlv),
240 	SOC_ENUM("AK4458 De-emphasis Response DAC1", ak4458_dac1_dem_enum),
241 	SOC_ENUM("AK4458 De-emphasis Response DAC2", ak4458_dac2_dem_enum),
242 	SOC_ENUM("AK4458 De-emphasis Response DAC3", ak4458_dac3_dem_enum),
243 	SOC_ENUM("AK4458 De-emphasis Response DAC4", ak4458_dac4_dem_enum),
244 	SOC_ENUM_EXT("AK4458 Digital Filter Setting", ak4458_digfil_enum,
245 		     get_digfil, set_digfil),
246 	SOC_ENUM("AK4458 Inverting Enable of DZFB", ak4458_dzfb_enum),
247 	SOC_ENUM("AK4458 Sound Mode", ak4458_sm_enum),
248 	SOC_ENUM("AK4458 FIR Filter Mode Setting", ak4458_fir_enum),
249 	SOC_ENUM("AK4458 Attenuation transition Time Setting",
250 		 ak4458_ats_enum),
251 	SOC_ENUM("AK4458 BICK fs Setting", ak4458_dif_enum),
252 };
253 
254 /* ak4458 dapm widgets */
255 static const struct snd_soc_dapm_widget ak4458_dapm_widgets[] = {
256 	SND_SOC_DAPM_DAC("AK4458 DAC1", NULL, AK4458_0A_CONTROL6, 2, 0),/*pw*/
257 	SND_SOC_DAPM_AIF_IN("AK4458 SDTI", "Playback", 0, SND_SOC_NOPM, 0, 0),
258 	SND_SOC_DAPM_OUTPUT("AK4458 AOUTA"),
259 
260 	SND_SOC_DAPM_DAC("AK4458 DAC2", NULL, AK4458_0A_CONTROL6, 3, 0),/*pw*/
261 	SND_SOC_DAPM_OUTPUT("AK4458 AOUTB"),
262 
263 	SND_SOC_DAPM_DAC("AK4458 DAC3", NULL, AK4458_0B_CONTROL7, 2, 0),/*pw*/
264 	SND_SOC_DAPM_OUTPUT("AK4458 AOUTC"),
265 
266 	SND_SOC_DAPM_DAC("AK4458 DAC4", NULL, AK4458_0B_CONTROL7, 3, 0),/*pw*/
267 	SND_SOC_DAPM_OUTPUT("AK4458 AOUTD"),
268 };
269 
270 static const struct snd_soc_dapm_route ak4458_intercon[] = {
271 	{"AK4458 DAC1",		NULL,	"AK4458 SDTI"},
272 	{"AK4458 AOUTA",	NULL,	"AK4458 DAC1"},
273 
274 	{"AK4458 DAC2",		NULL,	"AK4458 SDTI"},
275 	{"AK4458 AOUTB",	NULL,	"AK4458 DAC2"},
276 
277 	{"AK4458 DAC3",		NULL,	"AK4458 SDTI"},
278 	{"AK4458 AOUTC",	NULL,	"AK4458 DAC3"},
279 
280 	{"AK4458 DAC4",		NULL,	"AK4458 SDTI"},
281 	{"AK4458 AOUTD",	NULL,	"AK4458 DAC4"},
282 };
283 
284 /* ak4497 controls */
285 static const struct snd_kcontrol_new ak4497_snd_controls[] = {
286 	SOC_DOUBLE_R_TLV("DAC Playback Volume", AK4458_03_LCHATT,
287 			 AK4458_04_RCHATT, 0, 0xFF, 0, dac_tlv),
288 	SOC_ENUM("AK4497 De-emphasis Response DAC", ak4458_dac1_dem_enum),
289 	SOC_ENUM_EXT("AK4497 Digital Filter Setting", ak4458_digfil_enum,
290 		     get_digfil, set_digfil),
291 	SOC_ENUM("AK4497 Inverting Enable of DZFB", ak4458_dzfb_enum),
292 	SOC_ENUM("AK4497 Sound Mode", ak4458_sm_enum),
293 	SOC_ENUM("AK4497 Attenuation transition Time Setting",
294 		 ak4458_ats_enum),
295 };
296 
297 /* ak4497 dapm widgets */
298 static const struct snd_soc_dapm_widget ak4497_dapm_widgets[] = {
299 	SND_SOC_DAPM_DAC("AK4497 DAC", NULL, AK4458_0A_CONTROL6, 2, 0),
300 	SND_SOC_DAPM_AIF_IN("AK4497 SDTI", "Playback", 0, SND_SOC_NOPM, 0, 0),
301 	SND_SOC_DAPM_OUTPUT("AK4497 AOUT"),
302 };
303 
304 /* ak4497 dapm routes */
305 static const struct snd_soc_dapm_route ak4497_intercon[] = {
306 	{"AK4497 DAC",		NULL,	"AK4497 SDTI"},
307 	{"AK4497 AOUT",		NULL,	"AK4497 DAC"},
308 
309 };
310 
311 static int ak4458_get_tdm_mode(struct ak4458_priv *ak4458)
312 {
313 	switch (ak4458->slots * ak4458->slot_width) {
314 	case 128:
315 		return 1;
316 	case 256:
317 		return 2;
318 	case 512:
319 		return 3;
320 	default:
321 		return 0;
322 	}
323 }
324 
325 static int ak4458_rstn_control(struct snd_soc_component *component, int bit)
326 {
327 	int ret;
328 
329 	if (bit)
330 		ret = snd_soc_component_update_bits(component,
331 					  AK4458_00_CONTROL1,
332 					  AK4458_RSTN_MASK,
333 					  0x1);
334 	else
335 		ret = snd_soc_component_update_bits(component,
336 					  AK4458_00_CONTROL1,
337 					  AK4458_RSTN_MASK,
338 					  0x0);
339 	if (ret < 0)
340 		return ret;
341 
342 	return 0;
343 }
344 
345 static int ak4458_hw_params(struct snd_pcm_substream *substream,
346 			    struct snd_pcm_hw_params *params,
347 			    struct snd_soc_dai *dai)
348 {
349 	struct snd_soc_component *component = dai->component;
350 	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
351 	int pcm_width = max(params_physical_width(params), ak4458->slot_width);
352 	u8 format, dsdsel0, dsdsel1, dchn;
353 	int nfs1, dsd_bclk, ret, channels, channels_max;
354 
355 	nfs1 = params_rate(params);
356 	ak4458->fs = nfs1;
357 
358 	/* calculate bit clock */
359 	channels = params_channels(params);
360 	channels_max = dai->driver->playback.channels_max;
361 
362 	switch (params_format(params)) {
363 	case SNDRV_PCM_FORMAT_DSD_U8:
364 	case SNDRV_PCM_FORMAT_DSD_U16_LE:
365 	case SNDRV_PCM_FORMAT_DSD_U16_BE:
366 	case SNDRV_PCM_FORMAT_DSD_U32_LE:
367 	case SNDRV_PCM_FORMAT_DSD_U32_BE:
368 		dsd_bclk = nfs1 * params_physical_width(params);
369 		switch (dsd_bclk) {
370 		case 2822400:
371 			dsdsel0 = 0;
372 			dsdsel1 = 0;
373 			break;
374 		case 5644800:
375 			dsdsel0 = 1;
376 			dsdsel1 = 0;
377 			break;
378 		case 11289600:
379 			dsdsel0 = 0;
380 			dsdsel1 = 1;
381 			break;
382 		case 22579200:
383 			if (ak4458->drvdata->type == AK4497) {
384 				dsdsel0 = 1;
385 				dsdsel1 = 1;
386 			} else {
387 				dev_err(dai->dev, "DSD512 not supported.\n");
388 				return -EINVAL;
389 			}
390 			break;
391 		default:
392 			dev_err(dai->dev, "Unsupported dsd bclk.\n");
393 			return -EINVAL;
394 		}
395 
396 		snd_soc_component_update_bits(component, AK4458_06_DSD1,
397 					      AK4458_DSDSEL_MASK, dsdsel0);
398 		snd_soc_component_update_bits(component, AK4458_09_DSD2,
399 					      AK4458_DSDSEL_MASK, dsdsel1);
400 		break;
401 	}
402 
403 	/* Master Clock Frequency Auto Setting Mode Enable */
404 	snd_soc_component_update_bits(component, AK4458_00_CONTROL1, 0x80, 0x80);
405 
406 	switch (pcm_width) {
407 	case 16:
408 		if (ak4458->fmt == SND_SOC_DAIFMT_I2S)
409 			format = AK4458_DIF_24BIT_I2S;
410 		else
411 			format = AK4458_DIF_16BIT_LSB;
412 		break;
413 	case 32:
414 		switch (ak4458->fmt) {
415 		case SND_SOC_DAIFMT_I2S:
416 			format = AK4458_DIF_32BIT_I2S;
417 			break;
418 		case SND_SOC_DAIFMT_LEFT_J:
419 			format = AK4458_DIF_32BIT_MSB;
420 			break;
421 		case SND_SOC_DAIFMT_RIGHT_J:
422 			format = AK4458_DIF_32BIT_LSB;
423 			break;
424 		case SND_SOC_DAIFMT_DSP_B:
425 			format = AK4458_DIF_32BIT_MSB;
426 			break;
427 		case SND_SOC_DAIFMT_PDM:
428 			format = AK4458_DIF_32BIT_MSB;
429 			break;
430 		default:
431 			return -EINVAL;
432 		}
433 		break;
434 	default:
435 		return -EINVAL;
436 	}
437 
438 	snd_soc_component_update_bits(component, AK4458_00_CONTROL1,
439 			    AK4458_DIF_MASK, format);
440 
441 	/*
442 	 * Enable/disable Daisy Chain if in TDM mode and the number of played
443 	 * channels is bigger than the maximum supported number of channels
444 	 */
445 	dchn = ak4458_get_tdm_mode(ak4458) &&
446 		(ak4458->fmt == SND_SOC_DAIFMT_DSP_B) &&
447 		(channels > channels_max) ? AK4458_DCHAIN_MASK : 0;
448 
449 	snd_soc_component_update_bits(component, AK4458_0B_CONTROL7,
450 				      AK4458_DCHAIN_MASK, dchn);
451 
452 	if (ak4458->drvdata->type == AK4497) {
453 		ret = snd_soc_component_update_bits(component, AK4458_09_DSD2,
454 						    0x4, (ak4458->dsd_path << 2));
455 		if (ret < 0)
456 			return ret;
457 	}
458 
459 	ret = ak4458_rstn_control(component, 0);
460 	if (ret)
461 		return ret;
462 
463 	ret = ak4458_rstn_control(component, 1);
464 	if (ret)
465 		return ret;
466 
467 	return 0;
468 }
469 
470 static int ak4458_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
471 {
472 	struct snd_soc_component *component = dai->component;
473 	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
474 	int ret;
475 
476 	switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
477 	case SND_SOC_DAIFMT_CBC_CFC: /* Consumer Mode */
478 		break;
479 	case SND_SOC_DAIFMT_CBP_CFP: /* Provider Mode is not supported */
480 	case SND_SOC_DAIFMT_CBC_CFP:
481 	case SND_SOC_DAIFMT_CBP_CFC:
482 	default:
483 		dev_err(component->dev, "Clock provider mode unsupported\n");
484 		return -EINVAL;
485 	}
486 
487 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
488 	case SND_SOC_DAIFMT_I2S:
489 	case SND_SOC_DAIFMT_LEFT_J:
490 	case SND_SOC_DAIFMT_RIGHT_J:
491 	case SND_SOC_DAIFMT_DSP_B:
492 	case SND_SOC_DAIFMT_PDM:
493 		ak4458->fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
494 		break;
495 	default:
496 		dev_err(component->dev, "Audio format 0x%02X unsupported\n",
497 			fmt & SND_SOC_DAIFMT_FORMAT_MASK);
498 		return -EINVAL;
499 	}
500 
501 	/* DSD mode */
502 	snd_soc_component_update_bits(component, AK4458_02_CONTROL3,
503 				      AK4458_DP_MASK,
504 				      ak4458->fmt == SND_SOC_DAIFMT_PDM ?
505 				      AK4458_DP_MASK : 0);
506 
507 	ret = ak4458_rstn_control(component, 0);
508 	if (ret)
509 		return ret;
510 
511 	ret = ak4458_rstn_control(component, 1);
512 	if (ret)
513 		return ret;
514 
515 	return 0;
516 }
517 
518 static const int att_speed[] = { 4080, 2040, 510, 255 };
519 
520 static int ak4458_set_dai_mute(struct snd_soc_dai *dai, int mute, int direction)
521 {
522 	struct snd_soc_component *component = dai->component;
523 	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
524 	int nfs, ndt, reg;
525 	int ats;
526 
527 	nfs = ak4458->fs;
528 
529 	reg = snd_soc_component_read(component, AK4458_0B_CONTROL7);
530 	ats = (reg & AK4458_ATS_MASK) >> AK4458_ATS_SHIFT;
531 
532 	ndt = att_speed[ats] / (nfs / 1000);
533 
534 	if (mute) {
535 		snd_soc_component_update_bits(component, AK4458_01_CONTROL2,  0x01, 1);
536 		mdelay(ndt);
537 		if (ak4458->mute_gpiod)
538 			gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
539 	} else {
540 		if (ak4458->mute_gpiod)
541 			gpiod_set_value_cansleep(ak4458->mute_gpiod, 0);
542 		snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 0);
543 		mdelay(ndt);
544 	}
545 
546 	return 0;
547 }
548 
549 static int ak4458_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
550 			       unsigned int rx_mask, int slots, int slot_width)
551 {
552 	struct snd_soc_component *component = dai->component;
553 	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
554 	int mode;
555 
556 	ak4458->slots = slots;
557 	ak4458->slot_width = slot_width;
558 
559 	mode = ak4458_get_tdm_mode(ak4458) << AK4458_MODE_SHIFT;
560 
561 	snd_soc_component_update_bits(component, AK4458_0A_CONTROL6,
562 			    AK4458_MODE_MASK,
563 			    mode);
564 
565 	return 0;
566 }
567 
568 #define AK4458_FORMATS	(SNDRV_PCM_FMTBIT_S16_LE |\
569 			 SNDRV_PCM_FMTBIT_S24_LE |\
570 			 SNDRV_PCM_FMTBIT_S32_LE |\
571 			 SNDRV_PCM_FMTBIT_DSD_U8 |\
572 			 SNDRV_PCM_FMTBIT_DSD_U16_LE |\
573 			 SNDRV_PCM_FMTBIT_DSD_U32_LE)
574 
575 static const unsigned int ak4458_rates[] = {
576 	8000, 11025,  16000, 22050,
577 	32000, 44100, 48000, 88200,
578 	96000, 176400, 192000, 352800,
579 	384000, 705600, 768000, 1411200,
580 	2822400,
581 };
582 
583 static const struct snd_pcm_hw_constraint_list ak4458_rate_constraints = {
584 	.count = ARRAY_SIZE(ak4458_rates),
585 	.list = ak4458_rates,
586 };
587 
588 static int ak4458_startup(struct snd_pcm_substream *substream,
589 			  struct snd_soc_dai *dai)
590 {
591 	int ret;
592 
593 	ret = snd_pcm_hw_constraint_list(substream->runtime, 0,
594 					 SNDRV_PCM_HW_PARAM_RATE,
595 					 &ak4458_rate_constraints);
596 
597 	return ret;
598 }
599 
600 static const struct snd_soc_dai_ops ak4458_dai_ops = {
601 	.startup        = ak4458_startup,
602 	.hw_params	= ak4458_hw_params,
603 	.set_fmt	= ak4458_set_dai_fmt,
604 	.mute_stream	= ak4458_set_dai_mute,
605 	.set_tdm_slot	= ak4458_set_tdm_slot,
606 	.no_capture_mute = 1,
607 };
608 
609 static struct snd_soc_dai_driver ak4458_dai = {
610 	.name = "ak4458-aif",
611 	.playback = {
612 		.stream_name = "Playback",
613 		.channels_min = 1,
614 		.channels_max = 8,
615 		.rates = SNDRV_PCM_RATE_KNOT,
616 		.formats = AK4458_FORMATS,
617 	},
618 	.ops = &ak4458_dai_ops,
619 };
620 
621 static struct snd_soc_dai_driver ak4497_dai = {
622 	.name = "ak4497-aif",
623 	.playback = {
624 		.stream_name = "Playback",
625 		.channels_min = 1,
626 		.channels_max = 2,
627 		.rates = SNDRV_PCM_RATE_KNOT,
628 		.formats = AK4458_FORMATS,
629 	},
630 	.ops = &ak4458_dai_ops,
631 };
632 
633 static void ak4458_reset(struct ak4458_priv *ak4458, bool active)
634 {
635 	if (ak4458->reset_gpiod) {
636 		gpiod_set_value_cansleep(ak4458->reset_gpiod, active);
637 		usleep_range(1000, 2000);
638 	} else if (!IS_ERR_OR_NULL(ak4458->reset)) {
639 		if (active)
640 			reset_control_assert(ak4458->reset);
641 		else
642 			reset_control_deassert(ak4458->reset);
643 		usleep_range(1000, 2000);
644 	}
645 }
646 
647 #ifdef CONFIG_PM
648 static int __maybe_unused ak4458_runtime_suspend(struct device *dev)
649 {
650 	struct ak4458_priv *ak4458 = dev_get_drvdata(dev);
651 
652 	regcache_cache_only(ak4458->regmap, true);
653 
654 	ak4458_reset(ak4458, true);
655 
656 	if (ak4458->mute_gpiod)
657 		gpiod_set_value_cansleep(ak4458->mute_gpiod, 0);
658 
659 	regulator_bulk_disable(ARRAY_SIZE(ak4458->supplies),
660 			       ak4458->supplies);
661 	return 0;
662 }
663 
664 static int __maybe_unused ak4458_runtime_resume(struct device *dev)
665 {
666 	struct ak4458_priv *ak4458 = dev_get_drvdata(dev);
667 	int ret;
668 
669 	ret = regulator_bulk_enable(ARRAY_SIZE(ak4458->supplies),
670 				    ak4458->supplies);
671 	if (ret != 0) {
672 		dev_err(ak4458->dev, "Failed to enable supplies: %d\n", ret);
673 		return ret;
674 	}
675 
676 	if (ak4458->mute_gpiod)
677 		gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
678 
679 	ak4458_reset(ak4458, false);
680 
681 	regcache_cache_only(ak4458->regmap, false);
682 	regcache_mark_dirty(ak4458->regmap);
683 
684 	return regcache_sync(ak4458->regmap);
685 }
686 #endif /* CONFIG_PM */
687 
688 static const struct snd_soc_component_driver soc_codec_dev_ak4458 = {
689 	.controls		= ak4458_snd_controls,
690 	.num_controls		= ARRAY_SIZE(ak4458_snd_controls),
691 	.dapm_widgets		= ak4458_dapm_widgets,
692 	.num_dapm_widgets	= ARRAY_SIZE(ak4458_dapm_widgets),
693 	.dapm_routes		= ak4458_intercon,
694 	.num_dapm_routes	= ARRAY_SIZE(ak4458_intercon),
695 	.idle_bias_on		= 1,
696 	.use_pmdown_time	= 1,
697 	.endianness		= 1,
698 };
699 
700 static const struct snd_soc_component_driver soc_codec_dev_ak4497 = {
701 	.controls		= ak4497_snd_controls,
702 	.num_controls		= ARRAY_SIZE(ak4497_snd_controls),
703 	.dapm_widgets		= ak4497_dapm_widgets,
704 	.num_dapm_widgets	= ARRAY_SIZE(ak4497_dapm_widgets),
705 	.dapm_routes		= ak4497_intercon,
706 	.num_dapm_routes	= ARRAY_SIZE(ak4497_intercon),
707 	.idle_bias_on		= 1,
708 	.use_pmdown_time	= 1,
709 	.endianness		= 1,
710 };
711 
712 static const struct regmap_config ak4458_regmap = {
713 	.reg_bits = 8,
714 	.val_bits = 8,
715 
716 	.max_register = AK4458_14_R4CHATT,
717 	.reg_defaults = ak4458_reg_defaults,
718 	.num_reg_defaults = ARRAY_SIZE(ak4458_reg_defaults),
719 	.cache_type = REGCACHE_RBTREE,
720 };
721 
722 static const struct ak4458_drvdata ak4458_drvdata = {
723 	.dai_drv = &ak4458_dai,
724 	.comp_drv = &soc_codec_dev_ak4458,
725 	.type = AK4458,
726 };
727 
728 static const struct ak4458_drvdata ak4497_drvdata = {
729 	.dai_drv = &ak4497_dai,
730 	.comp_drv = &soc_codec_dev_ak4497,
731 	.type = AK4497,
732 };
733 
734 static const struct dev_pm_ops ak4458_pm = {
735 	SET_RUNTIME_PM_OPS(ak4458_runtime_suspend, ak4458_runtime_resume, NULL)
736 	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
737 				pm_runtime_force_resume)
738 };
739 
740 static int ak4458_i2c_probe(struct i2c_client *i2c)
741 {
742 	struct ak4458_priv *ak4458;
743 	int ret, i;
744 
745 	ak4458 = devm_kzalloc(&i2c->dev, sizeof(*ak4458), GFP_KERNEL);
746 	if (!ak4458)
747 		return -ENOMEM;
748 
749 	ak4458->regmap = devm_regmap_init_i2c(i2c, &ak4458_regmap);
750 	if (IS_ERR(ak4458->regmap))
751 		return PTR_ERR(ak4458->regmap);
752 
753 	i2c_set_clientdata(i2c, ak4458);
754 	ak4458->dev = &i2c->dev;
755 
756 	ak4458->drvdata = of_device_get_match_data(&i2c->dev);
757 
758 	ak4458->reset = devm_reset_control_get_optional_shared(ak4458->dev, NULL);
759 	if (IS_ERR(ak4458->reset))
760 		return PTR_ERR(ak4458->reset);
761 
762 	ak4458->reset_gpiod = devm_gpiod_get_optional(ak4458->dev, "reset",
763 						      GPIOD_OUT_LOW);
764 	if (IS_ERR(ak4458->reset_gpiod))
765 		return PTR_ERR(ak4458->reset_gpiod);
766 
767 	ak4458->mute_gpiod = devm_gpiod_get_optional(ak4458->dev, "mute",
768 						     GPIOD_OUT_LOW);
769 	if (IS_ERR(ak4458->mute_gpiod))
770 		return PTR_ERR(ak4458->mute_gpiod);
771 
772 	/* Optional property for ak4497 */
773 	of_property_read_u32(i2c->dev.of_node, "dsd-path", &ak4458->dsd_path);
774 
775 	for (i = 0; i < ARRAY_SIZE(ak4458->supplies); i++)
776 		ak4458->supplies[i].supply = ak4458_supply_names[i];
777 
778 	ret = devm_regulator_bulk_get(ak4458->dev, ARRAY_SIZE(ak4458->supplies),
779 				      ak4458->supplies);
780 	if (ret != 0) {
781 		dev_err(ak4458->dev, "Failed to request supplies: %d\n", ret);
782 		return ret;
783 	}
784 
785 	ret = devm_snd_soc_register_component(ak4458->dev,
786 					      ak4458->drvdata->comp_drv,
787 					      ak4458->drvdata->dai_drv, 1);
788 	if (ret < 0) {
789 		dev_err(ak4458->dev, "Failed to register CODEC: %d\n", ret);
790 		return ret;
791 	}
792 
793 	pm_runtime_enable(&i2c->dev);
794 	regcache_cache_only(ak4458->regmap, true);
795 	ak4458_reset(ak4458, false);
796 
797 	return 0;
798 }
799 
800 static void ak4458_i2c_remove(struct i2c_client *i2c)
801 {
802 	struct ak4458_priv *ak4458 = i2c_get_clientdata(i2c);
803 
804 	ak4458_reset(ak4458, true);
805 	pm_runtime_disable(&i2c->dev);
806 }
807 
808 static const struct of_device_id ak4458_of_match[] = {
809 	{ .compatible = "asahi-kasei,ak4458", .data = &ak4458_drvdata},
810 	{ .compatible = "asahi-kasei,ak4497", .data = &ak4497_drvdata},
811 	{ },
812 };
813 MODULE_DEVICE_TABLE(of, ak4458_of_match);
814 
815 static struct i2c_driver ak4458_i2c_driver = {
816 	.driver = {
817 		.name = "ak4458",
818 		.pm = &ak4458_pm,
819 		.of_match_table = ak4458_of_match,
820 		},
821 	.probe = ak4458_i2c_probe,
822 	.remove = ak4458_i2c_remove,
823 };
824 
825 module_i2c_driver(ak4458_i2c_driver);
826 
827 MODULE_AUTHOR("Junichi Wakasugi <wakasugi.jb@om.asahi-kasei.co.jp>");
828 MODULE_AUTHOR("Mihai Serban <mihai.serban@nxp.com>");
829 MODULE_DESCRIPTION("ASoC AK4458 DAC driver");
830 MODULE_LICENSE("GPL v2");
831