xref: /linux/sound/soc/codecs/ak4118.c (revision 87c9c16317882dd6dbbc07e349bc3223e14f3244)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * ak4118.c  --  Asahi Kasei ALSA Soc Audio driver
4  *
5  * Copyright 2018 DEVIALET
6  */
7 
8 #include <linux/i2c.h>
9 #include <linux/gpio/consumer.h>
10 #include <linux/module.h>
11 #include <linux/of_device.h>
12 #include <linux/of_gpio.h>
13 #include <linux/regmap.h>
14 #include <linux/slab.h>
15 
16 #include <sound/asoundef.h>
17 #include <sound/core.h>
18 #include <sound/initval.h>
19 #include <sound/soc.h>
20 
21 #define AK4118_REG_CLK_PWR_CTL		0x00
22 #define AK4118_REG_FORMAT_CTL		0x01
23 #define AK4118_REG_IO_CTL0		0x02
24 #define AK4118_REG_IO_CTL1		0x03
25 #define AK4118_REG_INT0_MASK		0x04
26 #define AK4118_REG_INT1_MASK		0x05
27 #define AK4118_REG_RCV_STATUS0		0x06
28 #define AK4118_REG_RCV_STATUS1		0x07
29 #define AK4118_REG_RXCHAN_STATUS0	0x08
30 #define AK4118_REG_RXCHAN_STATUS1	0x09
31 #define AK4118_REG_RXCHAN_STATUS2	0x0a
32 #define AK4118_REG_RXCHAN_STATUS3	0x0b
33 #define AK4118_REG_RXCHAN_STATUS4	0x0c
34 #define AK4118_REG_TXCHAN_STATUS0	0x0d
35 #define AK4118_REG_TXCHAN_STATUS1	0x0e
36 #define AK4118_REG_TXCHAN_STATUS2	0x0f
37 #define AK4118_REG_TXCHAN_STATUS3	0x10
38 #define AK4118_REG_TXCHAN_STATUS4	0x11
39 #define AK4118_REG_BURST_PREAMB_PC0	0x12
40 #define AK4118_REG_BURST_PREAMB_PC1	0x13
41 #define AK4118_REG_BURST_PREAMB_PD0	0x14
42 #define AK4118_REG_BURST_PREAMB_PD1	0x15
43 #define AK4118_REG_QSUB_CTL		0x16
44 #define AK4118_REG_QSUB_TRACK		0x17
45 #define AK4118_REG_QSUB_INDEX		0x18
46 #define AK4118_REG_QSUB_MIN		0x19
47 #define AK4118_REG_QSUB_SEC		0x1a
48 #define AK4118_REG_QSUB_FRAME		0x1b
49 #define AK4118_REG_QSUB_ZERO		0x1c
50 #define AK4118_REG_QSUB_ABS_MIN		0x1d
51 #define AK4118_REG_QSUB_ABS_SEC		0x1e
52 #define AK4118_REG_QSUB_ABS_FRAME	0x1f
53 #define AK4118_REG_GPE			0x20
54 #define AK4118_REG_GPDR			0x21
55 #define AK4118_REG_GPSCR		0x22
56 #define AK4118_REG_GPLR			0x23
57 #define AK4118_REG_DAT_MASK_DTS		0x24
58 #define AK4118_REG_RX_DETECT		0x25
59 #define AK4118_REG_STC_DAT_DETECT	0x26
60 #define AK4118_REG_RXCHAN_STATUS5	0x27
61 #define AK4118_REG_TXCHAN_STATUS5	0x28
62 #define AK4118_REG_MAX			0x29
63 
64 #define AK4118_REG_FORMAT_CTL_DIF0	(1 << 4)
65 #define AK4118_REG_FORMAT_CTL_DIF1	(1 << 5)
66 #define AK4118_REG_FORMAT_CTL_DIF2	(1 << 6)
67 
68 struct ak4118_priv {
69 	struct regmap *regmap;
70 	struct gpio_desc *reset;
71 	struct gpio_desc *irq;
72 	struct snd_soc_component *component;
73 };
74 
75 static const struct reg_default ak4118_reg_defaults[] = {
76 	{AK4118_REG_CLK_PWR_CTL,	0x43},
77 	{AK4118_REG_FORMAT_CTL,		0x6a},
78 	{AK4118_REG_IO_CTL0,		0x88},
79 	{AK4118_REG_IO_CTL1,		0x48},
80 	{AK4118_REG_INT0_MASK,		0xee},
81 	{AK4118_REG_INT1_MASK,		0xb5},
82 	{AK4118_REG_RCV_STATUS0,	0x00},
83 	{AK4118_REG_RCV_STATUS1,	0x10},
84 	{AK4118_REG_TXCHAN_STATUS0,	0x00},
85 	{AK4118_REG_TXCHAN_STATUS1,	0x00},
86 	{AK4118_REG_TXCHAN_STATUS2,	0x00},
87 	{AK4118_REG_TXCHAN_STATUS3,	0x00},
88 	{AK4118_REG_TXCHAN_STATUS4,	0x00},
89 	{AK4118_REG_GPE,		0x77},
90 	{AK4118_REG_GPDR,		0x00},
91 	{AK4118_REG_GPSCR,		0x00},
92 	{AK4118_REG_GPLR,		0x00},
93 	{AK4118_REG_DAT_MASK_DTS,	0x3f},
94 	{AK4118_REG_RX_DETECT,		0x00},
95 	{AK4118_REG_STC_DAT_DETECT,	0x00},
96 	{AK4118_REG_TXCHAN_STATUS5,	0x00},
97 };
98 
99 static const char * const ak4118_input_select_txt[] = {
100 	"RX0", "RX1", "RX2", "RX3", "RX4", "RX5", "RX6", "RX7",
101 };
102 static SOC_ENUM_SINGLE_DECL(ak4118_insel_enum, AK4118_REG_IO_CTL1, 0x0,
103 			    ak4118_input_select_txt);
104 
105 static const struct snd_kcontrol_new ak4118_input_mux_controls =
106 	SOC_DAPM_ENUM("Input Select", ak4118_insel_enum);
107 
108 static const char * const ak4118_iec958_fs_txt[] = {
109 	"44100", "48000", "32000", "22050", "11025", "24000", "16000", "88200",
110 	"8000", "96000", "64000", "176400", "192000",
111 };
112 
113 static const int ak4118_iec958_fs_val[] = {
114 	0x0, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9, 0xA, 0xB, 0xC, 0xE,
115 };
116 
117 static SOC_VALUE_ENUM_SINGLE_DECL(ak4118_iec958_fs_enum, AK4118_REG_RCV_STATUS1,
118 				  0x4, 0x4, ak4118_iec958_fs_txt,
119 				  ak4118_iec958_fs_val);
120 
121 static struct snd_kcontrol_new ak4118_iec958_controls[] = {
122 	SOC_SINGLE("IEC958 Parity Errors", AK4118_REG_RCV_STATUS0, 0, 1, 0),
123 	SOC_SINGLE("IEC958 No Audio", AK4118_REG_RCV_STATUS0, 1, 1, 0),
124 	SOC_SINGLE("IEC958 PLL Lock", AK4118_REG_RCV_STATUS0, 4, 1, 1),
125 	SOC_SINGLE("IEC958 Non PCM", AK4118_REG_RCV_STATUS0, 6, 1, 0),
126 	SOC_ENUM("IEC958 Sampling Freq", ak4118_iec958_fs_enum),
127 };
128 
129 static const struct snd_soc_dapm_widget ak4118_dapm_widgets[] = {
130 	SND_SOC_DAPM_INPUT("INRX0"),
131 	SND_SOC_DAPM_INPUT("INRX1"),
132 	SND_SOC_DAPM_INPUT("INRX2"),
133 	SND_SOC_DAPM_INPUT("INRX3"),
134 	SND_SOC_DAPM_INPUT("INRX4"),
135 	SND_SOC_DAPM_INPUT("INRX5"),
136 	SND_SOC_DAPM_INPUT("INRX6"),
137 	SND_SOC_DAPM_INPUT("INRX7"),
138 	SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0,
139 			 &ak4118_input_mux_controls),
140 };
141 
142 static const struct snd_soc_dapm_route ak4118_dapm_routes[] = {
143 	{"Input Mux", "RX0", "INRX0"},
144 	{"Input Mux", "RX1", "INRX1"},
145 	{"Input Mux", "RX2", "INRX2"},
146 	{"Input Mux", "RX3", "INRX3"},
147 	{"Input Mux", "RX4", "INRX4"},
148 	{"Input Mux", "RX5", "INRX5"},
149 	{"Input Mux", "RX6", "INRX6"},
150 	{"Input Mux", "RX7", "INRX7"},
151 };
152 
153 
154 static int ak4118_set_dai_fmt_master(struct ak4118_priv *ak4118,
155 				     unsigned int format)
156 {
157 	int dif;
158 
159 	switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
160 	case SND_SOC_DAIFMT_I2S:
161 		dif = AK4118_REG_FORMAT_CTL_DIF0 | AK4118_REG_FORMAT_CTL_DIF2;
162 		break;
163 	case SND_SOC_DAIFMT_RIGHT_J:
164 		dif = AK4118_REG_FORMAT_CTL_DIF0 | AK4118_REG_FORMAT_CTL_DIF1;
165 		break;
166 	case SND_SOC_DAIFMT_LEFT_J:
167 		dif = AK4118_REG_FORMAT_CTL_DIF2;
168 		break;
169 	default:
170 		return -ENOTSUPP;
171 	}
172 
173 	return dif;
174 }
175 
176 static int ak4118_set_dai_fmt_slave(struct ak4118_priv *ak4118,
177 				    unsigned int format)
178 {
179 	int dif;
180 
181 	switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
182 	case SND_SOC_DAIFMT_I2S:
183 		dif = AK4118_REG_FORMAT_CTL_DIF0 | AK4118_REG_FORMAT_CTL_DIF1 |
184 		      AK4118_REG_FORMAT_CTL_DIF2;
185 		break;
186 	case SND_SOC_DAIFMT_LEFT_J:
187 		dif = AK4118_REG_FORMAT_CTL_DIF1 | AK4118_REG_FORMAT_CTL_DIF2;
188 		break;
189 	default:
190 		return -ENOTSUPP;
191 	}
192 
193 	return dif;
194 }
195 
196 static int ak4118_set_dai_fmt(struct snd_soc_dai *dai,
197 			      unsigned int format)
198 {
199 	struct snd_soc_component *component = dai->component;
200 	struct ak4118_priv *ak4118 = snd_soc_component_get_drvdata(component);
201 	int dif;
202 	int ret = 0;
203 
204 	switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
205 	case SND_SOC_DAIFMT_CBM_CFM:
206 		/* component is master */
207 		dif = ak4118_set_dai_fmt_master(ak4118, format);
208 		break;
209 	case SND_SOC_DAIFMT_CBS_CFS:
210 		/*component is slave */
211 		dif = ak4118_set_dai_fmt_slave(ak4118, format);
212 		break;
213 	default:
214 		ret = -ENOTSUPP;
215 		goto exit;
216 	}
217 
218 	/* format not supported */
219 	if (dif < 0) {
220 		ret = dif;
221 		goto exit;
222 	}
223 
224 	ret = regmap_update_bits(ak4118->regmap, AK4118_REG_FORMAT_CTL,
225 				 AK4118_REG_FORMAT_CTL_DIF0 |
226 				 AK4118_REG_FORMAT_CTL_DIF1 |
227 				 AK4118_REG_FORMAT_CTL_DIF2, dif);
228 	if (ret < 0)
229 		goto exit;
230 
231 exit:
232 	return ret;
233 }
234 
235 static int ak4118_hw_params(struct snd_pcm_substream *substream,
236 			    struct snd_pcm_hw_params *params,
237 			    struct snd_soc_dai *dai)
238 {
239 	return 0;
240 }
241 
242 static const struct snd_soc_dai_ops ak4118_dai_ops = {
243 	.hw_params = ak4118_hw_params,
244 	.set_fmt   = ak4118_set_dai_fmt,
245 };
246 
247 static struct snd_soc_dai_driver ak4118_dai = {
248 	.name = "ak4118-hifi",
249 	.capture = {
250 		.stream_name = "Capture",
251 		.channels_min = 2,
252 		.channels_max = 2,
253 		.rates = SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |
254 			 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
255 			 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |
256 			 SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000,
257 		.formats = SNDRV_PCM_FMTBIT_S16_LE  |
258 			   SNDRV_PCM_FMTBIT_S24_3LE |
259 			   SNDRV_PCM_FMTBIT_S24_LE
260 	},
261 	.ops = &ak4118_dai_ops,
262 };
263 
264 static irqreturn_t ak4118_irq_handler(int irq, void *data)
265 {
266 	struct ak4118_priv *ak4118 = data;
267 	struct snd_soc_component *component = ak4118->component;
268 	struct snd_kcontrol_new *kctl_new;
269 	struct snd_kcontrol *kctl;
270 	struct snd_ctl_elem_id *id;
271 	unsigned int i;
272 
273 	if (!component)
274 		return IRQ_NONE;
275 
276 	for (i = 0; i < ARRAY_SIZE(ak4118_iec958_controls); i++) {
277 		kctl_new = &ak4118_iec958_controls[i];
278 		kctl = snd_soc_card_get_kcontrol(component->card,
279 						 kctl_new->name);
280 		if (!kctl)
281 			continue;
282 		id = &kctl->id;
283 		snd_ctl_notify(component->card->snd_card,
284 			       SNDRV_CTL_EVENT_MASK_VALUE, id);
285 	}
286 
287 	return IRQ_HANDLED;
288 }
289 
290 static int ak4118_probe(struct snd_soc_component *component)
291 {
292 	struct ak4118_priv *ak4118 = snd_soc_component_get_drvdata(component);
293 	int ret = 0;
294 
295 	ak4118->component = component;
296 
297 	/* release reset */
298 	gpiod_set_value(ak4118->reset, 0);
299 
300 	/* unmask all int1 sources */
301 	ret = regmap_write(ak4118->regmap, AK4118_REG_INT1_MASK, 0x00);
302 	if (ret < 0) {
303 		dev_err(component->dev,
304 			"failed to write regmap 0x%x 0x%x: %d\n",
305 			AK4118_REG_INT1_MASK, 0x00, ret);
306 		return ret;
307 	}
308 
309 	/* rx detect enable on all channels */
310 	ret = regmap_write(ak4118->regmap, AK4118_REG_RX_DETECT, 0xff);
311 	if (ret < 0) {
312 		dev_err(component->dev,
313 			"failed to write regmap 0x%x 0x%x: %d\n",
314 			AK4118_REG_RX_DETECT, 0xff, ret);
315 		return ret;
316 	}
317 
318 	ret = snd_soc_add_component_controls(component, ak4118_iec958_controls,
319 					 ARRAY_SIZE(ak4118_iec958_controls));
320 	if (ret) {
321 		dev_err(component->dev,
322 			"failed to add component kcontrols: %d\n", ret);
323 		return ret;
324 	}
325 
326 	return 0;
327 }
328 
329 static void ak4118_remove(struct snd_soc_component *component)
330 {
331 	struct ak4118_priv *ak4118 = snd_soc_component_get_drvdata(component);
332 
333 	/* hold reset */
334 	gpiod_set_value(ak4118->reset, 1);
335 }
336 
337 static const struct snd_soc_component_driver soc_component_drv_ak4118 = {
338 	.probe			= ak4118_probe,
339 	.remove			= ak4118_remove,
340 	.dapm_widgets		= ak4118_dapm_widgets,
341 	.num_dapm_widgets	= ARRAY_SIZE(ak4118_dapm_widgets),
342 	.dapm_routes		= ak4118_dapm_routes,
343 	.num_dapm_routes	= ARRAY_SIZE(ak4118_dapm_routes),
344 	.idle_bias_on		= 1,
345 	.use_pmdown_time	= 1,
346 	.endianness		= 1,
347 	.non_legacy_dai_naming	= 1,
348 };
349 
350 static const struct regmap_config ak4118_regmap = {
351 	.reg_bits = 8,
352 	.val_bits = 8,
353 
354 	.reg_defaults = ak4118_reg_defaults,
355 	.num_reg_defaults = ARRAY_SIZE(ak4118_reg_defaults),
356 
357 	.cache_type = REGCACHE_NONE,
358 	.max_register = AK4118_REG_MAX - 1,
359 };
360 
361 static int ak4118_i2c_probe(struct i2c_client *i2c,
362 			    const struct i2c_device_id *id)
363 {
364 	struct ak4118_priv *ak4118;
365 	int ret;
366 
367 	ak4118 = devm_kzalloc(&i2c->dev, sizeof(struct ak4118_priv),
368 			      GFP_KERNEL);
369 	if (ak4118 == NULL)
370 		return -ENOMEM;
371 
372 	ak4118->regmap = devm_regmap_init_i2c(i2c, &ak4118_regmap);
373 	if (IS_ERR(ak4118->regmap))
374 		return PTR_ERR(ak4118->regmap);
375 
376 	i2c_set_clientdata(i2c, ak4118);
377 
378 	ak4118->reset = devm_gpiod_get(&i2c->dev, "reset", GPIOD_OUT_HIGH);
379 	if (IS_ERR(ak4118->reset)) {
380 		ret = PTR_ERR(ak4118->reset);
381 		if (ret != -EPROBE_DEFER)
382 			dev_err(&i2c->dev, "Failed to get reset: %d\n", ret);
383 		return ret;
384 	}
385 
386 	ak4118->irq = devm_gpiod_get(&i2c->dev, "irq", GPIOD_IN);
387 	if (IS_ERR(ak4118->irq)) {
388 		ret = PTR_ERR(ak4118->irq);
389 		if (ret != -EPROBE_DEFER)
390 			dev_err(&i2c->dev, "Failed to get IRQ: %d\n", ret);
391 		return ret;
392 	}
393 
394 	ret = devm_request_threaded_irq(&i2c->dev, gpiod_to_irq(ak4118->irq),
395 					NULL, ak4118_irq_handler,
396 					IRQF_TRIGGER_RISING | IRQF_ONESHOT,
397 					"ak4118-irq", ak4118);
398 	if (ret < 0) {
399 		dev_err(&i2c->dev, "Fail to request_irq: %d\n", ret);
400 		return ret;
401 	}
402 
403 	return devm_snd_soc_register_component(&i2c->dev,
404 				&soc_component_drv_ak4118, &ak4118_dai, 1);
405 }
406 
407 #ifdef CONFIG_OF
408 static const struct of_device_id ak4118_of_match[] = {
409 	{ .compatible = "asahi-kasei,ak4118", },
410 	{}
411 };
412 MODULE_DEVICE_TABLE(of, ak4118_of_match);
413 #endif
414 
415 static const struct i2c_device_id ak4118_id_table[] = {
416 	{ "ak4118", 0 },
417 	{}
418 };
419 MODULE_DEVICE_TABLE(i2c, ak4118_id_table);
420 
421 static struct i2c_driver ak4118_i2c_driver = {
422 	.driver  = {
423 		.name = "ak4118",
424 		.of_match_table = of_match_ptr(ak4118_of_match),
425 	},
426 	.id_table = ak4118_id_table,
427 	.probe  = ak4118_i2c_probe,
428 };
429 
430 module_i2c_driver(ak4118_i2c_driver);
431 
432 MODULE_DESCRIPTION("Asahi Kasei AK4118 ALSA SoC driver");
433 MODULE_AUTHOR("Adrien Charruel <adrien.charruel@devialet.com>");
434 MODULE_LICENSE("GPL");
435