xref: /linux/sound/soc/codecs/adau1701.c (revision 7a9b709e7cc5ce1ffb84ce07bf6d157e1de758df) 
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Driver for ADAU1701 SigmaDSP processor
4  *
5  * Copyright 2011 Analog Devices Inc.
6  * Author: Lars-Peter Clausen <lars@metafoo.de>
7  *	based on an inital version by Cliff Cai <cliff.cai@analog.com>
8  */
9 
10 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/i2c.h>
13 #include <linux/delay.h>
14 #include <linux/slab.h>
15 #include <linux/of.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/regmap.h>
19 #include <sound/core.h>
20 #include <sound/pcm.h>
21 #include <sound/pcm_params.h>
22 #include <sound/soc.h>
23 
24 #include <linux/unaligned.h>
25 
26 #include "sigmadsp.h"
27 #include "adau1701.h"
28 
29 #define ADAU1701_SAFELOAD_DATA(i) (0x0810 + (i))
30 #define ADAU1701_SAFELOAD_ADDR(i) (0x0815 + (i))
31 
32 #define ADAU1701_DSPCTRL	0x081c
33 #define ADAU1701_SEROCTL	0x081e
34 #define ADAU1701_SERICTL	0x081f
35 
36 #define ADAU1701_AUXNPOW	0x0822
37 #define ADAU1701_PINCONF_0	0x0820
38 #define ADAU1701_PINCONF_1	0x0821
39 #define ADAU1701_AUXNPOW	0x0822
40 
41 #define ADAU1701_OSCIPOW	0x0826
42 #define ADAU1701_DACSET		0x0827
43 
44 #define ADAU1701_MAX_REGISTER	0x0828
45 
46 #define ADAU1701_DSPCTRL_CR		(1 << 2)
47 #define ADAU1701_DSPCTRL_DAM		(1 << 3)
48 #define ADAU1701_DSPCTRL_ADM		(1 << 4)
49 #define ADAU1701_DSPCTRL_IST		(1 << 5)
50 #define ADAU1701_DSPCTRL_SR_48		0x00
51 #define ADAU1701_DSPCTRL_SR_96		0x01
52 #define ADAU1701_DSPCTRL_SR_192		0x02
53 #define ADAU1701_DSPCTRL_SR_MASK	0x03
54 
55 #define ADAU1701_SEROCTL_INV_LRCLK	0x2000
56 #define ADAU1701_SEROCTL_INV_BCLK	0x1000
57 #define ADAU1701_SEROCTL_MASTER		0x0800
58 
59 #define ADAU1701_SEROCTL_OBF16		0x0000
60 #define ADAU1701_SEROCTL_OBF8		0x0200
61 #define ADAU1701_SEROCTL_OBF4		0x0400
62 #define ADAU1701_SEROCTL_OBF2		0x0600
63 #define ADAU1701_SEROCTL_OBF_MASK	0x0600
64 
65 #define ADAU1701_SEROCTL_OLF1024	0x0000
66 #define ADAU1701_SEROCTL_OLF512		0x0080
67 #define ADAU1701_SEROCTL_OLF256		0x0100
68 #define ADAU1701_SEROCTL_OLF_MASK	0x0180
69 
70 #define ADAU1701_SEROCTL_MSB_DEALY1	0x0000
71 #define ADAU1701_SEROCTL_MSB_DEALY0	0x0004
72 #define ADAU1701_SEROCTL_MSB_DEALY8	0x0008
73 #define ADAU1701_SEROCTL_MSB_DEALY12	0x000c
74 #define ADAU1701_SEROCTL_MSB_DEALY16	0x0010
75 #define ADAU1701_SEROCTL_MSB_DEALY_MASK	0x001c
76 
77 #define ADAU1701_SEROCTL_WORD_LEN_24	0x0000
78 #define ADAU1701_SEROCTL_WORD_LEN_20	0x0001
79 #define ADAU1701_SEROCTL_WORD_LEN_16	0x0002
80 #define ADAU1701_SEROCTL_WORD_LEN_MASK	0x0003
81 
82 #define ADAU1701_AUXNPOW_VBPD		0x40
83 #define ADAU1701_AUXNPOW_VRPD		0x20
84 
85 #define ADAU1701_SERICTL_I2S		0
86 #define ADAU1701_SERICTL_LEFTJ		1
87 #define ADAU1701_SERICTL_TDM		2
88 #define ADAU1701_SERICTL_RIGHTJ_24	3
89 #define ADAU1701_SERICTL_RIGHTJ_20	4
90 #define ADAU1701_SERICTL_RIGHTJ_18	5
91 #define ADAU1701_SERICTL_RIGHTJ_16	6
92 #define ADAU1701_SERICTL_MODE_MASK	7
93 #define ADAU1701_SERICTL_INV_BCLK	BIT(3)
94 #define ADAU1701_SERICTL_INV_LRCLK	BIT(4)
95 
96 #define ADAU1701_OSCIPOW_OPD		0x04
97 #define ADAU1701_DACSET_DACINIT		1
98 
99 #define ADAU1707_CLKDIV_UNSET		(-1U)
100 
101 #define ADAU1701_FIRMWARE "adau1701.bin"
102 
103 static const char * const supply_names[] = {
104 	"dvdd", "avdd"
105 };
106 
107 struct adau1701 {
108 	struct gpio_desc  *gpio_nreset;
109 	struct gpio_descs *gpio_pll_mode;
110 	unsigned int dai_fmt;
111 	unsigned int pll_clkdiv;
112 	unsigned int sysclk;
113 	struct regmap *regmap;
114 	struct i2c_client *client;
115 	u8 pin_config[12];
116 
117 	struct sigmadsp *sigmadsp;
118 	struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
119 };
120 
121 static const struct snd_kcontrol_new adau1701_controls[] = {
122 	SOC_SINGLE("Master Capture Switch", ADAU1701_DSPCTRL, 4, 1, 0),
123 };
124 
125 static const struct snd_soc_dapm_widget adau1701_dapm_widgets[] = {
126 	SND_SOC_DAPM_DAC("DAC0", "Playback", ADAU1701_AUXNPOW, 3, 1),
127 	SND_SOC_DAPM_DAC("DAC1", "Playback", ADAU1701_AUXNPOW, 2, 1),
128 	SND_SOC_DAPM_DAC("DAC2", "Playback", ADAU1701_AUXNPOW, 1, 1),
129 	SND_SOC_DAPM_DAC("DAC3", "Playback", ADAU1701_AUXNPOW, 0, 1),
130 	SND_SOC_DAPM_ADC("ADC", "Capture", ADAU1701_AUXNPOW, 7, 1),
131 
132 	SND_SOC_DAPM_OUTPUT("OUT0"),
133 	SND_SOC_DAPM_OUTPUT("OUT1"),
134 	SND_SOC_DAPM_OUTPUT("OUT2"),
135 	SND_SOC_DAPM_OUTPUT("OUT3"),
136 	SND_SOC_DAPM_INPUT("IN0"),
137 	SND_SOC_DAPM_INPUT("IN1"),
138 };
139 
140 static const struct snd_soc_dapm_route adau1701_dapm_routes[] = {
141 	{ "OUT0", NULL, "DAC0" },
142 	{ "OUT1", NULL, "DAC1" },
143 	{ "OUT2", NULL, "DAC2" },
144 	{ "OUT3", NULL, "DAC3" },
145 
146 	{ "ADC", NULL, "IN0" },
147 	{ "ADC", NULL, "IN1" },
148 };
149 
150 static unsigned int adau1701_register_size(struct device *dev,
151 		unsigned int reg)
152 {
153 	switch (reg) {
154 	case ADAU1701_PINCONF_0:
155 	case ADAU1701_PINCONF_1:
156 		return 3;
157 	case ADAU1701_DSPCTRL:
158 	case ADAU1701_SEROCTL:
159 	case ADAU1701_AUXNPOW:
160 	case ADAU1701_OSCIPOW:
161 	case ADAU1701_DACSET:
162 		return 2;
163 	case ADAU1701_SERICTL:
164 		return 1;
165 	}
166 
167 	dev_err(dev, "Unsupported register address: %d\n", reg);
168 	return 0;
169 }
170 
171 static bool adau1701_volatile_reg(struct device *dev, unsigned int reg)
172 {
173 	switch (reg) {
174 	case ADAU1701_DACSET:
175 	case ADAU1701_DSPCTRL:
176 		return true;
177 	default:
178 		return false;
179 	}
180 }
181 
182 static int adau1701_reg_write(void *context, unsigned int reg,
183 			      unsigned int value)
184 {
185 	struct i2c_client *client = context;
186 	unsigned int i;
187 	unsigned int size;
188 	uint8_t buf[5];
189 	int ret;
190 
191 	size = adau1701_register_size(&client->dev, reg);
192 	if (size == 0)
193 		return -EINVAL;
194 
195 	buf[0] = reg >> 8;
196 	buf[1] = reg & 0xff;
197 
198 	for (i = size + 1; i >= 2; --i) {
199 		buf[i] = value;
200 		value >>= 8;
201 	}
202 
203 	ret = i2c_master_send(client, buf, size + 2);
204 	if (ret == size + 2)
205 		return 0;
206 	else if (ret < 0)
207 		return ret;
208 	else
209 		return -EIO;
210 }
211 
212 static int adau1701_reg_read(void *context, unsigned int reg,
213 			     unsigned int *value)
214 {
215 	int ret;
216 	unsigned int i;
217 	unsigned int size;
218 	uint8_t send_buf[2], recv_buf[3];
219 	struct i2c_client *client = context;
220 	struct i2c_msg msgs[2];
221 
222 	size = adau1701_register_size(&client->dev, reg);
223 	if (size == 0)
224 		return -EINVAL;
225 
226 	send_buf[0] = reg >> 8;
227 	send_buf[1] = reg & 0xff;
228 
229 	msgs[0].addr = client->addr;
230 	msgs[0].len = sizeof(send_buf);
231 	msgs[0].buf = send_buf;
232 	msgs[0].flags = 0;
233 
234 	msgs[1].addr = client->addr;
235 	msgs[1].len = size;
236 	msgs[1].buf = recv_buf;
237 	msgs[1].flags = I2C_M_RD;
238 
239 	ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
240 	if (ret < 0)
241 		return ret;
242 	else if (ret != ARRAY_SIZE(msgs))
243 		return -EIO;
244 
245 	*value = 0;
246 
247 	for (i = 0; i < size; i++) {
248 		*value <<= 8;
249 		*value |= recv_buf[i];
250 	}
251 
252 	return 0;
253 }
254 
255 static int adau1701_safeload(struct sigmadsp *sigmadsp, unsigned int addr,
256 	const uint8_t bytes[], size_t len)
257 {
258 	struct i2c_client *client = to_i2c_client(sigmadsp->dev);
259 	struct adau1701 *adau1701 = i2c_get_clientdata(client);
260 	unsigned int val;
261 	unsigned int i;
262 	uint8_t buf[10];
263 	int ret;
264 
265 	ret = regmap_read(adau1701->regmap, ADAU1701_DSPCTRL, &val);
266 	if (ret)
267 		return ret;
268 
269 	if (val & ADAU1701_DSPCTRL_IST)
270 		msleep(50);
271 
272 	for (i = 0; i < len / 4; i++) {
273 		put_unaligned_le16(ADAU1701_SAFELOAD_DATA(i), buf);
274 		buf[2] = 0x00;
275 		memcpy(buf + 3, bytes + i * 4, 4);
276 		ret = i2c_master_send(client, buf, 7);
277 		if (ret < 0)
278 			return ret;
279 		else if (ret != 7)
280 			return -EIO;
281 
282 		put_unaligned_le16(ADAU1701_SAFELOAD_ADDR(i), buf);
283 		put_unaligned_le16(addr + i, buf + 2);
284 		ret = i2c_master_send(client, buf, 4);
285 		if (ret < 0)
286 			return ret;
287 		else if (ret != 4)
288 			return -EIO;
289 	}
290 
291 	return regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
292 		ADAU1701_DSPCTRL_IST, ADAU1701_DSPCTRL_IST);
293 }
294 
295 static const struct sigmadsp_ops adau1701_sigmadsp_ops = {
296 	.safeload = adau1701_safeload,
297 };
298 
299 static int adau1701_reset(struct snd_soc_component *component, unsigned int clkdiv,
300 	unsigned int rate)
301 {
302 	struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
303 	int ret;
304 
305 	DECLARE_BITMAP(values, 2);
306 	sigmadsp_reset(adau1701->sigmadsp);
307 
308 	if (clkdiv != ADAU1707_CLKDIV_UNSET && adau1701->gpio_pll_mode) {
309 		switch (clkdiv) {
310 		case 64:
311 			__assign_bit(0, values, 0);
312 			__assign_bit(1, values, 0);
313 			break;
314 		case 256:
315 			__assign_bit(0, values, 0);
316 			__assign_bit(1, values, 1);
317 			break;
318 		case 384:
319 			__assign_bit(0, values, 1);
320 			__assign_bit(1, values, 0);
321 			break;
322 		case 0: /* fallback */
323 		case 512:
324 			__assign_bit(0, values, 1);
325 			__assign_bit(1, values, 1);
326 			break;
327 		}
328 		gpiod_multi_set_value_cansleep(adau1701->gpio_pll_mode, values);
329 	}
330 
331 	adau1701->pll_clkdiv = clkdiv;
332 
333 	if (adau1701->gpio_nreset) {
334 		gpiod_set_value_cansleep(adau1701->gpio_nreset, 0);
335 		/* minimum reset time is 20ns */
336 		udelay(1);
337 		gpiod_set_value_cansleep(adau1701->gpio_nreset, 1);
338 		/* power-up time may be as long as 85ms */
339 		mdelay(85);
340 	}
341 
342 	/*
343 	 * Postpone the firmware download to a point in time when we
344 	 * know the correct PLL setup
345 	 */
346 	if (clkdiv != ADAU1707_CLKDIV_UNSET) {
347 		ret = sigmadsp_setup(adau1701->sigmadsp, rate);
348 		if (ret) {
349 			dev_warn(component->dev, "Failed to load firmware\n");
350 			return ret;
351 		}
352 	}
353 
354 	regmap_write(adau1701->regmap, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT);
355 	regmap_write(adau1701->regmap, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR);
356 
357 	regcache_mark_dirty(adau1701->regmap);
358 	regcache_sync(adau1701->regmap);
359 
360 	return 0;
361 }
362 
363 static int adau1701_set_capture_pcm_format(struct snd_soc_component *component,
364 					   struct snd_pcm_hw_params *params)
365 {
366 	struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
367 	unsigned int mask = ADAU1701_SEROCTL_WORD_LEN_MASK;
368 	unsigned int val;
369 
370 	switch (params_width(params)) {
371 	case 16:
372 		val = ADAU1701_SEROCTL_WORD_LEN_16;
373 		break;
374 	case 20:
375 		val = ADAU1701_SEROCTL_WORD_LEN_20;
376 		break;
377 	case 24:
378 		val = ADAU1701_SEROCTL_WORD_LEN_24;
379 		break;
380 	default:
381 		return -EINVAL;
382 	}
383 
384 	if (adau1701->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) {
385 		switch (params_width(params)) {
386 		case 16:
387 			val |= ADAU1701_SEROCTL_MSB_DEALY16;
388 			break;
389 		case 20:
390 			val |= ADAU1701_SEROCTL_MSB_DEALY12;
391 			break;
392 		case 24:
393 			val |= ADAU1701_SEROCTL_MSB_DEALY8;
394 			break;
395 		}
396 		mask |= ADAU1701_SEROCTL_MSB_DEALY_MASK;
397 	}
398 
399 	regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, mask, val);
400 
401 	return 0;
402 }
403 
404 static int adau1701_set_playback_pcm_format(struct snd_soc_component *component,
405 					    struct snd_pcm_hw_params *params)
406 {
407 	struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
408 	unsigned int val;
409 
410 	if (adau1701->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
411 		return 0;
412 
413 	switch (params_width(params)) {
414 	case 16:
415 		val = ADAU1701_SERICTL_RIGHTJ_16;
416 		break;
417 	case 20:
418 		val = ADAU1701_SERICTL_RIGHTJ_20;
419 		break;
420 	case 24:
421 		val = ADAU1701_SERICTL_RIGHTJ_24;
422 		break;
423 	default:
424 		return -EINVAL;
425 	}
426 
427 	regmap_update_bits(adau1701->regmap, ADAU1701_SERICTL,
428 		ADAU1701_SERICTL_MODE_MASK, val);
429 
430 	return 0;
431 }
432 
433 static int adau1701_hw_params(struct snd_pcm_substream *substream,
434 		struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
435 {
436 	struct snd_soc_component *component = dai->component;
437 	struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
438 	unsigned int clkdiv = adau1701->sysclk / params_rate(params);
439 	unsigned int val;
440 	int ret;
441 
442 	/*
443 	 * If the mclk/lrclk ratio changes, the chip needs updated PLL
444 	 * mode GPIO settings, and a full reset cycle, including a new
445 	 * firmware upload.
446 	 */
447 	if (clkdiv != adau1701->pll_clkdiv) {
448 		ret = adau1701_reset(component, clkdiv, params_rate(params));
449 		if (ret < 0)
450 			return ret;
451 	}
452 
453 	switch (params_rate(params)) {
454 	case 192000:
455 		val = ADAU1701_DSPCTRL_SR_192;
456 		break;
457 	case 96000:
458 		val = ADAU1701_DSPCTRL_SR_96;
459 		break;
460 	case 48000:
461 		val = ADAU1701_DSPCTRL_SR_48;
462 		break;
463 	default:
464 		return -EINVAL;
465 	}
466 
467 	regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
468 		ADAU1701_DSPCTRL_SR_MASK, val);
469 
470 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
471 		return adau1701_set_playback_pcm_format(component, params);
472 	else
473 		return adau1701_set_capture_pcm_format(component, params);
474 }
475 
476 static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai,
477 		unsigned int fmt)
478 {
479 	struct snd_soc_component *component = codec_dai->component;
480 	struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
481 	unsigned int serictl = 0x00, seroctl = 0x00;
482 	bool invert_lrclk;
483 
484 	switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
485 	case SND_SOC_DAIFMT_CBP_CFP:
486 		/* master, 64-bits per sample, 1 frame per sample */
487 		seroctl |= ADAU1701_SEROCTL_MASTER | ADAU1701_SEROCTL_OBF16
488 				| ADAU1701_SEROCTL_OLF1024;
489 		break;
490 	case SND_SOC_DAIFMT_CBC_CFC:
491 		break;
492 	default:
493 		return -EINVAL;
494 	}
495 
496 	/* clock inversion */
497 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
498 	case SND_SOC_DAIFMT_NB_NF:
499 		invert_lrclk = false;
500 		break;
501 	case SND_SOC_DAIFMT_NB_IF:
502 		invert_lrclk = true;
503 		break;
504 	case SND_SOC_DAIFMT_IB_NF:
505 		invert_lrclk = false;
506 		serictl |= ADAU1701_SERICTL_INV_BCLK;
507 		seroctl |= ADAU1701_SEROCTL_INV_BCLK;
508 		break;
509 	case SND_SOC_DAIFMT_IB_IF:
510 		invert_lrclk = true;
511 		serictl |= ADAU1701_SERICTL_INV_BCLK;
512 		seroctl |= ADAU1701_SEROCTL_INV_BCLK;
513 		break;
514 	default:
515 		return -EINVAL;
516 	}
517 
518 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
519 	case SND_SOC_DAIFMT_I2S:
520 		break;
521 	case SND_SOC_DAIFMT_LEFT_J:
522 		serictl |= ADAU1701_SERICTL_LEFTJ;
523 		seroctl |= ADAU1701_SEROCTL_MSB_DEALY0;
524 		invert_lrclk = !invert_lrclk;
525 		break;
526 	case SND_SOC_DAIFMT_RIGHT_J:
527 		serictl |= ADAU1701_SERICTL_RIGHTJ_24;
528 		seroctl |= ADAU1701_SEROCTL_MSB_DEALY8;
529 		invert_lrclk = !invert_lrclk;
530 		break;
531 	default:
532 		return -EINVAL;
533 	}
534 
535 	if (invert_lrclk) {
536 		seroctl |= ADAU1701_SEROCTL_INV_LRCLK;
537 		serictl |= ADAU1701_SERICTL_INV_LRCLK;
538 	}
539 
540 	adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
541 
542 	regmap_write(adau1701->regmap, ADAU1701_SERICTL, serictl);
543 	regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL,
544 		~ADAU1701_SEROCTL_WORD_LEN_MASK, seroctl);
545 
546 	return 0;
547 }
548 
549 static int adau1701_set_bias_level(struct snd_soc_component *component,
550 		enum snd_soc_bias_level level)
551 {
552 	unsigned int mask = ADAU1701_AUXNPOW_VBPD | ADAU1701_AUXNPOW_VRPD;
553 	struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
554 
555 	switch (level) {
556 	case SND_SOC_BIAS_ON:
557 		break;
558 	case SND_SOC_BIAS_PREPARE:
559 		break;
560 	case SND_SOC_BIAS_STANDBY:
561 		/* Enable VREF and VREF buffer */
562 		regmap_update_bits(adau1701->regmap,
563 				   ADAU1701_AUXNPOW, mask, 0x00);
564 		break;
565 	case SND_SOC_BIAS_OFF:
566 		/* Disable VREF and VREF buffer */
567 		regmap_update_bits(adau1701->regmap,
568 				   ADAU1701_AUXNPOW, mask, mask);
569 		break;
570 	}
571 
572 	return 0;
573 }
574 
575 static int adau1701_mute_stream(struct snd_soc_dai *dai, int mute, int direction)
576 {
577 	struct snd_soc_component *component = dai->component;
578 	unsigned int mask = ADAU1701_DSPCTRL_DAM;
579 	struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
580 	unsigned int val;
581 
582 	if (mute)
583 		val = 0;
584 	else
585 		val = mask;
586 
587 	regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, mask, val);
588 
589 	return 0;
590 }
591 
592 static int adau1701_set_sysclk(struct snd_soc_component *component, int clk_id,
593 	int source, unsigned int freq, int dir)
594 {
595 	unsigned int val;
596 	struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
597 
598 	switch (clk_id) {
599 	case ADAU1701_CLK_SRC_OSC:
600 		val = 0x0;
601 		break;
602 	case ADAU1701_CLK_SRC_MCLK:
603 		val = ADAU1701_OSCIPOW_OPD;
604 		break;
605 	default:
606 		return -EINVAL;
607 	}
608 
609 	regmap_update_bits(adau1701->regmap, ADAU1701_OSCIPOW,
610 			   ADAU1701_OSCIPOW_OPD, val);
611 	adau1701->sysclk = freq;
612 
613 	return 0;
614 }
615 
616 static int adau1701_startup(struct snd_pcm_substream *substream,
617 	struct snd_soc_dai *dai)
618 {
619 	struct adau1701 *adau1701 = snd_soc_component_get_drvdata(dai->component);
620 
621 	return sigmadsp_restrict_params(adau1701->sigmadsp, substream);
622 }
623 
624 #define ADAU1701_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | \
625 	SNDRV_PCM_RATE_192000)
626 
627 #define ADAU1701_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
628 	SNDRV_PCM_FMTBIT_S24_LE)
629 
630 static const struct snd_soc_dai_ops adau1701_dai_ops = {
631 	.set_fmt	= adau1701_set_dai_fmt,
632 	.hw_params	= adau1701_hw_params,
633 	.mute_stream	= adau1701_mute_stream,
634 	.startup	= adau1701_startup,
635 	.no_capture_mute = 1,
636 };
637 
638 static struct snd_soc_dai_driver adau1701_dai = {
639 	.name = "adau1701",
640 	.playback = {
641 		.stream_name = "Playback",
642 		.channels_min = 2,
643 		.channels_max = 8,
644 		.rates = ADAU1701_RATES,
645 		.formats = ADAU1701_FORMATS,
646 	},
647 	.capture = {
648 		.stream_name = "Capture",
649 		.channels_min = 2,
650 		.channels_max = 8,
651 		.rates = ADAU1701_RATES,
652 		.formats = ADAU1701_FORMATS,
653 	},
654 	.ops = &adau1701_dai_ops,
655 	.symmetric_rate = 1,
656 };
657 
658 #ifdef CONFIG_OF
659 static const struct of_device_id adau1701_dt_ids[] = {
660 	{ .compatible = "adi,adau1701", },
661 	{ }
662 };
663 MODULE_DEVICE_TABLE(of, adau1701_dt_ids);
664 #endif
665 
666 static int adau1701_probe(struct snd_soc_component *component)
667 {
668 	int i, ret;
669 	unsigned int val;
670 	struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
671 
672 	ret = sigmadsp_attach(adau1701->sigmadsp, component);
673 	if (ret)
674 		return ret;
675 
676 	ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
677 				    adau1701->supplies);
678 	if (ret < 0) {
679 		dev_err(component->dev, "Failed to enable regulators: %d\n", ret);
680 		return ret;
681 	}
682 
683 	/*
684 	 * Let the pll_clkdiv variable default to something that won't happen
685 	 * at runtime. That way, we can postpone the firmware download from
686 	 * adau1701_reset() to a point in time when we know the correct PLL
687 	 * mode parameters.
688 	 */
689 	adau1701->pll_clkdiv = ADAU1707_CLKDIV_UNSET;
690 
691 	/* initalize with pre-configured pll mode settings */
692 	ret = adau1701_reset(component, adau1701->pll_clkdiv, 0);
693 	if (ret < 0)
694 		goto exit_regulators_disable;
695 
696 	/* set up pin config */
697 	val = 0;
698 	for (i = 0; i < 6; i++)
699 		val |= adau1701->pin_config[i] << (i * 4);
700 
701 	regmap_write(adau1701->regmap, ADAU1701_PINCONF_0, val);
702 
703 	val = 0;
704 	for (i = 0; i < 6; i++)
705 		val |= adau1701->pin_config[i + 6] << (i * 4);
706 
707 	regmap_write(adau1701->regmap, ADAU1701_PINCONF_1, val);
708 
709 	return 0;
710 
711 exit_regulators_disable:
712 
713 	regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
714 	return ret;
715 }
716 
717 static void adau1701_remove(struct snd_soc_component *component)
718 {
719 	struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
720 
721 	if (adau1701->gpio_nreset)
722 		gpiod_set_value_cansleep(adau1701->gpio_nreset, 0);
723 
724 	regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
725 }
726 
727 #ifdef CONFIG_PM
728 static int adau1701_suspend(struct snd_soc_component *component)
729 {
730 	struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
731 
732 	regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies),
733 			       adau1701->supplies);
734 
735 	return 0;
736 }
737 
738 static int adau1701_resume(struct snd_soc_component *component)
739 {
740 	struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
741 	int ret;
742 
743         ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
744 				    adau1701->supplies);
745 	if (ret < 0) {
746 		dev_err(component->dev, "Failed to enable regulators: %d\n", ret);
747 		return ret;
748 	}
749 
750 	return adau1701_reset(component, adau1701->pll_clkdiv, 0);
751 }
752 #else
753 #define adau1701_resume 	NULL
754 #define adau1701_suspend 	NULL
755 #endif /* CONFIG_PM */
756 
757 static const struct snd_soc_component_driver adau1701_component_drv = {
758 	.probe			= adau1701_probe,
759 	.remove			= adau1701_remove,
760 	.resume			= adau1701_resume,
761 	.suspend		= adau1701_suspend,
762 	.set_bias_level		= adau1701_set_bias_level,
763 	.controls		= adau1701_controls,
764 	.num_controls		= ARRAY_SIZE(adau1701_controls),
765 	.dapm_widgets		= adau1701_dapm_widgets,
766 	.num_dapm_widgets	= ARRAY_SIZE(adau1701_dapm_widgets),
767 	.dapm_routes		= adau1701_dapm_routes,
768 	.num_dapm_routes	= ARRAY_SIZE(adau1701_dapm_routes),
769 	.set_sysclk		= adau1701_set_sysclk,
770 	.use_pmdown_time	= 1,
771 	.endianness		= 1,
772 };
773 
774 static const struct regmap_config adau1701_regmap = {
775 	.reg_bits		= 16,
776 	.val_bits		= 32,
777 	.max_register		= ADAU1701_MAX_REGISTER,
778 	.cache_type		= REGCACHE_MAPLE,
779 	.volatile_reg		= adau1701_volatile_reg,
780 	.reg_write		= adau1701_reg_write,
781 	.reg_read		= adau1701_reg_read,
782 };
783 
784 static int adau1701_i2c_probe(struct i2c_client *client)
785 {
786 	struct adau1701 *adau1701;
787 	struct device *dev = &client->dev;
788 	int ret, i;
789 
790 	adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL);
791 	if (!adau1701)
792 		return -ENOMEM;
793 
794 	for (i = 0; i < ARRAY_SIZE(supply_names); i++)
795 		adau1701->supplies[i].supply = supply_names[i];
796 
797 	ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(adau1701->supplies),
798 			adau1701->supplies);
799 	if (ret < 0) {
800 		dev_err(dev, "Failed to get regulators: %d\n", ret);
801 		return ret;
802 	}
803 
804 	ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
805 			adau1701->supplies);
806 	if (ret < 0) {
807 		dev_err(dev, "Failed to enable regulators: %d\n", ret);
808 		return ret;
809 	}
810 
811 	adau1701->client = client;
812 	adau1701->regmap = devm_regmap_init(dev, NULL, client,
813 					    &adau1701_regmap);
814 	if (IS_ERR(adau1701->regmap)) {
815 		ret = PTR_ERR(adau1701->regmap);
816 		goto exit_regulators_disable;
817 	}
818 
819 
820 	if (dev->of_node) {
821 		of_property_read_u32(dev->of_node, "adi,pll-clkdiv",
822 				     &adau1701->pll_clkdiv);
823 
824 		of_property_read_u8_array(dev->of_node, "adi,pin-config",
825 					  adau1701->pin_config,
826 					  ARRAY_SIZE(adau1701->pin_config));
827 	}
828 
829 	adau1701->gpio_nreset = devm_gpiod_get_optional(dev, "reset", GPIOD_IN);
830 
831 	if (IS_ERR(adau1701->gpio_nreset)) {
832 		ret = PTR_ERR(adau1701->gpio_nreset);
833 		goto exit_regulators_disable;
834 	}
835 
836 	adau1701->gpio_pll_mode = devm_gpiod_get_array_optional(dev, "adi,pll-mode", GPIOD_OUT_LOW);
837 
838 	if (IS_ERR(adau1701->gpio_pll_mode)) {
839 		ret = PTR_ERR(adau1701->gpio_pll_mode);
840 		goto exit_regulators_disable;
841 	}
842 
843 	i2c_set_clientdata(client, adau1701);
844 
845 	adau1701->sigmadsp = devm_sigmadsp_init_i2c(client,
846 		&adau1701_sigmadsp_ops, ADAU1701_FIRMWARE);
847 	if (IS_ERR(adau1701->sigmadsp)) {
848 		ret = PTR_ERR(adau1701->sigmadsp);
849 		goto exit_regulators_disable;
850 	}
851 
852 	ret = devm_snd_soc_register_component(&client->dev,
853 			&adau1701_component_drv,
854 			&adau1701_dai, 1);
855 
856 exit_regulators_disable:
857 
858 	regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
859 	return ret;
860 }
861 
862 static const struct i2c_device_id adau1701_i2c_id[] = {
863 	{ "adau1401" },
864 	{ "adau1401a" },
865 	{ "adau1701" },
866 	{ "adau1702" },
867 	{ }
868 };
869 MODULE_DEVICE_TABLE(i2c, adau1701_i2c_id);
870 
871 static struct i2c_driver adau1701_i2c_driver = {
872 	.driver = {
873 		.name	= "adau1701",
874 		.of_match_table	= of_match_ptr(adau1701_dt_ids),
875 	},
876 	.probe		= adau1701_i2c_probe,
877 	.id_table	= adau1701_i2c_id,
878 };
879 
880 module_i2c_driver(adau1701_i2c_driver);
881 
882 MODULE_DESCRIPTION("ASoC ADAU1701 SigmaDSP driver");
883 MODULE_AUTHOR("Cliff Cai <cliff.cai@analog.com>");
884 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
885 MODULE_LICENSE("GPL");
886