1 /* 2 * atmel_ssc_dai.h - ALSA SSC interface for the Atmel SoC 3 * 4 * Copyright (C) 2005 SAN People 5 * Copyright (C) 2008 Atmel 6 * 7 * Author: Sedji Gaouaou <sedji.gaouaou@atmel.com> 8 * ATMEL CORP. 9 * 10 * Based on at91-ssc.c by 11 * Frank Mandarino <fmandarino@endrelia.com> 12 * Based on pxa2xx Platform drivers by 13 * Liam Girdwood <lrg@slimlogic.co.uk> 14 * 15 * This program is free software; you can redistribute it and/or modify 16 * it under the terms of the GNU General Public License as published by 17 * the Free Software Foundation; either version 2 of the License, or 18 * (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; if not, write to the Free Software 27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 28 */ 29 30 #ifndef _ATMEL_SSC_DAI_H 31 #define _ATMEL_SSC_DAI_H 32 33 #include <linux/types.h> 34 #include <linux/atmel-ssc.h> 35 36 #include "atmel-pcm.h" 37 38 /* SSC system clock ids */ 39 #define ATMEL_SYSCLK_MCK 0 /* SSC uses AT91 MCK as system clock */ 40 41 /* SSC divider ids */ 42 #define ATMEL_SSC_CMR_DIV 0 /* MCK divider for BCLK */ 43 #define ATMEL_SSC_TCMR_PERIOD 1 /* BCLK divider for transmit FS */ 44 #define ATMEL_SSC_RCMR_PERIOD 2 /* BCLK divider for receive FS */ 45 /* 46 * SSC direction masks 47 */ 48 #define SSC_DIR_MASK_UNUSED 0 49 #define SSC_DIR_MASK_PLAYBACK 1 50 #define SSC_DIR_MASK_CAPTURE 2 51 52 /* 53 * SSC register values that Atmel left out of <linux/atmel-ssc.h>. These 54 * are expected to be used with SSC_BF 55 */ 56 /* START bit field values */ 57 #define SSC_START_CONTINUOUS 0 58 #define SSC_START_TX_RX 1 59 #define SSC_START_LOW_RF 2 60 #define SSC_START_HIGH_RF 3 61 #define SSC_START_FALLING_RF 4 62 #define SSC_START_RISING_RF 5 63 #define SSC_START_LEVEL_RF 6 64 #define SSC_START_EDGE_RF 7 65 #define SSS_START_COMPARE_0 8 66 67 /* CKI bit field values */ 68 #define SSC_CKI_FALLING 0 69 #define SSC_CKI_RISING 1 70 71 /* CKO bit field values */ 72 #define SSC_CKO_NONE 0 73 #define SSC_CKO_CONTINUOUS 1 74 #define SSC_CKO_TRANSFER 2 75 76 /* CKS bit field values */ 77 #define SSC_CKS_DIV 0 78 #define SSC_CKS_CLOCK 1 79 #define SSC_CKS_PIN 2 80 81 /* FSEDGE bit field values */ 82 #define SSC_FSEDGE_POSITIVE 0 83 #define SSC_FSEDGE_NEGATIVE 1 84 85 /* FSOS bit field values */ 86 #define SSC_FSOS_NONE 0 87 #define SSC_FSOS_NEGATIVE 1 88 #define SSC_FSOS_POSITIVE 2 89 #define SSC_FSOS_LOW 3 90 #define SSC_FSOS_HIGH 4 91 #define SSC_FSOS_TOGGLE 5 92 93 #define START_DELAY 1 94 95 struct atmel_ssc_state { 96 u32 ssc_cmr; 97 u32 ssc_rcmr; 98 u32 ssc_rfmr; 99 u32 ssc_tcmr; 100 u32 ssc_tfmr; 101 u32 ssc_sr; 102 u32 ssc_imr; 103 }; 104 105 106 struct atmel_ssc_info { 107 char *name; 108 struct ssc_device *ssc; 109 spinlock_t lock; /* lock for dir_mask */ 110 unsigned short dir_mask; /* 0=unused, 1=playback, 2=capture */ 111 unsigned short initialized; /* true if SSC has been initialized */ 112 unsigned short daifmt; 113 unsigned short cmr_div; 114 unsigned short tcmr_period; 115 unsigned short rcmr_period; 116 struct atmel_pcm_dma_params *dma_params[2]; 117 struct atmel_ssc_state ssc_state; 118 }; 119 extern struct snd_soc_dai atmel_ssc_dai[]; 120 121 #endif /* _AT91_SSC_DAI_H */ 122