xref: /linux/sound/soc/atmel/atmel-pdmic.h (revision b6ebbac51bedf9e98e837688bc838f400196da5e)
1 #ifndef __ATMEL_PDMIC_H_
2 #define __ATMEL_PDMIC_H_
3 
4 #include <linux/bitops.h>
5 
6 #define PDMIC_CR	0x00000000
7 
8 #define PDMIC_CR_SWRST		0x1
9 #define PDMIC_CR_SWRST_MASK	BIT(0)
10 #define PDMIC_CR_SWRST_SHIFT	(0)
11 
12 #define PDMIC_CR_ENPDM_DIS	0x0
13 #define PDMIC_CR_ENPDM_EN	0x1
14 #define PDMIC_CR_ENPDM_MASK	BIT(4)
15 #define PDMIC_CR_ENPDM_SHIFT	(4)
16 
17 #define PDMIC_MR	0x00000004
18 
19 #define PDMIC_MR_CLKS_PCK	0x0
20 #define PDMIC_MR_CLKS_GCK	0x1
21 #define PDMIC_MR_CLKS_MASK	BIT(4)
22 #define PDMIC_MR_CLKS_SHIFT	(4)
23 
24 #define PDMIC_MR_PRESCAL_MASK	GENMASK(14, 8)
25 #define PDMIC_MR_PRESCAL_SHIFT	(8)
26 
27 #define PDMIC_CDR	0x00000014
28 
29 #define PDMIC_IER	0x00000018
30 #define PDMIC_IER_OVRE			BIT(25)
31 
32 #define PDMIC_IDR	0x0000001c
33 #define PDMIC_IDR_OVRE			BIT(25)
34 
35 #define PDMIC_IMR	0x00000020
36 
37 #define PDMIC_ISR	0x00000024
38 #define PDMIC_ISR_OVRE			BIT(25)
39 
40 #define PDMIC_DSPR0	0x00000058
41 
42 #define PDMIC_DSPR0_HPFBYP_DIS		0x1
43 #define PDMIC_DSPR0_HPFBYP_EN		0x0
44 #define PDMIC_DSPR0_HPFBYP_MASK		BIT(1)
45 #define PDMIC_DSPR0_HPFBYP_SHIFT	(1)
46 
47 #define PDMIC_DSPR0_SINBYP_DIS		0x1
48 #define PDMIC_DSPR0_SINBYP_EN		0x0
49 #define PDMIC_DSPR0_SINBYP_MASK		BIT(2)
50 #define PDMIC_DSPR0_SINBYP_SHIFT	(2)
51 
52 #define PDMIC_DSPR0_SIZE_16_BITS	0x0
53 #define PDMIC_DSPR0_SIZE_32_BITS	0x1
54 #define PDMIC_DSPR0_SIZE_MASK		BIT(3)
55 #define PDMIC_DSPR0_SIZE_SHIFT		(3)
56 
57 #define PDMIC_DSPR0_OSR_128		0x0
58 #define PDMIC_DSPR0_OSR_64		0x1
59 #define PDMIC_DSPR0_OSR_MASK		GENMASK(6, 4)
60 #define PDMIC_DSPR0_OSR_SHIFT		(4)
61 
62 #define PDMIC_DSPR0_SCALE_MASK		GENMASK(11, 8)
63 #define PDMIC_DSPR0_SCALE_SHIFT		(8)
64 
65 #define PDMIC_DSPR0_SHIFT_MASK		GENMASK(15, 12)
66 #define PDMIC_DSPR0_SHIFT_SHIFT		(12)
67 
68 #define PDMIC_DSPR1	0x0000005c
69 
70 #define PDMIC_DSPR1_DGAIN_MASK		GENMASK(14, 0)
71 #define PDMIC_DSPR1_DGAIN_SHIFT		(0)
72 
73 #define PDMIC_DSPR1_OFFSET_MASK		GENMASK(31, 16)
74 #define PDMIC_DSPR1_OFFSET_SHIFT	(16)
75 
76 #define PDMIC_WPMR	0x000000e4
77 
78 #define PDMIC_WPSR	0x000000e8
79 
80 #endif
81