13a63cbb8SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2a7664ab2SSongjun Wu /* Atmel PDMIC driver
3a7664ab2SSongjun Wu *
4a7664ab2SSongjun Wu * Copyright (C) 2015 Atmel
5a7664ab2SSongjun Wu *
6a7664ab2SSongjun Wu * Author: Songjun Wu <songjun.wu@atmel.com>
7a7664ab2SSongjun Wu */
8a7664ab2SSongjun Wu
9a7664ab2SSongjun Wu #include <linux/of.h>
10a7664ab2SSongjun Wu #include <linux/clk.h>
11a7664ab2SSongjun Wu #include <linux/module.h>
12a7664ab2SSongjun Wu #include <linux/platform_device.h>
13a7664ab2SSongjun Wu #include <linux/regmap.h>
14a7664ab2SSongjun Wu #include <sound/core.h>
15a7664ab2SSongjun Wu #include <sound/dmaengine_pcm.h>
16a7664ab2SSongjun Wu #include <sound/pcm_params.h>
17a7664ab2SSongjun Wu #include <sound/tlv.h>
18a7664ab2SSongjun Wu #include "atmel-pdmic.h"
19a7664ab2SSongjun Wu
20a7664ab2SSongjun Wu struct atmel_pdmic_pdata {
21a7664ab2SSongjun Wu u32 mic_min_freq;
22a7664ab2SSongjun Wu u32 mic_max_freq;
23a7664ab2SSongjun Wu s32 mic_offset;
24a7664ab2SSongjun Wu const char *card_name;
25a7664ab2SSongjun Wu };
26a7664ab2SSongjun Wu
27a7664ab2SSongjun Wu struct atmel_pdmic {
28a7664ab2SSongjun Wu dma_addr_t phy_base;
29a7664ab2SSongjun Wu struct regmap *regmap;
30a7664ab2SSongjun Wu struct clk *pclk;
31a7664ab2SSongjun Wu struct clk *gclk;
326dea9df8SKuninori Morimoto struct device *dev;
33a7664ab2SSongjun Wu int irq;
34a7664ab2SSongjun Wu struct snd_pcm_substream *substream;
35a7664ab2SSongjun Wu const struct atmel_pdmic_pdata *pdata;
36a7664ab2SSongjun Wu };
37a7664ab2SSongjun Wu
38a7664ab2SSongjun Wu static const struct of_device_id atmel_pdmic_of_match[] = {
39a7664ab2SSongjun Wu {
40a7664ab2SSongjun Wu .compatible = "atmel,sama5d2-pdmic",
41a7664ab2SSongjun Wu }, {
42a7664ab2SSongjun Wu /* sentinel */
43a7664ab2SSongjun Wu }
44a7664ab2SSongjun Wu };
45a7664ab2SSongjun Wu MODULE_DEVICE_TABLE(of, atmel_pdmic_of_match);
46a7664ab2SSongjun Wu
47a7664ab2SSongjun Wu #define PDMIC_OFFSET_MAX_VAL S16_MAX
48a7664ab2SSongjun Wu #define PDMIC_OFFSET_MIN_VAL S16_MIN
49a7664ab2SSongjun Wu
atmel_pdmic_dt_init(struct device * dev)50a7664ab2SSongjun Wu static struct atmel_pdmic_pdata *atmel_pdmic_dt_init(struct device *dev)
51a7664ab2SSongjun Wu {
52a7664ab2SSongjun Wu struct device_node *np = dev->of_node;
53a7664ab2SSongjun Wu struct atmel_pdmic_pdata *pdata;
54a7664ab2SSongjun Wu
55a7664ab2SSongjun Wu if (!np) {
56a7664ab2SSongjun Wu dev_err(dev, "device node not found\n");
57a7664ab2SSongjun Wu return ERR_PTR(-EINVAL);
58a7664ab2SSongjun Wu }
59a7664ab2SSongjun Wu
60a7664ab2SSongjun Wu pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
61a7664ab2SSongjun Wu if (!pdata)
62a7664ab2SSongjun Wu return ERR_PTR(-ENOMEM);
63a7664ab2SSongjun Wu
64a7664ab2SSongjun Wu if (of_property_read_string(np, "atmel,model", &pdata->card_name))
65a7664ab2SSongjun Wu pdata->card_name = "PDMIC";
66a7664ab2SSongjun Wu
67a7664ab2SSongjun Wu if (of_property_read_u32(np, "atmel,mic-min-freq",
68a7664ab2SSongjun Wu &pdata->mic_min_freq)) {
69a7664ab2SSongjun Wu dev_err(dev, "failed to get mic-min-freq\n");
70a7664ab2SSongjun Wu return ERR_PTR(-EINVAL);
71a7664ab2SSongjun Wu }
72a7664ab2SSongjun Wu
73a7664ab2SSongjun Wu if (of_property_read_u32(np, "atmel,mic-max-freq",
74a7664ab2SSongjun Wu &pdata->mic_max_freq)) {
75a7664ab2SSongjun Wu dev_err(dev, "failed to get mic-max-freq\n");
76a7664ab2SSongjun Wu return ERR_PTR(-EINVAL);
77a7664ab2SSongjun Wu }
78a7664ab2SSongjun Wu
79a7664ab2SSongjun Wu if (pdata->mic_max_freq < pdata->mic_min_freq) {
80a7664ab2SSongjun Wu dev_err(dev,
81032ca4a7SPeter Meerwald-Stadler "mic-max-freq should not be less than mic-min-freq\n");
82a7664ab2SSongjun Wu return ERR_PTR(-EINVAL);
83a7664ab2SSongjun Wu }
84a7664ab2SSongjun Wu
85a7664ab2SSongjun Wu if (of_property_read_s32(np, "atmel,mic-offset", &pdata->mic_offset))
86a7664ab2SSongjun Wu pdata->mic_offset = 0;
87a7664ab2SSongjun Wu
88a7664ab2SSongjun Wu if (pdata->mic_offset > PDMIC_OFFSET_MAX_VAL) {
89a7664ab2SSongjun Wu dev_warn(dev,
90a7664ab2SSongjun Wu "mic-offset value %d is larger than the max value %d, the max value is specified\n",
91a7664ab2SSongjun Wu pdata->mic_offset, PDMIC_OFFSET_MAX_VAL);
92a7664ab2SSongjun Wu pdata->mic_offset = PDMIC_OFFSET_MAX_VAL;
93a7664ab2SSongjun Wu } else if (pdata->mic_offset < PDMIC_OFFSET_MIN_VAL) {
94a7664ab2SSongjun Wu dev_warn(dev,
95a7664ab2SSongjun Wu "mic-offset value %d is less than the min value %d, the min value is specified\n",
96a7664ab2SSongjun Wu pdata->mic_offset, PDMIC_OFFSET_MIN_VAL);
97a7664ab2SSongjun Wu pdata->mic_offset = PDMIC_OFFSET_MIN_VAL;
98a7664ab2SSongjun Wu }
99a7664ab2SSongjun Wu
100a7664ab2SSongjun Wu return pdata;
101a7664ab2SSongjun Wu }
102a7664ab2SSongjun Wu
103a7664ab2SSongjun Wu /* cpu dai component */
atmel_pdmic_cpu_dai_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * cpu_dai)104a7664ab2SSongjun Wu static int atmel_pdmic_cpu_dai_startup(struct snd_pcm_substream *substream,
105a7664ab2SSongjun Wu struct snd_soc_dai *cpu_dai)
106a7664ab2SSongjun Wu {
107*6547effcSKuninori Morimoto struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
108a7664ab2SSongjun Wu struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card);
109a7664ab2SSongjun Wu int ret;
110a7664ab2SSongjun Wu
111a7664ab2SSongjun Wu ret = clk_prepare_enable(dd->gclk);
112a7664ab2SSongjun Wu if (ret)
113a7664ab2SSongjun Wu return ret;
114a7664ab2SSongjun Wu
115a7664ab2SSongjun Wu ret = clk_prepare_enable(dd->pclk);
11661743bfaSWei Yongjun if (ret) {
11761743bfaSWei Yongjun clk_disable_unprepare(dd->gclk);
118a7664ab2SSongjun Wu return ret;
11961743bfaSWei Yongjun }
120a7664ab2SSongjun Wu
121a7664ab2SSongjun Wu /* Clear all bits in the Control Register(PDMIC_CR) */
122a7664ab2SSongjun Wu regmap_write(dd->regmap, PDMIC_CR, 0);
123a7664ab2SSongjun Wu
124a7664ab2SSongjun Wu dd->substream = substream;
125a7664ab2SSongjun Wu
126a7664ab2SSongjun Wu /* Enable the overrun error interrupt */
127a7664ab2SSongjun Wu regmap_write(dd->regmap, PDMIC_IER, PDMIC_IER_OVRE);
128a7664ab2SSongjun Wu
129a7664ab2SSongjun Wu return 0;
130a7664ab2SSongjun Wu }
131a7664ab2SSongjun Wu
atmel_pdmic_cpu_dai_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * cpu_dai)132a7664ab2SSongjun Wu static void atmel_pdmic_cpu_dai_shutdown(struct snd_pcm_substream *substream,
133a7664ab2SSongjun Wu struct snd_soc_dai *cpu_dai)
134a7664ab2SSongjun Wu {
135*6547effcSKuninori Morimoto struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
136a7664ab2SSongjun Wu struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card);
137a7664ab2SSongjun Wu
138a7664ab2SSongjun Wu /* Disable the overrun error interrupt */
139a7664ab2SSongjun Wu regmap_write(dd->regmap, PDMIC_IDR, PDMIC_IDR_OVRE);
140a7664ab2SSongjun Wu
141a7664ab2SSongjun Wu clk_disable_unprepare(dd->gclk);
142a7664ab2SSongjun Wu clk_disable_unprepare(dd->pclk);
143a7664ab2SSongjun Wu }
144a7664ab2SSongjun Wu
atmel_pdmic_cpu_dai_prepare(struct snd_pcm_substream * substream,struct snd_soc_dai * cpu_dai)145a7664ab2SSongjun Wu static int atmel_pdmic_cpu_dai_prepare(struct snd_pcm_substream *substream,
146a7664ab2SSongjun Wu struct snd_soc_dai *cpu_dai)
147a7664ab2SSongjun Wu {
148*6547effcSKuninori Morimoto struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
149a7664ab2SSongjun Wu struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card);
150f3c66807SCodrin Ciubotariu struct snd_soc_component *component = cpu_dai->component;
151a7664ab2SSongjun Wu u32 val;
152f3c66807SCodrin Ciubotariu int ret;
153a7664ab2SSongjun Wu
154a7664ab2SSongjun Wu /* Clean the PDMIC Converted Data Register */
155f3c66807SCodrin Ciubotariu ret = regmap_read(dd->regmap, PDMIC_CDR, &val);
156f3c66807SCodrin Ciubotariu if (ret < 0)
157f3c66807SCodrin Ciubotariu return 0;
158f3c66807SCodrin Ciubotariu
159f3c66807SCodrin Ciubotariu ret = snd_soc_component_update_bits(component, PDMIC_CR,
160f3c66807SCodrin Ciubotariu PDMIC_CR_ENPDM_MASK,
161f3c66807SCodrin Ciubotariu PDMIC_CR_ENPDM_DIS <<
162f3c66807SCodrin Ciubotariu PDMIC_CR_ENPDM_SHIFT);
163f3c66807SCodrin Ciubotariu if (ret < 0)
164f3c66807SCodrin Ciubotariu return ret;
165f3c66807SCodrin Ciubotariu
166f3c66807SCodrin Ciubotariu return 0;
167a7664ab2SSongjun Wu }
168a7664ab2SSongjun Wu
169a7664ab2SSongjun Wu #define ATMEL_PDMIC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
170a7664ab2SSongjun Wu
171a7664ab2SSongjun Wu /* platform */
172a7664ab2SSongjun Wu #define ATMEL_PDMIC_MAX_BUF_SIZE (64 * 1024)
173a7664ab2SSongjun Wu #define ATMEL_PDMIC_PREALLOC_BUF_SIZE ATMEL_PDMIC_MAX_BUF_SIZE
174a7664ab2SSongjun Wu
175a7664ab2SSongjun Wu static const struct snd_pcm_hardware atmel_pdmic_hw = {
176a7664ab2SSongjun Wu .info = SNDRV_PCM_INFO_MMAP
177a7664ab2SSongjun Wu | SNDRV_PCM_INFO_MMAP_VALID
178a7664ab2SSongjun Wu | SNDRV_PCM_INFO_INTERLEAVED
179a7664ab2SSongjun Wu | SNDRV_PCM_INFO_RESUME
180a7664ab2SSongjun Wu | SNDRV_PCM_INFO_PAUSE,
181a7664ab2SSongjun Wu .formats = ATMEL_PDMIC_FORMATS,
182a7664ab2SSongjun Wu .buffer_bytes_max = ATMEL_PDMIC_MAX_BUF_SIZE,
183a7664ab2SSongjun Wu .period_bytes_min = 256,
184a7664ab2SSongjun Wu .period_bytes_max = 32 * 1024,
185a7664ab2SSongjun Wu .periods_min = 2,
186a7664ab2SSongjun Wu .periods_max = 256,
187a7664ab2SSongjun Wu };
188a7664ab2SSongjun Wu
189a7664ab2SSongjun Wu static int
atmel_pdmic_platform_configure_dma(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct dma_slave_config * slave_config)190a7664ab2SSongjun Wu atmel_pdmic_platform_configure_dma(struct snd_pcm_substream *substream,
191a7664ab2SSongjun Wu struct snd_pcm_hw_params *params,
192a7664ab2SSongjun Wu struct dma_slave_config *slave_config)
193a7664ab2SSongjun Wu {
194*6547effcSKuninori Morimoto struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
195a7664ab2SSongjun Wu struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card);
196a7664ab2SSongjun Wu int ret;
197a7664ab2SSongjun Wu
198a7664ab2SSongjun Wu ret = snd_hwparams_to_dma_slave_config(substream, params,
199a7664ab2SSongjun Wu slave_config);
200a7664ab2SSongjun Wu if (ret) {
2016dea9df8SKuninori Morimoto dev_err(dd->dev,
202a7664ab2SSongjun Wu "hw params to dma slave configure failed\n");
203a7664ab2SSongjun Wu return ret;
204a7664ab2SSongjun Wu }
205a7664ab2SSongjun Wu
206a7664ab2SSongjun Wu slave_config->src_addr = dd->phy_base + PDMIC_CDR;
207a7664ab2SSongjun Wu slave_config->src_maxburst = 1;
208a7664ab2SSongjun Wu slave_config->dst_maxburst = 1;
209a7664ab2SSongjun Wu
210a7664ab2SSongjun Wu return 0;
211a7664ab2SSongjun Wu }
212a7664ab2SSongjun Wu
213a7664ab2SSongjun Wu static const struct snd_dmaengine_pcm_config
214a7664ab2SSongjun Wu atmel_pdmic_dmaengine_pcm_config = {
215a7664ab2SSongjun Wu .prepare_slave_config = atmel_pdmic_platform_configure_dma,
216a7664ab2SSongjun Wu .pcm_hardware = &atmel_pdmic_hw,
217a7664ab2SSongjun Wu .prealloc_buffer_size = ATMEL_PDMIC_PREALLOC_BUF_SIZE,
218a7664ab2SSongjun Wu };
219a7664ab2SSongjun Wu
220a7664ab2SSongjun Wu /* codec */
221a7664ab2SSongjun Wu /* Mic Gain = dgain * 2^(-scale) */
222a7664ab2SSongjun Wu struct mic_gain {
223a7664ab2SSongjun Wu unsigned int dgain;
224a7664ab2SSongjun Wu unsigned int scale;
225a7664ab2SSongjun Wu };
226a7664ab2SSongjun Wu
227a7664ab2SSongjun Wu /* range from -90 dB to 90 dB */
228a7664ab2SSongjun Wu static const struct mic_gain mic_gain_table[] = {
229a7664ab2SSongjun Wu { 1, 15}, { 1, 14}, /* -90, -84 dB */
230a7664ab2SSongjun Wu { 3, 15}, { 1, 13}, { 3, 14}, { 1, 12}, /* -81, -78, -75, -72 dB */
231a7664ab2SSongjun Wu { 5, 14}, { 13, 15}, /* -70, -68 dB */
232a7664ab2SSongjun Wu { 9, 14}, { 21, 15}, { 23, 15}, { 13, 14}, /* -65 ~ -62 dB */
233a7664ab2SSongjun Wu { 29, 15}, { 33, 15}, { 37, 15}, { 41, 15}, /* -61 ~ -58 dB */
234a7664ab2SSongjun Wu { 23, 14}, { 13, 13}, { 58, 15}, { 65, 15}, /* -57 ~ -54 dB */
235a7664ab2SSongjun Wu { 73, 15}, { 41, 14}, { 23, 13}, { 13, 12}, /* -53 ~ -50 dB */
236a7664ab2SSongjun Wu { 29, 13}, { 65, 14}, { 73, 14}, { 41, 13}, /* -49 ~ -46 dB */
237a7664ab2SSongjun Wu { 23, 12}, { 207, 15}, { 29, 12}, { 65, 13}, /* -45 ~ -42 dB */
238a7664ab2SSongjun Wu { 73, 13}, { 41, 12}, { 23, 11}, { 413, 15}, /* -41 ~ -38 dB */
239a7664ab2SSongjun Wu { 463, 15}, { 519, 15}, { 583, 15}, { 327, 14}, /* -37 ~ -34 dB */
240a7664ab2SSongjun Wu { 367, 14}, { 823, 15}, { 231, 13}, { 1036, 15}, /* -33 ~ -30 dB */
241a7664ab2SSongjun Wu { 1163, 15}, { 1305, 15}, { 183, 12}, { 1642, 15}, /* -29 ~ -26 dB */
242a7664ab2SSongjun Wu { 1843, 15}, { 2068, 15}, { 145, 11}, { 2603, 15}, /* -25 ~ -22 dB */
243a7664ab2SSongjun Wu { 365, 12}, { 3277, 15}, { 3677, 15}, { 4125, 15}, /* -21 ~ -18 dB */
244a7664ab2SSongjun Wu { 4629, 15}, { 5193, 15}, { 5827, 15}, { 3269, 14}, /* -17 ~ -14 dB */
245a7664ab2SSongjun Wu { 917, 12}, { 8231, 15}, { 9235, 15}, { 5181, 14}, /* -13 ~ -10 dB */
246a7664ab2SSongjun Wu {11627, 15}, {13045, 15}, {14637, 15}, {16423, 15}, /* -9 ~ -6 dB */
247a7664ab2SSongjun Wu {18427, 15}, {20675, 15}, { 5799, 13}, {26029, 15}, /* -5 ~ -2 dB */
248a7664ab2SSongjun Wu { 7301, 13}, { 1, 0}, {18383, 14}, {10313, 13}, /* -1 ~ 2 dB */
249a7664ab2SSongjun Wu {23143, 14}, {25967, 14}, {29135, 14}, {16345, 13}, /* 3 ~ 6 dB */
250a7664ab2SSongjun Wu { 4585, 11}, {20577, 13}, { 1443, 9}, {25905, 13}, /* 7 ~ 10 dB */
251a7664ab2SSongjun Wu {14533, 12}, { 8153, 11}, { 2287, 9}, {20529, 12}, /* 11 ~ 14 dB */
252a7664ab2SSongjun Wu {11517, 11}, { 6461, 10}, {28997, 12}, { 4067, 9}, /* 15 ~ 18 dB */
253a7664ab2SSongjun Wu {18253, 11}, { 10, 0}, {22979, 11}, {25783, 11}, /* 19 ~ 22 dB */
254a7664ab2SSongjun Wu {28929, 11}, {32459, 11}, { 9105, 9}, {20431, 10}, /* 23 ~ 26 dB */
255a7664ab2SSongjun Wu {22925, 10}, {12861, 9}, { 7215, 8}, {16191, 9}, /* 27 ~ 30 dB */
256a7664ab2SSongjun Wu { 9083, 8}, {20383, 9}, {11435, 8}, { 6145, 7}, /* 31 ~ 34 dB */
257a7664ab2SSongjun Wu { 3599, 6}, {32305, 9}, {18123, 8}, {20335, 8}, /* 35 ~ 38 dB */
258a7664ab2SSongjun Wu { 713, 3}, { 100, 0}, { 7181, 6}, { 8057, 6}, /* 39 ~ 42 dB */
259a7664ab2SSongjun Wu { 565, 2}, {20287, 7}, {11381, 6}, {25539, 7}, /* 43 ~ 46 dB */
260a7664ab2SSongjun Wu { 1791, 3}, { 4019, 4}, { 9019, 5}, {20239, 6}, /* 47 ~ 50 dB */
261a7664ab2SSongjun Wu { 5677, 4}, {25479, 6}, { 7147, 4}, { 8019, 4}, /* 51 ~ 54 dB */
262a7664ab2SSongjun Wu {17995, 5}, {20191, 5}, {11327, 4}, {12709, 4}, /* 55 ~ 58 dB */
263a7664ab2SSongjun Wu { 3565, 2}, { 1000, 0}, { 1122, 0}, { 1259, 0}, /* 59 ~ 62 dB */
264a7664ab2SSongjun Wu { 2825, 1}, {12679, 3}, { 7113, 2}, { 7981, 2}, /* 63 ~ 66 dB */
265a7664ab2SSongjun Wu { 8955, 2}, {20095, 3}, {22547, 3}, {12649, 2}, /* 67 ~ 70 dB */
266a7664ab2SSongjun Wu {28385, 3}, { 3981, 0}, {17867, 2}, {20047, 2}, /* 71 ~ 74 dB */
267a7664ab2SSongjun Wu {11247, 1}, {12619, 1}, {14159, 1}, {31773, 2}, /* 75 ~ 78 dB */
268a7664ab2SSongjun Wu {17825, 1}, {10000, 0}, {11220, 0}, {12589, 0}, /* 79 ~ 82 dB */
269a7664ab2SSongjun Wu {28251, 1}, {15849, 0}, {17783, 0}, {19953, 0}, /* 83 ~ 86 dB */
270a7664ab2SSongjun Wu {22387, 0}, {25119, 0}, {28184, 0}, {31623, 0}, /* 87 ~ 90 dB */
271a7664ab2SSongjun Wu };
272a7664ab2SSongjun Wu
273a7664ab2SSongjun Wu static const DECLARE_TLV_DB_RANGE(mic_gain_tlv,
274a7664ab2SSongjun Wu 0, 1, TLV_DB_SCALE_ITEM(-9000, 600, 0),
275a7664ab2SSongjun Wu 2, 5, TLV_DB_SCALE_ITEM(-8100, 300, 0),
276a7664ab2SSongjun Wu 6, 7, TLV_DB_SCALE_ITEM(-7000, 200, 0),
277a7664ab2SSongjun Wu 8, ARRAY_SIZE(mic_gain_table)-1, TLV_DB_SCALE_ITEM(-6500, 100, 0),
278a7664ab2SSongjun Wu );
279a7664ab2SSongjun Wu
pdmic_get_mic_volsw(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)2806b0ffacdSBaoyou Xie static int pdmic_get_mic_volsw(struct snd_kcontrol *kcontrol,
281a7664ab2SSongjun Wu struct snd_ctl_elem_value *ucontrol)
282a7664ab2SSongjun Wu {
283716c5223SKuninori Morimoto struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
284a7664ab2SSongjun Wu unsigned int dgain_val, scale_val;
285a7664ab2SSongjun Wu int i;
286a7664ab2SSongjun Wu
287f0daed1aSKuninori Morimoto dgain_val = (snd_soc_component_read(component, PDMIC_DSPR1) & PDMIC_DSPR1_DGAIN_MASK)
288a7664ab2SSongjun Wu >> PDMIC_DSPR1_DGAIN_SHIFT;
289a7664ab2SSongjun Wu
290f0daed1aSKuninori Morimoto scale_val = (snd_soc_component_read(component, PDMIC_DSPR0) & PDMIC_DSPR0_SCALE_MASK)
291a7664ab2SSongjun Wu >> PDMIC_DSPR0_SCALE_SHIFT;
292a7664ab2SSongjun Wu
293a7664ab2SSongjun Wu for (i = 0; i < ARRAY_SIZE(mic_gain_table); i++) {
294a7664ab2SSongjun Wu if ((mic_gain_table[i].dgain == dgain_val) &&
295a7664ab2SSongjun Wu (mic_gain_table[i].scale == scale_val))
296a7664ab2SSongjun Wu ucontrol->value.integer.value[0] = i;
297a7664ab2SSongjun Wu }
298a7664ab2SSongjun Wu
299a7664ab2SSongjun Wu return 0;
300a7664ab2SSongjun Wu }
301a7664ab2SSongjun Wu
pdmic_put_mic_volsw(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)302a7664ab2SSongjun Wu static int pdmic_put_mic_volsw(struct snd_kcontrol *kcontrol,
303a7664ab2SSongjun Wu struct snd_ctl_elem_value *ucontrol)
304a7664ab2SSongjun Wu {
305a7664ab2SSongjun Wu struct soc_mixer_control *mc =
306a7664ab2SSongjun Wu (struct soc_mixer_control *)kcontrol->private_value;
307716c5223SKuninori Morimoto struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
308a7664ab2SSongjun Wu int max = mc->max;
309a7664ab2SSongjun Wu unsigned int val;
310a7664ab2SSongjun Wu int ret;
311a7664ab2SSongjun Wu
312a7664ab2SSongjun Wu val = ucontrol->value.integer.value[0];
313a7664ab2SSongjun Wu
314a7664ab2SSongjun Wu if (val > max)
315a7664ab2SSongjun Wu return -EINVAL;
316a7664ab2SSongjun Wu
317716c5223SKuninori Morimoto ret = snd_soc_component_update_bits(component, PDMIC_DSPR1, PDMIC_DSPR1_DGAIN_MASK,
318a7664ab2SSongjun Wu mic_gain_table[val].dgain << PDMIC_DSPR1_DGAIN_SHIFT);
319a7664ab2SSongjun Wu if (ret < 0)
320a7664ab2SSongjun Wu return ret;
321a7664ab2SSongjun Wu
322716c5223SKuninori Morimoto ret = snd_soc_component_update_bits(component, PDMIC_DSPR0, PDMIC_DSPR0_SCALE_MASK,
323a7664ab2SSongjun Wu mic_gain_table[val].scale << PDMIC_DSPR0_SCALE_SHIFT);
324a7664ab2SSongjun Wu if (ret < 0)
325a7664ab2SSongjun Wu return ret;
326a7664ab2SSongjun Wu
327a7664ab2SSongjun Wu return 0;
328a7664ab2SSongjun Wu }
329a7664ab2SSongjun Wu
330a7664ab2SSongjun Wu static const struct snd_kcontrol_new atmel_pdmic_snd_controls[] = {
331a7664ab2SSongjun Wu SOC_SINGLE_EXT_TLV("Mic Capture Volume", PDMIC_DSPR1, PDMIC_DSPR1_DGAIN_SHIFT,
332a7664ab2SSongjun Wu ARRAY_SIZE(mic_gain_table)-1, 0,
333a7664ab2SSongjun Wu pdmic_get_mic_volsw, pdmic_put_mic_volsw, mic_gain_tlv),
334a7664ab2SSongjun Wu
335a7664ab2SSongjun Wu SOC_SINGLE("High Pass Filter Switch", PDMIC_DSPR0,
336a7664ab2SSongjun Wu PDMIC_DSPR0_HPFBYP_SHIFT, 1, 1),
337a7664ab2SSongjun Wu
338a7664ab2SSongjun Wu SOC_SINGLE("SINCC Filter Switch", PDMIC_DSPR0, PDMIC_DSPR0_SINBYP_SHIFT, 1, 1),
339a7664ab2SSongjun Wu };
340a7664ab2SSongjun Wu
atmel_pdmic_component_probe(struct snd_soc_component * component)341716c5223SKuninori Morimoto static int atmel_pdmic_component_probe(struct snd_soc_component *component)
342a7664ab2SSongjun Wu {
343716c5223SKuninori Morimoto struct snd_soc_card *card = snd_soc_component_get_drvdata(component);
344a7664ab2SSongjun Wu struct atmel_pdmic *dd = snd_soc_card_get_drvdata(card);
345a7664ab2SSongjun Wu
346716c5223SKuninori Morimoto snd_soc_component_update_bits(component, PDMIC_DSPR1, PDMIC_DSPR1_OFFSET_MASK,
347a7664ab2SSongjun Wu (u32)(dd->pdata->mic_offset << PDMIC_DSPR1_OFFSET_SHIFT));
348a7664ab2SSongjun Wu
349a7664ab2SSongjun Wu return 0;
350a7664ab2SSongjun Wu }
351a7664ab2SSongjun Wu
352a7664ab2SSongjun Wu #define PDMIC_MR_PRESCAL_MAX_VAL 127
353a7664ab2SSongjun Wu
354a7664ab2SSongjun Wu static int
atmel_pdmic_cpu_dai_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * cpu_dai)355f3c66807SCodrin Ciubotariu atmel_pdmic_cpu_dai_hw_params(struct snd_pcm_substream *substream,
356a7664ab2SSongjun Wu struct snd_pcm_hw_params *params,
357f3c66807SCodrin Ciubotariu struct snd_soc_dai *cpu_dai)
358a7664ab2SSongjun Wu {
359*6547effcSKuninori Morimoto struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
360a7664ab2SSongjun Wu struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card);
361f3c66807SCodrin Ciubotariu struct snd_soc_component *component = cpu_dai->component;
362a7664ab2SSongjun Wu unsigned int rate_min = substream->runtime->hw.rate_min;
363a7664ab2SSongjun Wu unsigned int rate_max = substream->runtime->hw.rate_max;
364a7664ab2SSongjun Wu int fs = params_rate(params);
365a7664ab2SSongjun Wu int bits = params_width(params);
366a7664ab2SSongjun Wu unsigned long pclk_rate, gclk_rate;
367a7664ab2SSongjun Wu unsigned int f_pdmic;
368a7664ab2SSongjun Wu u32 mr_val, dspr0_val, pclk_prescal, gclk_prescal;
369a7664ab2SSongjun Wu
370a7664ab2SSongjun Wu if (params_channels(params) != 1) {
371716c5223SKuninori Morimoto dev_err(component->dev,
372a7664ab2SSongjun Wu "only supports one channel\n");
373a7664ab2SSongjun Wu return -EINVAL;
374a7664ab2SSongjun Wu }
375a7664ab2SSongjun Wu
376a7664ab2SSongjun Wu if ((fs < rate_min) || (fs > rate_max)) {
377716c5223SKuninori Morimoto dev_err(component->dev,
378a7664ab2SSongjun Wu "sample rate is %dHz, min rate is %dHz, max rate is %dHz\n",
379a7664ab2SSongjun Wu fs, rate_min, rate_max);
380a7664ab2SSongjun Wu
381a7664ab2SSongjun Wu return -EINVAL;
382a7664ab2SSongjun Wu }
383a7664ab2SSongjun Wu
384a7664ab2SSongjun Wu switch (bits) {
385a7664ab2SSongjun Wu case 16:
386a7664ab2SSongjun Wu dspr0_val = (PDMIC_DSPR0_SIZE_16_BITS
387a7664ab2SSongjun Wu << PDMIC_DSPR0_SIZE_SHIFT);
388a7664ab2SSongjun Wu break;
389a7664ab2SSongjun Wu case 32:
390a7664ab2SSongjun Wu dspr0_val = (PDMIC_DSPR0_SIZE_32_BITS
391a7664ab2SSongjun Wu << PDMIC_DSPR0_SIZE_SHIFT);
392a7664ab2SSongjun Wu break;
393a7664ab2SSongjun Wu default:
394a7664ab2SSongjun Wu return -EINVAL;
395a7664ab2SSongjun Wu }
396a7664ab2SSongjun Wu
397a7664ab2SSongjun Wu if ((fs << 7) > (rate_max << 6)) {
398a7664ab2SSongjun Wu f_pdmic = fs << 6;
399a7664ab2SSongjun Wu dspr0_val |= PDMIC_DSPR0_OSR_64 << PDMIC_DSPR0_OSR_SHIFT;
400a7664ab2SSongjun Wu } else {
401a7664ab2SSongjun Wu f_pdmic = fs << 7;
402a7664ab2SSongjun Wu dspr0_val |= PDMIC_DSPR0_OSR_128 << PDMIC_DSPR0_OSR_SHIFT;
403a7664ab2SSongjun Wu }
404a7664ab2SSongjun Wu
405a7664ab2SSongjun Wu pclk_rate = clk_get_rate(dd->pclk);
406a7664ab2SSongjun Wu gclk_rate = clk_get_rate(dd->gclk);
407a7664ab2SSongjun Wu
408a7664ab2SSongjun Wu /* PRESCAL = SELCK/(2*f_pdmic) - 1*/
409a7664ab2SSongjun Wu pclk_prescal = (u32)(pclk_rate/(f_pdmic << 1)) - 1;
410a7664ab2SSongjun Wu gclk_prescal = (u32)(gclk_rate/(f_pdmic << 1)) - 1;
411a7664ab2SSongjun Wu
412a7664ab2SSongjun Wu if ((pclk_prescal > PDMIC_MR_PRESCAL_MAX_VAL) ||
413a7664ab2SSongjun Wu (gclk_rate/((gclk_prescal + 1) << 1) <
414a7664ab2SSongjun Wu pclk_rate/((pclk_prescal + 1) << 1))) {
415a7664ab2SSongjun Wu mr_val = gclk_prescal << PDMIC_MR_PRESCAL_SHIFT;
416a7664ab2SSongjun Wu mr_val |= PDMIC_MR_CLKS_GCK << PDMIC_MR_CLKS_SHIFT;
417a7664ab2SSongjun Wu } else {
418a7664ab2SSongjun Wu mr_val = pclk_prescal << PDMIC_MR_PRESCAL_SHIFT;
419a7664ab2SSongjun Wu mr_val |= PDMIC_MR_CLKS_PCK << PDMIC_MR_CLKS_SHIFT;
420a7664ab2SSongjun Wu }
421a7664ab2SSongjun Wu
422716c5223SKuninori Morimoto snd_soc_component_update_bits(component, PDMIC_MR,
423a7664ab2SSongjun Wu PDMIC_MR_PRESCAL_MASK | PDMIC_MR_CLKS_MASK, mr_val);
424a7664ab2SSongjun Wu
425716c5223SKuninori Morimoto snd_soc_component_update_bits(component, PDMIC_DSPR0,
426a7664ab2SSongjun Wu PDMIC_DSPR0_OSR_MASK | PDMIC_DSPR0_SIZE_MASK, dspr0_val);
427a7664ab2SSongjun Wu
428a7664ab2SSongjun Wu return 0;
429a7664ab2SSongjun Wu }
430a7664ab2SSongjun Wu
atmel_pdmic_cpu_dai_trigger(struct snd_pcm_substream * substream,int cmd,struct snd_soc_dai * cpu_dai)431f3c66807SCodrin Ciubotariu static int atmel_pdmic_cpu_dai_trigger(struct snd_pcm_substream *substream,
432f3c66807SCodrin Ciubotariu int cmd, struct snd_soc_dai *cpu_dai)
433a7664ab2SSongjun Wu {
434f3c66807SCodrin Ciubotariu struct snd_soc_component *component = cpu_dai->component;
435a7664ab2SSongjun Wu u32 val;
436a7664ab2SSongjun Wu
437a7664ab2SSongjun Wu switch (cmd) {
438a7664ab2SSongjun Wu case SNDRV_PCM_TRIGGER_START:
439a7664ab2SSongjun Wu case SNDRV_PCM_TRIGGER_RESUME:
440a7664ab2SSongjun Wu case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
441a7664ab2SSongjun Wu val = PDMIC_CR_ENPDM_EN << PDMIC_CR_ENPDM_SHIFT;
442a7664ab2SSongjun Wu break;
443a7664ab2SSongjun Wu case SNDRV_PCM_TRIGGER_STOP:
444a7664ab2SSongjun Wu case SNDRV_PCM_TRIGGER_SUSPEND:
445a7664ab2SSongjun Wu case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
446a7664ab2SSongjun Wu val = PDMIC_CR_ENPDM_DIS << PDMIC_CR_ENPDM_SHIFT;
447a7664ab2SSongjun Wu break;
448a7664ab2SSongjun Wu default:
449a7664ab2SSongjun Wu return -EINVAL;
450a7664ab2SSongjun Wu }
451a7664ab2SSongjun Wu
452716c5223SKuninori Morimoto snd_soc_component_update_bits(component, PDMIC_CR, PDMIC_CR_ENPDM_MASK, val);
453a7664ab2SSongjun Wu
454a7664ab2SSongjun Wu return 0;
455a7664ab2SSongjun Wu }
456a7664ab2SSongjun Wu
457f3c66807SCodrin Ciubotariu static const struct snd_soc_dai_ops atmel_pdmic_cpu_dai_ops = {
458f3c66807SCodrin Ciubotariu .startup = atmel_pdmic_cpu_dai_startup,
459f3c66807SCodrin Ciubotariu .shutdown = atmel_pdmic_cpu_dai_shutdown,
460f3c66807SCodrin Ciubotariu .prepare = atmel_pdmic_cpu_dai_prepare,
461f3c66807SCodrin Ciubotariu .hw_params = atmel_pdmic_cpu_dai_hw_params,
462f3c66807SCodrin Ciubotariu .trigger = atmel_pdmic_cpu_dai_trigger,
463a7664ab2SSongjun Wu };
464a7664ab2SSongjun Wu
465a7664ab2SSongjun Wu
466f3c66807SCodrin Ciubotariu static struct snd_soc_dai_driver atmel_pdmic_cpu_dai = {
467a7664ab2SSongjun Wu .capture = {
468a7664ab2SSongjun Wu .stream_name = "Capture",
469a7664ab2SSongjun Wu .channels_min = 1,
470a7664ab2SSongjun Wu .channels_max = 1,
471a7664ab2SSongjun Wu .rates = SNDRV_PCM_RATE_KNOT,
472a7664ab2SSongjun Wu .formats = ATMEL_PDMIC_FORMATS,
473a7664ab2SSongjun Wu },
474f3c66807SCodrin Ciubotariu .ops = &atmel_pdmic_cpu_dai_ops,
475f3c66807SCodrin Ciubotariu };
476f3c66807SCodrin Ciubotariu
477f3c66807SCodrin Ciubotariu static const struct snd_soc_component_driver atmel_pdmic_cpu_dai_component = {
478f3c66807SCodrin Ciubotariu .name = "atmel-pdmic",
479f3c66807SCodrin Ciubotariu .probe = atmel_pdmic_component_probe,
480f3c66807SCodrin Ciubotariu .controls = atmel_pdmic_snd_controls,
481f3c66807SCodrin Ciubotariu .num_controls = ARRAY_SIZE(atmel_pdmic_snd_controls),
482f3c66807SCodrin Ciubotariu .idle_bias_on = 1,
483f3c66807SCodrin Ciubotariu .use_pmdown_time = 1,
4847593e008SCharles Keepax .legacy_dai_naming = 1,
485a7664ab2SSongjun Wu };
486a7664ab2SSongjun Wu
487a7664ab2SSongjun Wu /* ASoC sound card */
atmel_pdmic_asoc_card_init(struct device * dev,struct snd_soc_card * card)488a7664ab2SSongjun Wu static int atmel_pdmic_asoc_card_init(struct device *dev,
489a7664ab2SSongjun Wu struct snd_soc_card *card)
490a7664ab2SSongjun Wu {
491a7664ab2SSongjun Wu struct snd_soc_dai_link *dai_link;
492a7664ab2SSongjun Wu struct atmel_pdmic *dd = snd_soc_card_get_drvdata(card);
493f62da10aSKuninori Morimoto struct snd_soc_dai_link_component *comp;
494a7664ab2SSongjun Wu
495a7664ab2SSongjun Wu dai_link = devm_kzalloc(dev, sizeof(*dai_link), GFP_KERNEL);
496a7664ab2SSongjun Wu if (!dai_link)
497a7664ab2SSongjun Wu return -ENOMEM;
498a7664ab2SSongjun Wu
499ccfc8750SKuninori Morimoto comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL);
500f62da10aSKuninori Morimoto if (!comp)
501f62da10aSKuninori Morimoto return -ENOMEM;
502f62da10aSKuninori Morimoto
503ccfc8750SKuninori Morimoto dai_link->cpus = comp;
504*6547effcSKuninori Morimoto dai_link->codecs = &snd_soc_dummy_dlc;
505f62da10aSKuninori Morimoto
506f62da10aSKuninori Morimoto dai_link->num_cpus = 1;
507f62da10aSKuninori Morimoto dai_link->num_codecs = 1;
508f62da10aSKuninori Morimoto
509a7664ab2SSongjun Wu dai_link->name = "PDMIC";
510a7664ab2SSongjun Wu dai_link->stream_name = "PDMIC PCM";
511f62da10aSKuninori Morimoto dai_link->cpus->dai_name = dev_name(dev);
512a7664ab2SSongjun Wu
513a7664ab2SSongjun Wu card->dai_link = dai_link;
514a7664ab2SSongjun Wu card->num_links = 1;
515a7664ab2SSongjun Wu card->name = dd->pdata->card_name;
516a7664ab2SSongjun Wu card->dev = dev;
517a7664ab2SSongjun Wu
518a7664ab2SSongjun Wu return 0;
519a7664ab2SSongjun Wu }
520a7664ab2SSongjun Wu
atmel_pdmic_get_sample_rate(struct atmel_pdmic * dd,unsigned int * rate_min,unsigned int * rate_max)521a7664ab2SSongjun Wu static void atmel_pdmic_get_sample_rate(struct atmel_pdmic *dd,
522a7664ab2SSongjun Wu unsigned int *rate_min, unsigned int *rate_max)
523a7664ab2SSongjun Wu {
524a7664ab2SSongjun Wu u32 mic_min_freq = dd->pdata->mic_min_freq;
525a7664ab2SSongjun Wu u32 mic_max_freq = dd->pdata->mic_max_freq;
526a7664ab2SSongjun Wu u32 clk_max_rate = (u32)(clk_get_rate(dd->pclk) >> 1);
527a7664ab2SSongjun Wu u32 clk_min_rate = (u32)(clk_get_rate(dd->gclk) >> 8);
528a7664ab2SSongjun Wu
529a7664ab2SSongjun Wu if (mic_max_freq > clk_max_rate)
530a7664ab2SSongjun Wu mic_max_freq = clk_max_rate;
531a7664ab2SSongjun Wu
532a7664ab2SSongjun Wu if (mic_min_freq < clk_min_rate)
533a7664ab2SSongjun Wu mic_min_freq = clk_min_rate;
534a7664ab2SSongjun Wu
535a7664ab2SSongjun Wu *rate_min = DIV_ROUND_CLOSEST(mic_min_freq, 128);
536a7664ab2SSongjun Wu *rate_max = mic_max_freq >> 6;
537a7664ab2SSongjun Wu }
538a7664ab2SSongjun Wu
539a7664ab2SSongjun Wu /* PDMIC interrupt handler */
atmel_pdmic_interrupt(int irq,void * dev_id)540a7664ab2SSongjun Wu static irqreturn_t atmel_pdmic_interrupt(int irq, void *dev_id)
541a7664ab2SSongjun Wu {
542a7664ab2SSongjun Wu struct atmel_pdmic *dd = (struct atmel_pdmic *)dev_id;
543a7664ab2SSongjun Wu u32 pdmic_isr;
544a7664ab2SSongjun Wu irqreturn_t ret = IRQ_NONE;
545a7664ab2SSongjun Wu
546a7664ab2SSongjun Wu regmap_read(dd->regmap, PDMIC_ISR, &pdmic_isr);
547a7664ab2SSongjun Wu
548a7664ab2SSongjun Wu if (pdmic_isr & PDMIC_ISR_OVRE) {
549a7664ab2SSongjun Wu regmap_update_bits(dd->regmap, PDMIC_CR, PDMIC_CR_ENPDM_MASK,
550a7664ab2SSongjun Wu PDMIC_CR_ENPDM_DIS << PDMIC_CR_ENPDM_SHIFT);
551a7664ab2SSongjun Wu
552a7664ab2SSongjun Wu snd_pcm_stop_xrun(dd->substream);
553a7664ab2SSongjun Wu
554a7664ab2SSongjun Wu ret = IRQ_HANDLED;
555a7664ab2SSongjun Wu }
556a7664ab2SSongjun Wu
557a7664ab2SSongjun Wu return ret;
558a7664ab2SSongjun Wu }
559a7664ab2SSongjun Wu
560a7664ab2SSongjun Wu /* regmap configuration */
561a7664ab2SSongjun Wu #define ATMEL_PDMIC_REG_MAX 0x124
562a7664ab2SSongjun Wu static const struct regmap_config atmel_pdmic_regmap_config = {
563a7664ab2SSongjun Wu .reg_bits = 32,
564a7664ab2SSongjun Wu .reg_stride = 4,
565a7664ab2SSongjun Wu .val_bits = 32,
566a7664ab2SSongjun Wu .max_register = ATMEL_PDMIC_REG_MAX,
567a7664ab2SSongjun Wu };
568a7664ab2SSongjun Wu
atmel_pdmic_probe(struct platform_device * pdev)569a7664ab2SSongjun Wu static int atmel_pdmic_probe(struct platform_device *pdev)
570a7664ab2SSongjun Wu {
571a7664ab2SSongjun Wu struct device *dev = &pdev->dev;
572a7664ab2SSongjun Wu struct atmel_pdmic *dd;
573a7664ab2SSongjun Wu struct resource *res;
574a7664ab2SSongjun Wu void __iomem *io_base;
575a7664ab2SSongjun Wu const struct atmel_pdmic_pdata *pdata;
576a7664ab2SSongjun Wu struct snd_soc_card *card;
577a7664ab2SSongjun Wu unsigned int rate_min, rate_max;
578a7664ab2SSongjun Wu int ret;
579a7664ab2SSongjun Wu
580a7664ab2SSongjun Wu pdata = atmel_pdmic_dt_init(dev);
581a7664ab2SSongjun Wu if (IS_ERR(pdata))
582a7664ab2SSongjun Wu return PTR_ERR(pdata);
583a7664ab2SSongjun Wu
584a7664ab2SSongjun Wu dd = devm_kzalloc(dev, sizeof(*dd), GFP_KERNEL);
585a7664ab2SSongjun Wu if (!dd)
586a7664ab2SSongjun Wu return -ENOMEM;
587a7664ab2SSongjun Wu
588a7664ab2SSongjun Wu dd->pdata = pdata;
5896dea9df8SKuninori Morimoto dd->dev = dev;
590a7664ab2SSongjun Wu
591a7664ab2SSongjun Wu dd->irq = platform_get_irq(pdev, 0);
592cf9441adSStephen Boyd if (dd->irq < 0)
593cf9441adSStephen Boyd return dd->irq;
594a7664ab2SSongjun Wu
595a7664ab2SSongjun Wu dd->pclk = devm_clk_get(dev, "pclk");
596a7664ab2SSongjun Wu if (IS_ERR(dd->pclk)) {
597a7664ab2SSongjun Wu ret = PTR_ERR(dd->pclk);
598a7664ab2SSongjun Wu dev_err(dev, "failed to get peripheral clock: %d\n", ret);
599a7664ab2SSongjun Wu return ret;
600a7664ab2SSongjun Wu }
601a7664ab2SSongjun Wu
602a7664ab2SSongjun Wu dd->gclk = devm_clk_get(dev, "gclk");
603a7664ab2SSongjun Wu if (IS_ERR(dd->gclk)) {
604a7664ab2SSongjun Wu ret = PTR_ERR(dd->gclk);
605a7664ab2SSongjun Wu dev_err(dev, "failed to get GCK: %d\n", ret);
606a7664ab2SSongjun Wu return ret;
607a7664ab2SSongjun Wu }
608a7664ab2SSongjun Wu
609032ca4a7SPeter Meerwald-Stadler /* The gclk clock frequency must always be three times
610a7664ab2SSongjun Wu * lower than the pclk clock frequency
611a7664ab2SSongjun Wu */
612a7664ab2SSongjun Wu ret = clk_set_rate(dd->gclk, clk_get_rate(dd->pclk)/3);
613a7664ab2SSongjun Wu if (ret) {
614a7664ab2SSongjun Wu dev_err(dev, "failed to set GCK clock rate: %d\n", ret);
615a7664ab2SSongjun Wu return ret;
616a7664ab2SSongjun Wu }
617a7664ab2SSongjun Wu
61892570939SYang Yingliang io_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
6191f598e68SLadislav Michl if (IS_ERR(io_base))
6201f598e68SLadislav Michl return PTR_ERR(io_base);
621a7664ab2SSongjun Wu
622a7664ab2SSongjun Wu dd->phy_base = res->start;
623a7664ab2SSongjun Wu
624a7664ab2SSongjun Wu dd->regmap = devm_regmap_init_mmio(dev, io_base,
625a7664ab2SSongjun Wu &atmel_pdmic_regmap_config);
626a7664ab2SSongjun Wu if (IS_ERR(dd->regmap)) {
627a7664ab2SSongjun Wu ret = PTR_ERR(dd->regmap);
628a7664ab2SSongjun Wu dev_err(dev, "failed to init register map: %d\n", ret);
629a7664ab2SSongjun Wu return ret;
630a7664ab2SSongjun Wu }
631a7664ab2SSongjun Wu
632a7664ab2SSongjun Wu ret = devm_request_irq(dev, dd->irq, atmel_pdmic_interrupt, 0,
633a7664ab2SSongjun Wu "PDMIC", (void *)dd);
634a7664ab2SSongjun Wu if (ret < 0) {
635a7664ab2SSongjun Wu dev_err(dev, "can't register ISR for IRQ %u (ret=%i)\n",
636a7664ab2SSongjun Wu dd->irq, ret);
637a7664ab2SSongjun Wu return ret;
638a7664ab2SSongjun Wu }
639a7664ab2SSongjun Wu
640032ca4a7SPeter Meerwald-Stadler /* Get the minimal and maximal sample rate that the microphone supports */
641a7664ab2SSongjun Wu atmel_pdmic_get_sample_rate(dd, &rate_min, &rate_max);
642a7664ab2SSongjun Wu
643a7664ab2SSongjun Wu /* register cpu dai */
644a7664ab2SSongjun Wu atmel_pdmic_cpu_dai.capture.rate_min = rate_min;
645a7664ab2SSongjun Wu atmel_pdmic_cpu_dai.capture.rate_max = rate_max;
646a7664ab2SSongjun Wu ret = devm_snd_soc_register_component(dev,
647a7664ab2SSongjun Wu &atmel_pdmic_cpu_dai_component,
648a7664ab2SSongjun Wu &atmel_pdmic_cpu_dai, 1);
649a7664ab2SSongjun Wu if (ret) {
650a7664ab2SSongjun Wu dev_err(dev, "could not register CPU DAI: %d\n", ret);
651a7664ab2SSongjun Wu return ret;
652a7664ab2SSongjun Wu }
653a7664ab2SSongjun Wu
654a7664ab2SSongjun Wu /* register platform */
655a7664ab2SSongjun Wu ret = devm_snd_dmaengine_pcm_register(dev,
656a7664ab2SSongjun Wu &atmel_pdmic_dmaengine_pcm_config,
657a7664ab2SSongjun Wu 0);
658a7664ab2SSongjun Wu if (ret) {
659a7664ab2SSongjun Wu dev_err(dev, "could not register platform: %d\n", ret);
660a7664ab2SSongjun Wu return ret;
661a7664ab2SSongjun Wu }
662a7664ab2SSongjun Wu
663a7664ab2SSongjun Wu /* register sound card */
664a7664ab2SSongjun Wu card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
665a7664ab2SSongjun Wu if (!card) {
666a7664ab2SSongjun Wu ret = -ENOMEM;
667a7664ab2SSongjun Wu goto unregister_codec;
668a7664ab2SSongjun Wu }
669a7664ab2SSongjun Wu
670a7664ab2SSongjun Wu snd_soc_card_set_drvdata(card, dd);
671a7664ab2SSongjun Wu
672a7664ab2SSongjun Wu ret = atmel_pdmic_asoc_card_init(dev, card);
673a7664ab2SSongjun Wu if (ret) {
674a7664ab2SSongjun Wu dev_err(dev, "failed to init sound card: %d\n", ret);
675a7664ab2SSongjun Wu goto unregister_codec;
676a7664ab2SSongjun Wu }
677a7664ab2SSongjun Wu
678a7664ab2SSongjun Wu ret = devm_snd_soc_register_card(dev, card);
679a7664ab2SSongjun Wu if (ret) {
680a7664ab2SSongjun Wu dev_err(dev, "failed to register sound card: %d\n", ret);
681a7664ab2SSongjun Wu goto unregister_codec;
682a7664ab2SSongjun Wu }
683a7664ab2SSongjun Wu
684a7664ab2SSongjun Wu return 0;
685a7664ab2SSongjun Wu
686a7664ab2SSongjun Wu unregister_codec:
687a7664ab2SSongjun Wu return ret;
688a7664ab2SSongjun Wu }
689a7664ab2SSongjun Wu
690a7664ab2SSongjun Wu static struct platform_driver atmel_pdmic_driver = {
691a7664ab2SSongjun Wu .driver = {
692a7664ab2SSongjun Wu .name = "atmel-pdmic",
69367ed7812SRuan Jinjie .of_match_table = atmel_pdmic_of_match,
694a7664ab2SSongjun Wu .pm = &snd_soc_pm_ops,
695a7664ab2SSongjun Wu },
696a7664ab2SSongjun Wu .probe = atmel_pdmic_probe,
697a7664ab2SSongjun Wu };
698a7664ab2SSongjun Wu module_platform_driver(atmel_pdmic_driver);
699a7664ab2SSongjun Wu
700a7664ab2SSongjun Wu MODULE_DESCRIPTION("Atmel PDMIC driver under ALSA SoC architecture");
701a7664ab2SSongjun Wu MODULE_AUTHOR("Songjun Wu <songjun.wu@atmel.com>");
702a7664ab2SSongjun Wu MODULE_LICENSE("GPL v2");
703