xref: /linux/sound/soc/atmel/atmel-classd.h (revision 4b132aacb0768ac1e652cf517097ea6f237214b9)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ATMEL_CLASSD_H_
3 #define __ATMEL_CLASSD_H_
4 
5 #define CLASSD_CR		0x00000000
6 #define CLASSD_CR_RESET		0x1
7 
8 #define CLASSD_MR			0x00000004
9 
10 #define CLASSD_MR_LEN_DIS		0x0
11 #define CLASSD_MR_LEN_EN		0x1
12 #define CLASSD_MR_LEN_MASK		(0x1 << 0)
13 #define CLASSD_MR_LEN_SHIFT		(0)
14 
15 #define CLASSD_MR_LMUTE_DIS		0x0
16 #define CLASSD_MR_LMUTE_EN		0x1
17 #define CLASSD_MR_LMUTE_SHIFT		(0x1)
18 #define CLASSD_MR_LMUTE_MASK		(0x1 << 1)
19 
20 #define CLASSD_MR_REN_DIS		0x0
21 #define CLASSD_MR_REN_EN		0x1
22 #define CLASSD_MR_REN_MASK		(0x1 << 4)
23 #define CLASSD_MR_REN_SHIFT		(4)
24 
25 #define CLASSD_MR_RMUTE_DIS		0x0
26 #define CLASSD_MR_RMUTE_EN		0x1
27 #define CLASSD_MR_RMUTE_SHIFT		(0x5)
28 #define CLASSD_MR_RMUTE_MASK		(0x1 << 5)
29 
30 #define CLASSD_MR_PWMTYP_SINGLE		0x0
31 #define CLASSD_MR_PWMTYP_DIFF		0x1
32 #define CLASSD_MR_PWMTYP_MASK		(0x1 << 8)
33 #define CLASSD_MR_PWMTYP_SHIFT		(8)
34 
35 #define CLASSD_MR_NON_OVERLAP_DIS	0x0
36 #define CLASSD_MR_NON_OVERLAP_EN	0x1
37 #define CLASSD_MR_NON_OVERLAP_MASK	(0x1 << 16)
38 #define CLASSD_MR_NON_OVERLAP_SHIFT	(16)
39 
40 #define CLASSD_MR_NOVR_VAL_5NS		0x0
41 #define CLASSD_MR_NOVR_VAL_10NS		0x1
42 #define CLASSD_MR_NOVR_VAL_15NS		0x2
43 #define CLASSD_MR_NOVR_VAL_20NS		0x3
44 #define CLASSD_MR_NOVR_VAL_MASK		(0x3 << 20)
45 #define CLASSD_MR_NOVR_VAL_SHIFT	(20)
46 
47 #define CLASSD_INTPMR				0x00000008
48 
49 #define CLASSD_INTPMR_ATTL_MASK			(0x3f << 0)
50 #define CLASSD_INTPMR_ATTL_SHIFT		(0)
51 #define CLASSD_INTPMR_ATTR_MASK			(0x3f << 8)
52 #define CLASSD_INTPMR_ATTR_SHIFT		(8)
53 
54 #define CLASSD_INTPMR_DSP_CLK_FREQ_12M288	0x0
55 #define CLASSD_INTPMR_DSP_CLK_FREQ_11M2896	0x1
56 #define CLASSD_INTPMR_DSP_CLK_FREQ_MASK		(0x1 << 16)
57 #define CLASSD_INTPMR_DSP_CLK_FREQ_SHIFT	(16)
58 
59 #define CLASSD_INTPMR_DEEMP_DIS			0x0
60 #define CLASSD_INTPMR_DEEMP_EN			0x1
61 #define CLASSD_INTPMR_DEEMP_MASK		(0x1 << 18)
62 #define CLASSD_INTPMR_DEEMP_SHIFT		(18)
63 
64 #define CLASSD_INTPMR_SWAP_LEFT_ON_LSB		0x0
65 #define CLASSD_INTPMR_SWAP_RIGHT_ON_LSB		0x1
66 #define CLASSD_INTPMR_SWAP_MASK			(0x1 << 19)
67 #define CLASSD_INTPMR_SWAP_SHIFT		(19)
68 
69 #define CLASSD_INTPMR_FRAME_8K			0x0
70 #define CLASSD_INTPMR_FRAME_16K			0x1
71 #define CLASSD_INTPMR_FRAME_32K			0x2
72 #define CLASSD_INTPMR_FRAME_48K			0x3
73 #define CLASSD_INTPMR_FRAME_96K			0x4
74 #define CLASSD_INTPMR_FRAME_22K			0x5
75 #define CLASSD_INTPMR_FRAME_44K			0x6
76 #define CLASSD_INTPMR_FRAME_88K			0x7
77 #define CLASSD_INTPMR_FRAME_MASK		(0x7 << 20)
78 #define CLASSD_INTPMR_FRAME_SHIFT		(20)
79 
80 #define CLASSD_INTPMR_EQCFG_FLAT		0x0
81 #define CLASSD_INTPMR_EQCFG_B_BOOST_12		0x1
82 #define CLASSD_INTPMR_EQCFG_B_BOOST_6		0x2
83 #define CLASSD_INTPMR_EQCFG_B_CUT_12		0x3
84 #define CLASSD_INTPMR_EQCFG_B_CUT_6		0x4
85 #define CLASSD_INTPMR_EQCFG_M_BOOST_3		0x5
86 #define CLASSD_INTPMR_EQCFG_M_BOOST_8		0x6
87 #define CLASSD_INTPMR_EQCFG_M_CUT_3		0x7
88 #define CLASSD_INTPMR_EQCFG_M_CUT_8		0x8
89 #define CLASSD_INTPMR_EQCFG_T_BOOST_12		0x9
90 #define CLASSD_INTPMR_EQCFG_T_BOOST_6		0xa
91 #define CLASSD_INTPMR_EQCFG_T_CUT_12		0xb
92 #define CLASSD_INTPMR_EQCFG_T_CUT_6		0xc
93 #define CLASSD_INTPMR_EQCFG_SHIFT		(24)
94 
95 #define CLASSD_INTPMR_MONO_DIS			0x0
96 #define CLASSD_INTPMR_MONO_EN			0x1
97 #define CLASSD_INTPMR_MONO_MASK			(0x1 << 28)
98 #define CLASSD_INTPMR_MONO_SHIFT		(28)
99 
100 #define CLASSD_INTPMR_MONO_MODE_MIX		0x0
101 #define CLASSD_INTPMR_MONO_MODE_SAT		0x1
102 #define CLASSD_INTPMR_MONO_MODE_LEFT		0x2
103 #define CLASSD_INTPMR_MONO_MODE_RIGHT		0x3
104 #define CLASSD_INTPMR_MONO_MODE_MASK		(0x3 << 29)
105 #define CLASSD_INTPMR_MONO_MODE_SHIFT		(29)
106 
107 #define CLASSD_INTSR	0x0000000c
108 
109 #define CLASSD_THR	0x00000010
110 
111 #define CLASSD_IER	0x00000014
112 
113 #define CLASSD_IDR	0x00000018
114 
115 #define CLASSD_IMR	0x0000001c
116 
117 #define CLASSD_ISR	0x00000020
118 
119 #define CLASSD_WPMR	0x000000e4
120 
121 #endif
122