1*7bf060d0SVijendar Mukunda /* SPDX-License-Identifier: GPL-2.0+ */ 2*7bf060d0SVijendar Mukunda /* 3*7bf060d0SVijendar Mukunda * AMD ACP 5.x Register Documentation 4*7bf060d0SVijendar Mukunda * 5*7bf060d0SVijendar Mukunda * Copyright 2021 Advanced Micro Devices, Inc. 6*7bf060d0SVijendar Mukunda */ 7*7bf060d0SVijendar Mukunda 8*7bf060d0SVijendar Mukunda #ifndef _acp_ip_OFFSET_HEADER 9*7bf060d0SVijendar Mukunda #define _acp_ip_OFFSET_HEADER 10*7bf060d0SVijendar Mukunda 11*7bf060d0SVijendar Mukunda /* Registers from ACP_DMA block */ 12*7bf060d0SVijendar Mukunda #define ACP_DMA_CNTL_0 0x1240000 13*7bf060d0SVijendar Mukunda #define ACP_DMA_CNTL_1 0x1240004 14*7bf060d0SVijendar Mukunda #define ACP_DMA_CNTL_2 0x1240008 15*7bf060d0SVijendar Mukunda #define ACP_DMA_CNTL_3 0x124000C 16*7bf060d0SVijendar Mukunda #define ACP_DMA_CNTL_4 0x1240010 17*7bf060d0SVijendar Mukunda #define ACP_DMA_CNTL_5 0x1240014 18*7bf060d0SVijendar Mukunda #define ACP_DMA_CNTL_6 0x1240018 19*7bf060d0SVijendar Mukunda #define ACP_DMA_CNTL_7 0x124001C 20*7bf060d0SVijendar Mukunda #define ACP_DMA_DSCR_STRT_IDX_0 0x1240020 21*7bf060d0SVijendar Mukunda #define ACP_DMA_DSCR_STRT_IDX_1 0x1240024 22*7bf060d0SVijendar Mukunda #define ACP_DMA_DSCR_STRT_IDX_2 0x1240028 23*7bf060d0SVijendar Mukunda #define ACP_DMA_DSCR_STRT_IDX_3 0x124002C 24*7bf060d0SVijendar Mukunda #define ACP_DMA_DSCR_STRT_IDX_4 0x1240030 25*7bf060d0SVijendar Mukunda #define ACP_DMA_DSCR_STRT_IDX_5 0x1240034 26*7bf060d0SVijendar Mukunda #define ACP_DMA_DSCR_STRT_IDX_6 0x1240038 27*7bf060d0SVijendar Mukunda #define ACP_DMA_DSCR_STRT_IDX_7 0x124003C 28*7bf060d0SVijendar Mukunda #define ACP_DMA_DSCR_CNT_0 0x1240040 29*7bf060d0SVijendar Mukunda #define ACP_DMA_DSCR_CNT_1 0x1240044 30*7bf060d0SVijendar Mukunda #define ACP_DMA_DSCR_CNT_2 0x1240048 31*7bf060d0SVijendar Mukunda #define ACP_DMA_DSCR_CNT_3 0x124004C 32*7bf060d0SVijendar Mukunda #define ACP_DMA_DSCR_CNT_4 0x1240050 33*7bf060d0SVijendar Mukunda #define ACP_DMA_DSCR_CNT_5 0x1240054 34*7bf060d0SVijendar Mukunda #define ACP_DMA_DSCR_CNT_6 0x1240058 35*7bf060d0SVijendar Mukunda #define ACP_DMA_DSCR_CNT_7 0x124005C 36*7bf060d0SVijendar Mukunda #define ACP_DMA_PRIO_0 0x1240060 37*7bf060d0SVijendar Mukunda #define ACP_DMA_PRIO_1 0x1240064 38*7bf060d0SVijendar Mukunda #define ACP_DMA_PRIO_2 0x1240068 39*7bf060d0SVijendar Mukunda #define ACP_DMA_PRIO_3 0x124006C 40*7bf060d0SVijendar Mukunda #define ACP_DMA_PRIO_4 0x1240070 41*7bf060d0SVijendar Mukunda #define ACP_DMA_PRIO_5 0x1240074 42*7bf060d0SVijendar Mukunda #define ACP_DMA_PRIO_6 0x1240078 43*7bf060d0SVijendar Mukunda #define ACP_DMA_PRIO_7 0x124007C 44*7bf060d0SVijendar Mukunda #define ACP_DMA_CUR_DSCR_0 0x1240080 45*7bf060d0SVijendar Mukunda #define ACP_DMA_CUR_DSCR_1 0x1240084 46*7bf060d0SVijendar Mukunda #define ACP_DMA_CUR_DSCR_2 0x1240088 47*7bf060d0SVijendar Mukunda #define ACP_DMA_CUR_DSCR_3 0x124008C 48*7bf060d0SVijendar Mukunda #define ACP_DMA_CUR_DSCR_4 0x1240090 49*7bf060d0SVijendar Mukunda #define ACP_DMA_CUR_DSCR_5 0x1240094 50*7bf060d0SVijendar Mukunda #define ACP_DMA_CUR_DSCR_6 0x1240098 51*7bf060d0SVijendar Mukunda #define ACP_DMA_CUR_DSCR_7 0x124009C 52*7bf060d0SVijendar Mukunda #define ACP_DMA_CUR_TRANS_CNT_0 0x12400A0 53*7bf060d0SVijendar Mukunda #define ACP_DMA_CUR_TRANS_CNT_1 0x12400A4 54*7bf060d0SVijendar Mukunda #define ACP_DMA_CUR_TRANS_CNT_2 0x12400A8 55*7bf060d0SVijendar Mukunda #define ACP_DMA_CUR_TRANS_CNT_3 0x12400AC 56*7bf060d0SVijendar Mukunda #define ACP_DMA_CUR_TRANS_CNT_4 0x12400B0 57*7bf060d0SVijendar Mukunda #define ACP_DMA_CUR_TRANS_CNT_5 0x12400B4 58*7bf060d0SVijendar Mukunda #define ACP_DMA_CUR_TRANS_CNT_6 0x12400B8 59*7bf060d0SVijendar Mukunda #define ACP_DMA_CUR_TRANS_CNT_7 0x12400BC 60*7bf060d0SVijendar Mukunda #define ACP_DMA_ERR_STS_0 0x12400C0 61*7bf060d0SVijendar Mukunda #define ACP_DMA_ERR_STS_1 0x12400C4 62*7bf060d0SVijendar Mukunda #define ACP_DMA_ERR_STS_2 0x12400C8 63*7bf060d0SVijendar Mukunda #define ACP_DMA_ERR_STS_3 0x12400CC 64*7bf060d0SVijendar Mukunda #define ACP_DMA_ERR_STS_4 0x12400D0 65*7bf060d0SVijendar Mukunda #define ACP_DMA_ERR_STS_5 0x12400D4 66*7bf060d0SVijendar Mukunda #define ACP_DMA_ERR_STS_6 0x12400D8 67*7bf060d0SVijendar Mukunda #define ACP_DMA_ERR_STS_7 0x12400DC 68*7bf060d0SVijendar Mukunda #define ACP_DMA_DESC_BASE_ADDR 0x12400E0 69*7bf060d0SVijendar Mukunda #define ACP_DMA_DESC_MAX_NUM_DSCR 0x12400E4 70*7bf060d0SVijendar Mukunda #define ACP_DMA_CH_STS 0x12400E8 71*7bf060d0SVijendar Mukunda #define ACP_DMA_CH_GROUP 0x12400EC 72*7bf060d0SVijendar Mukunda #define ACP_DMA_CH_RST_STS 0x12400F0 73*7bf060d0SVijendar Mukunda 74*7bf060d0SVijendar Mukunda /* Registers from ACP_AXI2AXIATU block */ 75*7bf060d0SVijendar Mukunda #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1 0x1240C00 76*7bf060d0SVijendar Mukunda #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_1 0x1240C04 77*7bf060d0SVijendar Mukunda #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_2 0x1240C08 78*7bf060d0SVijendar Mukunda #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_2 0x1240C0C 79*7bf060d0SVijendar Mukunda #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_3 0x1240C10 80*7bf060d0SVijendar Mukunda #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_3 0x1240C14 81*7bf060d0SVijendar Mukunda #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_4 0x1240C18 82*7bf060d0SVijendar Mukunda #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_4 0x1240C1C 83*7bf060d0SVijendar Mukunda #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_5 0x1240C20 84*7bf060d0SVijendar Mukunda #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_5 0x1240C24 85*7bf060d0SVijendar Mukunda #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_6 0x1240C28 86*7bf060d0SVijendar Mukunda #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_6 0x1240C2C 87*7bf060d0SVijendar Mukunda #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_7 0x1240C30 88*7bf060d0SVijendar Mukunda #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_7 0x1240C34 89*7bf060d0SVijendar Mukunda #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_8 0x1240C38 90*7bf060d0SVijendar Mukunda #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_8 0x1240C3C 91*7bf060d0SVijendar Mukunda #define ACPAXI2AXI_ATU_CTRL 0x1240C40 92*7bf060d0SVijendar Mukunda 93*7bf060d0SVijendar Mukunda /* Registers from ACP_CLKRST block */ 94*7bf060d0SVijendar Mukunda #define ACP_SOFT_RESET 0x1241000 95*7bf060d0SVijendar Mukunda #define ACP_CONTROL 0x1241004 96*7bf060d0SVijendar Mukunda #define ACP_STATUS 0x1241008 97*7bf060d0SVijendar Mukunda #define ACP_DYNAMIC_CG_MASTER_CONTROL 0x1241010 98*7bf060d0SVijendar Mukunda 99*7bf060d0SVijendar Mukunda /* Registers from ACP_MISC block */ 100*7bf060d0SVijendar Mukunda #define ACP_EXTERNAL_INTR_ENB 0x1241800 101*7bf060d0SVijendar Mukunda #define ACP_EXTERNAL_INTR_CNTL 0x1241804 102*7bf060d0SVijendar Mukunda #define ACP_EXTERNAL_INTR_STAT 0x1241808 103*7bf060d0SVijendar Mukunda #define ACP_ERROR_STATUS 0x12418C4 104*7bf060d0SVijendar Mukunda #define ACP_SW_I2S_ERROR_REASON 0x12418C8 105*7bf060d0SVijendar Mukunda #define ACP_MEM_PG_STS 0x12418CC 106*7bf060d0SVijendar Mukunda #define ACP_PGMEM_DEEP_SLEEP_CTRL 0x12418D0 107*7bf060d0SVijendar Mukunda #define ACP_PGMEM_SHUT_DOWN_CTRL 0x12418D4 108*7bf060d0SVijendar Mukunda 109*7bf060d0SVijendar Mukunda /* Registers from ACP_PGFSM block */ 110*7bf060d0SVijendar Mukunda #define ACP_PIN_CONFIG 0x1241400 111*7bf060d0SVijendar Mukunda #define ACP_PAD_PULLUP_CTRL 0x1241404 112*7bf060d0SVijendar Mukunda #define ACP_PAD_PULLDOWN_CTRL 0x1241408 113*7bf060d0SVijendar Mukunda #define ACP_PAD_DRIVE_STRENGTH_CTRL 0x124140C 114*7bf060d0SVijendar Mukunda #define ACP_PAD_SCHMEN_CTRL 0x1241410 115*7bf060d0SVijendar Mukunda #define ACP_SW_PAD_KEEPER_EN 0x1241414 116*7bf060d0SVijendar Mukunda #define ACP_SW_WAKE_EN 0x1241418 117*7bf060d0SVijendar Mukunda #define ACP_I2S_WAKE_EN 0x124141C 118*7bf060d0SVijendar Mukunda #define ACP_PME_EN 0x1241420 119*7bf060d0SVijendar Mukunda #define ACP_PGFSM_CONTROL 0x1241424 120*7bf060d0SVijendar Mukunda #define ACP_PGFSM_STATUS 0x1241428 121*7bf060d0SVijendar Mukunda #define ACP_CLKMUX_SEL 0x124142C 122*7bf060d0SVijendar Mukunda #define ACP_DEVICE_STATE 0x1241430 123*7bf060d0SVijendar Mukunda #define AZ_DEVICE_STATE 0x1241434 124*7bf060d0SVijendar Mukunda #define ACP_INTR_URGENCY_TIMER 0x1241438 125*7bf060d0SVijendar Mukunda #define AZ_INTR_URGENCY_TIMER 0x124143C 126*7bf060d0SVijendar Mukunda #define ACP_AON_SW_INTR_TRIG 0x1241440 127*7bf060d0SVijendar Mukunda 128*7bf060d0SVijendar Mukunda /* Registers from ACP_SCRATCH block */ 129*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_0 0x1250000 130*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_1 0x1250004 131*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_2 0x1250008 132*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_3 0x125000C 133*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_4 0x1250010 134*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_5 0x1250014 135*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_6 0x1250018 136*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_7 0x125001C 137*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_8 0x1250020 138*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_9 0x1250024 139*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_10 0x1250028 140*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_11 0x125002C 141*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_12 0x1250030 142*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_13 0x1250034 143*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_14 0x1250038 144*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_15 0x125003C 145*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_16 0x1250040 146*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_17 0x1250044 147*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_18 0x1250048 148*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_19 0x125004C 149*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_20 0x1250050 150*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_21 0x1250054 151*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_22 0x1250058 152*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_23 0x125005C 153*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_24 0x1250060 154*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_25 0x1250064 155*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_26 0x1250068 156*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_27 0x125006C 157*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_28 0x1250070 158*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_29 0x1250074 159*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_30 0x1250078 160*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_31 0x125007C 161*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_32 0x1250080 162*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_33 0x1250084 163*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_34 0x1250088 164*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_35 0x125008C 165*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_36 0x1250090 166*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_37 0x1250094 167*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_38 0x1250098 168*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_39 0x125009C 169*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_40 0x12500A0 170*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_41 0x12500A4 171*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_42 0x12500A8 172*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_43 0x12500AC 173*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_44 0x12500B0 174*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_45 0x12500B4 175*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_46 0x12500B8 176*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_47 0x12500BC 177*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_48 0x12500C0 178*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_49 0x12500C4 179*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_50 0x12500C8 180*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_51 0x12500CC 181*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_52 0x12500D0 182*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_53 0x12500D4 183*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_54 0x12500D8 184*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_55 0x12500DC 185*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_56 0x12500E0 186*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_57 0x12500E4 187*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_58 0x12500E8 188*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_59 0x12500EC 189*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_60 0x12500F0 190*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_61 0x12500F4 191*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_62 0x12500F8 192*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_63 0x12500FC 193*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_64 0x1250100 194*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_65 0x1250104 195*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_66 0x1250108 196*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_67 0x125010C 197*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_68 0x1250110 198*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_69 0x1250114 199*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_70 0x1250118 200*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_71 0x125011C 201*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_72 0x1250120 202*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_73 0x1250124 203*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_74 0x1250128 204*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_75 0x125012C 205*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_76 0x1250130 206*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_77 0x1250134 207*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_78 0x1250138 208*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_79 0x125013C 209*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_80 0x1250140 210*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_81 0x1250144 211*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_82 0x1250148 212*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_83 0x125014C 213*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_84 0x1250150 214*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_85 0x1250154 215*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_86 0x1250158 216*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_87 0x125015C 217*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_88 0x1250160 218*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_89 0x1250164 219*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_90 0x1250168 220*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_91 0x125016C 221*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_92 0x1250170 222*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_93 0x1250174 223*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_94 0x1250178 224*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_95 0x125017C 225*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_96 0x1250180 226*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_97 0x1250184 227*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_98 0x1250188 228*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_99 0x125018C 229*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_100 0x1250190 230*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_101 0x1250194 231*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_102 0x1250198 232*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_103 0x125019C 233*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_104 0x12501A0 234*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_105 0x12501A4 235*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_106 0x12501A8 236*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_107 0x12501AC 237*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_108 0x12501B0 238*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_109 0x12501B4 239*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_110 0x12501B8 240*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_111 0x12501BC 241*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_112 0x12501C0 242*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_113 0x12501C4 243*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_114 0x12501C8 244*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_115 0x12501CC 245*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_116 0x12501D0 246*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_117 0x12501D4 247*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_118 0x12501D8 248*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_119 0x12501DC 249*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_120 0x12501E0 250*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_121 0x12501E4 251*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_122 0x12501E8 252*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_123 0x12501EC 253*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_124 0x12501F0 254*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_125 0x12501F4 255*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_126 0x12501F8 256*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_127 0x12501FC 257*7bf060d0SVijendar Mukunda #define ACP_SCRATCH_REG_128 0x1250200 258*7bf060d0SVijendar Mukunda 259*7bf060d0SVijendar Mukunda /* Registers from ACP_AUDIO_BUFFERS block */ 260*7bf060d0SVijendar Mukunda #define ACP_I2S_RX_RINGBUFADDR 0x1242000 261*7bf060d0SVijendar Mukunda #define ACP_I2S_RX_RINGBUFSIZE 0x1242004 262*7bf060d0SVijendar Mukunda #define ACP_I2S_RX_LINKPOSITIONCNTR 0x1242008 263*7bf060d0SVijendar Mukunda #define ACP_I2S_RX_FIFOADDR 0x124200C 264*7bf060d0SVijendar Mukunda #define ACP_I2S_RX_FIFOSIZE 0x1242010 265*7bf060d0SVijendar Mukunda #define ACP_I2S_RX_DMA_SIZE 0x1242014 266*7bf060d0SVijendar Mukunda #define ACP_I2S_RX_LINEARPOSCNTR_HIGH 0x1242018 267*7bf060d0SVijendar Mukunda #define ACP_I2S_RX_LINEARPOSCNTR_LOW 0x124201C 268*7bf060d0SVijendar Mukunda #define ACP_I2S_RX_INTR_WATERMARK_SIZE 0x1242020 269*7bf060d0SVijendar Mukunda #define ACP_I2S_TX_RINGBUFADDR 0x1242024 270*7bf060d0SVijendar Mukunda #define ACP_I2S_TX_RINGBUFSIZE 0x1242028 271*7bf060d0SVijendar Mukunda #define ACP_I2S_TX_LINKPOSITIONCNTR 0x124202C 272*7bf060d0SVijendar Mukunda #define ACP_I2S_TX_FIFOADDR 0x1242030 273*7bf060d0SVijendar Mukunda #define ACP_I2S_TX_FIFOSIZE 0x1242034 274*7bf060d0SVijendar Mukunda #define ACP_I2S_TX_DMA_SIZE 0x1242038 275*7bf060d0SVijendar Mukunda #define ACP_I2S_TX_LINEARPOSCNTR_HIGH 0x124203C 276*7bf060d0SVijendar Mukunda #define ACP_I2S_TX_LINEARPOSCNTR_LOW 0x1242040 277*7bf060d0SVijendar Mukunda #define ACP_I2S_TX_INTR_WATERMARK_SIZE 0x1242044 278*7bf060d0SVijendar Mukunda #define ACP_BT_RX_RINGBUFADDR 0x1242048 279*7bf060d0SVijendar Mukunda #define ACP_BT_RX_RINGBUFSIZE 0x124204C 280*7bf060d0SVijendar Mukunda #define ACP_BT_RX_LINKPOSITIONCNTR 0x1242050 281*7bf060d0SVijendar Mukunda #define ACP_BT_RX_FIFOADDR 0x1242054 282*7bf060d0SVijendar Mukunda #define ACP_BT_RX_FIFOSIZE 0x1242058 283*7bf060d0SVijendar Mukunda #define ACP_BT_RX_DMA_SIZE 0x124205C 284*7bf060d0SVijendar Mukunda #define ACP_BT_RX_LINEARPOSCNTR_HIGH 0x1242060 285*7bf060d0SVijendar Mukunda #define ACP_BT_RX_LINEARPOSCNTR_LOW 0x1242064 286*7bf060d0SVijendar Mukunda #define ACP_BT_RX_INTR_WATERMARK_SIZE 0x1242068 287*7bf060d0SVijendar Mukunda #define ACP_BT_TX_RINGBUFADDR 0x124206C 288*7bf060d0SVijendar Mukunda #define ACP_BT_TX_RINGBUFSIZE 0x1242070 289*7bf060d0SVijendar Mukunda #define ACP_BT_TX_LINKPOSITIONCNTR 0x1242074 290*7bf060d0SVijendar Mukunda #define ACP_BT_TX_FIFOADDR 0x1242078 291*7bf060d0SVijendar Mukunda #define ACP_BT_TX_FIFOSIZE 0x124207C 292*7bf060d0SVijendar Mukunda #define ACP_BT_TX_DMA_SIZE 0x1242080 293*7bf060d0SVijendar Mukunda #define ACP_BT_TX_LINEARPOSCNTR_HIGH 0x1242084 294*7bf060d0SVijendar Mukunda #define ACP_BT_TX_LINEARPOSCNTR_LOW 0x1242088 295*7bf060d0SVijendar Mukunda #define ACP_BT_TX_INTR_WATERMARK_SIZE 0x124208C 296*7bf060d0SVijendar Mukunda #define ACP_HS_RX_RINGBUFADDR 0x1242090 297*7bf060d0SVijendar Mukunda #define ACP_HS_RX_RINGBUFSIZE 0x1242094 298*7bf060d0SVijendar Mukunda #define ACP_HS_RX_LINKPOSITIONCNTR 0x1242098 299*7bf060d0SVijendar Mukunda #define ACP_HS_RX_FIFOADDR 0x124209C 300*7bf060d0SVijendar Mukunda #define ACP_HS_RX_FIFOSIZE 0x12420A0 301*7bf060d0SVijendar Mukunda #define ACP_HS_RX_DMA_SIZE 0x12420A4 302*7bf060d0SVijendar Mukunda #define ACP_HS_RX_LINEARPOSCNTR_HIGH 0x12420A8 303*7bf060d0SVijendar Mukunda #define ACP_HS_RX_LINEARPOSCNTR_LOW 0x12420AC 304*7bf060d0SVijendar Mukunda #define ACP_HS_RX_INTR_WATERMARK_SIZE 0x12420B0 305*7bf060d0SVijendar Mukunda #define ACP_HS_TX_RINGBUFADDR 0x12420B4 306*7bf060d0SVijendar Mukunda #define ACP_HS_TX_RINGBUFSIZE 0x12420B8 307*7bf060d0SVijendar Mukunda #define ACP_HS_TX_LINKPOSITIONCNTR 0x12420BC 308*7bf060d0SVijendar Mukunda #define ACP_HS_TX_FIFOADDR 0x12420C0 309*7bf060d0SVijendar Mukunda #define ACP_HS_TX_FIFOSIZE 0x12420C4 310*7bf060d0SVijendar Mukunda #define ACP_HS_TX_DMA_SIZE 0x12420C8 311*7bf060d0SVijendar Mukunda #define ACP_HS_TX_LINEARPOSCNTR_HIGH 0x12420CC 312*7bf060d0SVijendar Mukunda #define ACP_HS_TX_LINEARPOSCNTR_LOW 0x12420D0 313*7bf060d0SVijendar Mukunda #define ACP_HS_TX_INTR_WATERMARK_SIZE 0x12420D4 314*7bf060d0SVijendar Mukunda 315*7bf060d0SVijendar Mukunda /* Registers from ACP_I2S_TDM block */ 316*7bf060d0SVijendar Mukunda #define ACP_I2STDM_IER 0x1242400 317*7bf060d0SVijendar Mukunda #define ACP_I2STDM_IRER 0x1242404 318*7bf060d0SVijendar Mukunda #define ACP_I2STDM_RXFRMT 0x1242408 319*7bf060d0SVijendar Mukunda #define ACP_I2STDM_ITER 0x124240C 320*7bf060d0SVijendar Mukunda #define ACP_I2STDM_TXFRMT 0x1242410 321*7bf060d0SVijendar Mukunda #define ACP_I2STDM0_MSTRCLKGEN 0x1242414 322*7bf060d0SVijendar Mukunda #define ACP_I2STDM1_MSTRCLKGEN 0x1242418 323*7bf060d0SVijendar Mukunda #define ACP_I2STDM2_MSTRCLKGEN 0x124241C 324*7bf060d0SVijendar Mukunda #define ACP_I2STDM_REFCLKGEN 0x1242420 325*7bf060d0SVijendar Mukunda 326*7bf060d0SVijendar Mukunda /* Registers from ACP_BT_TDM block */ 327*7bf060d0SVijendar Mukunda #define ACP_BTTDM_IER 0x1242800 328*7bf060d0SVijendar Mukunda #define ACP_BTTDM_IRER 0x1242804 329*7bf060d0SVijendar Mukunda #define ACP_BTTDM_RXFRMT 0x1242808 330*7bf060d0SVijendar Mukunda #define ACP_BTTDM_ITER 0x124280C 331*7bf060d0SVijendar Mukunda #define ACP_BTTDM_TXFRMT 0x1242810 332*7bf060d0SVijendar Mukunda #define ACP_HSTDM_IER 0x1242814 333*7bf060d0SVijendar Mukunda #define ACP_HSTDM_IRER 0x1242818 334*7bf060d0SVijendar Mukunda #define ACP_HSTDM_RXFRMT 0x124281C 335*7bf060d0SVijendar Mukunda #define ACP_HSTDM_ITER 0x1242820 336*7bf060d0SVijendar Mukunda #define ACP_HSTDM_TXFRMT 0x1242824 337*7bf060d0SVijendar Mukunda #endif 338