1*9b5e98e2SVijendar Mukunda /* SPDX-License-Identifier: GPL-2.0+ */ 2*9b5e98e2SVijendar Mukunda /* 3*9b5e98e2SVijendar Mukunda * AMD ACP 3.1 Register Documentation 4*9b5e98e2SVijendar Mukunda * 5*9b5e98e2SVijendar Mukunda * Copyright 2020 Advanced Micro Devices, Inc. 6*9b5e98e2SVijendar Mukunda */ 7*9b5e98e2SVijendar Mukunda 8*9b5e98e2SVijendar Mukunda #ifndef _rn_OFFSET_HEADER 9*9b5e98e2SVijendar Mukunda #define _rn_OFFSET_HEADER 10*9b5e98e2SVijendar Mukunda // Registers from ACP_DMA block 11*9b5e98e2SVijendar Mukunda 12*9b5e98e2SVijendar Mukunda #define ACP_DMA_CNTL_0 0x1240000 13*9b5e98e2SVijendar Mukunda #define ACP_DMA_CNTL_1 0x1240004 14*9b5e98e2SVijendar Mukunda #define ACP_DMA_CNTL_2 0x1240008 15*9b5e98e2SVijendar Mukunda #define ACP_DMA_CNTL_3 0x124000C 16*9b5e98e2SVijendar Mukunda #define ACP_DMA_CNTL_4 0x1240010 17*9b5e98e2SVijendar Mukunda #define ACP_DMA_CNTL_5 0x1240014 18*9b5e98e2SVijendar Mukunda #define ACP_DMA_CNTL_6 0x1240018 19*9b5e98e2SVijendar Mukunda #define ACP_DMA_CNTL_7 0x124001C 20*9b5e98e2SVijendar Mukunda #define ACP_DMA_DSCR_STRT_IDX_0 0x1240020 21*9b5e98e2SVijendar Mukunda #define ACP_DMA_DSCR_STRT_IDX_1 0x1240024 22*9b5e98e2SVijendar Mukunda #define ACP_DMA_DSCR_STRT_IDX_2 0x1240028 23*9b5e98e2SVijendar Mukunda #define ACP_DMA_DSCR_STRT_IDX_3 0x124002C 24*9b5e98e2SVijendar Mukunda #define ACP_DMA_DSCR_STRT_IDX_4 0x1240030 25*9b5e98e2SVijendar Mukunda #define ACP_DMA_DSCR_STRT_IDX_5 0x1240034 26*9b5e98e2SVijendar Mukunda #define ACP_DMA_DSCR_STRT_IDX_6 0x1240038 27*9b5e98e2SVijendar Mukunda #define ACP_DMA_DSCR_STRT_IDX_7 0x124003C 28*9b5e98e2SVijendar Mukunda #define ACP_DMA_DSCR_CNT_0 0x1240040 29*9b5e98e2SVijendar Mukunda #define ACP_DMA_DSCR_CNT_1 0x1240044 30*9b5e98e2SVijendar Mukunda #define ACP_DMA_DSCR_CNT_2 0x1240048 31*9b5e98e2SVijendar Mukunda #define ACP_DMA_DSCR_CNT_3 0x124004C 32*9b5e98e2SVijendar Mukunda #define ACP_DMA_DSCR_CNT_4 0x1240050 33*9b5e98e2SVijendar Mukunda #define ACP_DMA_DSCR_CNT_5 0x1240054 34*9b5e98e2SVijendar Mukunda #define ACP_DMA_DSCR_CNT_6 0x1240058 35*9b5e98e2SVijendar Mukunda #define ACP_DMA_DSCR_CNT_7 0x124005C 36*9b5e98e2SVijendar Mukunda #define ACP_DMA_PRIO_0 0x1240060 37*9b5e98e2SVijendar Mukunda #define ACP_DMA_PRIO_1 0x1240064 38*9b5e98e2SVijendar Mukunda #define ACP_DMA_PRIO_2 0x1240068 39*9b5e98e2SVijendar Mukunda #define ACP_DMA_PRIO_3 0x124006C 40*9b5e98e2SVijendar Mukunda #define ACP_DMA_PRIO_4 0x1240070 41*9b5e98e2SVijendar Mukunda #define ACP_DMA_PRIO_5 0x1240074 42*9b5e98e2SVijendar Mukunda #define ACP_DMA_PRIO_6 0x1240078 43*9b5e98e2SVijendar Mukunda #define ACP_DMA_PRIO_7 0x124007C 44*9b5e98e2SVijendar Mukunda #define ACP_DMA_CUR_DSCR_0 0x1240080 45*9b5e98e2SVijendar Mukunda #define ACP_DMA_CUR_DSCR_1 0x1240084 46*9b5e98e2SVijendar Mukunda #define ACP_DMA_CUR_DSCR_2 0x1240088 47*9b5e98e2SVijendar Mukunda #define ACP_DMA_CUR_DSCR_3 0x124008C 48*9b5e98e2SVijendar Mukunda #define ACP_DMA_CUR_DSCR_4 0x1240090 49*9b5e98e2SVijendar Mukunda #define ACP_DMA_CUR_DSCR_5 0x1240094 50*9b5e98e2SVijendar Mukunda #define ACP_DMA_CUR_DSCR_6 0x1240098 51*9b5e98e2SVijendar Mukunda #define ACP_DMA_CUR_DSCR_7 0x124009C 52*9b5e98e2SVijendar Mukunda #define ACP_DMA_CUR_TRANS_CNT_0 0x12400A0 53*9b5e98e2SVijendar Mukunda #define ACP_DMA_CUR_TRANS_CNT_1 0x12400A4 54*9b5e98e2SVijendar Mukunda #define ACP_DMA_CUR_TRANS_CNT_2 0x12400A8 55*9b5e98e2SVijendar Mukunda #define ACP_DMA_CUR_TRANS_CNT_3 0x12400AC 56*9b5e98e2SVijendar Mukunda #define ACP_DMA_CUR_TRANS_CNT_4 0x12400B0 57*9b5e98e2SVijendar Mukunda #define ACP_DMA_CUR_TRANS_CNT_5 0x12400B4 58*9b5e98e2SVijendar Mukunda #define ACP_DMA_CUR_TRANS_CNT_6 0x12400B8 59*9b5e98e2SVijendar Mukunda #define ACP_DMA_CUR_TRANS_CNT_7 0x12400BC 60*9b5e98e2SVijendar Mukunda #define ACP_DMA_ERR_STS_0 0x12400C0 61*9b5e98e2SVijendar Mukunda #define ACP_DMA_ERR_STS_1 0x12400C4 62*9b5e98e2SVijendar Mukunda #define ACP_DMA_ERR_STS_2 0x12400C8 63*9b5e98e2SVijendar Mukunda #define ACP_DMA_ERR_STS_3 0x12400CC 64*9b5e98e2SVijendar Mukunda #define ACP_DMA_ERR_STS_4 0x12400D0 65*9b5e98e2SVijendar Mukunda #define ACP_DMA_ERR_STS_5 0x12400D4 66*9b5e98e2SVijendar Mukunda #define ACP_DMA_ERR_STS_6 0x12400D8 67*9b5e98e2SVijendar Mukunda #define ACP_DMA_ERR_STS_7 0x12400DC 68*9b5e98e2SVijendar Mukunda #define ACP_DMA_DESC_BASE_ADDR 0x12400E0 69*9b5e98e2SVijendar Mukunda #define ACP_DMA_DESC_MAX_NUM_DSCR 0x12400E4 70*9b5e98e2SVijendar Mukunda #define ACP_DMA_CH_STS 0x12400E8 71*9b5e98e2SVijendar Mukunda #define ACP_DMA_CH_GROUP 0x12400EC 72*9b5e98e2SVijendar Mukunda #define ACP_DMA_CH_RST_STS 0x12400F0 73*9b5e98e2SVijendar Mukunda 74*9b5e98e2SVijendar Mukunda // Registers from ACP_AXI2AXIATU block 75*9b5e98e2SVijendar Mukunda 76*9b5e98e2SVijendar Mukunda #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1 0x1240C00 77*9b5e98e2SVijendar Mukunda #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_1 0x1240C04 78*9b5e98e2SVijendar Mukunda #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_2 0x1240C08 79*9b5e98e2SVijendar Mukunda #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_2 0x1240C0C 80*9b5e98e2SVijendar Mukunda #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_3 0x1240C10 81*9b5e98e2SVijendar Mukunda #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_3 0x1240C14 82*9b5e98e2SVijendar Mukunda #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_4 0x1240C18 83*9b5e98e2SVijendar Mukunda #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_4 0x1240C1C 84*9b5e98e2SVijendar Mukunda #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_5 0x1240C20 85*9b5e98e2SVijendar Mukunda #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_5 0x1240C24 86*9b5e98e2SVijendar Mukunda #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_6 0x1240C28 87*9b5e98e2SVijendar Mukunda #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_6 0x1240C2C 88*9b5e98e2SVijendar Mukunda #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_7 0x1240C30 89*9b5e98e2SVijendar Mukunda #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_7 0x1240C34 90*9b5e98e2SVijendar Mukunda #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_8 0x1240C38 91*9b5e98e2SVijendar Mukunda #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_8 0x1240C3C 92*9b5e98e2SVijendar Mukunda #define ACPAXI2AXI_ATU_CTRL 0x1240C40 93*9b5e98e2SVijendar Mukunda 94*9b5e98e2SVijendar Mukunda // Registers from ACP_CLKRST block 95*9b5e98e2SVijendar Mukunda 96*9b5e98e2SVijendar Mukunda #define ACP_SOFT_RESET 0x1241000 97*9b5e98e2SVijendar Mukunda #define ACP_CONTROL 0x1241004 98*9b5e98e2SVijendar Mukunda #define ACP_STATUS 0x1241008 99*9b5e98e2SVijendar Mukunda #define ACP_DYNAMIC_CG_MASTER_CONTROL 0x1241010 100*9b5e98e2SVijendar Mukunda 101*9b5e98e2SVijendar Mukunda // Registers from ACP_MISC block 102*9b5e98e2SVijendar Mukunda 103*9b5e98e2SVijendar Mukunda #define ACP_EXTERNAL_INTR_ENB 0x1241800 104*9b5e98e2SVijendar Mukunda #define ACP_EXTERNAL_INTR_CNTL 0x1241804 105*9b5e98e2SVijendar Mukunda #define ACP_EXTERNAL_INTR_STAT 0x1241808 106*9b5e98e2SVijendar Mukunda #define ACP_PGMEM_CTRL 0x12418C0 107*9b5e98e2SVijendar Mukunda #define ACP_ERROR_STATUS 0x12418C4 108*9b5e98e2SVijendar Mukunda #define ACP_SW_I2S_ERROR_REASON 0x12418C8 109*9b5e98e2SVijendar Mukunda #define ACP_MEM_PG_STS 0x12418CC 110*9b5e98e2SVijendar Mukunda 111*9b5e98e2SVijendar Mukunda // Registers from ACP_PGFSM block 112*9b5e98e2SVijendar Mukunda 113*9b5e98e2SVijendar Mukunda #define ACP_I2S_PIN_CONFIG 0x1241400 114*9b5e98e2SVijendar Mukunda #define ACP_PAD_PULLUP_PULLDOWN_CTRL 0x1241404 115*9b5e98e2SVijendar Mukunda #define ACP_PAD_DRIVE_STRENGTH_CTRL 0x1241408 116*9b5e98e2SVijendar Mukunda #define ACP_SW_PAD_KEEPER_EN 0x124140C 117*9b5e98e2SVijendar Mukunda #define ACP_PGFSM_CONTROL 0x124141C 118*9b5e98e2SVijendar Mukunda #define ACP_PGFSM_STATUS 0x1241420 119*9b5e98e2SVijendar Mukunda #define ACP_CLKMUX_SEL 0x1241424 120*9b5e98e2SVijendar Mukunda #define ACP_DEVICE_STATE 0x1241428 121*9b5e98e2SVijendar Mukunda #define AZ_DEVICE_STATE 0x124142C 122*9b5e98e2SVijendar Mukunda #define ACP_INTR_URGENCY_TIMER 0x1241430 123*9b5e98e2SVijendar Mukunda #define AZ_INTR_URGENCY_TIMER 0x1241434 124*9b5e98e2SVijendar Mukunda 125*9b5e98e2SVijendar Mukunda // Registers from ACP_SCRATCH block 126*9b5e98e2SVijendar Mukunda 127*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_0 0x1250000 128*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_1 0x1250004 129*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_2 0x1250008 130*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_3 0x125000C 131*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_4 0x1250010 132*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_5 0x1250014 133*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_6 0x1250018 134*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_7 0x125001C 135*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_8 0x1250020 136*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_9 0x1250024 137*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_10 0x1250028 138*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_11 0x125002C 139*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_12 0x1250030 140*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_13 0x1250034 141*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_14 0x1250038 142*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_15 0x125003C 143*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_16 0x1250040 144*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_17 0x1250044 145*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_18 0x1250048 146*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_19 0x125004C 147*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_20 0x1250050 148*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_21 0x1250054 149*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_22 0x1250058 150*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_23 0x125005C 151*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_24 0x1250060 152*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_25 0x1250064 153*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_26 0x1250068 154*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_27 0x125006C 155*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_28 0x1250070 156*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_29 0x1250074 157*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_30 0x1250078 158*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_31 0x125007C 159*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_32 0x1250080 160*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_33 0x1250084 161*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_34 0x1250088 162*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_35 0x125008C 163*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_36 0x1250090 164*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_37 0x1250094 165*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_38 0x1250098 166*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_39 0x125009C 167*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_40 0x12500A0 168*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_41 0x12500A4 169*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_42 0x12500A8 170*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_43 0x12500AC 171*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_44 0x12500B0 172*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_45 0x12500B4 173*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_46 0x12500B8 174*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_47 0x12500BC 175*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_48 0x12500C0 176*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_49 0x12500C4 177*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_50 0x12500C8 178*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_51 0x12500CC 179*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_52 0x12500D0 180*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_53 0x12500D4 181*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_54 0x12500D8 182*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_55 0x12500DC 183*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_56 0x12500E0 184*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_57 0x12500E4 185*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_58 0x12500E8 186*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_59 0x12500EC 187*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_60 0x12500F0 188*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_61 0x12500F4 189*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_62 0x12500F8 190*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_63 0x12500FC 191*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_64 0x1250100 192*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_65 0x1250104 193*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_66 0x1250108 194*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_67 0x125010C 195*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_68 0x1250110 196*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_69 0x1250114 197*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_70 0x1250118 198*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_71 0x125011C 199*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_72 0x1250120 200*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_73 0x1250124 201*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_74 0x1250128 202*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_75 0x125012C 203*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_76 0x1250130 204*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_77 0x1250134 205*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_78 0x1250138 206*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_79 0x125013C 207*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_80 0x1250140 208*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_81 0x1250144 209*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_82 0x1250148 210*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_83 0x125014C 211*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_84 0x1250150 212*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_85 0x1250154 213*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_86 0x1250158 214*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_87 0x125015C 215*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_88 0x1250160 216*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_89 0x1250164 217*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_90 0x1250168 218*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_91 0x125016C 219*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_92 0x1250170 220*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_93 0x1250174 221*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_94 0x1250178 222*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_95 0x125017C 223*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_96 0x1250180 224*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_97 0x1250184 225*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_98 0x1250188 226*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_99 0x125018C 227*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_100 0x1250190 228*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_101 0x1250194 229*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_102 0x1250198 230*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_103 0x125019C 231*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_104 0x12501A0 232*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_105 0x12501A4 233*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_106 0x12501A8 234*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_107 0x12501AC 235*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_108 0x12501B0 236*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_109 0x12501B4 237*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_110 0x12501B8 238*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_111 0x12501BC 239*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_112 0x12501C0 240*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_113 0x12501C4 241*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_114 0x12501C8 242*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_115 0x12501CC 243*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_116 0x12501D0 244*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_117 0x12501D4 245*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_118 0x12501D8 246*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_119 0x12501DC 247*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_120 0x12501E0 248*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_121 0x12501E4 249*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_122 0x12501E8 250*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_123 0x12501EC 251*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_124 0x12501F0 252*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_125 0x12501F4 253*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_126 0x12501F8 254*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_127 0x12501FC 255*9b5e98e2SVijendar Mukunda #define ACP_SCRATCH_REG_128 0x1250200 256*9b5e98e2SVijendar Mukunda 257*9b5e98e2SVijendar Mukunda // Registers from ACP_AUDIO_BUFFERS block 258*9b5e98e2SVijendar Mukunda 259*9b5e98e2SVijendar Mukunda #define ACP_I2S_RX_RINGBUFADDR 0x1242000 260*9b5e98e2SVijendar Mukunda #define ACP_I2S_RX_RINGBUFSIZE 0x1242004 261*9b5e98e2SVijendar Mukunda #define ACP_I2S_RX_LINKPOSITIONCNTR 0x1242008 262*9b5e98e2SVijendar Mukunda #define ACP_I2S_RX_FIFOADDR 0x124200C 263*9b5e98e2SVijendar Mukunda #define ACP_I2S_RX_FIFOSIZE 0x1242010 264*9b5e98e2SVijendar Mukunda #define ACP_I2S_RX_DMA_SIZE 0x1242014 265*9b5e98e2SVijendar Mukunda #define ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH 0x1242018 266*9b5e98e2SVijendar Mukunda #define ACP_I2S_RX_LINEARPOSITIONCNTR_LOW 0x124201C 267*9b5e98e2SVijendar Mukunda #define ACP_I2S_RX_INTR_WATERMARK_SIZE 0x1242020 268*9b5e98e2SVijendar Mukunda #define ACP_I2S_TX_RINGBUFADDR 0x1242024 269*9b5e98e2SVijendar Mukunda #define ACP_I2S_TX_RINGBUFSIZE 0x1242028 270*9b5e98e2SVijendar Mukunda #define ACP_I2S_TX_LINKPOSITIONCNTR 0x124202C 271*9b5e98e2SVijendar Mukunda #define ACP_I2S_TX_FIFOADDR 0x1242030 272*9b5e98e2SVijendar Mukunda #define ACP_I2S_TX_FIFOSIZE 0x1242034 273*9b5e98e2SVijendar Mukunda #define ACP_I2S_TX_DMA_SIZE 0x1242038 274*9b5e98e2SVijendar Mukunda #define ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH 0x124203C 275*9b5e98e2SVijendar Mukunda #define ACP_I2S_TX_LINEARPOSITIONCNTR_LOW 0x1242040 276*9b5e98e2SVijendar Mukunda #define ACP_I2S_TX_INTR_WATERMARK_SIZE 0x1242044 277*9b5e98e2SVijendar Mukunda #define ACP_BT_RX_RINGBUFADDR 0x1242048 278*9b5e98e2SVijendar Mukunda #define ACP_BT_RX_RINGBUFSIZE 0x124204C 279*9b5e98e2SVijendar Mukunda #define ACP_BT_RX_LINKPOSITIONCNTR 0x1242050 280*9b5e98e2SVijendar Mukunda #define ACP_BT_RX_FIFOADDR 0x1242054 281*9b5e98e2SVijendar Mukunda #define ACP_BT_RX_FIFOSIZE 0x1242058 282*9b5e98e2SVijendar Mukunda #define ACP_BT_RX_DMA_SIZE 0x124205C 283*9b5e98e2SVijendar Mukunda #define ACP_BT_RX_LINEARPOSITIONCNTR_HIGH 0x1242060 284*9b5e98e2SVijendar Mukunda #define ACP_BT_RX_LINEARPOSITIONCNTR_LOW 0x1242064 285*9b5e98e2SVijendar Mukunda #define ACP_BT_RX_INTR_WATERMARK_SIZE 0x1242068 286*9b5e98e2SVijendar Mukunda #define ACP_BT_TX_RINGBUFADDR 0x124206C 287*9b5e98e2SVijendar Mukunda #define ACP_BT_TX_RINGBUFSIZE 0x1242070 288*9b5e98e2SVijendar Mukunda #define ACP_BT_TX_LINKPOSITIONCNTR 0x1242074 289*9b5e98e2SVijendar Mukunda #define ACP_BT_TX_FIFOADDR 0x1242078 290*9b5e98e2SVijendar Mukunda #define ACP_BT_TX_FIFOSIZE 0x124207C 291*9b5e98e2SVijendar Mukunda #define ACP_BT_TX_DMA_SIZE 0x1242080 292*9b5e98e2SVijendar Mukunda #define ACP_BT_TX_LINEARPOSITIONCNTR_HIGH 0x1242084 293*9b5e98e2SVijendar Mukunda #define ACP_BT_TX_LINEARPOSITIONCNTR_LOW 0x1242088 294*9b5e98e2SVijendar Mukunda #define ACP_BT_TX_INTR_WATERMARK_SIZE 0x124208C 295*9b5e98e2SVijendar Mukunda #define ACP_HS_RX_RINGBUFADDR 0x1242090 296*9b5e98e2SVijendar Mukunda #define ACP_HS_RX_RINGBUFSIZE 0x1242094 297*9b5e98e2SVijendar Mukunda #define ACP_HS_RX_LINKPOSITIONCNTR 0x1242098 298*9b5e98e2SVijendar Mukunda #define ACP_HS_RX_FIFOADDR 0x124209C 299*9b5e98e2SVijendar Mukunda #define ACP_HS_RX_FIFOSIZE 0x12420A0 300*9b5e98e2SVijendar Mukunda #define ACP_HS_RX_DMA_SIZE 0x12420A4 301*9b5e98e2SVijendar Mukunda #define ACP_HS_RX_LINEARPOSITIONCNTR_HIGH 0x12420A8 302*9b5e98e2SVijendar Mukunda #define ACP_HS_RX_LINEARPOSITIONCNTR_LOW 0x12420AC 303*9b5e98e2SVijendar Mukunda #define ACP_HS_RX_INTR_WATERMARK_SIZE 0x12420B0 304*9b5e98e2SVijendar Mukunda #define ACP_HS_TX_RINGBUFADDR 0x12420B4 305*9b5e98e2SVijendar Mukunda #define ACP_HS_TX_RINGBUFSIZE 0x12420B8 306*9b5e98e2SVijendar Mukunda #define ACP_HS_TX_LINKPOSITIONCNTR 0x12420BC 307*9b5e98e2SVijendar Mukunda #define ACP_HS_TX_FIFOADDR 0x12420C0 308*9b5e98e2SVijendar Mukunda #define ACP_HS_TX_FIFOSIZE 0x12420C4 309*9b5e98e2SVijendar Mukunda #define ACP_HS_TX_DMA_SIZE 0x12420C8 310*9b5e98e2SVijendar Mukunda #define ACP_HS_TX_LINEARPOSITIONCNTR_HIGH 0x12420CC 311*9b5e98e2SVijendar Mukunda #define ACP_HS_TX_LINEARPOSITIONCNTR_LOW 0x12420D0 312*9b5e98e2SVijendar Mukunda #define ACP_HS_TX_INTR_WATERMARK_SIZE 0x12420D4 313*9b5e98e2SVijendar Mukunda 314*9b5e98e2SVijendar Mukunda // Registers from ACP_I2S_TDM block 315*9b5e98e2SVijendar Mukunda 316*9b5e98e2SVijendar Mukunda #define ACP_I2STDM_IER 0x1242400 317*9b5e98e2SVijendar Mukunda #define ACP_I2STDM_IRER 0x1242404 318*9b5e98e2SVijendar Mukunda #define ACP_I2STDM_RXFRMT 0x1242408 319*9b5e98e2SVijendar Mukunda #define ACP_I2STDM_ITER 0x124240C 320*9b5e98e2SVijendar Mukunda #define ACP_I2STDM_TXFRMT 0x1242410 321*9b5e98e2SVijendar Mukunda 322*9b5e98e2SVijendar Mukunda // Registers from ACP_BT_TDM block 323*9b5e98e2SVijendar Mukunda 324*9b5e98e2SVijendar Mukunda #define ACP_BTTDM_IER 0x1242800 325*9b5e98e2SVijendar Mukunda #define ACP_BTTDM_IRER 0x1242804 326*9b5e98e2SVijendar Mukunda #define ACP_BTTDM_RXFRMT 0x1242808 327*9b5e98e2SVijendar Mukunda #define ACP_BTTDM_ITER 0x124280C 328*9b5e98e2SVijendar Mukunda #define ACP_BTTDM_TXFRMT 0x1242810 329*9b5e98e2SVijendar Mukunda 330*9b5e98e2SVijendar Mukunda // Registers from ACP_WOV block 331*9b5e98e2SVijendar Mukunda 332*9b5e98e2SVijendar Mukunda #define ACP_WOV_PDM_ENABLE 0x1242C04 333*9b5e98e2SVijendar Mukunda #define ACP_WOV_PDM_DMA_ENABLE 0x1242C08 334*9b5e98e2SVijendar Mukunda #define ACP_WOV_RX_RINGBUFADDR 0x1242C0C 335*9b5e98e2SVijendar Mukunda #define ACP_WOV_RX_RINGBUFSIZE 0x1242C10 336*9b5e98e2SVijendar Mukunda #define ACP_WOV_RX_LINKPOSITIONCNTR 0x1242C14 337*9b5e98e2SVijendar Mukunda #define ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH 0x1242C18 338*9b5e98e2SVijendar Mukunda #define ACP_WOV_RX_LINEARPOSITIONCNTR_LOW 0x1242C1C 339*9b5e98e2SVijendar Mukunda #define ACP_WOV_RX_INTR_WATERMARK_SIZE 0x1242C20 340*9b5e98e2SVijendar Mukunda #define ACP_WOV_PDM_FIFO_FLUSH 0x1242C24 341*9b5e98e2SVijendar Mukunda #define ACP_WOV_PDM_NO_OF_CHANNELS 0x1242C28 342*9b5e98e2SVijendar Mukunda #define ACP_WOV_PDM_DECIMATION_FACTOR 0x1242C2C 343*9b5e98e2SVijendar Mukunda #define ACP_WOV_PDM_VAD_CTRL 0x1242C30 344*9b5e98e2SVijendar Mukunda #define ACP_WOV_BUFFER_STATUS 0x1242C58 345*9b5e98e2SVijendar Mukunda #define ACP_WOV_MISC_CTRL 0x1242C5C 346*9b5e98e2SVijendar Mukunda #define ACP_WOV_CLK_CTRL 0x1242C60 347*9b5e98e2SVijendar Mukunda #define ACP_PDM_VAD_DYNAMIC_CLK_GATING_EN 0x1242C64 348*9b5e98e2SVijendar Mukunda #define ACP_WOV_ERROR_STATUS_REGISTER 0x1242C68 349*9b5e98e2SVijendar Mukunda #endif 350