1 // SPDX-License-Identifier: GPL-2.0+ 2 // 3 // AMD ALSA SoC PCM Driver 4 // 5 //Copyright 2016 Advanced Micro Devices, Inc. 6 7 #include <linux/platform_device.h> 8 #include <linux/module.h> 9 #include <linux/err.h> 10 #include <linux/io.h> 11 #include <sound/pcm_params.h> 12 #include <sound/soc.h> 13 #include <sound/soc-dai.h> 14 #include <linux/dma-mapping.h> 15 16 #include "acp3x.h" 17 18 #define DRV_NAME "acp3x_i2s_playcap" 19 20 static int acp3x_i2s_set_fmt(struct snd_soc_dai *cpu_dai, 21 unsigned int fmt) 22 { 23 struct i2s_dev_data *adata; 24 int mode; 25 26 adata = snd_soc_dai_get_drvdata(cpu_dai); 27 mode = fmt & SND_SOC_DAIFMT_FORMAT_MASK; 28 switch (mode) { 29 case SND_SOC_DAIFMT_I2S: 30 adata->tdm_mode = TDM_DISABLE; 31 break; 32 case SND_SOC_DAIFMT_DSP_A: 33 adata->tdm_mode = TDM_ENABLE; 34 break; 35 default: 36 return -EINVAL; 37 } 38 return 0; 39 } 40 41 static int acp3x_i2s_set_tdm_slot(struct snd_soc_dai *cpu_dai, 42 u32 tx_mask, u32 rx_mask, int slots, int slot_width) 43 { 44 struct i2s_dev_data *adata; 45 u32 frm_len; 46 u16 slot_len; 47 48 adata = snd_soc_dai_get_drvdata(cpu_dai); 49 50 /* These values are as per Hardware Spec */ 51 switch (slot_width) { 52 case SLOT_WIDTH_8: 53 slot_len = 8; 54 break; 55 case SLOT_WIDTH_16: 56 slot_len = 16; 57 break; 58 case SLOT_WIDTH_24: 59 slot_len = 24; 60 break; 61 case SLOT_WIDTH_32: 62 slot_len = 0; 63 break; 64 default: 65 return -EINVAL; 66 } 67 frm_len = FRM_LEN | (slots << 15) | (slot_len << 18); 68 adata->tdm_fmt = frm_len; 69 return 0; 70 } 71 72 static int acp3x_i2s_hwparams(struct snd_pcm_substream *substream, 73 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 74 { 75 struct i2s_stream_instance *rtd; 76 struct snd_soc_pcm_runtime *prtd; 77 struct snd_soc_card *card; 78 struct acp3x_platform_info *pinfo; 79 struct i2s_dev_data *adata; 80 u32 val; 81 u32 reg_val, frmt_reg; 82 83 prtd = substream->private_data; 84 rtd = substream->runtime->private_data; 85 card = prtd->card; 86 adata = snd_soc_dai_get_drvdata(dai); 87 pinfo = snd_soc_card_get_drvdata(card); 88 if (pinfo) { 89 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 90 rtd->i2s_instance = pinfo->play_i2s_instance; 91 else 92 rtd->i2s_instance = pinfo->cap_i2s_instance; 93 } 94 95 /* These values are as per Hardware Spec */ 96 switch (params_format(params)) { 97 case SNDRV_PCM_FORMAT_U8: 98 case SNDRV_PCM_FORMAT_S8: 99 rtd->xfer_resolution = 0x0; 100 break; 101 case SNDRV_PCM_FORMAT_S16_LE: 102 rtd->xfer_resolution = 0x02; 103 break; 104 case SNDRV_PCM_FORMAT_S24_LE: 105 rtd->xfer_resolution = 0x04; 106 break; 107 case SNDRV_PCM_FORMAT_S32_LE: 108 rtd->xfer_resolution = 0x05; 109 break; 110 default: 111 return -EINVAL; 112 } 113 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 114 switch (rtd->i2s_instance) { 115 case I2S_BT_INSTANCE: 116 reg_val = mmACP_BTTDM_ITER; 117 frmt_reg = mmACP_BTTDM_TXFRMT; 118 break; 119 case I2S_SP_INSTANCE: 120 default: 121 reg_val = mmACP_I2STDM_ITER; 122 frmt_reg = mmACP_I2STDM_TXFRMT; 123 } 124 } else { 125 switch (rtd->i2s_instance) { 126 case I2S_BT_INSTANCE: 127 reg_val = mmACP_BTTDM_IRER; 128 frmt_reg = mmACP_BTTDM_RXFRMT; 129 break; 130 case I2S_SP_INSTANCE: 131 default: 132 reg_val = mmACP_I2STDM_IRER; 133 frmt_reg = mmACP_I2STDM_RXFRMT; 134 } 135 } 136 if (adata->tdm_mode) { 137 val = rv_readl(rtd->acp3x_base + reg_val); 138 rv_writel(val | 0x2, rtd->acp3x_base + reg_val); 139 rv_writel(adata->tdm_fmt, rtd->acp3x_base + frmt_reg); 140 } 141 val = rv_readl(rtd->acp3x_base + reg_val); 142 val &= ~ACP3x_ITER_IRER_SAMP_LEN_MASK; 143 val = val | (rtd->xfer_resolution << 3); 144 rv_writel(val, rtd->acp3x_base + reg_val); 145 return 0; 146 } 147 148 static int acp3x_i2s_trigger(struct snd_pcm_substream *substream, 149 int cmd, struct snd_soc_dai *dai) 150 { 151 struct i2s_stream_instance *rtd; 152 struct snd_soc_pcm_runtime *prtd; 153 struct snd_soc_card *card; 154 struct acp3x_platform_info *pinfo; 155 u32 ret, val, period_bytes, reg_val, ier_val, water_val; 156 u32 buf_size, buf_reg; 157 158 prtd = substream->private_data; 159 rtd = substream->runtime->private_data; 160 card = prtd->card; 161 pinfo = snd_soc_card_get_drvdata(card); 162 if (pinfo) { 163 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 164 rtd->i2s_instance = pinfo->play_i2s_instance; 165 else 166 rtd->i2s_instance = pinfo->cap_i2s_instance; 167 } 168 period_bytes = frames_to_bytes(substream->runtime, 169 substream->runtime->period_size); 170 buf_size = frames_to_bytes(substream->runtime, 171 substream->runtime->buffer_size); 172 switch (cmd) { 173 case SNDRV_PCM_TRIGGER_START: 174 case SNDRV_PCM_TRIGGER_RESUME: 175 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 176 rtd->bytescount = acp_get_byte_count(rtd, 177 substream->stream); 178 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 179 switch (rtd->i2s_instance) { 180 case I2S_BT_INSTANCE: 181 water_val = 182 mmACP_BT_TX_INTR_WATERMARK_SIZE; 183 reg_val = mmACP_BTTDM_ITER; 184 ier_val = mmACP_BTTDM_IER; 185 buf_reg = mmACP_BT_TX_RINGBUFSIZE; 186 break; 187 case I2S_SP_INSTANCE: 188 default: 189 water_val = 190 mmACP_I2S_TX_INTR_WATERMARK_SIZE; 191 reg_val = mmACP_I2STDM_ITER; 192 ier_val = mmACP_I2STDM_IER; 193 buf_reg = mmACP_I2S_TX_RINGBUFSIZE; 194 } 195 } else { 196 switch (rtd->i2s_instance) { 197 case I2S_BT_INSTANCE: 198 water_val = 199 mmACP_BT_RX_INTR_WATERMARK_SIZE; 200 reg_val = mmACP_BTTDM_IRER; 201 ier_val = mmACP_BTTDM_IER; 202 buf_reg = mmACP_BT_RX_RINGBUFSIZE; 203 break; 204 case I2S_SP_INSTANCE: 205 default: 206 water_val = 207 mmACP_I2S_RX_INTR_WATERMARK_SIZE; 208 reg_val = mmACP_I2STDM_IRER; 209 ier_val = mmACP_I2STDM_IER; 210 buf_reg = mmACP_I2S_RX_RINGBUFSIZE; 211 } 212 } 213 rv_writel(period_bytes, rtd->acp3x_base + water_val); 214 rv_writel(buf_size, rtd->acp3x_base + buf_reg); 215 val = rv_readl(rtd->acp3x_base + reg_val); 216 val = val | BIT(0); 217 rv_writel(val, rtd->acp3x_base + reg_val); 218 rv_writel(1, rtd->acp3x_base + ier_val); 219 ret = 0; 220 break; 221 case SNDRV_PCM_TRIGGER_STOP: 222 case SNDRV_PCM_TRIGGER_SUSPEND: 223 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 224 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 225 switch (rtd->i2s_instance) { 226 case I2S_BT_INSTANCE: 227 reg_val = mmACP_BTTDM_ITER; 228 break; 229 case I2S_SP_INSTANCE: 230 default: 231 reg_val = mmACP_I2STDM_ITER; 232 } 233 234 } else { 235 switch (rtd->i2s_instance) { 236 case I2S_BT_INSTANCE: 237 reg_val = mmACP_BTTDM_IRER; 238 break; 239 case I2S_SP_INSTANCE: 240 default: 241 reg_val = mmACP_I2STDM_IRER; 242 } 243 } 244 val = rv_readl(rtd->acp3x_base + reg_val); 245 val = val & ~BIT(0); 246 rv_writel(val, rtd->acp3x_base + reg_val); 247 248 if (!(rv_readl(rtd->acp3x_base + mmACP_BTTDM_ITER) & BIT(0)) && 249 !(rv_readl(rtd->acp3x_base + mmACP_BTTDM_IRER) & BIT(0))) 250 rv_writel(0, rtd->acp3x_base + mmACP_BTTDM_IER); 251 if (!(rv_readl(rtd->acp3x_base + mmACP_I2STDM_ITER) & BIT(0)) && 252 !(rv_readl(rtd->acp3x_base + mmACP_I2STDM_IRER) & BIT(0))) 253 rv_writel(0, rtd->acp3x_base + mmACP_I2STDM_IER); 254 ret = 0; 255 break; 256 default: 257 ret = -EINVAL; 258 break; 259 } 260 261 return ret; 262 } 263 264 static struct snd_soc_dai_ops acp3x_i2s_dai_ops = { 265 .hw_params = acp3x_i2s_hwparams, 266 .trigger = acp3x_i2s_trigger, 267 .set_fmt = acp3x_i2s_set_fmt, 268 .set_tdm_slot = acp3x_i2s_set_tdm_slot, 269 }; 270 271 static const struct snd_soc_component_driver acp3x_dai_component = { 272 .name = DRV_NAME, 273 }; 274 275 static struct snd_soc_dai_driver acp3x_i2s_dai = { 276 .playback = { 277 .rates = SNDRV_PCM_RATE_8000_96000, 278 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 | 279 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE | 280 SNDRV_PCM_FMTBIT_S32_LE, 281 .channels_min = 2, 282 .channels_max = 8, 283 .rate_min = 8000, 284 .rate_max = 96000, 285 }, 286 .capture = { 287 .rates = SNDRV_PCM_RATE_8000_48000, 288 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 | 289 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE | 290 SNDRV_PCM_FMTBIT_S32_LE, 291 .channels_min = 2, 292 .channels_max = 2, 293 .rate_min = 8000, 294 .rate_max = 48000, 295 }, 296 .ops = &acp3x_i2s_dai_ops, 297 }; 298 299 static int acp3x_dai_probe(struct platform_device *pdev) 300 { 301 struct resource *res; 302 struct i2s_dev_data *adata; 303 int ret; 304 305 adata = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dev_data), 306 GFP_KERNEL); 307 if (!adata) 308 return -ENOMEM; 309 310 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 311 if (!res) { 312 dev_err(&pdev->dev, "IORESOURCE_MEM FAILED\n"); 313 return -ENOMEM; 314 } 315 adata->acp3x_base = devm_ioremap(&pdev->dev, res->start, 316 resource_size(res)); 317 if (!adata->acp3x_base) 318 return -ENOMEM; 319 320 adata->i2s_irq = res->start; 321 dev_set_drvdata(&pdev->dev, adata); 322 ret = devm_snd_soc_register_component(&pdev->dev, 323 &acp3x_dai_component, &acp3x_i2s_dai, 1); 324 if (ret) { 325 dev_err(&pdev->dev, "Fail to register acp i2s dai\n"); 326 return -ENODEV; 327 } 328 return 0; 329 } 330 331 static int acp3x_dai_remove(struct platform_device *pdev) 332 { 333 /* As we use devm_ memory alloc there is nothing TBD here */ 334 335 return 0; 336 } 337 338 static struct platform_driver acp3x_dai_driver = { 339 .probe = acp3x_dai_probe, 340 .remove = acp3x_dai_remove, 341 .driver = { 342 .name = "acp3x_i2s_playcap", 343 }, 344 }; 345 346 module_platform_driver(acp3x_dai_driver); 347 348 MODULE_AUTHOR("Vishnuvardhanrao.Ravulapati@amd.com"); 349 MODULE_DESCRIPTION("AMD ACP 3.x PCM Driver"); 350 MODULE_LICENSE("GPL v2"); 351 MODULE_ALIAS("platform:"DRV_NAME); 352