1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 2 /* 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved. 7 * 8 * Author: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com> 9 */ 10 11 #ifndef __AMD_ACP_H 12 #define __AMD_ACP_H 13 14 #include <sound/pcm.h> 15 #include <sound/soc-acpi.h> 16 #include "chip_offset_byte.h" 17 18 #define I2S_SP_INSTANCE 0x00 19 #define I2S_BT_INSTANCE 0x01 20 #define DMIC_INSTANCE 0x02 21 22 #define MEM_WINDOW_START 0x4080000 23 24 #define ACP_I2S_REG_START 0x1242400 25 #define ACP_I2S_REG_END 0x1242810 26 #define ACP3x_I2STDM_REG_START 0x1242400 27 #define ACP3x_I2STDM_REG_END 0x1242410 28 #define ACP3x_BT_TDM_REG_START 0x1242800 29 #define ACP3x_BT_TDM_REG_END 0x1242810 30 #define I2S_MODE 0x04 31 #define I2S_RX_THRESHOLD 27 32 #define I2S_TX_THRESHOLD 28 33 #define BT_TX_THRESHOLD 26 34 #define BT_RX_THRESHOLD 25 35 36 #define ACP_SRAM_PTE_OFFSET 0x02052800 37 38 #define ACP_SRAM_SP_PB_PTE_OFFSET 0x0 39 #define ACP_SRAM_SP_CP_PTE_OFFSET 0x100 40 #define ACP_SRAM_BT_PB_PTE_OFFSET 0x200 41 #define ACP_SRAM_BT_CP_PTE_OFFSET 0x300 42 #define ACP_SRAM_PDM_PTE_OFFSET 0x400 43 #define PAGE_SIZE_4K_ENABLE 0x2 44 45 #define I2S_SP_TX_MEM_WINDOW_START 0x4000000 46 #define I2S_SP_RX_MEM_WINDOW_START 0x4020000 47 #define I2S_BT_TX_MEM_WINDOW_START 0x4040000 48 #define I2S_BT_RX_MEM_WINDOW_START 0x4060000 49 50 #define SP_PB_FIFO_ADDR_OFFSET 0x500 51 #define SP_CAPT_FIFO_ADDR_OFFSET 0x700 52 #define BT_PB_FIFO_ADDR_OFFSET 0x900 53 #define BT_CAPT_FIFO_ADDR_OFFSET 0xB00 54 #define PLAYBACK_MIN_NUM_PERIODS 2 55 #define PLAYBACK_MAX_NUM_PERIODS 8 56 #define PLAYBACK_MAX_PERIOD_SIZE 8192 57 #define PLAYBACK_MIN_PERIOD_SIZE 1024 58 #define CAPTURE_MIN_NUM_PERIODS 2 59 #define CAPTURE_MAX_NUM_PERIODS 8 60 #define CAPTURE_MAX_PERIOD_SIZE 8192 61 #define CAPTURE_MIN_PERIOD_SIZE 1024 62 63 #define MAX_BUFFER 65536 64 #define MIN_BUFFER MAX_BUFFER 65 #define FIFO_SIZE 0x100 66 #define DMA_SIZE 0x40 67 #define FRM_LEN 0x100 68 69 #define ACP3x_ITER_IRER_SAMP_LEN_MASK 0x38 70 71 #define ACP_MAX_STREAM 6 72 73 struct acp_stream { 74 struct snd_pcm_substream *substream; 75 int irq_bit; 76 int dai_id; 77 int id; 78 u64 bytescount; 79 u32 reg_offset; 80 u32 pte_offset; 81 u32 fifo_offset; 82 }; 83 84 struct acp_dev_data { 85 char *name; 86 struct device *dev; 87 void __iomem *acp_base; 88 unsigned int i2s_irq; 89 90 /* SOC specific dais */ 91 struct snd_soc_dai_driver *dai_driver; 92 int num_dai; 93 94 struct acp_stream *stream[ACP_MAX_STREAM]; 95 96 struct snd_soc_acpi_mach *machines; 97 struct platform_device *mach_dev; 98 }; 99 100 extern const struct snd_soc_dai_ops asoc_acp_cpu_dai_ops; 101 extern const struct snd_soc_dai_ops acp_dmic_dai_ops; 102 103 int asoc_acp_i2s_probe(struct snd_soc_dai *dai); 104 int acp_platform_register(struct device *dev); 105 int acp_platform_unregister(struct device *dev); 106 107 int acp_machine_select(struct acp_dev_data *adata); 108 109 static inline u64 acp_get_byte_count(struct acp_dev_data *adata, int dai_id, int direction) 110 { 111 u64 byte_count, low = 0, high = 0; 112 113 if (direction == SNDRV_PCM_STREAM_PLAYBACK) { 114 switch (dai_id) { 115 case I2S_BT_INSTANCE: 116 high = readl(adata->acp_base + ACP_BT_TX_LINEARPOSITIONCNTR_HIGH); 117 low = readl(adata->acp_base + ACP_BT_TX_LINEARPOSITIONCNTR_LOW); 118 break; 119 case I2S_SP_INSTANCE: 120 high = readl(adata->acp_base + ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH); 121 low = readl(adata->acp_base + ACP_I2S_TX_LINEARPOSITIONCNTR_LOW); 122 break; 123 default: 124 dev_err(adata->dev, "Invalid dai id %x\n", dai_id); 125 return -EINVAL; 126 } 127 } else { 128 switch (dai_id) { 129 case I2S_BT_INSTANCE: 130 high = readl(adata->acp_base + ACP_BT_RX_LINEARPOSITIONCNTR_HIGH); 131 low = readl(adata->acp_base + ACP_BT_RX_LINEARPOSITIONCNTR_LOW); 132 break; 133 case I2S_SP_INSTANCE: 134 high = readl(adata->acp_base + ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH); 135 low = readl(adata->acp_base + ACP_I2S_RX_LINEARPOSITIONCNTR_LOW); 136 break; 137 case DMIC_INSTANCE: 138 high = readl(adata->acp_base + ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH); 139 low = readl(adata->acp_base + ACP_WOV_RX_LINEARPOSITIONCNTR_LOW); 140 break; 141 default: 142 dev_err(adata->dev, "Invalid dai id %x\n", dai_id); 143 return -EINVAL; 144 } 145 } 146 /* Get 64 bit value from two 32 bit registers */ 147 byte_count = (high << 32) | low; 148 149 return byte_count; 150 } 151 152 #endif 153