xref: /linux/sound/soc/amd/acp/amd.h (revision a4eb44a6435d6d8f9e642407a4a06f65eb90ca04)
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2 /*
3  * This file is provided under a dual BSD/GPLv2 license. When using or
4  * redistributing this file, you may do so under either license.
5  *
6  * Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved.
7  *
8  * Author: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com>
9  */
10 
11 #ifndef __AMD_ACP_H
12 #define __AMD_ACP_H
13 
14 #include <sound/pcm.h>
15 #include <sound/soc-acpi.h>
16 #include "chip_offset_byte.h"
17 
18 #define I2S_SP_INSTANCE			0x00
19 #define I2S_BT_INSTANCE			0x01
20 
21 #define MEM_WINDOW_START		0x4000000
22 
23 #define ACP_I2S_REG_START		0x1242400
24 #define ACP_I2S_REG_END			0x1242810
25 #define ACP3x_I2STDM_REG_START		0x1242400
26 #define ACP3x_I2STDM_REG_END		0x1242410
27 #define ACP3x_BT_TDM_REG_START		0x1242800
28 #define ACP3x_BT_TDM_REG_END		0x1242810
29 #define I2S_MODE			0x04
30 #define I2S_RX_THRESHOLD		27
31 #define I2S_TX_THRESHOLD		28
32 #define BT_TX_THRESHOLD			26
33 #define BT_RX_THRESHOLD			25
34 
35 #define ACP_SRAM_PTE_OFFSET		0x02052800
36 
37 #define ACP_SRAM_SP_PB_PTE_OFFSET	0x0
38 #define ACP_SRAM_SP_CP_PTE_OFFSET	0x100
39 #define ACP_SRAM_BT_PB_PTE_OFFSET	0x200
40 #define ACP_SRAM_BT_CP_PTE_OFFSET	0x300
41 #define PAGE_SIZE_4K_ENABLE		0x2
42 
43 #define I2S_SP_TX_MEM_WINDOW_START	0x4000000
44 #define I2S_SP_RX_MEM_WINDOW_START	0x4020000
45 #define I2S_BT_TX_MEM_WINDOW_START	0x4040000
46 #define I2S_BT_RX_MEM_WINDOW_START	0x4060000
47 
48 #define SP_PB_FIFO_ADDR_OFFSET		0x500
49 #define SP_CAPT_FIFO_ADDR_OFFSET	0x700
50 #define BT_PB_FIFO_ADDR_OFFSET		0x900
51 #define BT_CAPT_FIFO_ADDR_OFFSET	0xB00
52 #define PLAYBACK_MIN_NUM_PERIODS	2
53 #define PLAYBACK_MAX_NUM_PERIODS	8
54 #define PLAYBACK_MAX_PERIOD_SIZE	8192
55 #define PLAYBACK_MIN_PERIOD_SIZE	1024
56 #define CAPTURE_MIN_NUM_PERIODS		2
57 #define CAPTURE_MAX_NUM_PERIODS		8
58 #define CAPTURE_MAX_PERIOD_SIZE		8192
59 #define CAPTURE_MIN_PERIOD_SIZE		1024
60 
61 #define MAX_BUFFER			65536
62 #define MIN_BUFFER			MAX_BUFFER
63 #define FIFO_SIZE			0x100
64 #define DMA_SIZE			0x40
65 #define FRM_LEN				0x100
66 
67 #define ACP3x_ITER_IRER_SAMP_LEN_MASK	0x38
68 
69 #define ACP_MAX_STREAM			6
70 
71 struct acp_stream {
72 	struct snd_pcm_substream *substream;
73 	int irq_bit;
74 	int dai_id;
75 	int id;
76 	u64 bytescount;
77 	u32 reg_offset;
78 	u32 pte_offset;
79 	u32 fifo_offset;
80 };
81 
82 struct acp_dev_data {
83 	char *name;
84 	struct device *dev;
85 	void __iomem *acp_base;
86 	unsigned int i2s_irq;
87 
88 	/* SOC specific dais */
89 	struct snd_soc_dai_driver *dai_driver;
90 	int num_dai;
91 
92 	struct acp_stream *stream[ACP_MAX_STREAM];
93 
94 	struct snd_soc_acpi_mach *machines;
95 	struct platform_device *mach_dev;
96 };
97 
98 extern const struct snd_soc_dai_ops asoc_acp_cpu_dai_ops;
99 
100 int asoc_acp_i2s_probe(struct snd_soc_dai *dai);
101 int acp_platform_register(struct device *dev);
102 int acp_platform_unregister(struct device *dev);
103 
104 int acp_machine_select(struct acp_dev_data *adata);
105 
106 static inline u64 acp_get_byte_count(struct acp_dev_data *adata, int dai_id, int direction)
107 {
108 	u64 byte_count, low = 0, high = 0;
109 
110 	if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
111 		switch (dai_id) {
112 		case I2S_BT_INSTANCE:
113 			high = readl(adata->acp_base + ACP_BT_TX_LINEARPOSITIONCNTR_HIGH);
114 			low = readl(adata->acp_base + ACP_BT_TX_LINEARPOSITIONCNTR_LOW);
115 			break;
116 		case I2S_SP_INSTANCE:
117 			high = readl(adata->acp_base + ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH);
118 			low = readl(adata->acp_base + ACP_I2S_TX_LINEARPOSITIONCNTR_LOW);
119 			break;
120 		default:
121 			dev_err(adata->dev, "Invalid dai id %x\n", dai_id);
122 			return -EINVAL;
123 		}
124 	} else {
125 		switch (dai_id) {
126 		case I2S_BT_INSTANCE:
127 			high = readl(adata->acp_base + ACP_BT_RX_LINEARPOSITIONCNTR_HIGH);
128 			low = readl(adata->acp_base + ACP_BT_RX_LINEARPOSITIONCNTR_LOW);
129 			break;
130 		case I2S_SP_INSTANCE:
131 			high = readl(adata->acp_base + ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH);
132 			low = readl(adata->acp_base + ACP_I2S_RX_LINEARPOSITIONCNTR_LOW);
133 			break;
134 		default:
135 			dev_err(adata->dev, "Invalid dai id %x\n", dai_id);
136 			return -EINVAL;
137 		}
138 	}
139 	/* Get 64 bit value from two 32 bit registers */
140 	byte_count = (high << 32) | low;
141 
142 	return byte_count;
143 }
144 
145 #endif
146