1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2023 Advanced Micro Devices, Inc. 7 // 8 // Authors: Syed Saba kareem <syed.sabakareem@amd.com> 9 /* 10 * Hardware interface for ACP7.0 block 11 */ 12 13 #include <linux/platform_device.h> 14 #include <linux/module.h> 15 #include <linux/err.h> 16 #include <linux/io.h> 17 #include <sound/pcm_params.h> 18 #include <sound/soc.h> 19 #include <sound/soc-dai.h> 20 #include <linux/dma-mapping.h> 21 #include <linux/pm_runtime.h> 22 #include <linux/pci.h> 23 #include "amd.h" 24 #include "acp-mach.h" 25 26 #define DRV_NAME "acp_asoc_acp70" 27 28 #define CLK7_CLK0_DFS_CNTL_N1 0X0006C1A4 29 #define CLK0_DIVIDER 0X19 30 31 static struct acp_resource rsrc = { 32 .offset = 0, 33 .no_of_ctrls = 2, 34 .irqp_used = 1, 35 .soc_mclk = true, 36 .irq_reg_offset = 0x1a00, 37 .scratch_reg_offset = 0x10000, 38 .sram_pte_offset = 0x03800000, 39 }; 40 41 static struct snd_soc_acpi_mach snd_soc_acpi_amd_acp70_acp_machines[] = { 42 { 43 .id = "AMDI0029", 44 .drv_name = "acp70-acp", 45 }, 46 {}, 47 }; 48 49 static struct snd_soc_dai_driver acp70_dai[] = { 50 { 51 .name = "acp-i2s-sp", 52 .id = I2S_SP_INSTANCE, 53 .playback = { 54 .stream_name = "I2S SP Playback", 55 .rates = SNDRV_PCM_RATE_8000_192000, 56 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8 | 57 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE, 58 .channels_min = 2, 59 .channels_max = 32, 60 .rate_min = 8000, 61 .rate_max = 192000, 62 }, 63 .capture = { 64 .stream_name = "I2S SP Capture", 65 .rates = SNDRV_PCM_RATE_8000_192000, 66 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8 | 67 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE, 68 .channels_min = 2, 69 .channels_max = 32, 70 .rate_min = 8000, 71 .rate_max = 192000, 72 }, 73 .ops = &asoc_acp_cpu_dai_ops, 74 }, 75 { 76 .name = "acp-i2s-bt", 77 .id = I2S_BT_INSTANCE, 78 .playback = { 79 .stream_name = "I2S BT Playback", 80 .rates = SNDRV_PCM_RATE_8000_192000, 81 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8 | 82 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE, 83 .channels_min = 2, 84 .channels_max = 32, 85 .rate_min = 8000, 86 .rate_max = 192000, 87 }, 88 .capture = { 89 .stream_name = "I2S BT Capture", 90 .rates = SNDRV_PCM_RATE_8000_192000, 91 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8 | 92 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE, 93 .channels_min = 2, 94 .channels_max = 32, 95 .rate_min = 8000, 96 .rate_max = 192000, 97 }, 98 .ops = &asoc_acp_cpu_dai_ops, 99 }, 100 { 101 .name = "acp-i2s-hs", 102 .id = I2S_HS_INSTANCE, 103 .playback = { 104 .stream_name = "I2S HS Playback", 105 .rates = SNDRV_PCM_RATE_8000_192000, 106 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8 | 107 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE, 108 .channels_min = 2, 109 .channels_max = 32, 110 .rate_min = 8000, 111 .rate_max = 192000, 112 }, 113 .capture = { 114 .stream_name = "I2S HS Capture", 115 .rates = SNDRV_PCM_RATE_8000_192000, 116 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8 | 117 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE, 118 .channels_min = 2, 119 .channels_max = 32, 120 .rate_min = 8000, 121 .rate_max = 192000, 122 }, 123 .ops = &asoc_acp_cpu_dai_ops, 124 }, 125 { 126 .name = "acp-pdm-dmic", 127 .id = DMIC_INSTANCE, 128 .capture = { 129 .rates = SNDRV_PCM_RATE_8000_48000, 130 .formats = SNDRV_PCM_FMTBIT_S32_LE, 131 .channels_min = 2, 132 .channels_max = 2, 133 .rate_min = 8000, 134 .rate_max = 48000, 135 }, 136 .ops = &acp_dmic_dai_ops, 137 }, 138 }; 139 140 static int acp70_i2s_master_clock_generate(struct acp_dev_data *adata) 141 { 142 struct pci_dev *smn_dev; 143 u32 device_id; 144 145 if (adata->platform == ACP70) 146 device_id = 0x1507; 147 else if (adata->platform == ACP71) 148 device_id = 0x1122; 149 else 150 return -ENODEV; 151 152 smn_dev = pci_get_device(PCI_VENDOR_ID_AMD, device_id, NULL); 153 154 if (!smn_dev) 155 return -ENODEV; 156 157 /* Set clk7 DFS clock divider register value to get mclk as 196.608MHz*/ 158 smn_write(smn_dev, CLK7_CLK0_DFS_CNTL_N1, CLK0_DIVIDER); 159 160 return 0; 161 } 162 163 static int acp_acp70_audio_probe(struct platform_device *pdev) 164 { 165 struct device *dev = &pdev->dev; 166 struct acp_chip_info *chip; 167 struct acp_dev_data *adata; 168 struct resource *res; 169 int ret; 170 171 chip = dev_get_platdata(&pdev->dev); 172 if (!chip || !chip->base) { 173 dev_err(&pdev->dev, "ACP chip data is NULL\n"); 174 return -ENODEV; 175 } 176 177 switch (chip->acp_rev) { 178 case ACP70_DEV: 179 case ACP71_DEV: 180 break; 181 default: 182 dev_err(&pdev->dev, "Un-supported ACP Revision %d\n", chip->acp_rev); 183 return -ENODEV; 184 } 185 186 adata = devm_kzalloc(dev, sizeof(struct acp_dev_data), GFP_KERNEL); 187 if (!adata) 188 return -ENOMEM; 189 190 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "acp_mem"); 191 if (!res) { 192 dev_err(&pdev->dev, "IORESOURCE_MEM FAILED\n"); 193 return -ENODEV; 194 } 195 196 adata->acp_base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); 197 if (!adata->acp_base) 198 return -ENOMEM; 199 200 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "acp_dai_irq"); 201 if (!res) { 202 dev_err(&pdev->dev, "IORESOURCE_IRQ FAILED\n"); 203 return -ENODEV; 204 } 205 206 adata->i2s_irq = res->start; 207 adata->dev = dev; 208 adata->dai_driver = acp70_dai; 209 adata->num_dai = ARRAY_SIZE(acp70_dai); 210 adata->rsrc = &rsrc; 211 adata->machines = snd_soc_acpi_amd_acp70_acp_machines; 212 if (chip->acp_rev == ACP70_DEV) 213 adata->platform = ACP70; 214 else 215 adata->platform = ACP71; 216 217 adata->flag = chip->flag; 218 acp_machine_select(adata); 219 220 dev_set_drvdata(dev, adata); 221 222 ret = acp70_i2s_master_clock_generate(adata); 223 if (ret) { 224 dev_err(&pdev->dev, "Failed to set I2S master clock as 196.608MHz\n"); 225 return ret; 226 } 227 acp_enable_interrupts(adata); 228 acp_platform_register(dev); 229 pm_runtime_set_autosuspend_delay(&pdev->dev, ACP_SUSPEND_DELAY_MS); 230 pm_runtime_use_autosuspend(&pdev->dev); 231 pm_runtime_mark_last_busy(&pdev->dev); 232 pm_runtime_set_active(&pdev->dev); 233 pm_runtime_enable(&pdev->dev); 234 return 0; 235 } 236 237 static void acp_acp70_audio_remove(struct platform_device *pdev) 238 { 239 struct device *dev = &pdev->dev; 240 struct acp_dev_data *adata = dev_get_drvdata(dev); 241 242 acp_disable_interrupts(adata); 243 acp_platform_unregister(dev); 244 pm_runtime_disable(&pdev->dev); 245 } 246 247 static int __maybe_unused acp70_pcm_resume(struct device *dev) 248 { 249 struct acp_dev_data *adata = dev_get_drvdata(dev); 250 struct acp_stream *stream; 251 struct snd_pcm_substream *substream; 252 snd_pcm_uframes_t buf_in_frames; 253 u64 buf_size; 254 255 spin_lock(&adata->acp_lock); 256 list_for_each_entry(stream, &adata->stream_list, list) { 257 if (stream) { 258 substream = stream->substream; 259 if (substream && substream->runtime) { 260 buf_in_frames = (substream->runtime->buffer_size); 261 buf_size = frames_to_bytes(substream->runtime, buf_in_frames); 262 config_pte_for_stream(adata, stream); 263 config_acp_dma(adata, stream, buf_size); 264 if (stream->dai_id) 265 restore_acp_i2s_params(substream, adata, stream); 266 else 267 restore_acp_pdm_params(substream, adata); 268 } 269 } 270 } 271 spin_unlock(&adata->acp_lock); 272 return 0; 273 } 274 275 static const struct dev_pm_ops acp70_dma_pm_ops = { 276 SET_SYSTEM_SLEEP_PM_OPS(NULL, acp70_pcm_resume) 277 }; 278 279 static struct platform_driver acp70_driver = { 280 .probe = acp_acp70_audio_probe, 281 .remove = acp_acp70_audio_remove, 282 .driver = { 283 .name = "acp_asoc_acp70", 284 .pm = &acp70_dma_pm_ops, 285 }, 286 }; 287 288 module_platform_driver(acp70_driver); 289 290 MODULE_DESCRIPTION("AMD ACP ACP70 Driver"); 291 MODULE_IMPORT_NS(SND_SOC_ACP_COMMON); 292 MODULE_LICENSE("Dual BSD/GPL"); 293 MODULE_ALIAS("platform:" DRV_NAME); 294