1 /* 2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz> 3 * Routines for control of YMF724/740/744/754 chips 4 * 5 * BUGS: 6 * -- 7 * 8 * TODO: 9 * -- 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or 14 * (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 24 * 25 */ 26 27 #include <sound/driver.h> 28 #include <linux/delay.h> 29 #include <linux/init.h> 30 #include <linux/interrupt.h> 31 #include <linux/pci.h> 32 #include <linux/sched.h> 33 #include <linux/slab.h> 34 #include <linux/vmalloc.h> 35 36 #include <sound/core.h> 37 #include <sound/control.h> 38 #include <sound/info.h> 39 #include <sound/ymfpci.h> 40 #include <sound/asoundef.h> 41 #include <sound/mpu401.h> 42 43 #include <asm/io.h> 44 45 /* 46 * constants 47 */ 48 49 /* 50 * common I/O routines 51 */ 52 53 static void snd_ymfpci_irq_wait(ymfpci_t *chip); 54 55 static inline u8 snd_ymfpci_readb(ymfpci_t *chip, u32 offset) 56 { 57 return readb(chip->reg_area_virt + offset); 58 } 59 60 static inline void snd_ymfpci_writeb(ymfpci_t *chip, u32 offset, u8 val) 61 { 62 writeb(val, chip->reg_area_virt + offset); 63 } 64 65 static inline u16 snd_ymfpci_readw(ymfpci_t *chip, u32 offset) 66 { 67 return readw(chip->reg_area_virt + offset); 68 } 69 70 static inline void snd_ymfpci_writew(ymfpci_t *chip, u32 offset, u16 val) 71 { 72 writew(val, chip->reg_area_virt + offset); 73 } 74 75 static inline u32 snd_ymfpci_readl(ymfpci_t *chip, u32 offset) 76 { 77 return readl(chip->reg_area_virt + offset); 78 } 79 80 static inline void snd_ymfpci_writel(ymfpci_t *chip, u32 offset, u32 val) 81 { 82 writel(val, chip->reg_area_virt + offset); 83 } 84 85 static int snd_ymfpci_codec_ready(ymfpci_t *chip, int secondary) 86 { 87 signed long end_time; 88 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR; 89 90 end_time = (jiffies + ((3 * HZ) / 4)) + 1; 91 do { 92 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0) 93 return 0; 94 set_current_state(TASK_UNINTERRUPTIBLE); 95 schedule_timeout(1); 96 } while (end_time - (signed long)jiffies >= 0); 97 snd_printk("codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg)); 98 return -EBUSY; 99 } 100 101 static void snd_ymfpci_codec_write(ac97_t *ac97, u16 reg, u16 val) 102 { 103 ymfpci_t *chip = ac97->private_data; 104 u32 cmd; 105 106 snd_ymfpci_codec_ready(chip, 0); 107 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val; 108 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd); 109 } 110 111 static u16 snd_ymfpci_codec_read(ac97_t *ac97, u16 reg) 112 { 113 ymfpci_t *chip = ac97->private_data; 114 115 if (snd_ymfpci_codec_ready(chip, 0)) 116 return ~0; 117 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg); 118 if (snd_ymfpci_codec_ready(chip, 0)) 119 return ~0; 120 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) { 121 int i; 122 for (i = 0; i < 600; i++) 123 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); 124 } 125 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); 126 } 127 128 /* 129 * Misc routines 130 */ 131 132 static u32 snd_ymfpci_calc_delta(u32 rate) 133 { 134 switch (rate) { 135 case 8000: return 0x02aaab00; 136 case 11025: return 0x03accd00; 137 case 16000: return 0x05555500; 138 case 22050: return 0x07599a00; 139 case 32000: return 0x0aaaab00; 140 case 44100: return 0x0eb33300; 141 default: return ((rate << 16) / 375) << 5; 142 } 143 } 144 145 static u32 def_rate[8] = { 146 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000 147 }; 148 149 static u32 snd_ymfpci_calc_lpfK(u32 rate) 150 { 151 u32 i; 152 static u32 val[8] = { 153 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000, 154 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000 155 }; 156 157 if (rate == 44100) 158 return 0x40000000; /* FIXME: What's the right value? */ 159 for (i = 0; i < 8; i++) 160 if (rate <= def_rate[i]) 161 return val[i]; 162 return val[0]; 163 } 164 165 static u32 snd_ymfpci_calc_lpfQ(u32 rate) 166 { 167 u32 i; 168 static u32 val[8] = { 169 0x35280000, 0x34A70000, 0x32020000, 0x31770000, 170 0x31390000, 0x31C90000, 0x33D00000, 0x40000000 171 }; 172 173 if (rate == 44100) 174 return 0x370A0000; 175 for (i = 0; i < 8; i++) 176 if (rate <= def_rate[i]) 177 return val[i]; 178 return val[0]; 179 } 180 181 /* 182 * Hardware start management 183 */ 184 185 static void snd_ymfpci_hw_start(ymfpci_t *chip) 186 { 187 unsigned long flags; 188 189 spin_lock_irqsave(&chip->reg_lock, flags); 190 if (chip->start_count++ > 0) 191 goto __end; 192 snd_ymfpci_writel(chip, YDSXGR_MODE, 193 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3); 194 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; 195 __end: 196 spin_unlock_irqrestore(&chip->reg_lock, flags); 197 } 198 199 static void snd_ymfpci_hw_stop(ymfpci_t *chip) 200 { 201 unsigned long flags; 202 long timeout = 1000; 203 204 spin_lock_irqsave(&chip->reg_lock, flags); 205 if (--chip->start_count > 0) 206 goto __end; 207 snd_ymfpci_writel(chip, YDSXGR_MODE, 208 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3); 209 while (timeout-- > 0) { 210 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0) 211 break; 212 } 213 if (atomic_read(&chip->interrupt_sleep_count)) { 214 atomic_set(&chip->interrupt_sleep_count, 0); 215 wake_up(&chip->interrupt_sleep); 216 } 217 __end: 218 spin_unlock_irqrestore(&chip->reg_lock, flags); 219 } 220 221 /* 222 * Playback voice management 223 */ 224 225 static int voice_alloc(ymfpci_t *chip, ymfpci_voice_type_t type, int pair, ymfpci_voice_t **rvoice) 226 { 227 ymfpci_voice_t *voice, *voice2; 228 int idx; 229 230 *rvoice = NULL; 231 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) { 232 voice = &chip->voices[idx]; 233 voice2 = pair ? &chip->voices[idx+1] : NULL; 234 if (voice->use || (voice2 && voice2->use)) 235 continue; 236 voice->use = 1; 237 if (voice2) 238 voice2->use = 1; 239 switch (type) { 240 case YMFPCI_PCM: 241 voice->pcm = 1; 242 if (voice2) 243 voice2->pcm = 1; 244 break; 245 case YMFPCI_SYNTH: 246 voice->synth = 1; 247 break; 248 case YMFPCI_MIDI: 249 voice->midi = 1; 250 break; 251 } 252 snd_ymfpci_hw_start(chip); 253 if (voice2) 254 snd_ymfpci_hw_start(chip); 255 *rvoice = voice; 256 return 0; 257 } 258 return -ENOMEM; 259 } 260 261 static int snd_ymfpci_voice_alloc(ymfpci_t *chip, ymfpci_voice_type_t type, int pair, ymfpci_voice_t **rvoice) 262 { 263 unsigned long flags; 264 int result; 265 266 snd_assert(rvoice != NULL, return -EINVAL); 267 snd_assert(!pair || type == YMFPCI_PCM, return -EINVAL); 268 269 spin_lock_irqsave(&chip->voice_lock, flags); 270 for (;;) { 271 result = voice_alloc(chip, type, pair, rvoice); 272 if (result == 0 || type != YMFPCI_PCM) 273 break; 274 /* TODO: synth/midi voice deallocation */ 275 break; 276 } 277 spin_unlock_irqrestore(&chip->voice_lock, flags); 278 return result; 279 } 280 281 static int snd_ymfpci_voice_free(ymfpci_t *chip, ymfpci_voice_t *pvoice) 282 { 283 unsigned long flags; 284 285 snd_assert(pvoice != NULL, return -EINVAL); 286 snd_ymfpci_hw_stop(chip); 287 spin_lock_irqsave(&chip->voice_lock, flags); 288 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0; 289 pvoice->ypcm = NULL; 290 pvoice->interrupt = NULL; 291 spin_unlock_irqrestore(&chip->voice_lock, flags); 292 return 0; 293 } 294 295 /* 296 * PCM part 297 */ 298 299 static void snd_ymfpci_pcm_interrupt(ymfpci_t *chip, ymfpci_voice_t *voice) 300 { 301 ymfpci_pcm_t *ypcm; 302 u32 pos, delta; 303 304 if ((ypcm = voice->ypcm) == NULL) 305 return; 306 if (ypcm->substream == NULL) 307 return; 308 spin_lock(&chip->reg_lock); 309 if (ypcm->running) { 310 pos = le32_to_cpu(voice->bank[chip->active_bank].start); 311 if (pos < ypcm->last_pos) 312 delta = pos + (ypcm->buffer_size - ypcm->last_pos); 313 else 314 delta = pos - ypcm->last_pos; 315 ypcm->period_pos += delta; 316 ypcm->last_pos = pos; 317 if (ypcm->period_pos >= ypcm->period_size) { 318 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start); 319 ypcm->period_pos %= ypcm->period_size; 320 spin_unlock(&chip->reg_lock); 321 snd_pcm_period_elapsed(ypcm->substream); 322 spin_lock(&chip->reg_lock); 323 } 324 } 325 spin_unlock(&chip->reg_lock); 326 } 327 328 static void snd_ymfpci_pcm_capture_interrupt(snd_pcm_substream_t *substream) 329 { 330 snd_pcm_runtime_t *runtime = substream->runtime; 331 ymfpci_pcm_t *ypcm = runtime->private_data; 332 ymfpci_t *chip = ypcm->chip; 333 u32 pos, delta; 334 335 spin_lock(&chip->reg_lock); 336 if (ypcm->running) { 337 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; 338 if (pos < ypcm->last_pos) 339 delta = pos + (ypcm->buffer_size - ypcm->last_pos); 340 else 341 delta = pos - ypcm->last_pos; 342 ypcm->period_pos += delta; 343 ypcm->last_pos = pos; 344 if (ypcm->period_pos >= ypcm->period_size) { 345 ypcm->period_pos %= ypcm->period_size; 346 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start); 347 spin_unlock(&chip->reg_lock); 348 snd_pcm_period_elapsed(substream); 349 spin_lock(&chip->reg_lock); 350 } 351 } 352 spin_unlock(&chip->reg_lock); 353 } 354 355 static int snd_ymfpci_playback_trigger(snd_pcm_substream_t * substream, 356 int cmd) 357 { 358 ymfpci_t *chip = snd_pcm_substream_chip(substream); 359 ymfpci_pcm_t *ypcm = substream->runtime->private_data; 360 int result = 0; 361 362 spin_lock(&chip->reg_lock); 363 if (ypcm->voices[0] == NULL) { 364 result = -EINVAL; 365 goto __unlock; 366 } 367 switch (cmd) { 368 case SNDRV_PCM_TRIGGER_START: 369 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 370 case SNDRV_PCM_TRIGGER_RESUME: 371 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr); 372 if (ypcm->voices[1] != NULL) 373 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr); 374 ypcm->running = 1; 375 break; 376 case SNDRV_PCM_TRIGGER_STOP: 377 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 378 case SNDRV_PCM_TRIGGER_SUSPEND: 379 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0; 380 if (ypcm->voices[1] != NULL) 381 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0; 382 ypcm->running = 0; 383 break; 384 default: 385 result = -EINVAL; 386 break; 387 } 388 __unlock: 389 spin_unlock(&chip->reg_lock); 390 return result; 391 } 392 static int snd_ymfpci_capture_trigger(snd_pcm_substream_t * substream, 393 int cmd) 394 { 395 ymfpci_t *chip = snd_pcm_substream_chip(substream); 396 ymfpci_pcm_t *ypcm = substream->runtime->private_data; 397 int result = 0; 398 u32 tmp; 399 400 spin_lock(&chip->reg_lock); 401 switch (cmd) { 402 case SNDRV_PCM_TRIGGER_START: 403 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 404 case SNDRV_PCM_TRIGGER_RESUME: 405 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number); 406 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); 407 ypcm->running = 1; 408 break; 409 case SNDRV_PCM_TRIGGER_STOP: 410 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 411 case SNDRV_PCM_TRIGGER_SUSPEND: 412 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number); 413 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); 414 ypcm->running = 0; 415 break; 416 default: 417 result = -EINVAL; 418 break; 419 } 420 spin_unlock(&chip->reg_lock); 421 return result; 422 } 423 424 static int snd_ymfpci_pcm_voice_alloc(ymfpci_pcm_t *ypcm, int voices) 425 { 426 int err; 427 428 if (ypcm->voices[1] != NULL && voices < 2) { 429 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]); 430 ypcm->voices[1] = NULL; 431 } 432 if (voices == 1 && ypcm->voices[0] != NULL) 433 return 0; /* already allocated */ 434 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL) 435 return 0; /* already allocated */ 436 if (voices > 1) { 437 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) { 438 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]); 439 ypcm->voices[0] = NULL; 440 } 441 } 442 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]); 443 if (err < 0) 444 return err; 445 ypcm->voices[0]->ypcm = ypcm; 446 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt; 447 if (voices > 1) { 448 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1]; 449 ypcm->voices[1]->ypcm = ypcm; 450 } 451 return 0; 452 } 453 454 static void snd_ymfpci_pcm_init_voice(ymfpci_voice_t *voice, int stereo, 455 int rate, int w_16, unsigned long addr, 456 unsigned int end, 457 int output_front, int output_rear) 458 { 459 u32 format; 460 u32 delta = snd_ymfpci_calc_delta(rate); 461 u32 lpfQ = snd_ymfpci_calc_lpfQ(rate); 462 u32 lpfK = snd_ymfpci_calc_lpfK(rate); 463 snd_ymfpci_playback_bank_t *bank; 464 unsigned int nbank; 465 466 snd_assert(voice != NULL, return); 467 format = (stereo ? 0x00010000 : 0) | (w_16 ? 0 : 0x80000000); 468 for (nbank = 0; nbank < 2; nbank++) { 469 bank = &voice->bank[nbank]; 470 bank->format = cpu_to_le32(format); 471 bank->loop_default = 0; 472 bank->base = cpu_to_le32(addr); 473 bank->loop_start = 0; 474 bank->loop_end = cpu_to_le32(end); 475 bank->loop_frac = 0; 476 bank->eg_gain_end = cpu_to_le32(0x40000000); 477 bank->lpfQ = cpu_to_le32(lpfQ); 478 bank->status = 0; 479 bank->num_of_frames = 0; 480 bank->loop_count = 0; 481 bank->start = 0; 482 bank->start_frac = 0; 483 bank->delta = 484 bank->delta_end = cpu_to_le32(delta); 485 bank->lpfK = 486 bank->lpfK_end = cpu_to_le32(lpfK); 487 bank->eg_gain = cpu_to_le32(0x40000000); 488 bank->lpfD1 = 489 bank->lpfD2 = 0; 490 491 bank->left_gain = 492 bank->right_gain = 493 bank->left_gain_end = 494 bank->right_gain_end = 495 bank->eff1_gain = 496 bank->eff2_gain = 497 bank->eff3_gain = 498 bank->eff1_gain_end = 499 bank->eff2_gain_end = 500 bank->eff3_gain_end = 0; 501 502 if (!stereo) { 503 if (output_front) { 504 bank->left_gain = 505 bank->right_gain = 506 bank->left_gain_end = 507 bank->right_gain_end = cpu_to_le32(0x40000000); 508 } 509 if (output_rear) { 510 bank->eff2_gain = 511 bank->eff2_gain_end = 512 bank->eff3_gain = 513 bank->eff3_gain_end = cpu_to_le32(0x40000000); 514 } 515 } else { 516 if (output_front) { 517 if ((voice->number & 1) == 0) { 518 bank->left_gain = 519 bank->left_gain_end = cpu_to_le32(0x40000000); 520 } else { 521 bank->format |= cpu_to_le32(1); 522 bank->right_gain = 523 bank->right_gain_end = cpu_to_le32(0x40000000); 524 } 525 } 526 if (output_rear) { 527 if ((voice->number & 1) == 0) { 528 bank->eff3_gain = 529 bank->eff3_gain_end = cpu_to_le32(0x40000000); 530 } else { 531 bank->format |= cpu_to_le32(1); 532 bank->eff2_gain = 533 bank->eff2_gain_end = cpu_to_le32(0x40000000); 534 } 535 } 536 } 537 } 538 } 539 540 static int __devinit snd_ymfpci_ac3_init(ymfpci_t *chip) 541 { 542 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 543 4096, &chip->ac3_tmp_base) < 0) 544 return -ENOMEM; 545 546 chip->bank_effect[3][0]->base = 547 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr); 548 chip->bank_effect[3][0]->loop_end = 549 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024); 550 chip->bank_effect[4][0]->base = 551 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048); 552 chip->bank_effect[4][0]->loop_end = 553 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024); 554 555 spin_lock_irq(&chip->reg_lock); 556 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 557 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3); 558 spin_unlock_irq(&chip->reg_lock); 559 return 0; 560 } 561 562 static int snd_ymfpci_ac3_done(ymfpci_t *chip) 563 { 564 spin_lock_irq(&chip->reg_lock); 565 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 566 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3)); 567 spin_unlock_irq(&chip->reg_lock); 568 // snd_ymfpci_irq_wait(chip); 569 if (chip->ac3_tmp_base.area) { 570 snd_dma_free_pages(&chip->ac3_tmp_base); 571 chip->ac3_tmp_base.area = NULL; 572 } 573 return 0; 574 } 575 576 static int snd_ymfpci_playback_hw_params(snd_pcm_substream_t * substream, 577 snd_pcm_hw_params_t * hw_params) 578 { 579 snd_pcm_runtime_t *runtime = substream->runtime; 580 ymfpci_pcm_t *ypcm = runtime->private_data; 581 int err; 582 583 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0) 584 return err; 585 if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0) 586 return err; 587 return 0; 588 } 589 590 static int snd_ymfpci_playback_hw_free(snd_pcm_substream_t * substream) 591 { 592 ymfpci_t *chip = snd_pcm_substream_chip(substream); 593 snd_pcm_runtime_t *runtime = substream->runtime; 594 ymfpci_pcm_t *ypcm; 595 596 if (runtime->private_data == NULL) 597 return 0; 598 ypcm = runtime->private_data; 599 600 /* wait, until the PCI operations are not finished */ 601 snd_ymfpci_irq_wait(chip); 602 snd_pcm_lib_free_pages(substream); 603 if (ypcm->voices[1]) { 604 snd_ymfpci_voice_free(chip, ypcm->voices[1]); 605 ypcm->voices[1] = NULL; 606 } 607 if (ypcm->voices[0]) { 608 snd_ymfpci_voice_free(chip, ypcm->voices[0]); 609 ypcm->voices[0] = NULL; 610 } 611 return 0; 612 } 613 614 static int snd_ymfpci_playback_prepare(snd_pcm_substream_t * substream) 615 { 616 // ymfpci_t *chip = snd_pcm_substream_chip(substream); 617 snd_pcm_runtime_t *runtime = substream->runtime; 618 ymfpci_pcm_t *ypcm = runtime->private_data; 619 unsigned int nvoice; 620 621 ypcm->period_size = runtime->period_size; 622 ypcm->buffer_size = runtime->buffer_size; 623 ypcm->period_pos = 0; 624 ypcm->last_pos = 0; 625 for (nvoice = 0; nvoice < runtime->channels; nvoice++) 626 snd_ymfpci_pcm_init_voice(ypcm->voices[nvoice], 627 runtime->channels == 2, 628 runtime->rate, 629 snd_pcm_format_width(runtime->format) == 16, 630 runtime->dma_addr, 631 ypcm->buffer_size, 632 ypcm->output_front, 633 ypcm->output_rear); 634 return 0; 635 } 636 637 static int snd_ymfpci_capture_hw_params(snd_pcm_substream_t * substream, 638 snd_pcm_hw_params_t * hw_params) 639 { 640 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 641 } 642 643 static int snd_ymfpci_capture_hw_free(snd_pcm_substream_t * substream) 644 { 645 ymfpci_t *chip = snd_pcm_substream_chip(substream); 646 647 /* wait, until the PCI operations are not finished */ 648 snd_ymfpci_irq_wait(chip); 649 return snd_pcm_lib_free_pages(substream); 650 } 651 652 static int snd_ymfpci_capture_prepare(snd_pcm_substream_t * substream) 653 { 654 ymfpci_t *chip = snd_pcm_substream_chip(substream); 655 snd_pcm_runtime_t *runtime = substream->runtime; 656 ymfpci_pcm_t *ypcm = runtime->private_data; 657 snd_ymfpci_capture_bank_t * bank; 658 int nbank; 659 u32 rate, format; 660 661 ypcm->period_size = runtime->period_size; 662 ypcm->buffer_size = runtime->buffer_size; 663 ypcm->period_pos = 0; 664 ypcm->last_pos = 0; 665 ypcm->shift = 0; 666 rate = ((48000 * 4096) / runtime->rate) - 1; 667 format = 0; 668 if (runtime->channels == 2) { 669 format |= 2; 670 ypcm->shift++; 671 } 672 if (snd_pcm_format_width(runtime->format) == 8) 673 format |= 1; 674 else 675 ypcm->shift++; 676 switch (ypcm->capture_bank_number) { 677 case 0: 678 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format); 679 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate); 680 break; 681 case 1: 682 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format); 683 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate); 684 break; 685 } 686 for (nbank = 0; nbank < 2; nbank++) { 687 bank = chip->bank_capture[ypcm->capture_bank_number][nbank]; 688 bank->base = cpu_to_le32(runtime->dma_addr); 689 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift); 690 bank->start = 0; 691 bank->num_of_loops = 0; 692 } 693 return 0; 694 } 695 696 static snd_pcm_uframes_t snd_ymfpci_playback_pointer(snd_pcm_substream_t * substream) 697 { 698 ymfpci_t *chip = snd_pcm_substream_chip(substream); 699 snd_pcm_runtime_t *runtime = substream->runtime; 700 ymfpci_pcm_t *ypcm = runtime->private_data; 701 ymfpci_voice_t *voice = ypcm->voices[0]; 702 703 if (!(ypcm->running && voice)) 704 return 0; 705 return le32_to_cpu(voice->bank[chip->active_bank].start); 706 } 707 708 static snd_pcm_uframes_t snd_ymfpci_capture_pointer(snd_pcm_substream_t * substream) 709 { 710 ymfpci_t *chip = snd_pcm_substream_chip(substream); 711 snd_pcm_runtime_t *runtime = substream->runtime; 712 ymfpci_pcm_t *ypcm = runtime->private_data; 713 714 if (!ypcm->running) 715 return 0; 716 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; 717 } 718 719 static void snd_ymfpci_irq_wait(ymfpci_t *chip) 720 { 721 wait_queue_t wait; 722 int loops = 4; 723 724 while (loops-- > 0) { 725 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0) 726 continue; 727 init_waitqueue_entry(&wait, current); 728 add_wait_queue(&chip->interrupt_sleep, &wait); 729 atomic_inc(&chip->interrupt_sleep_count); 730 set_current_state(TASK_UNINTERRUPTIBLE); 731 schedule_timeout(HZ/20); 732 remove_wait_queue(&chip->interrupt_sleep, &wait); 733 } 734 } 735 736 static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id, struct pt_regs *regs) 737 { 738 ymfpci_t *chip = dev_id; 739 u32 status, nvoice, mode; 740 ymfpci_voice_t *voice; 741 742 status = snd_ymfpci_readl(chip, YDSXGR_STATUS); 743 if (status & 0x80000000) { 744 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; 745 spin_lock(&chip->voice_lock); 746 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) { 747 voice = &chip->voices[nvoice]; 748 if (voice->interrupt) 749 voice->interrupt(chip, voice); 750 } 751 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) { 752 if (chip->capture_substream[nvoice]) 753 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]); 754 } 755 #if 0 756 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) { 757 if (chip->effect_substream[nvoice]) 758 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]); 759 } 760 #endif 761 spin_unlock(&chip->voice_lock); 762 spin_lock(&chip->reg_lock); 763 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000); 764 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2; 765 snd_ymfpci_writel(chip, YDSXGR_MODE, mode); 766 spin_unlock(&chip->reg_lock); 767 768 if (atomic_read(&chip->interrupt_sleep_count)) { 769 atomic_set(&chip->interrupt_sleep_count, 0); 770 wake_up(&chip->interrupt_sleep); 771 } 772 } 773 774 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG); 775 if (status & 1) { 776 if (chip->timer) 777 snd_timer_interrupt(chip->timer, chip->timer->sticks); 778 } 779 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status); 780 781 if (chip->rawmidi) 782 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data, regs); 783 return IRQ_HANDLED; 784 } 785 786 static snd_pcm_hardware_t snd_ymfpci_playback = 787 { 788 .info = (SNDRV_PCM_INFO_MMAP | 789 SNDRV_PCM_INFO_MMAP_VALID | 790 SNDRV_PCM_INFO_INTERLEAVED | 791 SNDRV_PCM_INFO_BLOCK_TRANSFER | 792 SNDRV_PCM_INFO_PAUSE | 793 SNDRV_PCM_INFO_RESUME), 794 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 795 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 796 .rate_min = 8000, 797 .rate_max = 48000, 798 .channels_min = 1, 799 .channels_max = 2, 800 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */ 801 .period_bytes_min = 64, 802 .period_bytes_max = 256 * 1024, /* FIXME: enough? */ 803 .periods_min = 3, 804 .periods_max = 1024, 805 .fifo_size = 0, 806 }; 807 808 static snd_pcm_hardware_t snd_ymfpci_capture = 809 { 810 .info = (SNDRV_PCM_INFO_MMAP | 811 SNDRV_PCM_INFO_MMAP_VALID | 812 SNDRV_PCM_INFO_INTERLEAVED | 813 SNDRV_PCM_INFO_BLOCK_TRANSFER | 814 SNDRV_PCM_INFO_PAUSE | 815 SNDRV_PCM_INFO_RESUME), 816 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 817 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 818 .rate_min = 8000, 819 .rate_max = 48000, 820 .channels_min = 1, 821 .channels_max = 2, 822 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */ 823 .period_bytes_min = 64, 824 .period_bytes_max = 256 * 1024, /* FIXME: enough? */ 825 .periods_min = 3, 826 .periods_max = 1024, 827 .fifo_size = 0, 828 }; 829 830 static void snd_ymfpci_pcm_free_substream(snd_pcm_runtime_t *runtime) 831 { 832 kfree(runtime->private_data); 833 } 834 835 static int snd_ymfpci_playback_open_1(snd_pcm_substream_t * substream) 836 { 837 ymfpci_t *chip = snd_pcm_substream_chip(substream); 838 snd_pcm_runtime_t *runtime = substream->runtime; 839 ymfpci_pcm_t *ypcm; 840 841 ypcm = kcalloc(1, sizeof(*ypcm), GFP_KERNEL); 842 if (ypcm == NULL) 843 return -ENOMEM; 844 ypcm->chip = chip; 845 ypcm->type = PLAYBACK_VOICE; 846 ypcm->substream = substream; 847 runtime->hw = snd_ymfpci_playback; 848 runtime->private_data = ypcm; 849 runtime->private_free = snd_ymfpci_pcm_free_substream; 850 /* FIXME? True value is 256/48 = 5.33333 ms */ 851 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX); 852 return 0; 853 } 854 855 /* call with spinlock held */ 856 static void ymfpci_open_extension(ymfpci_t *chip) 857 { 858 if (! chip->rear_opened) { 859 if (! chip->spdif_opened) /* set AC3 */ 860 snd_ymfpci_writel(chip, YDSXGR_MODE, 861 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30)); 862 /* enable second codec (4CHEN) */ 863 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, 864 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010); 865 } 866 } 867 868 /* call with spinlock held */ 869 static void ymfpci_close_extension(ymfpci_t *chip) 870 { 871 if (! chip->rear_opened) { 872 if (! chip->spdif_opened) 873 snd_ymfpci_writel(chip, YDSXGR_MODE, 874 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30)); 875 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, 876 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010); 877 } 878 } 879 880 static int snd_ymfpci_playback_open(snd_pcm_substream_t * substream) 881 { 882 ymfpci_t *chip = snd_pcm_substream_chip(substream); 883 snd_pcm_runtime_t *runtime = substream->runtime; 884 ymfpci_pcm_t *ypcm; 885 int err; 886 887 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 888 return err; 889 ypcm = runtime->private_data; 890 ypcm->output_front = 1; 891 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0; 892 spin_lock_irq(&chip->reg_lock); 893 if (ypcm->output_rear) { 894 ymfpci_open_extension(chip); 895 chip->rear_opened++; 896 } 897 spin_unlock_irq(&chip->reg_lock); 898 return 0; 899 } 900 901 static int snd_ymfpci_playback_spdif_open(snd_pcm_substream_t * substream) 902 { 903 ymfpci_t *chip = snd_pcm_substream_chip(substream); 904 snd_pcm_runtime_t *runtime = substream->runtime; 905 ymfpci_pcm_t *ypcm; 906 int err; 907 908 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 909 return err; 910 ypcm = runtime->private_data; 911 ypcm->output_front = 0; 912 ypcm->output_rear = 1; 913 spin_lock_irq(&chip->reg_lock); 914 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 915 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2); 916 ymfpci_open_extension(chip); 917 chip->spdif_pcm_bits = chip->spdif_bits; 918 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); 919 chip->spdif_opened++; 920 spin_unlock_irq(&chip->reg_lock); 921 922 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 923 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | 924 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); 925 return 0; 926 } 927 928 static int snd_ymfpci_playback_4ch_open(snd_pcm_substream_t * substream) 929 { 930 ymfpci_t *chip = snd_pcm_substream_chip(substream); 931 snd_pcm_runtime_t *runtime = substream->runtime; 932 ymfpci_pcm_t *ypcm; 933 int err; 934 935 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 936 return err; 937 ypcm = runtime->private_data; 938 ypcm->output_front = 0; 939 ypcm->output_rear = 1; 940 spin_lock_irq(&chip->reg_lock); 941 ymfpci_open_extension(chip); 942 chip->rear_opened++; 943 spin_unlock_irq(&chip->reg_lock); 944 return 0; 945 } 946 947 static int snd_ymfpci_capture_open(snd_pcm_substream_t * substream, 948 u32 capture_bank_number) 949 { 950 ymfpci_t *chip = snd_pcm_substream_chip(substream); 951 snd_pcm_runtime_t *runtime = substream->runtime; 952 ymfpci_pcm_t *ypcm; 953 954 ypcm = kcalloc(1, sizeof(*ypcm), GFP_KERNEL); 955 if (ypcm == NULL) 956 return -ENOMEM; 957 ypcm->chip = chip; 958 ypcm->type = capture_bank_number + CAPTURE_REC; 959 ypcm->substream = substream; 960 ypcm->capture_bank_number = capture_bank_number; 961 chip->capture_substream[capture_bank_number] = substream; 962 runtime->hw = snd_ymfpci_capture; 963 /* FIXME? True value is 256/48 = 5.33333 ms */ 964 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX); 965 runtime->private_data = ypcm; 966 runtime->private_free = snd_ymfpci_pcm_free_substream; 967 snd_ymfpci_hw_start(chip); 968 return 0; 969 } 970 971 static int snd_ymfpci_capture_rec_open(snd_pcm_substream_t * substream) 972 { 973 return snd_ymfpci_capture_open(substream, 0); 974 } 975 976 static int snd_ymfpci_capture_ac97_open(snd_pcm_substream_t * substream) 977 { 978 return snd_ymfpci_capture_open(substream, 1); 979 } 980 981 static int snd_ymfpci_playback_close_1(snd_pcm_substream_t * substream) 982 { 983 return 0; 984 } 985 986 static int snd_ymfpci_playback_close(snd_pcm_substream_t * substream) 987 { 988 ymfpci_t *chip = snd_pcm_substream_chip(substream); 989 ymfpci_pcm_t *ypcm = substream->runtime->private_data; 990 991 spin_lock_irq(&chip->reg_lock); 992 if (ypcm->output_rear && chip->rear_opened > 0) { 993 chip->rear_opened--; 994 ymfpci_close_extension(chip); 995 } 996 spin_unlock_irq(&chip->reg_lock); 997 return snd_ymfpci_playback_close_1(substream); 998 } 999 1000 static int snd_ymfpci_playback_spdif_close(snd_pcm_substream_t * substream) 1001 { 1002 ymfpci_t *chip = snd_pcm_substream_chip(substream); 1003 1004 spin_lock_irq(&chip->reg_lock); 1005 chip->spdif_opened = 0; 1006 ymfpci_close_extension(chip); 1007 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 1008 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2); 1009 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 1010 spin_unlock_irq(&chip->reg_lock); 1011 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 1012 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | 1013 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); 1014 return snd_ymfpci_playback_close_1(substream); 1015 } 1016 1017 static int snd_ymfpci_playback_4ch_close(snd_pcm_substream_t * substream) 1018 { 1019 ymfpci_t *chip = snd_pcm_substream_chip(substream); 1020 1021 spin_lock_irq(&chip->reg_lock); 1022 if (chip->rear_opened > 0) { 1023 chip->rear_opened--; 1024 ymfpci_close_extension(chip); 1025 } 1026 spin_unlock_irq(&chip->reg_lock); 1027 return snd_ymfpci_playback_close_1(substream); 1028 } 1029 1030 static int snd_ymfpci_capture_close(snd_pcm_substream_t * substream) 1031 { 1032 ymfpci_t *chip = snd_pcm_substream_chip(substream); 1033 snd_pcm_runtime_t *runtime = substream->runtime; 1034 ymfpci_pcm_t *ypcm = runtime->private_data; 1035 1036 if (ypcm != NULL) { 1037 chip->capture_substream[ypcm->capture_bank_number] = NULL; 1038 snd_ymfpci_hw_stop(chip); 1039 } 1040 return 0; 1041 } 1042 1043 static snd_pcm_ops_t snd_ymfpci_playback_ops = { 1044 .open = snd_ymfpci_playback_open, 1045 .close = snd_ymfpci_playback_close, 1046 .ioctl = snd_pcm_lib_ioctl, 1047 .hw_params = snd_ymfpci_playback_hw_params, 1048 .hw_free = snd_ymfpci_playback_hw_free, 1049 .prepare = snd_ymfpci_playback_prepare, 1050 .trigger = snd_ymfpci_playback_trigger, 1051 .pointer = snd_ymfpci_playback_pointer, 1052 }; 1053 1054 static snd_pcm_ops_t snd_ymfpci_capture_rec_ops = { 1055 .open = snd_ymfpci_capture_rec_open, 1056 .close = snd_ymfpci_capture_close, 1057 .ioctl = snd_pcm_lib_ioctl, 1058 .hw_params = snd_ymfpci_capture_hw_params, 1059 .hw_free = snd_ymfpci_capture_hw_free, 1060 .prepare = snd_ymfpci_capture_prepare, 1061 .trigger = snd_ymfpci_capture_trigger, 1062 .pointer = snd_ymfpci_capture_pointer, 1063 }; 1064 1065 static void snd_ymfpci_pcm_free(snd_pcm_t *pcm) 1066 { 1067 ymfpci_t *chip = pcm->private_data; 1068 chip->pcm = NULL; 1069 snd_pcm_lib_preallocate_free_for_all(pcm); 1070 } 1071 1072 int __devinit snd_ymfpci_pcm(ymfpci_t *chip, int device, snd_pcm_t ** rpcm) 1073 { 1074 snd_pcm_t *pcm; 1075 int err; 1076 1077 if (rpcm) 1078 *rpcm = NULL; 1079 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0) 1080 return err; 1081 pcm->private_data = chip; 1082 pcm->private_free = snd_ymfpci_pcm_free; 1083 1084 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops); 1085 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops); 1086 1087 /* global setup */ 1088 pcm->info_flags = 0; 1089 strcpy(pcm->name, "YMFPCI"); 1090 chip->pcm = pcm; 1091 1092 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1093 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1094 1095 if (rpcm) 1096 *rpcm = pcm; 1097 return 0; 1098 } 1099 1100 static snd_pcm_ops_t snd_ymfpci_capture_ac97_ops = { 1101 .open = snd_ymfpci_capture_ac97_open, 1102 .close = snd_ymfpci_capture_close, 1103 .ioctl = snd_pcm_lib_ioctl, 1104 .hw_params = snd_ymfpci_capture_hw_params, 1105 .hw_free = snd_ymfpci_capture_hw_free, 1106 .prepare = snd_ymfpci_capture_prepare, 1107 .trigger = snd_ymfpci_capture_trigger, 1108 .pointer = snd_ymfpci_capture_pointer, 1109 }; 1110 1111 static void snd_ymfpci_pcm2_free(snd_pcm_t *pcm) 1112 { 1113 ymfpci_t *chip = pcm->private_data; 1114 chip->pcm2 = NULL; 1115 snd_pcm_lib_preallocate_free_for_all(pcm); 1116 } 1117 1118 int __devinit snd_ymfpci_pcm2(ymfpci_t *chip, int device, snd_pcm_t ** rpcm) 1119 { 1120 snd_pcm_t *pcm; 1121 int err; 1122 1123 if (rpcm) 1124 *rpcm = NULL; 1125 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0) 1126 return err; 1127 pcm->private_data = chip; 1128 pcm->private_free = snd_ymfpci_pcm2_free; 1129 1130 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops); 1131 1132 /* global setup */ 1133 pcm->info_flags = 0; 1134 sprintf(pcm->name, "YMFPCI - %s", 1135 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97"); 1136 chip->pcm2 = pcm; 1137 1138 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1139 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1140 1141 if (rpcm) 1142 *rpcm = pcm; 1143 return 0; 1144 } 1145 1146 static snd_pcm_ops_t snd_ymfpci_playback_spdif_ops = { 1147 .open = snd_ymfpci_playback_spdif_open, 1148 .close = snd_ymfpci_playback_spdif_close, 1149 .ioctl = snd_pcm_lib_ioctl, 1150 .hw_params = snd_ymfpci_playback_hw_params, 1151 .hw_free = snd_ymfpci_playback_hw_free, 1152 .prepare = snd_ymfpci_playback_prepare, 1153 .trigger = snd_ymfpci_playback_trigger, 1154 .pointer = snd_ymfpci_playback_pointer, 1155 }; 1156 1157 static void snd_ymfpci_pcm_spdif_free(snd_pcm_t *pcm) 1158 { 1159 ymfpci_t *chip = pcm->private_data; 1160 chip->pcm_spdif = NULL; 1161 snd_pcm_lib_preallocate_free_for_all(pcm); 1162 } 1163 1164 int __devinit snd_ymfpci_pcm_spdif(ymfpci_t *chip, int device, snd_pcm_t ** rpcm) 1165 { 1166 snd_pcm_t *pcm; 1167 int err; 1168 1169 if (rpcm) 1170 *rpcm = NULL; 1171 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0) 1172 return err; 1173 pcm->private_data = chip; 1174 pcm->private_free = snd_ymfpci_pcm_spdif_free; 1175 1176 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops); 1177 1178 /* global setup */ 1179 pcm->info_flags = 0; 1180 strcpy(pcm->name, "YMFPCI - IEC958"); 1181 chip->pcm_spdif = pcm; 1182 1183 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1184 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1185 1186 if (rpcm) 1187 *rpcm = pcm; 1188 return 0; 1189 } 1190 1191 static snd_pcm_ops_t snd_ymfpci_playback_4ch_ops = { 1192 .open = snd_ymfpci_playback_4ch_open, 1193 .close = snd_ymfpci_playback_4ch_close, 1194 .ioctl = snd_pcm_lib_ioctl, 1195 .hw_params = snd_ymfpci_playback_hw_params, 1196 .hw_free = snd_ymfpci_playback_hw_free, 1197 .prepare = snd_ymfpci_playback_prepare, 1198 .trigger = snd_ymfpci_playback_trigger, 1199 .pointer = snd_ymfpci_playback_pointer, 1200 }; 1201 1202 static void snd_ymfpci_pcm_4ch_free(snd_pcm_t *pcm) 1203 { 1204 ymfpci_t *chip = pcm->private_data; 1205 chip->pcm_4ch = NULL; 1206 snd_pcm_lib_preallocate_free_for_all(pcm); 1207 } 1208 1209 int __devinit snd_ymfpci_pcm_4ch(ymfpci_t *chip, int device, snd_pcm_t ** rpcm) 1210 { 1211 snd_pcm_t *pcm; 1212 int err; 1213 1214 if (rpcm) 1215 *rpcm = NULL; 1216 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0) 1217 return err; 1218 pcm->private_data = chip; 1219 pcm->private_free = snd_ymfpci_pcm_4ch_free; 1220 1221 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops); 1222 1223 /* global setup */ 1224 pcm->info_flags = 0; 1225 strcpy(pcm->name, "YMFPCI - Rear PCM"); 1226 chip->pcm_4ch = pcm; 1227 1228 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1229 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1230 1231 if (rpcm) 1232 *rpcm = pcm; 1233 return 0; 1234 } 1235 1236 static int snd_ymfpci_spdif_default_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 1237 { 1238 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1239 uinfo->count = 1; 1240 return 0; 1241 } 1242 1243 static int snd_ymfpci_spdif_default_get(snd_kcontrol_t * kcontrol, 1244 snd_ctl_elem_value_t * ucontrol) 1245 { 1246 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1247 1248 spin_lock_irq(&chip->reg_lock); 1249 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff; 1250 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff; 1251 spin_unlock_irq(&chip->reg_lock); 1252 return 0; 1253 } 1254 1255 static int snd_ymfpci_spdif_default_put(snd_kcontrol_t * kcontrol, 1256 snd_ctl_elem_value_t * ucontrol) 1257 { 1258 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1259 unsigned int val; 1260 int change; 1261 1262 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) | 1263 (ucontrol->value.iec958.status[1] << 8); 1264 spin_lock_irq(&chip->reg_lock); 1265 change = chip->spdif_bits != val; 1266 chip->spdif_bits = val; 1267 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL) 1268 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 1269 spin_unlock_irq(&chip->reg_lock); 1270 return change; 1271 } 1272 1273 static snd_kcontrol_new_t snd_ymfpci_spdif_default __devinitdata = 1274 { 1275 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1276 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 1277 .info = snd_ymfpci_spdif_default_info, 1278 .get = snd_ymfpci_spdif_default_get, 1279 .put = snd_ymfpci_spdif_default_put 1280 }; 1281 1282 static int snd_ymfpci_spdif_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 1283 { 1284 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1285 uinfo->count = 1; 1286 return 0; 1287 } 1288 1289 static int snd_ymfpci_spdif_mask_get(snd_kcontrol_t * kcontrol, 1290 snd_ctl_elem_value_t * ucontrol) 1291 { 1292 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1293 1294 spin_lock_irq(&chip->reg_lock); 1295 ucontrol->value.iec958.status[0] = 0x3e; 1296 ucontrol->value.iec958.status[1] = 0xff; 1297 spin_unlock_irq(&chip->reg_lock); 1298 return 0; 1299 } 1300 1301 static snd_kcontrol_new_t snd_ymfpci_spdif_mask __devinitdata = 1302 { 1303 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1304 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1305 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 1306 .info = snd_ymfpci_spdif_mask_info, 1307 .get = snd_ymfpci_spdif_mask_get, 1308 }; 1309 1310 static int snd_ymfpci_spdif_stream_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 1311 { 1312 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1313 uinfo->count = 1; 1314 return 0; 1315 } 1316 1317 static int snd_ymfpci_spdif_stream_get(snd_kcontrol_t * kcontrol, 1318 snd_ctl_elem_value_t * ucontrol) 1319 { 1320 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1321 1322 spin_lock_irq(&chip->reg_lock); 1323 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff; 1324 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff; 1325 spin_unlock_irq(&chip->reg_lock); 1326 return 0; 1327 } 1328 1329 static int snd_ymfpci_spdif_stream_put(snd_kcontrol_t * kcontrol, 1330 snd_ctl_elem_value_t * ucontrol) 1331 { 1332 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1333 unsigned int val; 1334 int change; 1335 1336 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) | 1337 (ucontrol->value.iec958.status[1] << 8); 1338 spin_lock_irq(&chip->reg_lock); 1339 change = chip->spdif_pcm_bits != val; 1340 chip->spdif_pcm_bits = val; 1341 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2)) 1342 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); 1343 spin_unlock_irq(&chip->reg_lock); 1344 return change; 1345 } 1346 1347 static snd_kcontrol_new_t snd_ymfpci_spdif_stream __devinitdata = 1348 { 1349 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1350 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1351 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 1352 .info = snd_ymfpci_spdif_stream_info, 1353 .get = snd_ymfpci_spdif_stream_get, 1354 .put = snd_ymfpci_spdif_stream_put 1355 }; 1356 1357 static int snd_ymfpci_drec_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info) 1358 { 1359 static char *texts[3] = {"AC'97", "IEC958", "ZV Port"}; 1360 1361 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1362 info->count = 1; 1363 info->value.enumerated.items = 3; 1364 if (info->value.enumerated.item > 2) 1365 info->value.enumerated.item = 2; 1366 strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]); 1367 return 0; 1368 } 1369 1370 static int snd_ymfpci_drec_source_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value) 1371 { 1372 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1373 u16 reg; 1374 1375 spin_lock_irq(&chip->reg_lock); 1376 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 1377 spin_unlock_irq(&chip->reg_lock); 1378 if (!(reg & 0x100)) 1379 value->value.enumerated.item[0] = 0; 1380 else 1381 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0); 1382 return 0; 1383 } 1384 1385 static int snd_ymfpci_drec_source_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value) 1386 { 1387 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1388 u16 reg, old_reg; 1389 1390 spin_lock_irq(&chip->reg_lock); 1391 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 1392 if (value->value.enumerated.item[0] == 0) 1393 reg = old_reg & ~0x100; 1394 else 1395 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9); 1396 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg); 1397 spin_unlock_irq(&chip->reg_lock); 1398 return reg != old_reg; 1399 } 1400 1401 static snd_kcontrol_new_t snd_ymfpci_drec_source __devinitdata = { 1402 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, 1403 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1404 .name = "Direct Recording Source", 1405 .info = snd_ymfpci_drec_source_info, 1406 .get = snd_ymfpci_drec_source_get, 1407 .put = snd_ymfpci_drec_source_put 1408 }; 1409 1410 /* 1411 * Mixer controls 1412 */ 1413 1414 #define YMFPCI_SINGLE(xname, xindex, reg) \ 1415 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1416 .info = snd_ymfpci_info_single, \ 1417 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \ 1418 .private_value = reg } 1419 1420 static int snd_ymfpci_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 1421 { 1422 switch (kcontrol->private_value) { 1423 case YDSXGR_SPDIFOUTCTRL: break; 1424 case YDSXGR_SPDIFINCTRL: break; 1425 default: return -EINVAL; 1426 } 1427 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1428 uinfo->count = 1; 1429 uinfo->value.integer.min = 0; 1430 uinfo->value.integer.max = 1; 1431 return 0; 1432 } 1433 1434 static int snd_ymfpci_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1435 { 1436 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1437 int reg = kcontrol->private_value; 1438 unsigned int shift = 0, mask = 1; 1439 1440 switch (kcontrol->private_value) { 1441 case YDSXGR_SPDIFOUTCTRL: break; 1442 case YDSXGR_SPDIFINCTRL: break; 1443 default: return -EINVAL; 1444 } 1445 ucontrol->value.integer.value[0] = (snd_ymfpci_readl(chip, reg) >> shift) & mask; 1446 return 0; 1447 } 1448 1449 static int snd_ymfpci_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1450 { 1451 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1452 int reg = kcontrol->private_value; 1453 unsigned int shift = 0, mask = 1; 1454 int change; 1455 unsigned int val, oval; 1456 1457 switch (kcontrol->private_value) { 1458 case YDSXGR_SPDIFOUTCTRL: break; 1459 case YDSXGR_SPDIFINCTRL: break; 1460 default: return -EINVAL; 1461 } 1462 val = (ucontrol->value.integer.value[0] & mask); 1463 val <<= shift; 1464 spin_lock_irq(&chip->reg_lock); 1465 oval = snd_ymfpci_readl(chip, reg); 1466 val = (oval & ~(mask << shift)) | val; 1467 change = val != oval; 1468 snd_ymfpci_writel(chip, reg, val); 1469 spin_unlock_irq(&chip->reg_lock); 1470 return change; 1471 } 1472 1473 #define YMFPCI_DOUBLE(xname, xindex, reg) \ 1474 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1475 .info = snd_ymfpci_info_double, \ 1476 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \ 1477 .private_value = reg } 1478 1479 static int snd_ymfpci_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 1480 { 1481 unsigned int reg = kcontrol->private_value; 1482 1483 if (reg < 0x80 || reg >= 0xc0) 1484 return -EINVAL; 1485 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1486 uinfo->count = 2; 1487 uinfo->value.integer.min = 0; 1488 uinfo->value.integer.max = 16383; 1489 return 0; 1490 } 1491 1492 static int snd_ymfpci_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1493 { 1494 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1495 unsigned int reg = kcontrol->private_value; 1496 unsigned int shift_left = 0, shift_right = 16, mask = 16383; 1497 unsigned int val; 1498 1499 if (reg < 0x80 || reg >= 0xc0) 1500 return -EINVAL; 1501 spin_lock_irq(&chip->reg_lock); 1502 val = snd_ymfpci_readl(chip, reg); 1503 spin_unlock_irq(&chip->reg_lock); 1504 ucontrol->value.integer.value[0] = (val >> shift_left) & mask; 1505 ucontrol->value.integer.value[1] = (val >> shift_right) & mask; 1506 return 0; 1507 } 1508 1509 static int snd_ymfpci_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1510 { 1511 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1512 unsigned int reg = kcontrol->private_value; 1513 unsigned int shift_left = 0, shift_right = 16, mask = 16383; 1514 int change; 1515 unsigned int val1, val2, oval; 1516 1517 if (reg < 0x80 || reg >= 0xc0) 1518 return -EINVAL; 1519 val1 = ucontrol->value.integer.value[0] & mask; 1520 val2 = ucontrol->value.integer.value[1] & mask; 1521 val1 <<= shift_left; 1522 val2 <<= shift_right; 1523 spin_lock_irq(&chip->reg_lock); 1524 oval = snd_ymfpci_readl(chip, reg); 1525 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2; 1526 change = val1 != oval; 1527 snd_ymfpci_writel(chip, reg, val1); 1528 spin_unlock_irq(&chip->reg_lock); 1529 return change; 1530 } 1531 1532 /* 1533 * 4ch duplication 1534 */ 1535 static int snd_ymfpci_info_dup4ch(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 1536 { 1537 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1538 uinfo->count = 1; 1539 uinfo->value.integer.min = 0; 1540 uinfo->value.integer.max = 1; 1541 return 0; 1542 } 1543 1544 static int snd_ymfpci_get_dup4ch(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1545 { 1546 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1547 ucontrol->value.integer.value[0] = chip->mode_dup4ch; 1548 return 0; 1549 } 1550 1551 static int snd_ymfpci_put_dup4ch(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1552 { 1553 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1554 int change; 1555 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch); 1556 if (change) 1557 chip->mode_dup4ch = !!ucontrol->value.integer.value[0]; 1558 return change; 1559 } 1560 1561 1562 static snd_kcontrol_new_t snd_ymfpci_controls[] __devinitdata = { 1563 YMFPCI_DOUBLE("Wave Playback Volume", 0, YDSXGR_NATIVEDACOUTVOL), 1564 YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL), 1565 YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL), 1566 YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL), 1567 YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL), 1568 YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL), 1569 YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL), 1570 YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL), 1571 YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL), 1572 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL), 1573 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL), 1574 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL), 1575 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL), 1576 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL), 1577 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL), 1578 { 1579 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1580 .name = "4ch Duplication", 1581 .info = snd_ymfpci_info_dup4ch, 1582 .get = snd_ymfpci_get_dup4ch, 1583 .put = snd_ymfpci_put_dup4ch, 1584 }, 1585 }; 1586 1587 1588 /* 1589 * GPIO 1590 */ 1591 1592 static int snd_ymfpci_get_gpio_out(ymfpci_t *chip, int pin) 1593 { 1594 u16 reg, mode; 1595 unsigned long flags; 1596 1597 spin_lock_irqsave(&chip->reg_lock, flags); 1598 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); 1599 reg &= ~(1 << (pin + 8)); 1600 reg |= (1 << pin); 1601 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); 1602 /* set the level mode for input line */ 1603 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG); 1604 mode &= ~(3 << (pin * 2)); 1605 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode); 1606 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); 1607 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS); 1608 spin_unlock_irqrestore(&chip->reg_lock, flags); 1609 return (mode >> pin) & 1; 1610 } 1611 1612 static int snd_ymfpci_set_gpio_out(ymfpci_t *chip, int pin, int enable) 1613 { 1614 u16 reg; 1615 unsigned long flags; 1616 1617 spin_lock_irqsave(&chip->reg_lock, flags); 1618 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); 1619 reg &= ~(1 << pin); 1620 reg &= ~(1 << (pin + 8)); 1621 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); 1622 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin); 1623 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); 1624 spin_unlock_irqrestore(&chip->reg_lock, flags); 1625 1626 return 0; 1627 } 1628 1629 static int snd_ymfpci_gpio_sw_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo) 1630 { 1631 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1632 uinfo->count = 1; 1633 uinfo->value.integer.min = 0; 1634 uinfo->value.integer.max = 1; 1635 return 0; 1636 } 1637 1638 static int snd_ymfpci_gpio_sw_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 1639 { 1640 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1641 int pin = (int)kcontrol->private_value; 1642 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); 1643 return 0; 1644 } 1645 1646 static int snd_ymfpci_gpio_sw_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 1647 { 1648 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1649 int pin = (int)kcontrol->private_value; 1650 1651 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) { 1652 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]); 1653 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); 1654 return 1; 1655 } 1656 return 0; 1657 } 1658 1659 static snd_kcontrol_new_t snd_ymfpci_rear_shared __devinitdata = { 1660 .name = "Shared Rear/Line-In Switch", 1661 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1662 .info = snd_ymfpci_gpio_sw_info, 1663 .get = snd_ymfpci_gpio_sw_get, 1664 .put = snd_ymfpci_gpio_sw_put, 1665 .private_value = 2, 1666 }; 1667 1668 1669 /* 1670 * Mixer routines 1671 */ 1672 1673 static void snd_ymfpci_mixer_free_ac97_bus(ac97_bus_t *bus) 1674 { 1675 ymfpci_t *chip = bus->private_data; 1676 chip->ac97_bus = NULL; 1677 } 1678 1679 static void snd_ymfpci_mixer_free_ac97(ac97_t *ac97) 1680 { 1681 ymfpci_t *chip = ac97->private_data; 1682 chip->ac97 = NULL; 1683 } 1684 1685 int __devinit snd_ymfpci_mixer(ymfpci_t *chip, int rear_switch) 1686 { 1687 ac97_template_t ac97; 1688 snd_kcontrol_t *kctl; 1689 unsigned int idx; 1690 int err; 1691 static ac97_bus_ops_t ops = { 1692 .write = snd_ymfpci_codec_write, 1693 .read = snd_ymfpci_codec_read, 1694 }; 1695 1696 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) 1697 return err; 1698 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus; 1699 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */ 1700 1701 memset(&ac97, 0, sizeof(ac97)); 1702 ac97.private_data = chip; 1703 ac97.private_free = snd_ymfpci_mixer_free_ac97; 1704 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) 1705 return err; 1706 1707 /* to be sure */ 1708 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 1709 AC97_EA_VRA|AC97_EA_VRM, 0); 1710 1711 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) { 1712 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0) 1713 return err; 1714 } 1715 1716 /* add S/PDIF control */ 1717 snd_assert(chip->pcm_spdif != NULL, return -EIO); 1718 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0) 1719 return err; 1720 kctl->id.device = chip->pcm_spdif->device; 1721 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0) 1722 return err; 1723 kctl->id.device = chip->pcm_spdif->device; 1724 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0) 1725 return err; 1726 kctl->id.device = chip->pcm_spdif->device; 1727 chip->spdif_pcm_ctl = kctl; 1728 1729 /* direct recording source */ 1730 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 && 1731 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0) 1732 return err; 1733 1734 /* 1735 * shared rear/line-in 1736 */ 1737 if (rear_switch) { 1738 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0) 1739 return err; 1740 } 1741 1742 return 0; 1743 } 1744 1745 1746 /* 1747 * timer 1748 */ 1749 1750 static int snd_ymfpci_timer_start(snd_timer_t *timer) 1751 { 1752 ymfpci_t *chip; 1753 unsigned long flags; 1754 unsigned int count; 1755 1756 chip = snd_timer_chip(timer); 1757 count = timer->sticks - 1; 1758 if (count == 0) /* minimum time is 20.8 us */ 1759 count = 1; 1760 spin_lock_irqsave(&chip->reg_lock, flags); 1761 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count); 1762 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03); 1763 spin_unlock_irqrestore(&chip->reg_lock, flags); 1764 return 0; 1765 } 1766 1767 static int snd_ymfpci_timer_stop(snd_timer_t *timer) 1768 { 1769 ymfpci_t *chip; 1770 unsigned long flags; 1771 1772 chip = snd_timer_chip(timer); 1773 spin_lock_irqsave(&chip->reg_lock, flags); 1774 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00); 1775 spin_unlock_irqrestore(&chip->reg_lock, flags); 1776 return 0; 1777 } 1778 1779 static int snd_ymfpci_timer_precise_resolution(snd_timer_t *timer, 1780 unsigned long *num, unsigned long *den) 1781 { 1782 *num = 1; 1783 *den = 96000; 1784 return 0; 1785 } 1786 1787 static struct _snd_timer_hardware snd_ymfpci_timer_hw = { 1788 .flags = SNDRV_TIMER_HW_AUTO, 1789 .resolution = 10417, /* 1/2fs = 10.41666...us */ 1790 .ticks = 65536, 1791 .start = snd_ymfpci_timer_start, 1792 .stop = snd_ymfpci_timer_stop, 1793 .precise_resolution = snd_ymfpci_timer_precise_resolution, 1794 }; 1795 1796 int __devinit snd_ymfpci_timer(ymfpci_t *chip, int device) 1797 { 1798 snd_timer_t *timer = NULL; 1799 snd_timer_id_t tid; 1800 int err; 1801 1802 tid.dev_class = SNDRV_TIMER_CLASS_CARD; 1803 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; 1804 tid.card = chip->card->number; 1805 tid.device = device; 1806 tid.subdevice = 0; 1807 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) { 1808 strcpy(timer->name, "YMFPCI timer"); 1809 timer->private_data = chip; 1810 timer->hw = snd_ymfpci_timer_hw; 1811 } 1812 chip->timer = timer; 1813 return err; 1814 } 1815 1816 1817 /* 1818 * proc interface 1819 */ 1820 1821 static void snd_ymfpci_proc_read(snd_info_entry_t *entry, 1822 snd_info_buffer_t * buffer) 1823 { 1824 ymfpci_t *chip = entry->private_data; 1825 int i; 1826 1827 snd_iprintf(buffer, "YMFPCI\n\n"); 1828 for (i = 0; i <= YDSXGR_WORKBASE; i += 4) 1829 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i)); 1830 } 1831 1832 static int __devinit snd_ymfpci_proc_init(snd_card_t * card, ymfpci_t *chip) 1833 { 1834 snd_info_entry_t *entry; 1835 1836 if (! snd_card_proc_new(card, "ymfpci", &entry)) 1837 snd_info_set_text_ops(entry, chip, 1024, snd_ymfpci_proc_read); 1838 return 0; 1839 } 1840 1841 /* 1842 * initialization routines 1843 */ 1844 1845 static void snd_ymfpci_aclink_reset(struct pci_dev * pci) 1846 { 1847 u8 cmd; 1848 1849 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd); 1850 #if 0 // force to reset 1851 if (cmd & 0x03) { 1852 #endif 1853 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc); 1854 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03); 1855 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc); 1856 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0); 1857 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0); 1858 #if 0 1859 } 1860 #endif 1861 } 1862 1863 static void snd_ymfpci_enable_dsp(ymfpci_t *chip) 1864 { 1865 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001); 1866 } 1867 1868 static void snd_ymfpci_disable_dsp(ymfpci_t *chip) 1869 { 1870 u32 val; 1871 int timeout = 1000; 1872 1873 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG); 1874 if (val) 1875 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000); 1876 while (timeout-- > 0) { 1877 val = snd_ymfpci_readl(chip, YDSXGR_STATUS); 1878 if ((val & 0x00000002) == 0) 1879 break; 1880 } 1881 } 1882 1883 #include "ymfpci_image.h" 1884 1885 static void snd_ymfpci_download_image(ymfpci_t *chip) 1886 { 1887 int i; 1888 u16 ctrl; 1889 unsigned long *inst; 1890 1891 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000); 1892 snd_ymfpci_disable_dsp(chip); 1893 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000); 1894 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000); 1895 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000); 1896 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000); 1897 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000); 1898 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000); 1899 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000); 1900 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 1901 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); 1902 1903 /* setup DSP instruction code */ 1904 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++) 1905 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), DspInst[i]); 1906 1907 /* setup control instruction code */ 1908 switch (chip->device_id) { 1909 case PCI_DEVICE_ID_YAMAHA_724F: 1910 case PCI_DEVICE_ID_YAMAHA_740C: 1911 case PCI_DEVICE_ID_YAMAHA_744: 1912 case PCI_DEVICE_ID_YAMAHA_754: 1913 inst = CntrlInst1E; 1914 break; 1915 default: 1916 inst = CntrlInst; 1917 break; 1918 } 1919 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++) 1920 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), inst[i]); 1921 1922 snd_ymfpci_enable_dsp(chip); 1923 } 1924 1925 static int __devinit snd_ymfpci_memalloc(ymfpci_t *chip) 1926 { 1927 long size, playback_ctrl_size; 1928 int voice, bank, reg; 1929 u8 *ptr; 1930 dma_addr_t ptr_addr; 1931 1932 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES; 1933 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2; 1934 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2; 1935 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2; 1936 chip->work_size = YDSXG_DEFAULT_WORK_SIZE; 1937 1938 size = ((playback_ctrl_size + 0x00ff) & ~0x00ff) + 1939 ((chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES + 0x00ff) & ~0x00ff) + 1940 ((chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES + 0x00ff) & ~0x00ff) + 1941 ((chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES + 0x00ff) & ~0x00ff) + 1942 chip->work_size; 1943 /* work_ptr must be aligned to 256 bytes, but it's already 1944 covered with the kernel page allocation mechanism */ 1945 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 1946 size, &chip->work_ptr) < 0) 1947 return -ENOMEM; 1948 ptr = chip->work_ptr.area; 1949 ptr_addr = chip->work_ptr.addr; 1950 memset(ptr, 0, size); /* for sure */ 1951 1952 chip->bank_base_playback = ptr; 1953 chip->bank_base_playback_addr = ptr_addr; 1954 chip->ctrl_playback = (u32 *)ptr; 1955 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES); 1956 ptr += (playback_ctrl_size + 0x00ff) & ~0x00ff; 1957 ptr_addr += (playback_ctrl_size + 0x00ff) & ~0x00ff; 1958 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) { 1959 chip->voices[voice].number = voice; 1960 chip->voices[voice].bank = (snd_ymfpci_playback_bank_t *)ptr; 1961 chip->voices[voice].bank_addr = ptr_addr; 1962 for (bank = 0; bank < 2; bank++) { 1963 chip->bank_playback[voice][bank] = (snd_ymfpci_playback_bank_t *)ptr; 1964 ptr += chip->bank_size_playback; 1965 ptr_addr += chip->bank_size_playback; 1966 } 1967 } 1968 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff); 1969 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff; 1970 chip->bank_base_capture = ptr; 1971 chip->bank_base_capture_addr = ptr_addr; 1972 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++) 1973 for (bank = 0; bank < 2; bank++) { 1974 chip->bank_capture[voice][bank] = (snd_ymfpci_capture_bank_t *)ptr; 1975 ptr += chip->bank_size_capture; 1976 ptr_addr += chip->bank_size_capture; 1977 } 1978 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff); 1979 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff; 1980 chip->bank_base_effect = ptr; 1981 chip->bank_base_effect_addr = ptr_addr; 1982 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++) 1983 for (bank = 0; bank < 2; bank++) { 1984 chip->bank_effect[voice][bank] = (snd_ymfpci_effect_bank_t *)ptr; 1985 ptr += chip->bank_size_effect; 1986 ptr_addr += chip->bank_size_effect; 1987 } 1988 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff); 1989 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff; 1990 chip->work_base = ptr; 1991 chip->work_base_addr = ptr_addr; 1992 1993 snd_assert(ptr + chip->work_size == chip->work_ptr.area + chip->work_ptr.bytes, ); 1994 1995 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr); 1996 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr); 1997 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr); 1998 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr); 1999 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2); 2000 2001 /* S/PDIF output initialization */ 2002 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff; 2003 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0); 2004 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 2005 2006 /* S/PDIF input initialization */ 2007 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0); 2008 2009 /* digital mixer setup */ 2010 for (reg = 0x80; reg < 0xc0; reg += 4) 2011 snd_ymfpci_writel(chip, reg, 0); 2012 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff); 2013 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff); 2014 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff); 2015 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff); 2016 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff); 2017 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff); 2018 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff); 2019 2020 return 0; 2021 } 2022 2023 static int snd_ymfpci_free(ymfpci_t *chip) 2024 { 2025 u16 ctrl; 2026 2027 snd_assert(chip != NULL, return -EINVAL); 2028 2029 if (chip->res_reg_area) { /* don't touch busy hardware */ 2030 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); 2031 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0); 2032 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0); 2033 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0); 2034 snd_ymfpci_disable_dsp(chip); 2035 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0); 2036 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0); 2037 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0); 2038 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0); 2039 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0); 2040 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 2041 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); 2042 } 2043 2044 snd_ymfpci_ac3_done(chip); 2045 2046 /* Set PCI device to D3 state */ 2047 #if 0 2048 /* FIXME: temporarily disabled, otherwise we cannot fire up 2049 * the chip again unless reboot. ACPI bug? 2050 */ 2051 pci_set_power_state(chip->pci, 3); 2052 #endif 2053 2054 #ifdef CONFIG_PM 2055 vfree(chip->saved_regs); 2056 #endif 2057 if (chip->mpu_res) { 2058 release_resource(chip->mpu_res); 2059 kfree_nocheck(chip->mpu_res); 2060 } 2061 if (chip->fm_res) { 2062 release_resource(chip->fm_res); 2063 kfree_nocheck(chip->fm_res); 2064 } 2065 snd_ymfpci_free_gameport(chip); 2066 if (chip->reg_area_virt) 2067 iounmap(chip->reg_area_virt); 2068 if (chip->work_ptr.area) 2069 snd_dma_free_pages(&chip->work_ptr); 2070 2071 if (chip->irq >= 0) 2072 free_irq(chip->irq, (void *)chip); 2073 if (chip->res_reg_area) { 2074 release_resource(chip->res_reg_area); 2075 kfree_nocheck(chip->res_reg_area); 2076 } 2077 2078 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl); 2079 2080 pci_disable_device(chip->pci); 2081 kfree(chip); 2082 return 0; 2083 } 2084 2085 static int snd_ymfpci_dev_free(snd_device_t *device) 2086 { 2087 ymfpci_t *chip = device->device_data; 2088 return snd_ymfpci_free(chip); 2089 } 2090 2091 #ifdef CONFIG_PM 2092 static int saved_regs_index[] = { 2093 /* spdif */ 2094 YDSXGR_SPDIFOUTCTRL, 2095 YDSXGR_SPDIFOUTSTATUS, 2096 YDSXGR_SPDIFINCTRL, 2097 /* volumes */ 2098 YDSXGR_PRIADCLOOPVOL, 2099 YDSXGR_NATIVEDACINVOL, 2100 YDSXGR_NATIVEDACOUTVOL, 2101 // YDSXGR_BUF441OUTVOL, 2102 YDSXGR_NATIVEADCINVOL, 2103 YDSXGR_SPDIFLOOPVOL, 2104 YDSXGR_SPDIFOUTVOL, 2105 YDSXGR_ZVOUTVOL, 2106 YDSXGR_LEGACYOUTVOL, 2107 /* address bases */ 2108 YDSXGR_PLAYCTRLBASE, 2109 YDSXGR_RECCTRLBASE, 2110 YDSXGR_EFFCTRLBASE, 2111 YDSXGR_WORKBASE, 2112 /* capture set up */ 2113 YDSXGR_MAPOFREC, 2114 YDSXGR_RECFORMAT, 2115 YDSXGR_RECSLOTSR, 2116 YDSXGR_ADCFORMAT, 2117 YDSXGR_ADCSLOTSR, 2118 }; 2119 #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index) 2120 2121 static int snd_ymfpci_suspend(snd_card_t *card, pm_message_t state) 2122 { 2123 ymfpci_t *chip = card->pm_private_data; 2124 unsigned int i; 2125 2126 snd_pcm_suspend_all(chip->pcm); 2127 snd_pcm_suspend_all(chip->pcm2); 2128 snd_pcm_suspend_all(chip->pcm_spdif); 2129 snd_pcm_suspend_all(chip->pcm_4ch); 2130 snd_ac97_suspend(chip->ac97); 2131 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++) 2132 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]); 2133 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE); 2134 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); 2135 snd_ymfpci_disable_dsp(chip); 2136 pci_disable_device(chip->pci); 2137 return 0; 2138 } 2139 2140 static int snd_ymfpci_resume(snd_card_t *card) 2141 { 2142 ymfpci_t *chip = card->pm_private_data; 2143 unsigned int i; 2144 2145 pci_enable_device(chip->pci); 2146 pci_set_master(chip->pci); 2147 snd_ymfpci_aclink_reset(chip->pci); 2148 snd_ymfpci_codec_ready(chip, 0); 2149 snd_ymfpci_download_image(chip); 2150 udelay(100); 2151 2152 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++) 2153 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]); 2154 2155 snd_ac97_resume(chip->ac97); 2156 2157 /* start hw again */ 2158 if (chip->start_count > 0) { 2159 spin_lock_irq(&chip->reg_lock); 2160 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode); 2161 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT); 2162 spin_unlock_irq(&chip->reg_lock); 2163 } 2164 return 0; 2165 } 2166 #endif /* CONFIG_PM */ 2167 2168 int __devinit snd_ymfpci_create(snd_card_t * card, 2169 struct pci_dev * pci, 2170 unsigned short old_legacy_ctrl, 2171 ymfpci_t ** rchip) 2172 { 2173 ymfpci_t *chip; 2174 int err; 2175 static snd_device_ops_t ops = { 2176 .dev_free = snd_ymfpci_dev_free, 2177 }; 2178 2179 *rchip = NULL; 2180 2181 /* enable PCI device */ 2182 if ((err = pci_enable_device(pci)) < 0) 2183 return err; 2184 2185 chip = kcalloc(1, sizeof(*chip), GFP_KERNEL); 2186 if (chip == NULL) { 2187 pci_disable_device(pci); 2188 return -ENOMEM; 2189 } 2190 chip->old_legacy_ctrl = old_legacy_ctrl; 2191 spin_lock_init(&chip->reg_lock); 2192 spin_lock_init(&chip->voice_lock); 2193 init_waitqueue_head(&chip->interrupt_sleep); 2194 atomic_set(&chip->interrupt_sleep_count, 0); 2195 chip->card = card; 2196 chip->pci = pci; 2197 chip->irq = -1; 2198 chip->device_id = pci->device; 2199 pci_read_config_byte(pci, PCI_REVISION_ID, (u8 *)&chip->rev); 2200 chip->reg_area_phys = pci_resource_start(pci, 0); 2201 chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000); 2202 pci_set_master(pci); 2203 2204 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) { 2205 snd_printk("unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1); 2206 snd_ymfpci_free(chip); 2207 return -EBUSY; 2208 } 2209 if (request_irq(pci->irq, snd_ymfpci_interrupt, SA_INTERRUPT|SA_SHIRQ, "YMFPCI", (void *) chip)) { 2210 snd_printk("unable to grab IRQ %d\n", pci->irq); 2211 snd_ymfpci_free(chip); 2212 return -EBUSY; 2213 } 2214 chip->irq = pci->irq; 2215 2216 snd_ymfpci_aclink_reset(pci); 2217 if (snd_ymfpci_codec_ready(chip, 0) < 0) { 2218 snd_ymfpci_free(chip); 2219 return -EIO; 2220 } 2221 2222 snd_ymfpci_download_image(chip); 2223 2224 udelay(100); /* seems we need a delay after downloading image.. */ 2225 2226 if (snd_ymfpci_memalloc(chip) < 0) { 2227 snd_ymfpci_free(chip); 2228 return -EIO; 2229 } 2230 2231 if ((err = snd_ymfpci_ac3_init(chip)) < 0) { 2232 snd_ymfpci_free(chip); 2233 return err; 2234 } 2235 2236 #ifdef CONFIG_PM 2237 chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32)); 2238 if (chip->saved_regs == NULL) { 2239 snd_ymfpci_free(chip); 2240 return -ENOMEM; 2241 } 2242 snd_card_set_pm_callback(card, snd_ymfpci_suspend, snd_ymfpci_resume, chip); 2243 #endif 2244 2245 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 2246 snd_ymfpci_free(chip); 2247 return err; 2248 } 2249 2250 snd_ymfpci_proc_init(card, chip); 2251 2252 snd_card_set_dev(card, &pci->dev); 2253 2254 *rchip = chip; 2255 return 0; 2256 } 2257