1 /* 2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz> 3 * Routines for control of YMF724/740/744/754 chips 4 * 5 * BUGS: 6 * -- 7 * 8 * TODO: 9 * -- 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or 14 * (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 24 * 25 */ 26 27 #include <sound/driver.h> 28 #include <linux/delay.h> 29 #include <linux/init.h> 30 #include <linux/interrupt.h> 31 #include <linux/pci.h> 32 #include <linux/sched.h> 33 #include <linux/slab.h> 34 #include <linux/vmalloc.h> 35 36 #include <sound/core.h> 37 #include <sound/control.h> 38 #include <sound/info.h> 39 #include <sound/ymfpci.h> 40 #include <sound/asoundef.h> 41 #include <sound/mpu401.h> 42 43 #include <asm/io.h> 44 45 /* 46 * constants 47 */ 48 49 /* 50 * common I/O routines 51 */ 52 53 static void snd_ymfpci_irq_wait(ymfpci_t *chip); 54 55 static inline u8 snd_ymfpci_readb(ymfpci_t *chip, u32 offset) 56 { 57 return readb(chip->reg_area_virt + offset); 58 } 59 60 static inline void snd_ymfpci_writeb(ymfpci_t *chip, u32 offset, u8 val) 61 { 62 writeb(val, chip->reg_area_virt + offset); 63 } 64 65 static inline u16 snd_ymfpci_readw(ymfpci_t *chip, u32 offset) 66 { 67 return readw(chip->reg_area_virt + offset); 68 } 69 70 static inline void snd_ymfpci_writew(ymfpci_t *chip, u32 offset, u16 val) 71 { 72 writew(val, chip->reg_area_virt + offset); 73 } 74 75 static inline u32 snd_ymfpci_readl(ymfpci_t *chip, u32 offset) 76 { 77 return readl(chip->reg_area_virt + offset); 78 } 79 80 static inline void snd_ymfpci_writel(ymfpci_t *chip, u32 offset, u32 val) 81 { 82 writel(val, chip->reg_area_virt + offset); 83 } 84 85 static int snd_ymfpci_codec_ready(ymfpci_t *chip, int secondary) 86 { 87 unsigned long end_time; 88 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR; 89 90 end_time = jiffies + msecs_to_jiffies(750); 91 do { 92 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0) 93 return 0; 94 set_current_state(TASK_UNINTERRUPTIBLE); 95 schedule_timeout_uninterruptible(1); 96 } while (time_before(jiffies, end_time)); 97 snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg)); 98 return -EBUSY; 99 } 100 101 static void snd_ymfpci_codec_write(ac97_t *ac97, u16 reg, u16 val) 102 { 103 ymfpci_t *chip = ac97->private_data; 104 u32 cmd; 105 106 snd_ymfpci_codec_ready(chip, 0); 107 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val; 108 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd); 109 } 110 111 static u16 snd_ymfpci_codec_read(ac97_t *ac97, u16 reg) 112 { 113 ymfpci_t *chip = ac97->private_data; 114 115 if (snd_ymfpci_codec_ready(chip, 0)) 116 return ~0; 117 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg); 118 if (snd_ymfpci_codec_ready(chip, 0)) 119 return ~0; 120 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) { 121 int i; 122 for (i = 0; i < 600; i++) 123 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); 124 } 125 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); 126 } 127 128 /* 129 * Misc routines 130 */ 131 132 static u32 snd_ymfpci_calc_delta(u32 rate) 133 { 134 switch (rate) { 135 case 8000: return 0x02aaab00; 136 case 11025: return 0x03accd00; 137 case 16000: return 0x05555500; 138 case 22050: return 0x07599a00; 139 case 32000: return 0x0aaaab00; 140 case 44100: return 0x0eb33300; 141 default: return ((rate << 16) / 375) << 5; 142 } 143 } 144 145 static u32 def_rate[8] = { 146 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000 147 }; 148 149 static u32 snd_ymfpci_calc_lpfK(u32 rate) 150 { 151 u32 i; 152 static u32 val[8] = { 153 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000, 154 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000 155 }; 156 157 if (rate == 44100) 158 return 0x40000000; /* FIXME: What's the right value? */ 159 for (i = 0; i < 8; i++) 160 if (rate <= def_rate[i]) 161 return val[i]; 162 return val[0]; 163 } 164 165 static u32 snd_ymfpci_calc_lpfQ(u32 rate) 166 { 167 u32 i; 168 static u32 val[8] = { 169 0x35280000, 0x34A70000, 0x32020000, 0x31770000, 170 0x31390000, 0x31C90000, 0x33D00000, 0x40000000 171 }; 172 173 if (rate == 44100) 174 return 0x370A0000; 175 for (i = 0; i < 8; i++) 176 if (rate <= def_rate[i]) 177 return val[i]; 178 return val[0]; 179 } 180 181 /* 182 * Hardware start management 183 */ 184 185 static void snd_ymfpci_hw_start(ymfpci_t *chip) 186 { 187 unsigned long flags; 188 189 spin_lock_irqsave(&chip->reg_lock, flags); 190 if (chip->start_count++ > 0) 191 goto __end; 192 snd_ymfpci_writel(chip, YDSXGR_MODE, 193 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3); 194 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; 195 __end: 196 spin_unlock_irqrestore(&chip->reg_lock, flags); 197 } 198 199 static void snd_ymfpci_hw_stop(ymfpci_t *chip) 200 { 201 unsigned long flags; 202 long timeout = 1000; 203 204 spin_lock_irqsave(&chip->reg_lock, flags); 205 if (--chip->start_count > 0) 206 goto __end; 207 snd_ymfpci_writel(chip, YDSXGR_MODE, 208 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3); 209 while (timeout-- > 0) { 210 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0) 211 break; 212 } 213 if (atomic_read(&chip->interrupt_sleep_count)) { 214 atomic_set(&chip->interrupt_sleep_count, 0); 215 wake_up(&chip->interrupt_sleep); 216 } 217 __end: 218 spin_unlock_irqrestore(&chip->reg_lock, flags); 219 } 220 221 /* 222 * Playback voice management 223 */ 224 225 static int voice_alloc(ymfpci_t *chip, ymfpci_voice_type_t type, int pair, ymfpci_voice_t **rvoice) 226 { 227 ymfpci_voice_t *voice, *voice2; 228 int idx; 229 230 *rvoice = NULL; 231 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) { 232 voice = &chip->voices[idx]; 233 voice2 = pair ? &chip->voices[idx+1] : NULL; 234 if (voice->use || (voice2 && voice2->use)) 235 continue; 236 voice->use = 1; 237 if (voice2) 238 voice2->use = 1; 239 switch (type) { 240 case YMFPCI_PCM: 241 voice->pcm = 1; 242 if (voice2) 243 voice2->pcm = 1; 244 break; 245 case YMFPCI_SYNTH: 246 voice->synth = 1; 247 break; 248 case YMFPCI_MIDI: 249 voice->midi = 1; 250 break; 251 } 252 snd_ymfpci_hw_start(chip); 253 if (voice2) 254 snd_ymfpci_hw_start(chip); 255 *rvoice = voice; 256 return 0; 257 } 258 return -ENOMEM; 259 } 260 261 static int snd_ymfpci_voice_alloc(ymfpci_t *chip, ymfpci_voice_type_t type, int pair, ymfpci_voice_t **rvoice) 262 { 263 unsigned long flags; 264 int result; 265 266 snd_assert(rvoice != NULL, return -EINVAL); 267 snd_assert(!pair || type == YMFPCI_PCM, return -EINVAL); 268 269 spin_lock_irqsave(&chip->voice_lock, flags); 270 for (;;) { 271 result = voice_alloc(chip, type, pair, rvoice); 272 if (result == 0 || type != YMFPCI_PCM) 273 break; 274 /* TODO: synth/midi voice deallocation */ 275 break; 276 } 277 spin_unlock_irqrestore(&chip->voice_lock, flags); 278 return result; 279 } 280 281 static int snd_ymfpci_voice_free(ymfpci_t *chip, ymfpci_voice_t *pvoice) 282 { 283 unsigned long flags; 284 285 snd_assert(pvoice != NULL, return -EINVAL); 286 snd_ymfpci_hw_stop(chip); 287 spin_lock_irqsave(&chip->voice_lock, flags); 288 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0; 289 pvoice->ypcm = NULL; 290 pvoice->interrupt = NULL; 291 spin_unlock_irqrestore(&chip->voice_lock, flags); 292 return 0; 293 } 294 295 /* 296 * PCM part 297 */ 298 299 static void snd_ymfpci_pcm_interrupt(ymfpci_t *chip, ymfpci_voice_t *voice) 300 { 301 ymfpci_pcm_t *ypcm; 302 u32 pos, delta; 303 304 if ((ypcm = voice->ypcm) == NULL) 305 return; 306 if (ypcm->substream == NULL) 307 return; 308 spin_lock(&chip->reg_lock); 309 if (ypcm->running) { 310 pos = le32_to_cpu(voice->bank[chip->active_bank].start); 311 if (pos < ypcm->last_pos) 312 delta = pos + (ypcm->buffer_size - ypcm->last_pos); 313 else 314 delta = pos - ypcm->last_pos; 315 ypcm->period_pos += delta; 316 ypcm->last_pos = pos; 317 if (ypcm->period_pos >= ypcm->period_size) { 318 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start); 319 ypcm->period_pos %= ypcm->period_size; 320 spin_unlock(&chip->reg_lock); 321 snd_pcm_period_elapsed(ypcm->substream); 322 spin_lock(&chip->reg_lock); 323 } 324 325 if (unlikely(ypcm->update_pcm_vol)) { 326 unsigned int subs = ypcm->substream->number; 327 unsigned int next_bank = 1 - chip->active_bank; 328 snd_ymfpci_playback_bank_t *bank; 329 u32 volume; 330 331 bank = &voice->bank[next_bank]; 332 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15); 333 bank->left_gain_end = volume; 334 if (ypcm->output_rear) 335 bank->eff2_gain_end = volume; 336 if (ypcm->voices[1]) 337 bank = &ypcm->voices[1]->bank[next_bank]; 338 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15); 339 bank->right_gain_end = volume; 340 if (ypcm->output_rear) 341 bank->eff3_gain_end = volume; 342 ypcm->update_pcm_vol--; 343 } 344 } 345 spin_unlock(&chip->reg_lock); 346 } 347 348 static void snd_ymfpci_pcm_capture_interrupt(snd_pcm_substream_t *substream) 349 { 350 snd_pcm_runtime_t *runtime = substream->runtime; 351 ymfpci_pcm_t *ypcm = runtime->private_data; 352 ymfpci_t *chip = ypcm->chip; 353 u32 pos, delta; 354 355 spin_lock(&chip->reg_lock); 356 if (ypcm->running) { 357 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; 358 if (pos < ypcm->last_pos) 359 delta = pos + (ypcm->buffer_size - ypcm->last_pos); 360 else 361 delta = pos - ypcm->last_pos; 362 ypcm->period_pos += delta; 363 ypcm->last_pos = pos; 364 if (ypcm->period_pos >= ypcm->period_size) { 365 ypcm->period_pos %= ypcm->period_size; 366 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start); 367 spin_unlock(&chip->reg_lock); 368 snd_pcm_period_elapsed(substream); 369 spin_lock(&chip->reg_lock); 370 } 371 } 372 spin_unlock(&chip->reg_lock); 373 } 374 375 static int snd_ymfpci_playback_trigger(snd_pcm_substream_t * substream, 376 int cmd) 377 { 378 ymfpci_t *chip = snd_pcm_substream_chip(substream); 379 ymfpci_pcm_t *ypcm = substream->runtime->private_data; 380 int result = 0; 381 382 spin_lock(&chip->reg_lock); 383 if (ypcm->voices[0] == NULL) { 384 result = -EINVAL; 385 goto __unlock; 386 } 387 switch (cmd) { 388 case SNDRV_PCM_TRIGGER_START: 389 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 390 case SNDRV_PCM_TRIGGER_RESUME: 391 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr); 392 if (ypcm->voices[1] != NULL) 393 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr); 394 ypcm->running = 1; 395 break; 396 case SNDRV_PCM_TRIGGER_STOP: 397 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 398 case SNDRV_PCM_TRIGGER_SUSPEND: 399 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0; 400 if (ypcm->voices[1] != NULL) 401 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0; 402 ypcm->running = 0; 403 break; 404 default: 405 result = -EINVAL; 406 break; 407 } 408 __unlock: 409 spin_unlock(&chip->reg_lock); 410 return result; 411 } 412 static int snd_ymfpci_capture_trigger(snd_pcm_substream_t * substream, 413 int cmd) 414 { 415 ymfpci_t *chip = snd_pcm_substream_chip(substream); 416 ymfpci_pcm_t *ypcm = substream->runtime->private_data; 417 int result = 0; 418 u32 tmp; 419 420 spin_lock(&chip->reg_lock); 421 switch (cmd) { 422 case SNDRV_PCM_TRIGGER_START: 423 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 424 case SNDRV_PCM_TRIGGER_RESUME: 425 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number); 426 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); 427 ypcm->running = 1; 428 break; 429 case SNDRV_PCM_TRIGGER_STOP: 430 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 431 case SNDRV_PCM_TRIGGER_SUSPEND: 432 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number); 433 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); 434 ypcm->running = 0; 435 break; 436 default: 437 result = -EINVAL; 438 break; 439 } 440 spin_unlock(&chip->reg_lock); 441 return result; 442 } 443 444 static int snd_ymfpci_pcm_voice_alloc(ymfpci_pcm_t *ypcm, int voices) 445 { 446 int err; 447 448 if (ypcm->voices[1] != NULL && voices < 2) { 449 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]); 450 ypcm->voices[1] = NULL; 451 } 452 if (voices == 1 && ypcm->voices[0] != NULL) 453 return 0; /* already allocated */ 454 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL) 455 return 0; /* already allocated */ 456 if (voices > 1) { 457 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) { 458 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]); 459 ypcm->voices[0] = NULL; 460 } 461 } 462 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]); 463 if (err < 0) 464 return err; 465 ypcm->voices[0]->ypcm = ypcm; 466 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt; 467 if (voices > 1) { 468 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1]; 469 ypcm->voices[1]->ypcm = ypcm; 470 } 471 return 0; 472 } 473 474 static void snd_ymfpci_pcm_init_voice(ymfpci_pcm_t *ypcm, unsigned int voiceidx, 475 snd_pcm_runtime_t *runtime, 476 int has_pcm_volume) 477 { 478 ymfpci_voice_t *voice = ypcm->voices[voiceidx]; 479 u32 format; 480 u32 delta = snd_ymfpci_calc_delta(runtime->rate); 481 u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate); 482 u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate); 483 snd_ymfpci_playback_bank_t *bank; 484 unsigned int nbank; 485 u32 vol_left, vol_right; 486 u8 use_left, use_right; 487 488 snd_assert(voice != NULL, return); 489 if (runtime->channels == 1) { 490 use_left = 1; 491 use_right = 1; 492 } else { 493 use_left = (voiceidx & 1) == 0; 494 use_right = !use_left; 495 } 496 if (has_pcm_volume) { 497 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer 498 [ypcm->substream->number].left << 15); 499 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer 500 [ypcm->substream->number].right << 15); 501 } else { 502 vol_left = cpu_to_le32(0x40000000); 503 vol_right = cpu_to_le32(0x40000000); 504 } 505 format = runtime->channels == 2 ? 0x00010000 : 0; 506 if (snd_pcm_format_width(runtime->format) == 8) 507 format |= 0x80000000; 508 if (runtime->channels == 2 && (voiceidx & 1) != 0) 509 format |= 1; 510 for (nbank = 0; nbank < 2; nbank++) { 511 bank = &voice->bank[nbank]; 512 memset(bank, 0, sizeof(*bank)); 513 bank->format = cpu_to_le32(format); 514 bank->base = cpu_to_le32(runtime->dma_addr); 515 bank->loop_end = cpu_to_le32(ypcm->buffer_size); 516 bank->lpfQ = cpu_to_le32(lpfQ); 517 bank->delta = 518 bank->delta_end = cpu_to_le32(delta); 519 bank->lpfK = 520 bank->lpfK_end = cpu_to_le32(lpfK); 521 bank->eg_gain = 522 bank->eg_gain_end = cpu_to_le32(0x40000000); 523 524 if (ypcm->output_front) { 525 if (use_left) { 526 bank->left_gain = 527 bank->left_gain_end = vol_left; 528 } 529 if (use_right) { 530 bank->right_gain = 531 bank->right_gain_end = vol_right; 532 } 533 } 534 if (ypcm->output_rear) { 535 if (use_left) { 536 bank->eff2_gain = 537 bank->eff2_gain_end = vol_left; 538 } 539 if (use_right) { 540 bank->eff3_gain = 541 bank->eff3_gain_end = vol_right; 542 } 543 } 544 } 545 } 546 547 static int __devinit snd_ymfpci_ac3_init(ymfpci_t *chip) 548 { 549 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 550 4096, &chip->ac3_tmp_base) < 0) 551 return -ENOMEM; 552 553 chip->bank_effect[3][0]->base = 554 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr); 555 chip->bank_effect[3][0]->loop_end = 556 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024); 557 chip->bank_effect[4][0]->base = 558 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048); 559 chip->bank_effect[4][0]->loop_end = 560 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024); 561 562 spin_lock_irq(&chip->reg_lock); 563 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 564 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3); 565 spin_unlock_irq(&chip->reg_lock); 566 return 0; 567 } 568 569 static int snd_ymfpci_ac3_done(ymfpci_t *chip) 570 { 571 spin_lock_irq(&chip->reg_lock); 572 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 573 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3)); 574 spin_unlock_irq(&chip->reg_lock); 575 // snd_ymfpci_irq_wait(chip); 576 if (chip->ac3_tmp_base.area) { 577 snd_dma_free_pages(&chip->ac3_tmp_base); 578 chip->ac3_tmp_base.area = NULL; 579 } 580 return 0; 581 } 582 583 static int snd_ymfpci_playback_hw_params(snd_pcm_substream_t * substream, 584 snd_pcm_hw_params_t * hw_params) 585 { 586 snd_pcm_runtime_t *runtime = substream->runtime; 587 ymfpci_pcm_t *ypcm = runtime->private_data; 588 int err; 589 590 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0) 591 return err; 592 if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0) 593 return err; 594 return 0; 595 } 596 597 static int snd_ymfpci_playback_hw_free(snd_pcm_substream_t * substream) 598 { 599 ymfpci_t *chip = snd_pcm_substream_chip(substream); 600 snd_pcm_runtime_t *runtime = substream->runtime; 601 ymfpci_pcm_t *ypcm; 602 603 if (runtime->private_data == NULL) 604 return 0; 605 ypcm = runtime->private_data; 606 607 /* wait, until the PCI operations are not finished */ 608 snd_ymfpci_irq_wait(chip); 609 snd_pcm_lib_free_pages(substream); 610 if (ypcm->voices[1]) { 611 snd_ymfpci_voice_free(chip, ypcm->voices[1]); 612 ypcm->voices[1] = NULL; 613 } 614 if (ypcm->voices[0]) { 615 snd_ymfpci_voice_free(chip, ypcm->voices[0]); 616 ypcm->voices[0] = NULL; 617 } 618 return 0; 619 } 620 621 static int snd_ymfpci_playback_prepare(snd_pcm_substream_t * substream) 622 { 623 ymfpci_t *chip = snd_pcm_substream_chip(substream); 624 snd_pcm_runtime_t *runtime = substream->runtime; 625 ymfpci_pcm_t *ypcm = runtime->private_data; 626 unsigned int nvoice; 627 628 ypcm->period_size = runtime->period_size; 629 ypcm->buffer_size = runtime->buffer_size; 630 ypcm->period_pos = 0; 631 ypcm->last_pos = 0; 632 for (nvoice = 0; nvoice < runtime->channels; nvoice++) 633 snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime, 634 substream->pcm == chip->pcm); 635 return 0; 636 } 637 638 static int snd_ymfpci_capture_hw_params(snd_pcm_substream_t * substream, 639 snd_pcm_hw_params_t * hw_params) 640 { 641 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 642 } 643 644 static int snd_ymfpci_capture_hw_free(snd_pcm_substream_t * substream) 645 { 646 ymfpci_t *chip = snd_pcm_substream_chip(substream); 647 648 /* wait, until the PCI operations are not finished */ 649 snd_ymfpci_irq_wait(chip); 650 return snd_pcm_lib_free_pages(substream); 651 } 652 653 static int snd_ymfpci_capture_prepare(snd_pcm_substream_t * substream) 654 { 655 ymfpci_t *chip = snd_pcm_substream_chip(substream); 656 snd_pcm_runtime_t *runtime = substream->runtime; 657 ymfpci_pcm_t *ypcm = runtime->private_data; 658 snd_ymfpci_capture_bank_t * bank; 659 int nbank; 660 u32 rate, format; 661 662 ypcm->period_size = runtime->period_size; 663 ypcm->buffer_size = runtime->buffer_size; 664 ypcm->period_pos = 0; 665 ypcm->last_pos = 0; 666 ypcm->shift = 0; 667 rate = ((48000 * 4096) / runtime->rate) - 1; 668 format = 0; 669 if (runtime->channels == 2) { 670 format |= 2; 671 ypcm->shift++; 672 } 673 if (snd_pcm_format_width(runtime->format) == 8) 674 format |= 1; 675 else 676 ypcm->shift++; 677 switch (ypcm->capture_bank_number) { 678 case 0: 679 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format); 680 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate); 681 break; 682 case 1: 683 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format); 684 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate); 685 break; 686 } 687 for (nbank = 0; nbank < 2; nbank++) { 688 bank = chip->bank_capture[ypcm->capture_bank_number][nbank]; 689 bank->base = cpu_to_le32(runtime->dma_addr); 690 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift); 691 bank->start = 0; 692 bank->num_of_loops = 0; 693 } 694 return 0; 695 } 696 697 static snd_pcm_uframes_t snd_ymfpci_playback_pointer(snd_pcm_substream_t * substream) 698 { 699 ymfpci_t *chip = snd_pcm_substream_chip(substream); 700 snd_pcm_runtime_t *runtime = substream->runtime; 701 ymfpci_pcm_t *ypcm = runtime->private_data; 702 ymfpci_voice_t *voice = ypcm->voices[0]; 703 704 if (!(ypcm->running && voice)) 705 return 0; 706 return le32_to_cpu(voice->bank[chip->active_bank].start); 707 } 708 709 static snd_pcm_uframes_t snd_ymfpci_capture_pointer(snd_pcm_substream_t * substream) 710 { 711 ymfpci_t *chip = snd_pcm_substream_chip(substream); 712 snd_pcm_runtime_t *runtime = substream->runtime; 713 ymfpci_pcm_t *ypcm = runtime->private_data; 714 715 if (!ypcm->running) 716 return 0; 717 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; 718 } 719 720 static void snd_ymfpci_irq_wait(ymfpci_t *chip) 721 { 722 wait_queue_t wait; 723 int loops = 4; 724 725 while (loops-- > 0) { 726 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0) 727 continue; 728 init_waitqueue_entry(&wait, current); 729 add_wait_queue(&chip->interrupt_sleep, &wait); 730 atomic_inc(&chip->interrupt_sleep_count); 731 schedule_timeout_uninterruptible(msecs_to_jiffies(50)); 732 remove_wait_queue(&chip->interrupt_sleep, &wait); 733 } 734 } 735 736 static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id, struct pt_regs *regs) 737 { 738 ymfpci_t *chip = dev_id; 739 u32 status, nvoice, mode; 740 ymfpci_voice_t *voice; 741 742 status = snd_ymfpci_readl(chip, YDSXGR_STATUS); 743 if (status & 0x80000000) { 744 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; 745 spin_lock(&chip->voice_lock); 746 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) { 747 voice = &chip->voices[nvoice]; 748 if (voice->interrupt) 749 voice->interrupt(chip, voice); 750 } 751 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) { 752 if (chip->capture_substream[nvoice]) 753 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]); 754 } 755 #if 0 756 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) { 757 if (chip->effect_substream[nvoice]) 758 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]); 759 } 760 #endif 761 spin_unlock(&chip->voice_lock); 762 spin_lock(&chip->reg_lock); 763 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000); 764 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2; 765 snd_ymfpci_writel(chip, YDSXGR_MODE, mode); 766 spin_unlock(&chip->reg_lock); 767 768 if (atomic_read(&chip->interrupt_sleep_count)) { 769 atomic_set(&chip->interrupt_sleep_count, 0); 770 wake_up(&chip->interrupt_sleep); 771 } 772 } 773 774 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG); 775 if (status & 1) { 776 if (chip->timer) 777 snd_timer_interrupt(chip->timer, chip->timer->sticks); 778 } 779 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status); 780 781 if (chip->rawmidi) 782 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data, regs); 783 return IRQ_HANDLED; 784 } 785 786 static snd_pcm_hardware_t snd_ymfpci_playback = 787 { 788 .info = (SNDRV_PCM_INFO_MMAP | 789 SNDRV_PCM_INFO_MMAP_VALID | 790 SNDRV_PCM_INFO_INTERLEAVED | 791 SNDRV_PCM_INFO_BLOCK_TRANSFER | 792 SNDRV_PCM_INFO_PAUSE | 793 SNDRV_PCM_INFO_RESUME), 794 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 795 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 796 .rate_min = 8000, 797 .rate_max = 48000, 798 .channels_min = 1, 799 .channels_max = 2, 800 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */ 801 .period_bytes_min = 64, 802 .period_bytes_max = 256 * 1024, /* FIXME: enough? */ 803 .periods_min = 3, 804 .periods_max = 1024, 805 .fifo_size = 0, 806 }; 807 808 static snd_pcm_hardware_t snd_ymfpci_capture = 809 { 810 .info = (SNDRV_PCM_INFO_MMAP | 811 SNDRV_PCM_INFO_MMAP_VALID | 812 SNDRV_PCM_INFO_INTERLEAVED | 813 SNDRV_PCM_INFO_BLOCK_TRANSFER | 814 SNDRV_PCM_INFO_PAUSE | 815 SNDRV_PCM_INFO_RESUME), 816 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 817 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 818 .rate_min = 8000, 819 .rate_max = 48000, 820 .channels_min = 1, 821 .channels_max = 2, 822 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */ 823 .period_bytes_min = 64, 824 .period_bytes_max = 256 * 1024, /* FIXME: enough? */ 825 .periods_min = 3, 826 .periods_max = 1024, 827 .fifo_size = 0, 828 }; 829 830 static void snd_ymfpci_pcm_free_substream(snd_pcm_runtime_t *runtime) 831 { 832 kfree(runtime->private_data); 833 } 834 835 static int snd_ymfpci_playback_open_1(snd_pcm_substream_t * substream) 836 { 837 ymfpci_t *chip = snd_pcm_substream_chip(substream); 838 snd_pcm_runtime_t *runtime = substream->runtime; 839 ymfpci_pcm_t *ypcm; 840 841 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL); 842 if (ypcm == NULL) 843 return -ENOMEM; 844 ypcm->chip = chip; 845 ypcm->type = PLAYBACK_VOICE; 846 ypcm->substream = substream; 847 runtime->hw = snd_ymfpci_playback; 848 runtime->private_data = ypcm; 849 runtime->private_free = snd_ymfpci_pcm_free_substream; 850 /* FIXME? True value is 256/48 = 5.33333 ms */ 851 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX); 852 return 0; 853 } 854 855 /* call with spinlock held */ 856 static void ymfpci_open_extension(ymfpci_t *chip) 857 { 858 if (! chip->rear_opened) { 859 if (! chip->spdif_opened) /* set AC3 */ 860 snd_ymfpci_writel(chip, YDSXGR_MODE, 861 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30)); 862 /* enable second codec (4CHEN) */ 863 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, 864 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010); 865 } 866 } 867 868 /* call with spinlock held */ 869 static void ymfpci_close_extension(ymfpci_t *chip) 870 { 871 if (! chip->rear_opened) { 872 if (! chip->spdif_opened) 873 snd_ymfpci_writel(chip, YDSXGR_MODE, 874 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30)); 875 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, 876 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010); 877 } 878 } 879 880 static int snd_ymfpci_playback_open(snd_pcm_substream_t * substream) 881 { 882 ymfpci_t *chip = snd_pcm_substream_chip(substream); 883 snd_pcm_runtime_t *runtime = substream->runtime; 884 ymfpci_pcm_t *ypcm; 885 snd_kcontrol_t *kctl; 886 int err; 887 888 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 889 return err; 890 ypcm = runtime->private_data; 891 ypcm->output_front = 1; 892 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0; 893 spin_lock_irq(&chip->reg_lock); 894 if (ypcm->output_rear) { 895 ymfpci_open_extension(chip); 896 chip->rear_opened++; 897 } 898 spin_unlock_irq(&chip->reg_lock); 899 900 kctl = chip->pcm_mixer[substream->number].ctl; 901 kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 902 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id); 903 return 0; 904 } 905 906 static int snd_ymfpci_playback_spdif_open(snd_pcm_substream_t * substream) 907 { 908 ymfpci_t *chip = snd_pcm_substream_chip(substream); 909 snd_pcm_runtime_t *runtime = substream->runtime; 910 ymfpci_pcm_t *ypcm; 911 int err; 912 913 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 914 return err; 915 ypcm = runtime->private_data; 916 ypcm->output_front = 0; 917 ypcm->output_rear = 1; 918 spin_lock_irq(&chip->reg_lock); 919 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 920 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2); 921 ymfpci_open_extension(chip); 922 chip->spdif_pcm_bits = chip->spdif_bits; 923 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); 924 chip->spdif_opened++; 925 spin_unlock_irq(&chip->reg_lock); 926 927 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 928 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | 929 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); 930 return 0; 931 } 932 933 static int snd_ymfpci_playback_4ch_open(snd_pcm_substream_t * substream) 934 { 935 ymfpci_t *chip = snd_pcm_substream_chip(substream); 936 snd_pcm_runtime_t *runtime = substream->runtime; 937 ymfpci_pcm_t *ypcm; 938 int err; 939 940 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 941 return err; 942 ypcm = runtime->private_data; 943 ypcm->output_front = 0; 944 ypcm->output_rear = 1; 945 spin_lock_irq(&chip->reg_lock); 946 ymfpci_open_extension(chip); 947 chip->rear_opened++; 948 spin_unlock_irq(&chip->reg_lock); 949 return 0; 950 } 951 952 static int snd_ymfpci_capture_open(snd_pcm_substream_t * substream, 953 u32 capture_bank_number) 954 { 955 ymfpci_t *chip = snd_pcm_substream_chip(substream); 956 snd_pcm_runtime_t *runtime = substream->runtime; 957 ymfpci_pcm_t *ypcm; 958 959 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL); 960 if (ypcm == NULL) 961 return -ENOMEM; 962 ypcm->chip = chip; 963 ypcm->type = capture_bank_number + CAPTURE_REC; 964 ypcm->substream = substream; 965 ypcm->capture_bank_number = capture_bank_number; 966 chip->capture_substream[capture_bank_number] = substream; 967 runtime->hw = snd_ymfpci_capture; 968 /* FIXME? True value is 256/48 = 5.33333 ms */ 969 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX); 970 runtime->private_data = ypcm; 971 runtime->private_free = snd_ymfpci_pcm_free_substream; 972 snd_ymfpci_hw_start(chip); 973 return 0; 974 } 975 976 static int snd_ymfpci_capture_rec_open(snd_pcm_substream_t * substream) 977 { 978 return snd_ymfpci_capture_open(substream, 0); 979 } 980 981 static int snd_ymfpci_capture_ac97_open(snd_pcm_substream_t * substream) 982 { 983 return snd_ymfpci_capture_open(substream, 1); 984 } 985 986 static int snd_ymfpci_playback_close_1(snd_pcm_substream_t * substream) 987 { 988 return 0; 989 } 990 991 static int snd_ymfpci_playback_close(snd_pcm_substream_t * substream) 992 { 993 ymfpci_t *chip = snd_pcm_substream_chip(substream); 994 ymfpci_pcm_t *ypcm = substream->runtime->private_data; 995 snd_kcontrol_t *kctl; 996 997 spin_lock_irq(&chip->reg_lock); 998 if (ypcm->output_rear && chip->rear_opened > 0) { 999 chip->rear_opened--; 1000 ymfpci_close_extension(chip); 1001 } 1002 spin_unlock_irq(&chip->reg_lock); 1003 kctl = chip->pcm_mixer[substream->number].ctl; 1004 kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 1005 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id); 1006 return snd_ymfpci_playback_close_1(substream); 1007 } 1008 1009 static int snd_ymfpci_playback_spdif_close(snd_pcm_substream_t * substream) 1010 { 1011 ymfpci_t *chip = snd_pcm_substream_chip(substream); 1012 1013 spin_lock_irq(&chip->reg_lock); 1014 chip->spdif_opened = 0; 1015 ymfpci_close_extension(chip); 1016 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 1017 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2); 1018 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 1019 spin_unlock_irq(&chip->reg_lock); 1020 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 1021 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | 1022 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); 1023 return snd_ymfpci_playback_close_1(substream); 1024 } 1025 1026 static int snd_ymfpci_playback_4ch_close(snd_pcm_substream_t * substream) 1027 { 1028 ymfpci_t *chip = snd_pcm_substream_chip(substream); 1029 1030 spin_lock_irq(&chip->reg_lock); 1031 if (chip->rear_opened > 0) { 1032 chip->rear_opened--; 1033 ymfpci_close_extension(chip); 1034 } 1035 spin_unlock_irq(&chip->reg_lock); 1036 return snd_ymfpci_playback_close_1(substream); 1037 } 1038 1039 static int snd_ymfpci_capture_close(snd_pcm_substream_t * substream) 1040 { 1041 ymfpci_t *chip = snd_pcm_substream_chip(substream); 1042 snd_pcm_runtime_t *runtime = substream->runtime; 1043 ymfpci_pcm_t *ypcm = runtime->private_data; 1044 1045 if (ypcm != NULL) { 1046 chip->capture_substream[ypcm->capture_bank_number] = NULL; 1047 snd_ymfpci_hw_stop(chip); 1048 } 1049 return 0; 1050 } 1051 1052 static snd_pcm_ops_t snd_ymfpci_playback_ops = { 1053 .open = snd_ymfpci_playback_open, 1054 .close = snd_ymfpci_playback_close, 1055 .ioctl = snd_pcm_lib_ioctl, 1056 .hw_params = snd_ymfpci_playback_hw_params, 1057 .hw_free = snd_ymfpci_playback_hw_free, 1058 .prepare = snd_ymfpci_playback_prepare, 1059 .trigger = snd_ymfpci_playback_trigger, 1060 .pointer = snd_ymfpci_playback_pointer, 1061 }; 1062 1063 static snd_pcm_ops_t snd_ymfpci_capture_rec_ops = { 1064 .open = snd_ymfpci_capture_rec_open, 1065 .close = snd_ymfpci_capture_close, 1066 .ioctl = snd_pcm_lib_ioctl, 1067 .hw_params = snd_ymfpci_capture_hw_params, 1068 .hw_free = snd_ymfpci_capture_hw_free, 1069 .prepare = snd_ymfpci_capture_prepare, 1070 .trigger = snd_ymfpci_capture_trigger, 1071 .pointer = snd_ymfpci_capture_pointer, 1072 }; 1073 1074 static void snd_ymfpci_pcm_free(snd_pcm_t *pcm) 1075 { 1076 ymfpci_t *chip = pcm->private_data; 1077 chip->pcm = NULL; 1078 snd_pcm_lib_preallocate_free_for_all(pcm); 1079 } 1080 1081 int __devinit snd_ymfpci_pcm(ymfpci_t *chip, int device, snd_pcm_t ** rpcm) 1082 { 1083 snd_pcm_t *pcm; 1084 int err; 1085 1086 if (rpcm) 1087 *rpcm = NULL; 1088 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0) 1089 return err; 1090 pcm->private_data = chip; 1091 pcm->private_free = snd_ymfpci_pcm_free; 1092 1093 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops); 1094 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops); 1095 1096 /* global setup */ 1097 pcm->info_flags = 0; 1098 strcpy(pcm->name, "YMFPCI"); 1099 chip->pcm = pcm; 1100 1101 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1102 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1103 1104 if (rpcm) 1105 *rpcm = pcm; 1106 return 0; 1107 } 1108 1109 static snd_pcm_ops_t snd_ymfpci_capture_ac97_ops = { 1110 .open = snd_ymfpci_capture_ac97_open, 1111 .close = snd_ymfpci_capture_close, 1112 .ioctl = snd_pcm_lib_ioctl, 1113 .hw_params = snd_ymfpci_capture_hw_params, 1114 .hw_free = snd_ymfpci_capture_hw_free, 1115 .prepare = snd_ymfpci_capture_prepare, 1116 .trigger = snd_ymfpci_capture_trigger, 1117 .pointer = snd_ymfpci_capture_pointer, 1118 }; 1119 1120 static void snd_ymfpci_pcm2_free(snd_pcm_t *pcm) 1121 { 1122 ymfpci_t *chip = pcm->private_data; 1123 chip->pcm2 = NULL; 1124 snd_pcm_lib_preallocate_free_for_all(pcm); 1125 } 1126 1127 int __devinit snd_ymfpci_pcm2(ymfpci_t *chip, int device, snd_pcm_t ** rpcm) 1128 { 1129 snd_pcm_t *pcm; 1130 int err; 1131 1132 if (rpcm) 1133 *rpcm = NULL; 1134 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0) 1135 return err; 1136 pcm->private_data = chip; 1137 pcm->private_free = snd_ymfpci_pcm2_free; 1138 1139 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops); 1140 1141 /* global setup */ 1142 pcm->info_flags = 0; 1143 sprintf(pcm->name, "YMFPCI - %s", 1144 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97"); 1145 chip->pcm2 = pcm; 1146 1147 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1148 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1149 1150 if (rpcm) 1151 *rpcm = pcm; 1152 return 0; 1153 } 1154 1155 static snd_pcm_ops_t snd_ymfpci_playback_spdif_ops = { 1156 .open = snd_ymfpci_playback_spdif_open, 1157 .close = snd_ymfpci_playback_spdif_close, 1158 .ioctl = snd_pcm_lib_ioctl, 1159 .hw_params = snd_ymfpci_playback_hw_params, 1160 .hw_free = snd_ymfpci_playback_hw_free, 1161 .prepare = snd_ymfpci_playback_prepare, 1162 .trigger = snd_ymfpci_playback_trigger, 1163 .pointer = snd_ymfpci_playback_pointer, 1164 }; 1165 1166 static void snd_ymfpci_pcm_spdif_free(snd_pcm_t *pcm) 1167 { 1168 ymfpci_t *chip = pcm->private_data; 1169 chip->pcm_spdif = NULL; 1170 snd_pcm_lib_preallocate_free_for_all(pcm); 1171 } 1172 1173 int __devinit snd_ymfpci_pcm_spdif(ymfpci_t *chip, int device, snd_pcm_t ** rpcm) 1174 { 1175 snd_pcm_t *pcm; 1176 int err; 1177 1178 if (rpcm) 1179 *rpcm = NULL; 1180 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0) 1181 return err; 1182 pcm->private_data = chip; 1183 pcm->private_free = snd_ymfpci_pcm_spdif_free; 1184 1185 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops); 1186 1187 /* global setup */ 1188 pcm->info_flags = 0; 1189 strcpy(pcm->name, "YMFPCI - IEC958"); 1190 chip->pcm_spdif = pcm; 1191 1192 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1193 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1194 1195 if (rpcm) 1196 *rpcm = pcm; 1197 return 0; 1198 } 1199 1200 static snd_pcm_ops_t snd_ymfpci_playback_4ch_ops = { 1201 .open = snd_ymfpci_playback_4ch_open, 1202 .close = snd_ymfpci_playback_4ch_close, 1203 .ioctl = snd_pcm_lib_ioctl, 1204 .hw_params = snd_ymfpci_playback_hw_params, 1205 .hw_free = snd_ymfpci_playback_hw_free, 1206 .prepare = snd_ymfpci_playback_prepare, 1207 .trigger = snd_ymfpci_playback_trigger, 1208 .pointer = snd_ymfpci_playback_pointer, 1209 }; 1210 1211 static void snd_ymfpci_pcm_4ch_free(snd_pcm_t *pcm) 1212 { 1213 ymfpci_t *chip = pcm->private_data; 1214 chip->pcm_4ch = NULL; 1215 snd_pcm_lib_preallocate_free_for_all(pcm); 1216 } 1217 1218 int __devinit snd_ymfpci_pcm_4ch(ymfpci_t *chip, int device, snd_pcm_t ** rpcm) 1219 { 1220 snd_pcm_t *pcm; 1221 int err; 1222 1223 if (rpcm) 1224 *rpcm = NULL; 1225 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0) 1226 return err; 1227 pcm->private_data = chip; 1228 pcm->private_free = snd_ymfpci_pcm_4ch_free; 1229 1230 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops); 1231 1232 /* global setup */ 1233 pcm->info_flags = 0; 1234 strcpy(pcm->name, "YMFPCI - Rear PCM"); 1235 chip->pcm_4ch = pcm; 1236 1237 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1238 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1239 1240 if (rpcm) 1241 *rpcm = pcm; 1242 return 0; 1243 } 1244 1245 static int snd_ymfpci_spdif_default_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 1246 { 1247 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1248 uinfo->count = 1; 1249 return 0; 1250 } 1251 1252 static int snd_ymfpci_spdif_default_get(snd_kcontrol_t * kcontrol, 1253 snd_ctl_elem_value_t * ucontrol) 1254 { 1255 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1256 1257 spin_lock_irq(&chip->reg_lock); 1258 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff; 1259 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff; 1260 spin_unlock_irq(&chip->reg_lock); 1261 return 0; 1262 } 1263 1264 static int snd_ymfpci_spdif_default_put(snd_kcontrol_t * kcontrol, 1265 snd_ctl_elem_value_t * ucontrol) 1266 { 1267 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1268 unsigned int val; 1269 int change; 1270 1271 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) | 1272 (ucontrol->value.iec958.status[1] << 8); 1273 spin_lock_irq(&chip->reg_lock); 1274 change = chip->spdif_bits != val; 1275 chip->spdif_bits = val; 1276 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL) 1277 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 1278 spin_unlock_irq(&chip->reg_lock); 1279 return change; 1280 } 1281 1282 static snd_kcontrol_new_t snd_ymfpci_spdif_default __devinitdata = 1283 { 1284 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1285 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 1286 .info = snd_ymfpci_spdif_default_info, 1287 .get = snd_ymfpci_spdif_default_get, 1288 .put = snd_ymfpci_spdif_default_put 1289 }; 1290 1291 static int snd_ymfpci_spdif_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 1292 { 1293 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1294 uinfo->count = 1; 1295 return 0; 1296 } 1297 1298 static int snd_ymfpci_spdif_mask_get(snd_kcontrol_t * kcontrol, 1299 snd_ctl_elem_value_t * ucontrol) 1300 { 1301 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1302 1303 spin_lock_irq(&chip->reg_lock); 1304 ucontrol->value.iec958.status[0] = 0x3e; 1305 ucontrol->value.iec958.status[1] = 0xff; 1306 spin_unlock_irq(&chip->reg_lock); 1307 return 0; 1308 } 1309 1310 static snd_kcontrol_new_t snd_ymfpci_spdif_mask __devinitdata = 1311 { 1312 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1313 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1314 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 1315 .info = snd_ymfpci_spdif_mask_info, 1316 .get = snd_ymfpci_spdif_mask_get, 1317 }; 1318 1319 static int snd_ymfpci_spdif_stream_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 1320 { 1321 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1322 uinfo->count = 1; 1323 return 0; 1324 } 1325 1326 static int snd_ymfpci_spdif_stream_get(snd_kcontrol_t * kcontrol, 1327 snd_ctl_elem_value_t * ucontrol) 1328 { 1329 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1330 1331 spin_lock_irq(&chip->reg_lock); 1332 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff; 1333 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff; 1334 spin_unlock_irq(&chip->reg_lock); 1335 return 0; 1336 } 1337 1338 static int snd_ymfpci_spdif_stream_put(snd_kcontrol_t * kcontrol, 1339 snd_ctl_elem_value_t * ucontrol) 1340 { 1341 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1342 unsigned int val; 1343 int change; 1344 1345 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) | 1346 (ucontrol->value.iec958.status[1] << 8); 1347 spin_lock_irq(&chip->reg_lock); 1348 change = chip->spdif_pcm_bits != val; 1349 chip->spdif_pcm_bits = val; 1350 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2)) 1351 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); 1352 spin_unlock_irq(&chip->reg_lock); 1353 return change; 1354 } 1355 1356 static snd_kcontrol_new_t snd_ymfpci_spdif_stream __devinitdata = 1357 { 1358 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1359 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1360 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 1361 .info = snd_ymfpci_spdif_stream_info, 1362 .get = snd_ymfpci_spdif_stream_get, 1363 .put = snd_ymfpci_spdif_stream_put 1364 }; 1365 1366 static int snd_ymfpci_drec_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info) 1367 { 1368 static char *texts[3] = {"AC'97", "IEC958", "ZV Port"}; 1369 1370 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1371 info->count = 1; 1372 info->value.enumerated.items = 3; 1373 if (info->value.enumerated.item > 2) 1374 info->value.enumerated.item = 2; 1375 strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]); 1376 return 0; 1377 } 1378 1379 static int snd_ymfpci_drec_source_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value) 1380 { 1381 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1382 u16 reg; 1383 1384 spin_lock_irq(&chip->reg_lock); 1385 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 1386 spin_unlock_irq(&chip->reg_lock); 1387 if (!(reg & 0x100)) 1388 value->value.enumerated.item[0] = 0; 1389 else 1390 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0); 1391 return 0; 1392 } 1393 1394 static int snd_ymfpci_drec_source_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value) 1395 { 1396 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1397 u16 reg, old_reg; 1398 1399 spin_lock_irq(&chip->reg_lock); 1400 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 1401 if (value->value.enumerated.item[0] == 0) 1402 reg = old_reg & ~0x100; 1403 else 1404 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9); 1405 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg); 1406 spin_unlock_irq(&chip->reg_lock); 1407 return reg != old_reg; 1408 } 1409 1410 static snd_kcontrol_new_t snd_ymfpci_drec_source __devinitdata = { 1411 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, 1412 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1413 .name = "Direct Recording Source", 1414 .info = snd_ymfpci_drec_source_info, 1415 .get = snd_ymfpci_drec_source_get, 1416 .put = snd_ymfpci_drec_source_put 1417 }; 1418 1419 /* 1420 * Mixer controls 1421 */ 1422 1423 #define YMFPCI_SINGLE(xname, xindex, reg, shift) \ 1424 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1425 .info = snd_ymfpci_info_single, \ 1426 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \ 1427 .private_value = ((reg) | ((shift) << 16)) } 1428 1429 static int snd_ymfpci_info_single(snd_kcontrol_t *kcontrol, 1430 snd_ctl_elem_info_t *uinfo) 1431 { 1432 int reg = kcontrol->private_value & 0xffff; 1433 1434 switch (reg) { 1435 case YDSXGR_SPDIFOUTCTRL: break; 1436 case YDSXGR_SPDIFINCTRL: break; 1437 default: return -EINVAL; 1438 } 1439 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1440 uinfo->count = 1; 1441 uinfo->value.integer.min = 0; 1442 uinfo->value.integer.max = 1; 1443 return 0; 1444 } 1445 1446 static int snd_ymfpci_get_single(snd_kcontrol_t *kcontrol, 1447 snd_ctl_elem_value_t *ucontrol) 1448 { 1449 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1450 int reg = kcontrol->private_value & 0xffff; 1451 unsigned int shift = (kcontrol->private_value >> 16) & 0xff; 1452 unsigned int mask = 1; 1453 1454 switch (reg) { 1455 case YDSXGR_SPDIFOUTCTRL: break; 1456 case YDSXGR_SPDIFINCTRL: break; 1457 default: return -EINVAL; 1458 } 1459 ucontrol->value.integer.value[0] = 1460 (snd_ymfpci_readl(chip, reg) >> shift) & mask; 1461 return 0; 1462 } 1463 1464 static int snd_ymfpci_put_single(snd_kcontrol_t *kcontrol, 1465 snd_ctl_elem_value_t *ucontrol) 1466 { 1467 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1468 int reg = kcontrol->private_value & 0xffff; 1469 unsigned int shift = (kcontrol->private_value >> 16) & 0xff; 1470 unsigned int mask = 1; 1471 int change; 1472 unsigned int val, oval; 1473 1474 switch (reg) { 1475 case YDSXGR_SPDIFOUTCTRL: break; 1476 case YDSXGR_SPDIFINCTRL: break; 1477 default: return -EINVAL; 1478 } 1479 val = (ucontrol->value.integer.value[0] & mask); 1480 val <<= shift; 1481 spin_lock_irq(&chip->reg_lock); 1482 oval = snd_ymfpci_readl(chip, reg); 1483 val = (oval & ~(mask << shift)) | val; 1484 change = val != oval; 1485 snd_ymfpci_writel(chip, reg, val); 1486 spin_unlock_irq(&chip->reg_lock); 1487 return change; 1488 } 1489 1490 #define YMFPCI_DOUBLE(xname, xindex, reg) \ 1491 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1492 .info = snd_ymfpci_info_double, \ 1493 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \ 1494 .private_value = reg } 1495 1496 static int snd_ymfpci_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 1497 { 1498 unsigned int reg = kcontrol->private_value; 1499 1500 if (reg < 0x80 || reg >= 0xc0) 1501 return -EINVAL; 1502 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1503 uinfo->count = 2; 1504 uinfo->value.integer.min = 0; 1505 uinfo->value.integer.max = 16383; 1506 return 0; 1507 } 1508 1509 static int snd_ymfpci_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1510 { 1511 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1512 unsigned int reg = kcontrol->private_value; 1513 unsigned int shift_left = 0, shift_right = 16, mask = 16383; 1514 unsigned int val; 1515 1516 if (reg < 0x80 || reg >= 0xc0) 1517 return -EINVAL; 1518 spin_lock_irq(&chip->reg_lock); 1519 val = snd_ymfpci_readl(chip, reg); 1520 spin_unlock_irq(&chip->reg_lock); 1521 ucontrol->value.integer.value[0] = (val >> shift_left) & mask; 1522 ucontrol->value.integer.value[1] = (val >> shift_right) & mask; 1523 return 0; 1524 } 1525 1526 static int snd_ymfpci_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1527 { 1528 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1529 unsigned int reg = kcontrol->private_value; 1530 unsigned int shift_left = 0, shift_right = 16, mask = 16383; 1531 int change; 1532 unsigned int val1, val2, oval; 1533 1534 if (reg < 0x80 || reg >= 0xc0) 1535 return -EINVAL; 1536 val1 = ucontrol->value.integer.value[0] & mask; 1537 val2 = ucontrol->value.integer.value[1] & mask; 1538 val1 <<= shift_left; 1539 val2 <<= shift_right; 1540 spin_lock_irq(&chip->reg_lock); 1541 oval = snd_ymfpci_readl(chip, reg); 1542 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2; 1543 change = val1 != oval; 1544 snd_ymfpci_writel(chip, reg, val1); 1545 spin_unlock_irq(&chip->reg_lock); 1546 return change; 1547 } 1548 1549 /* 1550 * 4ch duplication 1551 */ 1552 static int snd_ymfpci_info_dup4ch(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 1553 { 1554 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1555 uinfo->count = 1; 1556 uinfo->value.integer.min = 0; 1557 uinfo->value.integer.max = 1; 1558 return 0; 1559 } 1560 1561 static int snd_ymfpci_get_dup4ch(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1562 { 1563 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1564 ucontrol->value.integer.value[0] = chip->mode_dup4ch; 1565 return 0; 1566 } 1567 1568 static int snd_ymfpci_put_dup4ch(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1569 { 1570 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1571 int change; 1572 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch); 1573 if (change) 1574 chip->mode_dup4ch = !!ucontrol->value.integer.value[0]; 1575 return change; 1576 } 1577 1578 1579 static snd_kcontrol_new_t snd_ymfpci_controls[] __devinitdata = { 1580 YMFPCI_DOUBLE("Wave Playback Volume", 0, YDSXGR_NATIVEDACOUTVOL), 1581 YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL), 1582 YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL), 1583 YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL), 1584 YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL), 1585 YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL), 1586 YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL), 1587 YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL), 1588 YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL), 1589 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL), 1590 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL), 1591 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL), 1592 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL), 1593 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0), 1594 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0), 1595 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4), 1596 { 1597 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1598 .name = "4ch Duplication", 1599 .info = snd_ymfpci_info_dup4ch, 1600 .get = snd_ymfpci_get_dup4ch, 1601 .put = snd_ymfpci_put_dup4ch, 1602 }, 1603 }; 1604 1605 1606 /* 1607 * GPIO 1608 */ 1609 1610 static int snd_ymfpci_get_gpio_out(ymfpci_t *chip, int pin) 1611 { 1612 u16 reg, mode; 1613 unsigned long flags; 1614 1615 spin_lock_irqsave(&chip->reg_lock, flags); 1616 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); 1617 reg &= ~(1 << (pin + 8)); 1618 reg |= (1 << pin); 1619 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); 1620 /* set the level mode for input line */ 1621 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG); 1622 mode &= ~(3 << (pin * 2)); 1623 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode); 1624 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); 1625 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS); 1626 spin_unlock_irqrestore(&chip->reg_lock, flags); 1627 return (mode >> pin) & 1; 1628 } 1629 1630 static int snd_ymfpci_set_gpio_out(ymfpci_t *chip, int pin, int enable) 1631 { 1632 u16 reg; 1633 unsigned long flags; 1634 1635 spin_lock_irqsave(&chip->reg_lock, flags); 1636 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); 1637 reg &= ~(1 << pin); 1638 reg &= ~(1 << (pin + 8)); 1639 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); 1640 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin); 1641 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); 1642 spin_unlock_irqrestore(&chip->reg_lock, flags); 1643 1644 return 0; 1645 } 1646 1647 static int snd_ymfpci_gpio_sw_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo) 1648 { 1649 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1650 uinfo->count = 1; 1651 uinfo->value.integer.min = 0; 1652 uinfo->value.integer.max = 1; 1653 return 0; 1654 } 1655 1656 static int snd_ymfpci_gpio_sw_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 1657 { 1658 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1659 int pin = (int)kcontrol->private_value; 1660 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); 1661 return 0; 1662 } 1663 1664 static int snd_ymfpci_gpio_sw_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 1665 { 1666 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1667 int pin = (int)kcontrol->private_value; 1668 1669 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) { 1670 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]); 1671 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); 1672 return 1; 1673 } 1674 return 0; 1675 } 1676 1677 static snd_kcontrol_new_t snd_ymfpci_rear_shared __devinitdata = { 1678 .name = "Shared Rear/Line-In Switch", 1679 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1680 .info = snd_ymfpci_gpio_sw_info, 1681 .get = snd_ymfpci_gpio_sw_get, 1682 .put = snd_ymfpci_gpio_sw_put, 1683 .private_value = 2, 1684 }; 1685 1686 /* 1687 * PCM voice volume 1688 */ 1689 1690 static int snd_ymfpci_pcm_vol_info(snd_kcontrol_t *kcontrol, 1691 snd_ctl_elem_info_t *uinfo) 1692 { 1693 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1694 uinfo->count = 2; 1695 uinfo->value.integer.min = 0; 1696 uinfo->value.integer.max = 0x8000; 1697 return 0; 1698 } 1699 1700 static int snd_ymfpci_pcm_vol_get(snd_kcontrol_t *kcontrol, 1701 snd_ctl_elem_value_t *ucontrol) 1702 { 1703 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1704 unsigned int subs = kcontrol->id.subdevice; 1705 1706 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left; 1707 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right; 1708 return 0; 1709 } 1710 1711 static int snd_ymfpci_pcm_vol_put(snd_kcontrol_t *kcontrol, 1712 snd_ctl_elem_value_t *ucontrol) 1713 { 1714 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1715 unsigned int subs = kcontrol->id.subdevice; 1716 snd_pcm_substream_t *substream; 1717 unsigned long flags; 1718 1719 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left || 1720 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) { 1721 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0]; 1722 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1]; 1723 1724 substream = (snd_pcm_substream_t *)kcontrol->private_value; 1725 spin_lock_irqsave(&chip->voice_lock, flags); 1726 if (substream->runtime && substream->runtime->private_data) { 1727 ymfpci_pcm_t *ypcm = substream->runtime->private_data; 1728 ypcm->update_pcm_vol = 2; 1729 } 1730 spin_unlock_irqrestore(&chip->voice_lock, flags); 1731 return 1; 1732 } 1733 return 0; 1734 } 1735 1736 static snd_kcontrol_new_t snd_ymfpci_pcm_volume __devinitdata = { 1737 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1738 .name = "PCM Playback Volume", 1739 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 1740 SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1741 .info = snd_ymfpci_pcm_vol_info, 1742 .get = snd_ymfpci_pcm_vol_get, 1743 .put = snd_ymfpci_pcm_vol_put, 1744 }; 1745 1746 1747 /* 1748 * Mixer routines 1749 */ 1750 1751 static void snd_ymfpci_mixer_free_ac97_bus(ac97_bus_t *bus) 1752 { 1753 ymfpci_t *chip = bus->private_data; 1754 chip->ac97_bus = NULL; 1755 } 1756 1757 static void snd_ymfpci_mixer_free_ac97(ac97_t *ac97) 1758 { 1759 ymfpci_t *chip = ac97->private_data; 1760 chip->ac97 = NULL; 1761 } 1762 1763 int __devinit snd_ymfpci_mixer(ymfpci_t *chip, int rear_switch) 1764 { 1765 ac97_template_t ac97; 1766 snd_kcontrol_t *kctl; 1767 snd_pcm_substream_t *substream; 1768 unsigned int idx; 1769 int err; 1770 static ac97_bus_ops_t ops = { 1771 .write = snd_ymfpci_codec_write, 1772 .read = snd_ymfpci_codec_read, 1773 }; 1774 1775 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) 1776 return err; 1777 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus; 1778 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */ 1779 1780 memset(&ac97, 0, sizeof(ac97)); 1781 ac97.private_data = chip; 1782 ac97.private_free = snd_ymfpci_mixer_free_ac97; 1783 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) 1784 return err; 1785 1786 /* to be sure */ 1787 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 1788 AC97_EA_VRA|AC97_EA_VRM, 0); 1789 1790 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) { 1791 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0) 1792 return err; 1793 } 1794 1795 /* add S/PDIF control */ 1796 snd_assert(chip->pcm_spdif != NULL, return -EIO); 1797 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0) 1798 return err; 1799 kctl->id.device = chip->pcm_spdif->device; 1800 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0) 1801 return err; 1802 kctl->id.device = chip->pcm_spdif->device; 1803 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0) 1804 return err; 1805 kctl->id.device = chip->pcm_spdif->device; 1806 chip->spdif_pcm_ctl = kctl; 1807 1808 /* direct recording source */ 1809 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 && 1810 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0) 1811 return err; 1812 1813 /* 1814 * shared rear/line-in 1815 */ 1816 if (rear_switch) { 1817 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0) 1818 return err; 1819 } 1820 1821 /* per-voice volume */ 1822 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; 1823 for (idx = 0; idx < 32; ++idx) { 1824 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip); 1825 if (!kctl) 1826 return -ENOMEM; 1827 kctl->id.device = chip->pcm->device; 1828 kctl->id.subdevice = idx; 1829 kctl->private_value = (unsigned long)substream; 1830 if ((err = snd_ctl_add(chip->card, kctl)) < 0) 1831 return err; 1832 chip->pcm_mixer[idx].left = 0x8000; 1833 chip->pcm_mixer[idx].right = 0x8000; 1834 chip->pcm_mixer[idx].ctl = kctl; 1835 substream = substream->next; 1836 } 1837 1838 return 0; 1839 } 1840 1841 1842 /* 1843 * timer 1844 */ 1845 1846 static int snd_ymfpci_timer_start(snd_timer_t *timer) 1847 { 1848 ymfpci_t *chip; 1849 unsigned long flags; 1850 unsigned int count; 1851 1852 chip = snd_timer_chip(timer); 1853 count = (timer->sticks << 1) - 1; 1854 spin_lock_irqsave(&chip->reg_lock, flags); 1855 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count); 1856 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03); 1857 spin_unlock_irqrestore(&chip->reg_lock, flags); 1858 return 0; 1859 } 1860 1861 static int snd_ymfpci_timer_stop(snd_timer_t *timer) 1862 { 1863 ymfpci_t *chip; 1864 unsigned long flags; 1865 1866 chip = snd_timer_chip(timer); 1867 spin_lock_irqsave(&chip->reg_lock, flags); 1868 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00); 1869 spin_unlock_irqrestore(&chip->reg_lock, flags); 1870 return 0; 1871 } 1872 1873 static int snd_ymfpci_timer_precise_resolution(snd_timer_t *timer, 1874 unsigned long *num, unsigned long *den) 1875 { 1876 *num = 1; 1877 *den = 48000; 1878 return 0; 1879 } 1880 1881 static struct _snd_timer_hardware snd_ymfpci_timer_hw = { 1882 .flags = SNDRV_TIMER_HW_AUTO, 1883 .resolution = 20833, /* 1/fs = 20.8333...us */ 1884 .ticks = 0x8000, 1885 .start = snd_ymfpci_timer_start, 1886 .stop = snd_ymfpci_timer_stop, 1887 .precise_resolution = snd_ymfpci_timer_precise_resolution, 1888 }; 1889 1890 int __devinit snd_ymfpci_timer(ymfpci_t *chip, int device) 1891 { 1892 snd_timer_t *timer = NULL; 1893 snd_timer_id_t tid; 1894 int err; 1895 1896 tid.dev_class = SNDRV_TIMER_CLASS_CARD; 1897 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; 1898 tid.card = chip->card->number; 1899 tid.device = device; 1900 tid.subdevice = 0; 1901 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) { 1902 strcpy(timer->name, "YMFPCI timer"); 1903 timer->private_data = chip; 1904 timer->hw = snd_ymfpci_timer_hw; 1905 } 1906 chip->timer = timer; 1907 return err; 1908 } 1909 1910 1911 /* 1912 * proc interface 1913 */ 1914 1915 static void snd_ymfpci_proc_read(snd_info_entry_t *entry, 1916 snd_info_buffer_t * buffer) 1917 { 1918 ymfpci_t *chip = entry->private_data; 1919 int i; 1920 1921 snd_iprintf(buffer, "YMFPCI\n\n"); 1922 for (i = 0; i <= YDSXGR_WORKBASE; i += 4) 1923 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i)); 1924 } 1925 1926 static int __devinit snd_ymfpci_proc_init(snd_card_t * card, ymfpci_t *chip) 1927 { 1928 snd_info_entry_t *entry; 1929 1930 if (! snd_card_proc_new(card, "ymfpci", &entry)) 1931 snd_info_set_text_ops(entry, chip, 1024, snd_ymfpci_proc_read); 1932 return 0; 1933 } 1934 1935 /* 1936 * initialization routines 1937 */ 1938 1939 static void snd_ymfpci_aclink_reset(struct pci_dev * pci) 1940 { 1941 u8 cmd; 1942 1943 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd); 1944 #if 0 // force to reset 1945 if (cmd & 0x03) { 1946 #endif 1947 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc); 1948 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03); 1949 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc); 1950 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0); 1951 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0); 1952 #if 0 1953 } 1954 #endif 1955 } 1956 1957 static void snd_ymfpci_enable_dsp(ymfpci_t *chip) 1958 { 1959 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001); 1960 } 1961 1962 static void snd_ymfpci_disable_dsp(ymfpci_t *chip) 1963 { 1964 u32 val; 1965 int timeout = 1000; 1966 1967 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG); 1968 if (val) 1969 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000); 1970 while (timeout-- > 0) { 1971 val = snd_ymfpci_readl(chip, YDSXGR_STATUS); 1972 if ((val & 0x00000002) == 0) 1973 break; 1974 } 1975 } 1976 1977 #include "ymfpci_image.h" 1978 1979 static void snd_ymfpci_download_image(ymfpci_t *chip) 1980 { 1981 int i; 1982 u16 ctrl; 1983 unsigned long *inst; 1984 1985 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000); 1986 snd_ymfpci_disable_dsp(chip); 1987 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000); 1988 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000); 1989 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000); 1990 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000); 1991 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000); 1992 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000); 1993 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000); 1994 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 1995 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); 1996 1997 /* setup DSP instruction code */ 1998 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++) 1999 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), DspInst[i]); 2000 2001 /* setup control instruction code */ 2002 switch (chip->device_id) { 2003 case PCI_DEVICE_ID_YAMAHA_724F: 2004 case PCI_DEVICE_ID_YAMAHA_740C: 2005 case PCI_DEVICE_ID_YAMAHA_744: 2006 case PCI_DEVICE_ID_YAMAHA_754: 2007 inst = CntrlInst1E; 2008 break; 2009 default: 2010 inst = CntrlInst; 2011 break; 2012 } 2013 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++) 2014 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), inst[i]); 2015 2016 snd_ymfpci_enable_dsp(chip); 2017 } 2018 2019 static int __devinit snd_ymfpci_memalloc(ymfpci_t *chip) 2020 { 2021 long size, playback_ctrl_size; 2022 int voice, bank, reg; 2023 u8 *ptr; 2024 dma_addr_t ptr_addr; 2025 2026 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES; 2027 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2; 2028 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2; 2029 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2; 2030 chip->work_size = YDSXG_DEFAULT_WORK_SIZE; 2031 2032 size = ((playback_ctrl_size + 0x00ff) & ~0x00ff) + 2033 ((chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES + 0x00ff) & ~0x00ff) + 2034 ((chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES + 0x00ff) & ~0x00ff) + 2035 ((chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES + 0x00ff) & ~0x00ff) + 2036 chip->work_size; 2037 /* work_ptr must be aligned to 256 bytes, but it's already 2038 covered with the kernel page allocation mechanism */ 2039 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 2040 size, &chip->work_ptr) < 0) 2041 return -ENOMEM; 2042 ptr = chip->work_ptr.area; 2043 ptr_addr = chip->work_ptr.addr; 2044 memset(ptr, 0, size); /* for sure */ 2045 2046 chip->bank_base_playback = ptr; 2047 chip->bank_base_playback_addr = ptr_addr; 2048 chip->ctrl_playback = (u32 *)ptr; 2049 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES); 2050 ptr += (playback_ctrl_size + 0x00ff) & ~0x00ff; 2051 ptr_addr += (playback_ctrl_size + 0x00ff) & ~0x00ff; 2052 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) { 2053 chip->voices[voice].number = voice; 2054 chip->voices[voice].bank = (snd_ymfpci_playback_bank_t *)ptr; 2055 chip->voices[voice].bank_addr = ptr_addr; 2056 for (bank = 0; bank < 2; bank++) { 2057 chip->bank_playback[voice][bank] = (snd_ymfpci_playback_bank_t *)ptr; 2058 ptr += chip->bank_size_playback; 2059 ptr_addr += chip->bank_size_playback; 2060 } 2061 } 2062 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff); 2063 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff; 2064 chip->bank_base_capture = ptr; 2065 chip->bank_base_capture_addr = ptr_addr; 2066 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++) 2067 for (bank = 0; bank < 2; bank++) { 2068 chip->bank_capture[voice][bank] = (snd_ymfpci_capture_bank_t *)ptr; 2069 ptr += chip->bank_size_capture; 2070 ptr_addr += chip->bank_size_capture; 2071 } 2072 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff); 2073 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff; 2074 chip->bank_base_effect = ptr; 2075 chip->bank_base_effect_addr = ptr_addr; 2076 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++) 2077 for (bank = 0; bank < 2; bank++) { 2078 chip->bank_effect[voice][bank] = (snd_ymfpci_effect_bank_t *)ptr; 2079 ptr += chip->bank_size_effect; 2080 ptr_addr += chip->bank_size_effect; 2081 } 2082 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff); 2083 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff; 2084 chip->work_base = ptr; 2085 chip->work_base_addr = ptr_addr; 2086 2087 snd_assert(ptr + chip->work_size == chip->work_ptr.area + chip->work_ptr.bytes, ); 2088 2089 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr); 2090 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr); 2091 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr); 2092 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr); 2093 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2); 2094 2095 /* S/PDIF output initialization */ 2096 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff; 2097 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0); 2098 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 2099 2100 /* S/PDIF input initialization */ 2101 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0); 2102 2103 /* digital mixer setup */ 2104 for (reg = 0x80; reg < 0xc0; reg += 4) 2105 snd_ymfpci_writel(chip, reg, 0); 2106 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff); 2107 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff); 2108 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff); 2109 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff); 2110 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff); 2111 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff); 2112 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff); 2113 2114 return 0; 2115 } 2116 2117 static int snd_ymfpci_free(ymfpci_t *chip) 2118 { 2119 u16 ctrl; 2120 2121 snd_assert(chip != NULL, return -EINVAL); 2122 2123 if (chip->res_reg_area) { /* don't touch busy hardware */ 2124 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); 2125 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0); 2126 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0); 2127 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0); 2128 snd_ymfpci_disable_dsp(chip); 2129 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0); 2130 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0); 2131 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0); 2132 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0); 2133 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0); 2134 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 2135 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); 2136 } 2137 2138 snd_ymfpci_ac3_done(chip); 2139 2140 /* Set PCI device to D3 state */ 2141 #if 0 2142 /* FIXME: temporarily disabled, otherwise we cannot fire up 2143 * the chip again unless reboot. ACPI bug? 2144 */ 2145 pci_set_power_state(chip->pci, 3); 2146 #endif 2147 2148 #ifdef CONFIG_PM 2149 vfree(chip->saved_regs); 2150 #endif 2151 release_and_free_resource(chip->mpu_res); 2152 release_and_free_resource(chip->fm_res); 2153 snd_ymfpci_free_gameport(chip); 2154 if (chip->reg_area_virt) 2155 iounmap(chip->reg_area_virt); 2156 if (chip->work_ptr.area) 2157 snd_dma_free_pages(&chip->work_ptr); 2158 2159 if (chip->irq >= 0) 2160 free_irq(chip->irq, (void *)chip); 2161 release_and_free_resource(chip->res_reg_area); 2162 2163 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl); 2164 2165 pci_disable_device(chip->pci); 2166 kfree(chip); 2167 return 0; 2168 } 2169 2170 static int snd_ymfpci_dev_free(snd_device_t *device) 2171 { 2172 ymfpci_t *chip = device->device_data; 2173 return snd_ymfpci_free(chip); 2174 } 2175 2176 #ifdef CONFIG_PM 2177 static int saved_regs_index[] = { 2178 /* spdif */ 2179 YDSXGR_SPDIFOUTCTRL, 2180 YDSXGR_SPDIFOUTSTATUS, 2181 YDSXGR_SPDIFINCTRL, 2182 /* volumes */ 2183 YDSXGR_PRIADCLOOPVOL, 2184 YDSXGR_NATIVEDACINVOL, 2185 YDSXGR_NATIVEDACOUTVOL, 2186 // YDSXGR_BUF441OUTVOL, 2187 YDSXGR_NATIVEADCINVOL, 2188 YDSXGR_SPDIFLOOPVOL, 2189 YDSXGR_SPDIFOUTVOL, 2190 YDSXGR_ZVOUTVOL, 2191 YDSXGR_LEGACYOUTVOL, 2192 /* address bases */ 2193 YDSXGR_PLAYCTRLBASE, 2194 YDSXGR_RECCTRLBASE, 2195 YDSXGR_EFFCTRLBASE, 2196 YDSXGR_WORKBASE, 2197 /* capture set up */ 2198 YDSXGR_MAPOFREC, 2199 YDSXGR_RECFORMAT, 2200 YDSXGR_RECSLOTSR, 2201 YDSXGR_ADCFORMAT, 2202 YDSXGR_ADCSLOTSR, 2203 }; 2204 #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index) 2205 2206 static int snd_ymfpci_suspend(snd_card_t *card, pm_message_t state) 2207 { 2208 ymfpci_t *chip = card->pm_private_data; 2209 unsigned int i; 2210 2211 snd_pcm_suspend_all(chip->pcm); 2212 snd_pcm_suspend_all(chip->pcm2); 2213 snd_pcm_suspend_all(chip->pcm_spdif); 2214 snd_pcm_suspend_all(chip->pcm_4ch); 2215 snd_ac97_suspend(chip->ac97); 2216 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++) 2217 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]); 2218 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE); 2219 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); 2220 snd_ymfpci_disable_dsp(chip); 2221 pci_disable_device(chip->pci); 2222 return 0; 2223 } 2224 2225 static int snd_ymfpci_resume(snd_card_t *card) 2226 { 2227 ymfpci_t *chip = card->pm_private_data; 2228 unsigned int i; 2229 2230 pci_enable_device(chip->pci); 2231 pci_set_master(chip->pci); 2232 snd_ymfpci_aclink_reset(chip->pci); 2233 snd_ymfpci_codec_ready(chip, 0); 2234 snd_ymfpci_download_image(chip); 2235 udelay(100); 2236 2237 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++) 2238 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]); 2239 2240 snd_ac97_resume(chip->ac97); 2241 2242 /* start hw again */ 2243 if (chip->start_count > 0) { 2244 spin_lock_irq(&chip->reg_lock); 2245 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode); 2246 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT); 2247 spin_unlock_irq(&chip->reg_lock); 2248 } 2249 return 0; 2250 } 2251 #endif /* CONFIG_PM */ 2252 2253 int __devinit snd_ymfpci_create(snd_card_t * card, 2254 struct pci_dev * pci, 2255 unsigned short old_legacy_ctrl, 2256 ymfpci_t ** rchip) 2257 { 2258 ymfpci_t *chip; 2259 int err; 2260 static snd_device_ops_t ops = { 2261 .dev_free = snd_ymfpci_dev_free, 2262 }; 2263 2264 *rchip = NULL; 2265 2266 /* enable PCI device */ 2267 if ((err = pci_enable_device(pci)) < 0) 2268 return err; 2269 2270 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 2271 if (chip == NULL) { 2272 pci_disable_device(pci); 2273 return -ENOMEM; 2274 } 2275 chip->old_legacy_ctrl = old_legacy_ctrl; 2276 spin_lock_init(&chip->reg_lock); 2277 spin_lock_init(&chip->voice_lock); 2278 init_waitqueue_head(&chip->interrupt_sleep); 2279 atomic_set(&chip->interrupt_sleep_count, 0); 2280 chip->card = card; 2281 chip->pci = pci; 2282 chip->irq = -1; 2283 chip->device_id = pci->device; 2284 pci_read_config_byte(pci, PCI_REVISION_ID, (u8 *)&chip->rev); 2285 chip->reg_area_phys = pci_resource_start(pci, 0); 2286 chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000); 2287 pci_set_master(pci); 2288 2289 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) { 2290 snd_printk(KERN_ERR "unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1); 2291 snd_ymfpci_free(chip); 2292 return -EBUSY; 2293 } 2294 if (request_irq(pci->irq, snd_ymfpci_interrupt, SA_INTERRUPT|SA_SHIRQ, "YMFPCI", (void *) chip)) { 2295 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); 2296 snd_ymfpci_free(chip); 2297 return -EBUSY; 2298 } 2299 chip->irq = pci->irq; 2300 2301 snd_ymfpci_aclink_reset(pci); 2302 if (snd_ymfpci_codec_ready(chip, 0) < 0) { 2303 snd_ymfpci_free(chip); 2304 return -EIO; 2305 } 2306 2307 snd_ymfpci_download_image(chip); 2308 2309 udelay(100); /* seems we need a delay after downloading image.. */ 2310 2311 if (snd_ymfpci_memalloc(chip) < 0) { 2312 snd_ymfpci_free(chip); 2313 return -EIO; 2314 } 2315 2316 if ((err = snd_ymfpci_ac3_init(chip)) < 0) { 2317 snd_ymfpci_free(chip); 2318 return err; 2319 } 2320 2321 #ifdef CONFIG_PM 2322 chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32)); 2323 if (chip->saved_regs == NULL) { 2324 snd_ymfpci_free(chip); 2325 return -ENOMEM; 2326 } 2327 snd_card_set_pm_callback(card, snd_ymfpci_suspend, snd_ymfpci_resume, chip); 2328 #endif 2329 2330 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 2331 snd_ymfpci_free(chip); 2332 return err; 2333 } 2334 2335 snd_ymfpci_proc_init(card, chip); 2336 2337 snd_card_set_dev(card, &pci->dev); 2338 2339 *rchip = chip; 2340 return 0; 2341 } 2342