1 /* 2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz> 3 * Routines for control of YMF724/740/744/754 chips 4 * 5 * BUGS: 6 * -- 7 * 8 * TODO: 9 * -- 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or 14 * (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 24 * 25 */ 26 27 #include <sound/driver.h> 28 #include <linux/delay.h> 29 #include <linux/init.h> 30 #include <linux/interrupt.h> 31 #include <linux/pci.h> 32 #include <linux/sched.h> 33 #include <linux/slab.h> 34 #include <linux/vmalloc.h> 35 36 #include <sound/core.h> 37 #include <sound/control.h> 38 #include <sound/info.h> 39 #include <sound/ymfpci.h> 40 #include <sound/asoundef.h> 41 #include <sound/mpu401.h> 42 43 #include <asm/io.h> 44 45 /* 46 * constants 47 */ 48 49 /* 50 * common I/O routines 51 */ 52 53 static void snd_ymfpci_irq_wait(ymfpci_t *chip); 54 55 static inline u8 snd_ymfpci_readb(ymfpci_t *chip, u32 offset) 56 { 57 return readb(chip->reg_area_virt + offset); 58 } 59 60 static inline void snd_ymfpci_writeb(ymfpci_t *chip, u32 offset, u8 val) 61 { 62 writeb(val, chip->reg_area_virt + offset); 63 } 64 65 static inline u16 snd_ymfpci_readw(ymfpci_t *chip, u32 offset) 66 { 67 return readw(chip->reg_area_virt + offset); 68 } 69 70 static inline void snd_ymfpci_writew(ymfpci_t *chip, u32 offset, u16 val) 71 { 72 writew(val, chip->reg_area_virt + offset); 73 } 74 75 static inline u32 snd_ymfpci_readl(ymfpci_t *chip, u32 offset) 76 { 77 return readl(chip->reg_area_virt + offset); 78 } 79 80 static inline void snd_ymfpci_writel(ymfpci_t *chip, u32 offset, u32 val) 81 { 82 writel(val, chip->reg_area_virt + offset); 83 } 84 85 static int snd_ymfpci_codec_ready(ymfpci_t *chip, int secondary) 86 { 87 unsigned long end_time; 88 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR; 89 90 end_time = jiffies + msecs_to_jiffies(750); 91 do { 92 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0) 93 return 0; 94 set_current_state(TASK_UNINTERRUPTIBLE); 95 schedule_timeout(1); 96 } while (time_before(jiffies, end_time)); 97 snd_printk("codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg)); 98 return -EBUSY; 99 } 100 101 static void snd_ymfpci_codec_write(ac97_t *ac97, u16 reg, u16 val) 102 { 103 ymfpci_t *chip = ac97->private_data; 104 u32 cmd; 105 106 snd_ymfpci_codec_ready(chip, 0); 107 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val; 108 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd); 109 } 110 111 static u16 snd_ymfpci_codec_read(ac97_t *ac97, u16 reg) 112 { 113 ymfpci_t *chip = ac97->private_data; 114 115 if (snd_ymfpci_codec_ready(chip, 0)) 116 return ~0; 117 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg); 118 if (snd_ymfpci_codec_ready(chip, 0)) 119 return ~0; 120 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) { 121 int i; 122 for (i = 0; i < 600; i++) 123 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); 124 } 125 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); 126 } 127 128 /* 129 * Misc routines 130 */ 131 132 static u32 snd_ymfpci_calc_delta(u32 rate) 133 { 134 switch (rate) { 135 case 8000: return 0x02aaab00; 136 case 11025: return 0x03accd00; 137 case 16000: return 0x05555500; 138 case 22050: return 0x07599a00; 139 case 32000: return 0x0aaaab00; 140 case 44100: return 0x0eb33300; 141 default: return ((rate << 16) / 375) << 5; 142 } 143 } 144 145 static u32 def_rate[8] = { 146 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000 147 }; 148 149 static u32 snd_ymfpci_calc_lpfK(u32 rate) 150 { 151 u32 i; 152 static u32 val[8] = { 153 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000, 154 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000 155 }; 156 157 if (rate == 44100) 158 return 0x40000000; /* FIXME: What's the right value? */ 159 for (i = 0; i < 8; i++) 160 if (rate <= def_rate[i]) 161 return val[i]; 162 return val[0]; 163 } 164 165 static u32 snd_ymfpci_calc_lpfQ(u32 rate) 166 { 167 u32 i; 168 static u32 val[8] = { 169 0x35280000, 0x34A70000, 0x32020000, 0x31770000, 170 0x31390000, 0x31C90000, 0x33D00000, 0x40000000 171 }; 172 173 if (rate == 44100) 174 return 0x370A0000; 175 for (i = 0; i < 8; i++) 176 if (rate <= def_rate[i]) 177 return val[i]; 178 return val[0]; 179 } 180 181 /* 182 * Hardware start management 183 */ 184 185 static void snd_ymfpci_hw_start(ymfpci_t *chip) 186 { 187 unsigned long flags; 188 189 spin_lock_irqsave(&chip->reg_lock, flags); 190 if (chip->start_count++ > 0) 191 goto __end; 192 snd_ymfpci_writel(chip, YDSXGR_MODE, 193 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3); 194 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; 195 __end: 196 spin_unlock_irqrestore(&chip->reg_lock, flags); 197 } 198 199 static void snd_ymfpci_hw_stop(ymfpci_t *chip) 200 { 201 unsigned long flags; 202 long timeout = 1000; 203 204 spin_lock_irqsave(&chip->reg_lock, flags); 205 if (--chip->start_count > 0) 206 goto __end; 207 snd_ymfpci_writel(chip, YDSXGR_MODE, 208 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3); 209 while (timeout-- > 0) { 210 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0) 211 break; 212 } 213 if (atomic_read(&chip->interrupt_sleep_count)) { 214 atomic_set(&chip->interrupt_sleep_count, 0); 215 wake_up(&chip->interrupt_sleep); 216 } 217 __end: 218 spin_unlock_irqrestore(&chip->reg_lock, flags); 219 } 220 221 /* 222 * Playback voice management 223 */ 224 225 static int voice_alloc(ymfpci_t *chip, ymfpci_voice_type_t type, int pair, ymfpci_voice_t **rvoice) 226 { 227 ymfpci_voice_t *voice, *voice2; 228 int idx; 229 230 *rvoice = NULL; 231 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) { 232 voice = &chip->voices[idx]; 233 voice2 = pair ? &chip->voices[idx+1] : NULL; 234 if (voice->use || (voice2 && voice2->use)) 235 continue; 236 voice->use = 1; 237 if (voice2) 238 voice2->use = 1; 239 switch (type) { 240 case YMFPCI_PCM: 241 voice->pcm = 1; 242 if (voice2) 243 voice2->pcm = 1; 244 break; 245 case YMFPCI_SYNTH: 246 voice->synth = 1; 247 break; 248 case YMFPCI_MIDI: 249 voice->midi = 1; 250 break; 251 } 252 snd_ymfpci_hw_start(chip); 253 if (voice2) 254 snd_ymfpci_hw_start(chip); 255 *rvoice = voice; 256 return 0; 257 } 258 return -ENOMEM; 259 } 260 261 static int snd_ymfpci_voice_alloc(ymfpci_t *chip, ymfpci_voice_type_t type, int pair, ymfpci_voice_t **rvoice) 262 { 263 unsigned long flags; 264 int result; 265 266 snd_assert(rvoice != NULL, return -EINVAL); 267 snd_assert(!pair || type == YMFPCI_PCM, return -EINVAL); 268 269 spin_lock_irqsave(&chip->voice_lock, flags); 270 for (;;) { 271 result = voice_alloc(chip, type, pair, rvoice); 272 if (result == 0 || type != YMFPCI_PCM) 273 break; 274 /* TODO: synth/midi voice deallocation */ 275 break; 276 } 277 spin_unlock_irqrestore(&chip->voice_lock, flags); 278 return result; 279 } 280 281 static int snd_ymfpci_voice_free(ymfpci_t *chip, ymfpci_voice_t *pvoice) 282 { 283 unsigned long flags; 284 285 snd_assert(pvoice != NULL, return -EINVAL); 286 snd_ymfpci_hw_stop(chip); 287 spin_lock_irqsave(&chip->voice_lock, flags); 288 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0; 289 pvoice->ypcm = NULL; 290 pvoice->interrupt = NULL; 291 spin_unlock_irqrestore(&chip->voice_lock, flags); 292 return 0; 293 } 294 295 /* 296 * PCM part 297 */ 298 299 static void snd_ymfpci_pcm_interrupt(ymfpci_t *chip, ymfpci_voice_t *voice) 300 { 301 ymfpci_pcm_t *ypcm; 302 u32 pos, delta; 303 304 if ((ypcm = voice->ypcm) == NULL) 305 return; 306 if (ypcm->substream == NULL) 307 return; 308 spin_lock(&chip->reg_lock); 309 if (ypcm->running) { 310 pos = le32_to_cpu(voice->bank[chip->active_bank].start); 311 if (pos < ypcm->last_pos) 312 delta = pos + (ypcm->buffer_size - ypcm->last_pos); 313 else 314 delta = pos - ypcm->last_pos; 315 ypcm->period_pos += delta; 316 ypcm->last_pos = pos; 317 if (ypcm->period_pos >= ypcm->period_size) { 318 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start); 319 ypcm->period_pos %= ypcm->period_size; 320 spin_unlock(&chip->reg_lock); 321 snd_pcm_period_elapsed(ypcm->substream); 322 spin_lock(&chip->reg_lock); 323 } 324 325 if (unlikely(ypcm->update_pcm_vol)) { 326 unsigned int subs = ypcm->substream->number; 327 unsigned int next_bank = 1 - chip->active_bank; 328 snd_ymfpci_playback_bank_t *bank; 329 u32 volume; 330 331 bank = &voice->bank[next_bank]; 332 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15); 333 bank->left_gain_end = volume; 334 if (ypcm->output_rear) 335 bank->eff2_gain_end = volume; 336 if (ypcm->voices[1]) 337 bank = &ypcm->voices[1]->bank[next_bank]; 338 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15); 339 bank->right_gain_end = volume; 340 if (ypcm->output_rear) 341 bank->eff3_gain_end = volume; 342 ypcm->update_pcm_vol--; 343 } 344 } 345 spin_unlock(&chip->reg_lock); 346 } 347 348 static void snd_ymfpci_pcm_capture_interrupt(snd_pcm_substream_t *substream) 349 { 350 snd_pcm_runtime_t *runtime = substream->runtime; 351 ymfpci_pcm_t *ypcm = runtime->private_data; 352 ymfpci_t *chip = ypcm->chip; 353 u32 pos, delta; 354 355 spin_lock(&chip->reg_lock); 356 if (ypcm->running) { 357 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; 358 if (pos < ypcm->last_pos) 359 delta = pos + (ypcm->buffer_size - ypcm->last_pos); 360 else 361 delta = pos - ypcm->last_pos; 362 ypcm->period_pos += delta; 363 ypcm->last_pos = pos; 364 if (ypcm->period_pos >= ypcm->period_size) { 365 ypcm->period_pos %= ypcm->period_size; 366 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start); 367 spin_unlock(&chip->reg_lock); 368 snd_pcm_period_elapsed(substream); 369 spin_lock(&chip->reg_lock); 370 } 371 } 372 spin_unlock(&chip->reg_lock); 373 } 374 375 static int snd_ymfpci_playback_trigger(snd_pcm_substream_t * substream, 376 int cmd) 377 { 378 ymfpci_t *chip = snd_pcm_substream_chip(substream); 379 ymfpci_pcm_t *ypcm = substream->runtime->private_data; 380 int result = 0; 381 382 spin_lock(&chip->reg_lock); 383 if (ypcm->voices[0] == NULL) { 384 result = -EINVAL; 385 goto __unlock; 386 } 387 switch (cmd) { 388 case SNDRV_PCM_TRIGGER_START: 389 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 390 case SNDRV_PCM_TRIGGER_RESUME: 391 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr); 392 if (ypcm->voices[1] != NULL) 393 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr); 394 ypcm->running = 1; 395 break; 396 case SNDRV_PCM_TRIGGER_STOP: 397 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 398 case SNDRV_PCM_TRIGGER_SUSPEND: 399 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0; 400 if (ypcm->voices[1] != NULL) 401 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0; 402 ypcm->running = 0; 403 break; 404 default: 405 result = -EINVAL; 406 break; 407 } 408 __unlock: 409 spin_unlock(&chip->reg_lock); 410 return result; 411 } 412 static int snd_ymfpci_capture_trigger(snd_pcm_substream_t * substream, 413 int cmd) 414 { 415 ymfpci_t *chip = snd_pcm_substream_chip(substream); 416 ymfpci_pcm_t *ypcm = substream->runtime->private_data; 417 int result = 0; 418 u32 tmp; 419 420 spin_lock(&chip->reg_lock); 421 switch (cmd) { 422 case SNDRV_PCM_TRIGGER_START: 423 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 424 case SNDRV_PCM_TRIGGER_RESUME: 425 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number); 426 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); 427 ypcm->running = 1; 428 break; 429 case SNDRV_PCM_TRIGGER_STOP: 430 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 431 case SNDRV_PCM_TRIGGER_SUSPEND: 432 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number); 433 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); 434 ypcm->running = 0; 435 break; 436 default: 437 result = -EINVAL; 438 break; 439 } 440 spin_unlock(&chip->reg_lock); 441 return result; 442 } 443 444 static int snd_ymfpci_pcm_voice_alloc(ymfpci_pcm_t *ypcm, int voices) 445 { 446 int err; 447 448 if (ypcm->voices[1] != NULL && voices < 2) { 449 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]); 450 ypcm->voices[1] = NULL; 451 } 452 if (voices == 1 && ypcm->voices[0] != NULL) 453 return 0; /* already allocated */ 454 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL) 455 return 0; /* already allocated */ 456 if (voices > 1) { 457 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) { 458 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]); 459 ypcm->voices[0] = NULL; 460 } 461 } 462 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]); 463 if (err < 0) 464 return err; 465 ypcm->voices[0]->ypcm = ypcm; 466 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt; 467 if (voices > 1) { 468 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1]; 469 ypcm->voices[1]->ypcm = ypcm; 470 } 471 return 0; 472 } 473 474 static void snd_ymfpci_pcm_init_voice(ymfpci_pcm_t *ypcm, unsigned int voiceidx, 475 snd_pcm_runtime_t *runtime, 476 int has_pcm_volume) 477 { 478 ymfpci_voice_t *voice = ypcm->voices[voiceidx]; 479 u32 format; 480 u32 delta = snd_ymfpci_calc_delta(runtime->rate); 481 u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate); 482 u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate); 483 snd_ymfpci_playback_bank_t *bank; 484 unsigned int nbank; 485 u32 vol_left, vol_right; 486 u8 use_left, use_right; 487 488 snd_assert(voice != NULL, return); 489 if (runtime->channels == 1) { 490 use_left = 1; 491 use_right = 1; 492 } else { 493 use_left = (voiceidx & 1) == 0; 494 use_right = !use_left; 495 } 496 if (has_pcm_volume) { 497 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer 498 [ypcm->substream->number].left << 15); 499 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer 500 [ypcm->substream->number].right << 15); 501 } else { 502 vol_left = cpu_to_le32(0x40000000); 503 vol_right = cpu_to_le32(0x40000000); 504 } 505 format = runtime->channels == 2 ? 0x00010000 : 0; 506 if (snd_pcm_format_width(runtime->format) == 8) 507 format |= 0x80000000; 508 if (runtime->channels == 2 && (voiceidx & 1) != 0) 509 format |= 1; 510 for (nbank = 0; nbank < 2; nbank++) { 511 bank = &voice->bank[nbank]; 512 memset(bank, 0, sizeof(*bank)); 513 bank->format = cpu_to_le32(format); 514 bank->base = cpu_to_le32(runtime->dma_addr); 515 bank->loop_end = cpu_to_le32(ypcm->buffer_size); 516 bank->lpfQ = cpu_to_le32(lpfQ); 517 bank->delta = 518 bank->delta_end = cpu_to_le32(delta); 519 bank->lpfK = 520 bank->lpfK_end = cpu_to_le32(lpfK); 521 bank->eg_gain = 522 bank->eg_gain_end = cpu_to_le32(0x40000000); 523 524 if (ypcm->output_front) { 525 if (use_left) { 526 bank->left_gain = 527 bank->left_gain_end = vol_left; 528 } 529 if (use_right) { 530 bank->right_gain = 531 bank->right_gain_end = vol_right; 532 } 533 } 534 if (ypcm->output_rear) { 535 if (use_left) { 536 bank->eff2_gain = 537 bank->eff2_gain_end = vol_left; 538 } 539 if (use_right) { 540 bank->eff3_gain = 541 bank->eff3_gain_end = vol_right; 542 } 543 } 544 } 545 } 546 547 static int __devinit snd_ymfpci_ac3_init(ymfpci_t *chip) 548 { 549 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 550 4096, &chip->ac3_tmp_base) < 0) 551 return -ENOMEM; 552 553 chip->bank_effect[3][0]->base = 554 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr); 555 chip->bank_effect[3][0]->loop_end = 556 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024); 557 chip->bank_effect[4][0]->base = 558 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048); 559 chip->bank_effect[4][0]->loop_end = 560 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024); 561 562 spin_lock_irq(&chip->reg_lock); 563 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 564 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3); 565 spin_unlock_irq(&chip->reg_lock); 566 return 0; 567 } 568 569 static int snd_ymfpci_ac3_done(ymfpci_t *chip) 570 { 571 spin_lock_irq(&chip->reg_lock); 572 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 573 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3)); 574 spin_unlock_irq(&chip->reg_lock); 575 // snd_ymfpci_irq_wait(chip); 576 if (chip->ac3_tmp_base.area) { 577 snd_dma_free_pages(&chip->ac3_tmp_base); 578 chip->ac3_tmp_base.area = NULL; 579 } 580 return 0; 581 } 582 583 static int snd_ymfpci_playback_hw_params(snd_pcm_substream_t * substream, 584 snd_pcm_hw_params_t * hw_params) 585 { 586 snd_pcm_runtime_t *runtime = substream->runtime; 587 ymfpci_pcm_t *ypcm = runtime->private_data; 588 int err; 589 590 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0) 591 return err; 592 if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0) 593 return err; 594 return 0; 595 } 596 597 static int snd_ymfpci_playback_hw_free(snd_pcm_substream_t * substream) 598 { 599 ymfpci_t *chip = snd_pcm_substream_chip(substream); 600 snd_pcm_runtime_t *runtime = substream->runtime; 601 ymfpci_pcm_t *ypcm; 602 603 if (runtime->private_data == NULL) 604 return 0; 605 ypcm = runtime->private_data; 606 607 /* wait, until the PCI operations are not finished */ 608 snd_ymfpci_irq_wait(chip); 609 snd_pcm_lib_free_pages(substream); 610 if (ypcm->voices[1]) { 611 snd_ymfpci_voice_free(chip, ypcm->voices[1]); 612 ypcm->voices[1] = NULL; 613 } 614 if (ypcm->voices[0]) { 615 snd_ymfpci_voice_free(chip, ypcm->voices[0]); 616 ypcm->voices[0] = NULL; 617 } 618 return 0; 619 } 620 621 static int snd_ymfpci_playback_prepare(snd_pcm_substream_t * substream) 622 { 623 ymfpci_t *chip = snd_pcm_substream_chip(substream); 624 snd_pcm_runtime_t *runtime = substream->runtime; 625 ymfpci_pcm_t *ypcm = runtime->private_data; 626 unsigned int nvoice; 627 628 ypcm->period_size = runtime->period_size; 629 ypcm->buffer_size = runtime->buffer_size; 630 ypcm->period_pos = 0; 631 ypcm->last_pos = 0; 632 for (nvoice = 0; nvoice < runtime->channels; nvoice++) 633 snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime, 634 substream->pcm == chip->pcm); 635 return 0; 636 } 637 638 static int snd_ymfpci_capture_hw_params(snd_pcm_substream_t * substream, 639 snd_pcm_hw_params_t * hw_params) 640 { 641 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 642 } 643 644 static int snd_ymfpci_capture_hw_free(snd_pcm_substream_t * substream) 645 { 646 ymfpci_t *chip = snd_pcm_substream_chip(substream); 647 648 /* wait, until the PCI operations are not finished */ 649 snd_ymfpci_irq_wait(chip); 650 return snd_pcm_lib_free_pages(substream); 651 } 652 653 static int snd_ymfpci_capture_prepare(snd_pcm_substream_t * substream) 654 { 655 ymfpci_t *chip = snd_pcm_substream_chip(substream); 656 snd_pcm_runtime_t *runtime = substream->runtime; 657 ymfpci_pcm_t *ypcm = runtime->private_data; 658 snd_ymfpci_capture_bank_t * bank; 659 int nbank; 660 u32 rate, format; 661 662 ypcm->period_size = runtime->period_size; 663 ypcm->buffer_size = runtime->buffer_size; 664 ypcm->period_pos = 0; 665 ypcm->last_pos = 0; 666 ypcm->shift = 0; 667 rate = ((48000 * 4096) / runtime->rate) - 1; 668 format = 0; 669 if (runtime->channels == 2) { 670 format |= 2; 671 ypcm->shift++; 672 } 673 if (snd_pcm_format_width(runtime->format) == 8) 674 format |= 1; 675 else 676 ypcm->shift++; 677 switch (ypcm->capture_bank_number) { 678 case 0: 679 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format); 680 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate); 681 break; 682 case 1: 683 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format); 684 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate); 685 break; 686 } 687 for (nbank = 0; nbank < 2; nbank++) { 688 bank = chip->bank_capture[ypcm->capture_bank_number][nbank]; 689 bank->base = cpu_to_le32(runtime->dma_addr); 690 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift); 691 bank->start = 0; 692 bank->num_of_loops = 0; 693 } 694 return 0; 695 } 696 697 static snd_pcm_uframes_t snd_ymfpci_playback_pointer(snd_pcm_substream_t * substream) 698 { 699 ymfpci_t *chip = snd_pcm_substream_chip(substream); 700 snd_pcm_runtime_t *runtime = substream->runtime; 701 ymfpci_pcm_t *ypcm = runtime->private_data; 702 ymfpci_voice_t *voice = ypcm->voices[0]; 703 704 if (!(ypcm->running && voice)) 705 return 0; 706 return le32_to_cpu(voice->bank[chip->active_bank].start); 707 } 708 709 static snd_pcm_uframes_t snd_ymfpci_capture_pointer(snd_pcm_substream_t * substream) 710 { 711 ymfpci_t *chip = snd_pcm_substream_chip(substream); 712 snd_pcm_runtime_t *runtime = substream->runtime; 713 ymfpci_pcm_t *ypcm = runtime->private_data; 714 715 if (!ypcm->running) 716 return 0; 717 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; 718 } 719 720 static void snd_ymfpci_irq_wait(ymfpci_t *chip) 721 { 722 wait_queue_t wait; 723 int loops = 4; 724 725 while (loops-- > 0) { 726 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0) 727 continue; 728 init_waitqueue_entry(&wait, current); 729 add_wait_queue(&chip->interrupt_sleep, &wait); 730 atomic_inc(&chip->interrupt_sleep_count); 731 set_current_state(TASK_UNINTERRUPTIBLE); 732 schedule_timeout(HZ/20); 733 remove_wait_queue(&chip->interrupt_sleep, &wait); 734 } 735 } 736 737 static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id, struct pt_regs *regs) 738 { 739 ymfpci_t *chip = dev_id; 740 u32 status, nvoice, mode; 741 ymfpci_voice_t *voice; 742 743 status = snd_ymfpci_readl(chip, YDSXGR_STATUS); 744 if (status & 0x80000000) { 745 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; 746 spin_lock(&chip->voice_lock); 747 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) { 748 voice = &chip->voices[nvoice]; 749 if (voice->interrupt) 750 voice->interrupt(chip, voice); 751 } 752 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) { 753 if (chip->capture_substream[nvoice]) 754 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]); 755 } 756 #if 0 757 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) { 758 if (chip->effect_substream[nvoice]) 759 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]); 760 } 761 #endif 762 spin_unlock(&chip->voice_lock); 763 spin_lock(&chip->reg_lock); 764 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000); 765 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2; 766 snd_ymfpci_writel(chip, YDSXGR_MODE, mode); 767 spin_unlock(&chip->reg_lock); 768 769 if (atomic_read(&chip->interrupt_sleep_count)) { 770 atomic_set(&chip->interrupt_sleep_count, 0); 771 wake_up(&chip->interrupt_sleep); 772 } 773 } 774 775 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG); 776 if (status & 1) { 777 if (chip->timer) 778 snd_timer_interrupt(chip->timer, chip->timer->sticks); 779 } 780 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status); 781 782 if (chip->rawmidi) 783 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data, regs); 784 return IRQ_HANDLED; 785 } 786 787 static snd_pcm_hardware_t snd_ymfpci_playback = 788 { 789 .info = (SNDRV_PCM_INFO_MMAP | 790 SNDRV_PCM_INFO_MMAP_VALID | 791 SNDRV_PCM_INFO_INTERLEAVED | 792 SNDRV_PCM_INFO_BLOCK_TRANSFER | 793 SNDRV_PCM_INFO_PAUSE | 794 SNDRV_PCM_INFO_RESUME), 795 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 796 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 797 .rate_min = 8000, 798 .rate_max = 48000, 799 .channels_min = 1, 800 .channels_max = 2, 801 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */ 802 .period_bytes_min = 64, 803 .period_bytes_max = 256 * 1024, /* FIXME: enough? */ 804 .periods_min = 3, 805 .periods_max = 1024, 806 .fifo_size = 0, 807 }; 808 809 static snd_pcm_hardware_t snd_ymfpci_capture = 810 { 811 .info = (SNDRV_PCM_INFO_MMAP | 812 SNDRV_PCM_INFO_MMAP_VALID | 813 SNDRV_PCM_INFO_INTERLEAVED | 814 SNDRV_PCM_INFO_BLOCK_TRANSFER | 815 SNDRV_PCM_INFO_PAUSE | 816 SNDRV_PCM_INFO_RESUME), 817 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 818 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 819 .rate_min = 8000, 820 .rate_max = 48000, 821 .channels_min = 1, 822 .channels_max = 2, 823 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */ 824 .period_bytes_min = 64, 825 .period_bytes_max = 256 * 1024, /* FIXME: enough? */ 826 .periods_min = 3, 827 .periods_max = 1024, 828 .fifo_size = 0, 829 }; 830 831 static void snd_ymfpci_pcm_free_substream(snd_pcm_runtime_t *runtime) 832 { 833 kfree(runtime->private_data); 834 } 835 836 static int snd_ymfpci_playback_open_1(snd_pcm_substream_t * substream) 837 { 838 ymfpci_t *chip = snd_pcm_substream_chip(substream); 839 snd_pcm_runtime_t *runtime = substream->runtime; 840 ymfpci_pcm_t *ypcm; 841 842 ypcm = kcalloc(1, sizeof(*ypcm), GFP_KERNEL); 843 if (ypcm == NULL) 844 return -ENOMEM; 845 ypcm->chip = chip; 846 ypcm->type = PLAYBACK_VOICE; 847 ypcm->substream = substream; 848 runtime->hw = snd_ymfpci_playback; 849 runtime->private_data = ypcm; 850 runtime->private_free = snd_ymfpci_pcm_free_substream; 851 /* FIXME? True value is 256/48 = 5.33333 ms */ 852 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX); 853 return 0; 854 } 855 856 /* call with spinlock held */ 857 static void ymfpci_open_extension(ymfpci_t *chip) 858 { 859 if (! chip->rear_opened) { 860 if (! chip->spdif_opened) /* set AC3 */ 861 snd_ymfpci_writel(chip, YDSXGR_MODE, 862 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30)); 863 /* enable second codec (4CHEN) */ 864 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, 865 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010); 866 } 867 } 868 869 /* call with spinlock held */ 870 static void ymfpci_close_extension(ymfpci_t *chip) 871 { 872 if (! chip->rear_opened) { 873 if (! chip->spdif_opened) 874 snd_ymfpci_writel(chip, YDSXGR_MODE, 875 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30)); 876 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, 877 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010); 878 } 879 } 880 881 static int snd_ymfpci_playback_open(snd_pcm_substream_t * substream) 882 { 883 ymfpci_t *chip = snd_pcm_substream_chip(substream); 884 snd_pcm_runtime_t *runtime = substream->runtime; 885 ymfpci_pcm_t *ypcm; 886 snd_kcontrol_t *kctl; 887 int err; 888 889 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 890 return err; 891 ypcm = runtime->private_data; 892 ypcm->output_front = 1; 893 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0; 894 spin_lock_irq(&chip->reg_lock); 895 if (ypcm->output_rear) { 896 ymfpci_open_extension(chip); 897 chip->rear_opened++; 898 } 899 spin_unlock_irq(&chip->reg_lock); 900 901 kctl = chip->pcm_mixer[substream->number].ctl; 902 kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 903 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id); 904 return 0; 905 } 906 907 static int snd_ymfpci_playback_spdif_open(snd_pcm_substream_t * substream) 908 { 909 ymfpci_t *chip = snd_pcm_substream_chip(substream); 910 snd_pcm_runtime_t *runtime = substream->runtime; 911 ymfpci_pcm_t *ypcm; 912 int err; 913 914 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 915 return err; 916 ypcm = runtime->private_data; 917 ypcm->output_front = 0; 918 ypcm->output_rear = 1; 919 spin_lock_irq(&chip->reg_lock); 920 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 921 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2); 922 ymfpci_open_extension(chip); 923 chip->spdif_pcm_bits = chip->spdif_bits; 924 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); 925 chip->spdif_opened++; 926 spin_unlock_irq(&chip->reg_lock); 927 928 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 929 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | 930 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); 931 return 0; 932 } 933 934 static int snd_ymfpci_playback_4ch_open(snd_pcm_substream_t * substream) 935 { 936 ymfpci_t *chip = snd_pcm_substream_chip(substream); 937 snd_pcm_runtime_t *runtime = substream->runtime; 938 ymfpci_pcm_t *ypcm; 939 int err; 940 941 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 942 return err; 943 ypcm = runtime->private_data; 944 ypcm->output_front = 0; 945 ypcm->output_rear = 1; 946 spin_lock_irq(&chip->reg_lock); 947 ymfpci_open_extension(chip); 948 chip->rear_opened++; 949 spin_unlock_irq(&chip->reg_lock); 950 return 0; 951 } 952 953 static int snd_ymfpci_capture_open(snd_pcm_substream_t * substream, 954 u32 capture_bank_number) 955 { 956 ymfpci_t *chip = snd_pcm_substream_chip(substream); 957 snd_pcm_runtime_t *runtime = substream->runtime; 958 ymfpci_pcm_t *ypcm; 959 960 ypcm = kcalloc(1, sizeof(*ypcm), GFP_KERNEL); 961 if (ypcm == NULL) 962 return -ENOMEM; 963 ypcm->chip = chip; 964 ypcm->type = capture_bank_number + CAPTURE_REC; 965 ypcm->substream = substream; 966 ypcm->capture_bank_number = capture_bank_number; 967 chip->capture_substream[capture_bank_number] = substream; 968 runtime->hw = snd_ymfpci_capture; 969 /* FIXME? True value is 256/48 = 5.33333 ms */ 970 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX); 971 runtime->private_data = ypcm; 972 runtime->private_free = snd_ymfpci_pcm_free_substream; 973 snd_ymfpci_hw_start(chip); 974 return 0; 975 } 976 977 static int snd_ymfpci_capture_rec_open(snd_pcm_substream_t * substream) 978 { 979 return snd_ymfpci_capture_open(substream, 0); 980 } 981 982 static int snd_ymfpci_capture_ac97_open(snd_pcm_substream_t * substream) 983 { 984 return snd_ymfpci_capture_open(substream, 1); 985 } 986 987 static int snd_ymfpci_playback_close_1(snd_pcm_substream_t * substream) 988 { 989 return 0; 990 } 991 992 static int snd_ymfpci_playback_close(snd_pcm_substream_t * substream) 993 { 994 ymfpci_t *chip = snd_pcm_substream_chip(substream); 995 ymfpci_pcm_t *ypcm = substream->runtime->private_data; 996 snd_kcontrol_t *kctl; 997 998 spin_lock_irq(&chip->reg_lock); 999 if (ypcm->output_rear && chip->rear_opened > 0) { 1000 chip->rear_opened--; 1001 ymfpci_close_extension(chip); 1002 } 1003 spin_unlock_irq(&chip->reg_lock); 1004 kctl = chip->pcm_mixer[substream->number].ctl; 1005 kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 1006 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id); 1007 return snd_ymfpci_playback_close_1(substream); 1008 } 1009 1010 static int snd_ymfpci_playback_spdif_close(snd_pcm_substream_t * substream) 1011 { 1012 ymfpci_t *chip = snd_pcm_substream_chip(substream); 1013 1014 spin_lock_irq(&chip->reg_lock); 1015 chip->spdif_opened = 0; 1016 ymfpci_close_extension(chip); 1017 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 1018 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2); 1019 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 1020 spin_unlock_irq(&chip->reg_lock); 1021 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 1022 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | 1023 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); 1024 return snd_ymfpci_playback_close_1(substream); 1025 } 1026 1027 static int snd_ymfpci_playback_4ch_close(snd_pcm_substream_t * substream) 1028 { 1029 ymfpci_t *chip = snd_pcm_substream_chip(substream); 1030 1031 spin_lock_irq(&chip->reg_lock); 1032 if (chip->rear_opened > 0) { 1033 chip->rear_opened--; 1034 ymfpci_close_extension(chip); 1035 } 1036 spin_unlock_irq(&chip->reg_lock); 1037 return snd_ymfpci_playback_close_1(substream); 1038 } 1039 1040 static int snd_ymfpci_capture_close(snd_pcm_substream_t * substream) 1041 { 1042 ymfpci_t *chip = snd_pcm_substream_chip(substream); 1043 snd_pcm_runtime_t *runtime = substream->runtime; 1044 ymfpci_pcm_t *ypcm = runtime->private_data; 1045 1046 if (ypcm != NULL) { 1047 chip->capture_substream[ypcm->capture_bank_number] = NULL; 1048 snd_ymfpci_hw_stop(chip); 1049 } 1050 return 0; 1051 } 1052 1053 static snd_pcm_ops_t snd_ymfpci_playback_ops = { 1054 .open = snd_ymfpci_playback_open, 1055 .close = snd_ymfpci_playback_close, 1056 .ioctl = snd_pcm_lib_ioctl, 1057 .hw_params = snd_ymfpci_playback_hw_params, 1058 .hw_free = snd_ymfpci_playback_hw_free, 1059 .prepare = snd_ymfpci_playback_prepare, 1060 .trigger = snd_ymfpci_playback_trigger, 1061 .pointer = snd_ymfpci_playback_pointer, 1062 }; 1063 1064 static snd_pcm_ops_t snd_ymfpci_capture_rec_ops = { 1065 .open = snd_ymfpci_capture_rec_open, 1066 .close = snd_ymfpci_capture_close, 1067 .ioctl = snd_pcm_lib_ioctl, 1068 .hw_params = snd_ymfpci_capture_hw_params, 1069 .hw_free = snd_ymfpci_capture_hw_free, 1070 .prepare = snd_ymfpci_capture_prepare, 1071 .trigger = snd_ymfpci_capture_trigger, 1072 .pointer = snd_ymfpci_capture_pointer, 1073 }; 1074 1075 static void snd_ymfpci_pcm_free(snd_pcm_t *pcm) 1076 { 1077 ymfpci_t *chip = pcm->private_data; 1078 chip->pcm = NULL; 1079 snd_pcm_lib_preallocate_free_for_all(pcm); 1080 } 1081 1082 int __devinit snd_ymfpci_pcm(ymfpci_t *chip, int device, snd_pcm_t ** rpcm) 1083 { 1084 snd_pcm_t *pcm; 1085 int err; 1086 1087 if (rpcm) 1088 *rpcm = NULL; 1089 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0) 1090 return err; 1091 pcm->private_data = chip; 1092 pcm->private_free = snd_ymfpci_pcm_free; 1093 1094 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops); 1095 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops); 1096 1097 /* global setup */ 1098 pcm->info_flags = 0; 1099 strcpy(pcm->name, "YMFPCI"); 1100 chip->pcm = pcm; 1101 1102 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1103 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1104 1105 if (rpcm) 1106 *rpcm = pcm; 1107 return 0; 1108 } 1109 1110 static snd_pcm_ops_t snd_ymfpci_capture_ac97_ops = { 1111 .open = snd_ymfpci_capture_ac97_open, 1112 .close = snd_ymfpci_capture_close, 1113 .ioctl = snd_pcm_lib_ioctl, 1114 .hw_params = snd_ymfpci_capture_hw_params, 1115 .hw_free = snd_ymfpci_capture_hw_free, 1116 .prepare = snd_ymfpci_capture_prepare, 1117 .trigger = snd_ymfpci_capture_trigger, 1118 .pointer = snd_ymfpci_capture_pointer, 1119 }; 1120 1121 static void snd_ymfpci_pcm2_free(snd_pcm_t *pcm) 1122 { 1123 ymfpci_t *chip = pcm->private_data; 1124 chip->pcm2 = NULL; 1125 snd_pcm_lib_preallocate_free_for_all(pcm); 1126 } 1127 1128 int __devinit snd_ymfpci_pcm2(ymfpci_t *chip, int device, snd_pcm_t ** rpcm) 1129 { 1130 snd_pcm_t *pcm; 1131 int err; 1132 1133 if (rpcm) 1134 *rpcm = NULL; 1135 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0) 1136 return err; 1137 pcm->private_data = chip; 1138 pcm->private_free = snd_ymfpci_pcm2_free; 1139 1140 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops); 1141 1142 /* global setup */ 1143 pcm->info_flags = 0; 1144 sprintf(pcm->name, "YMFPCI - %s", 1145 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97"); 1146 chip->pcm2 = pcm; 1147 1148 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1149 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1150 1151 if (rpcm) 1152 *rpcm = pcm; 1153 return 0; 1154 } 1155 1156 static snd_pcm_ops_t snd_ymfpci_playback_spdif_ops = { 1157 .open = snd_ymfpci_playback_spdif_open, 1158 .close = snd_ymfpci_playback_spdif_close, 1159 .ioctl = snd_pcm_lib_ioctl, 1160 .hw_params = snd_ymfpci_playback_hw_params, 1161 .hw_free = snd_ymfpci_playback_hw_free, 1162 .prepare = snd_ymfpci_playback_prepare, 1163 .trigger = snd_ymfpci_playback_trigger, 1164 .pointer = snd_ymfpci_playback_pointer, 1165 }; 1166 1167 static void snd_ymfpci_pcm_spdif_free(snd_pcm_t *pcm) 1168 { 1169 ymfpci_t *chip = pcm->private_data; 1170 chip->pcm_spdif = NULL; 1171 snd_pcm_lib_preallocate_free_for_all(pcm); 1172 } 1173 1174 int __devinit snd_ymfpci_pcm_spdif(ymfpci_t *chip, int device, snd_pcm_t ** rpcm) 1175 { 1176 snd_pcm_t *pcm; 1177 int err; 1178 1179 if (rpcm) 1180 *rpcm = NULL; 1181 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0) 1182 return err; 1183 pcm->private_data = chip; 1184 pcm->private_free = snd_ymfpci_pcm_spdif_free; 1185 1186 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops); 1187 1188 /* global setup */ 1189 pcm->info_flags = 0; 1190 strcpy(pcm->name, "YMFPCI - IEC958"); 1191 chip->pcm_spdif = pcm; 1192 1193 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1194 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1195 1196 if (rpcm) 1197 *rpcm = pcm; 1198 return 0; 1199 } 1200 1201 static snd_pcm_ops_t snd_ymfpci_playback_4ch_ops = { 1202 .open = snd_ymfpci_playback_4ch_open, 1203 .close = snd_ymfpci_playback_4ch_close, 1204 .ioctl = snd_pcm_lib_ioctl, 1205 .hw_params = snd_ymfpci_playback_hw_params, 1206 .hw_free = snd_ymfpci_playback_hw_free, 1207 .prepare = snd_ymfpci_playback_prepare, 1208 .trigger = snd_ymfpci_playback_trigger, 1209 .pointer = snd_ymfpci_playback_pointer, 1210 }; 1211 1212 static void snd_ymfpci_pcm_4ch_free(snd_pcm_t *pcm) 1213 { 1214 ymfpci_t *chip = pcm->private_data; 1215 chip->pcm_4ch = NULL; 1216 snd_pcm_lib_preallocate_free_for_all(pcm); 1217 } 1218 1219 int __devinit snd_ymfpci_pcm_4ch(ymfpci_t *chip, int device, snd_pcm_t ** rpcm) 1220 { 1221 snd_pcm_t *pcm; 1222 int err; 1223 1224 if (rpcm) 1225 *rpcm = NULL; 1226 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0) 1227 return err; 1228 pcm->private_data = chip; 1229 pcm->private_free = snd_ymfpci_pcm_4ch_free; 1230 1231 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops); 1232 1233 /* global setup */ 1234 pcm->info_flags = 0; 1235 strcpy(pcm->name, "YMFPCI - Rear PCM"); 1236 chip->pcm_4ch = pcm; 1237 1238 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1239 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1240 1241 if (rpcm) 1242 *rpcm = pcm; 1243 return 0; 1244 } 1245 1246 static int snd_ymfpci_spdif_default_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 1247 { 1248 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1249 uinfo->count = 1; 1250 return 0; 1251 } 1252 1253 static int snd_ymfpci_spdif_default_get(snd_kcontrol_t * kcontrol, 1254 snd_ctl_elem_value_t * ucontrol) 1255 { 1256 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1257 1258 spin_lock_irq(&chip->reg_lock); 1259 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff; 1260 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff; 1261 spin_unlock_irq(&chip->reg_lock); 1262 return 0; 1263 } 1264 1265 static int snd_ymfpci_spdif_default_put(snd_kcontrol_t * kcontrol, 1266 snd_ctl_elem_value_t * ucontrol) 1267 { 1268 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1269 unsigned int val; 1270 int change; 1271 1272 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) | 1273 (ucontrol->value.iec958.status[1] << 8); 1274 spin_lock_irq(&chip->reg_lock); 1275 change = chip->spdif_bits != val; 1276 chip->spdif_bits = val; 1277 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL) 1278 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 1279 spin_unlock_irq(&chip->reg_lock); 1280 return change; 1281 } 1282 1283 static snd_kcontrol_new_t snd_ymfpci_spdif_default __devinitdata = 1284 { 1285 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1286 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 1287 .info = snd_ymfpci_spdif_default_info, 1288 .get = snd_ymfpci_spdif_default_get, 1289 .put = snd_ymfpci_spdif_default_put 1290 }; 1291 1292 static int snd_ymfpci_spdif_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 1293 { 1294 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1295 uinfo->count = 1; 1296 return 0; 1297 } 1298 1299 static int snd_ymfpci_spdif_mask_get(snd_kcontrol_t * kcontrol, 1300 snd_ctl_elem_value_t * ucontrol) 1301 { 1302 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1303 1304 spin_lock_irq(&chip->reg_lock); 1305 ucontrol->value.iec958.status[0] = 0x3e; 1306 ucontrol->value.iec958.status[1] = 0xff; 1307 spin_unlock_irq(&chip->reg_lock); 1308 return 0; 1309 } 1310 1311 static snd_kcontrol_new_t snd_ymfpci_spdif_mask __devinitdata = 1312 { 1313 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1314 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1315 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 1316 .info = snd_ymfpci_spdif_mask_info, 1317 .get = snd_ymfpci_spdif_mask_get, 1318 }; 1319 1320 static int snd_ymfpci_spdif_stream_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 1321 { 1322 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1323 uinfo->count = 1; 1324 return 0; 1325 } 1326 1327 static int snd_ymfpci_spdif_stream_get(snd_kcontrol_t * kcontrol, 1328 snd_ctl_elem_value_t * ucontrol) 1329 { 1330 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1331 1332 spin_lock_irq(&chip->reg_lock); 1333 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff; 1334 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff; 1335 spin_unlock_irq(&chip->reg_lock); 1336 return 0; 1337 } 1338 1339 static int snd_ymfpci_spdif_stream_put(snd_kcontrol_t * kcontrol, 1340 snd_ctl_elem_value_t * ucontrol) 1341 { 1342 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1343 unsigned int val; 1344 int change; 1345 1346 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) | 1347 (ucontrol->value.iec958.status[1] << 8); 1348 spin_lock_irq(&chip->reg_lock); 1349 change = chip->spdif_pcm_bits != val; 1350 chip->spdif_pcm_bits = val; 1351 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2)) 1352 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); 1353 spin_unlock_irq(&chip->reg_lock); 1354 return change; 1355 } 1356 1357 static snd_kcontrol_new_t snd_ymfpci_spdif_stream __devinitdata = 1358 { 1359 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1360 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1361 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 1362 .info = snd_ymfpci_spdif_stream_info, 1363 .get = snd_ymfpci_spdif_stream_get, 1364 .put = snd_ymfpci_spdif_stream_put 1365 }; 1366 1367 static int snd_ymfpci_drec_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info) 1368 { 1369 static char *texts[3] = {"AC'97", "IEC958", "ZV Port"}; 1370 1371 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1372 info->count = 1; 1373 info->value.enumerated.items = 3; 1374 if (info->value.enumerated.item > 2) 1375 info->value.enumerated.item = 2; 1376 strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]); 1377 return 0; 1378 } 1379 1380 static int snd_ymfpci_drec_source_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value) 1381 { 1382 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1383 u16 reg; 1384 1385 spin_lock_irq(&chip->reg_lock); 1386 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 1387 spin_unlock_irq(&chip->reg_lock); 1388 if (!(reg & 0x100)) 1389 value->value.enumerated.item[0] = 0; 1390 else 1391 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0); 1392 return 0; 1393 } 1394 1395 static int snd_ymfpci_drec_source_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value) 1396 { 1397 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1398 u16 reg, old_reg; 1399 1400 spin_lock_irq(&chip->reg_lock); 1401 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 1402 if (value->value.enumerated.item[0] == 0) 1403 reg = old_reg & ~0x100; 1404 else 1405 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9); 1406 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg); 1407 spin_unlock_irq(&chip->reg_lock); 1408 return reg != old_reg; 1409 } 1410 1411 static snd_kcontrol_new_t snd_ymfpci_drec_source __devinitdata = { 1412 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, 1413 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1414 .name = "Direct Recording Source", 1415 .info = snd_ymfpci_drec_source_info, 1416 .get = snd_ymfpci_drec_source_get, 1417 .put = snd_ymfpci_drec_source_put 1418 }; 1419 1420 /* 1421 * Mixer controls 1422 */ 1423 1424 #define YMFPCI_SINGLE(xname, xindex, reg) \ 1425 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1426 .info = snd_ymfpci_info_single, \ 1427 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \ 1428 .private_value = reg } 1429 1430 static int snd_ymfpci_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 1431 { 1432 switch (kcontrol->private_value) { 1433 case YDSXGR_SPDIFOUTCTRL: break; 1434 case YDSXGR_SPDIFINCTRL: break; 1435 default: return -EINVAL; 1436 } 1437 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1438 uinfo->count = 1; 1439 uinfo->value.integer.min = 0; 1440 uinfo->value.integer.max = 1; 1441 return 0; 1442 } 1443 1444 static int snd_ymfpci_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1445 { 1446 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1447 int reg = kcontrol->private_value; 1448 unsigned int shift = 0, mask = 1; 1449 1450 switch (kcontrol->private_value) { 1451 case YDSXGR_SPDIFOUTCTRL: break; 1452 case YDSXGR_SPDIFINCTRL: break; 1453 default: return -EINVAL; 1454 } 1455 ucontrol->value.integer.value[0] = (snd_ymfpci_readl(chip, reg) >> shift) & mask; 1456 return 0; 1457 } 1458 1459 static int snd_ymfpci_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1460 { 1461 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1462 int reg = kcontrol->private_value; 1463 unsigned int shift = 0, mask = 1; 1464 int change; 1465 unsigned int val, oval; 1466 1467 switch (kcontrol->private_value) { 1468 case YDSXGR_SPDIFOUTCTRL: break; 1469 case YDSXGR_SPDIFINCTRL: break; 1470 default: return -EINVAL; 1471 } 1472 val = (ucontrol->value.integer.value[0] & mask); 1473 val <<= shift; 1474 spin_lock_irq(&chip->reg_lock); 1475 oval = snd_ymfpci_readl(chip, reg); 1476 val = (oval & ~(mask << shift)) | val; 1477 change = val != oval; 1478 snd_ymfpci_writel(chip, reg, val); 1479 spin_unlock_irq(&chip->reg_lock); 1480 return change; 1481 } 1482 1483 #define YMFPCI_DOUBLE(xname, xindex, reg) \ 1484 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1485 .info = snd_ymfpci_info_double, \ 1486 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \ 1487 .private_value = reg } 1488 1489 static int snd_ymfpci_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 1490 { 1491 unsigned int reg = kcontrol->private_value; 1492 1493 if (reg < 0x80 || reg >= 0xc0) 1494 return -EINVAL; 1495 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1496 uinfo->count = 2; 1497 uinfo->value.integer.min = 0; 1498 uinfo->value.integer.max = 16383; 1499 return 0; 1500 } 1501 1502 static int snd_ymfpci_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1503 { 1504 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1505 unsigned int reg = kcontrol->private_value; 1506 unsigned int shift_left = 0, shift_right = 16, mask = 16383; 1507 unsigned int val; 1508 1509 if (reg < 0x80 || reg >= 0xc0) 1510 return -EINVAL; 1511 spin_lock_irq(&chip->reg_lock); 1512 val = snd_ymfpci_readl(chip, reg); 1513 spin_unlock_irq(&chip->reg_lock); 1514 ucontrol->value.integer.value[0] = (val >> shift_left) & mask; 1515 ucontrol->value.integer.value[1] = (val >> shift_right) & mask; 1516 return 0; 1517 } 1518 1519 static int snd_ymfpci_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1520 { 1521 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1522 unsigned int reg = kcontrol->private_value; 1523 unsigned int shift_left = 0, shift_right = 16, mask = 16383; 1524 int change; 1525 unsigned int val1, val2, oval; 1526 1527 if (reg < 0x80 || reg >= 0xc0) 1528 return -EINVAL; 1529 val1 = ucontrol->value.integer.value[0] & mask; 1530 val2 = ucontrol->value.integer.value[1] & mask; 1531 val1 <<= shift_left; 1532 val2 <<= shift_right; 1533 spin_lock_irq(&chip->reg_lock); 1534 oval = snd_ymfpci_readl(chip, reg); 1535 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2; 1536 change = val1 != oval; 1537 snd_ymfpci_writel(chip, reg, val1); 1538 spin_unlock_irq(&chip->reg_lock); 1539 return change; 1540 } 1541 1542 /* 1543 * 4ch duplication 1544 */ 1545 static int snd_ymfpci_info_dup4ch(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 1546 { 1547 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1548 uinfo->count = 1; 1549 uinfo->value.integer.min = 0; 1550 uinfo->value.integer.max = 1; 1551 return 0; 1552 } 1553 1554 static int snd_ymfpci_get_dup4ch(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1555 { 1556 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1557 ucontrol->value.integer.value[0] = chip->mode_dup4ch; 1558 return 0; 1559 } 1560 1561 static int snd_ymfpci_put_dup4ch(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1562 { 1563 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1564 int change; 1565 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch); 1566 if (change) 1567 chip->mode_dup4ch = !!ucontrol->value.integer.value[0]; 1568 return change; 1569 } 1570 1571 1572 static snd_kcontrol_new_t snd_ymfpci_controls[] __devinitdata = { 1573 YMFPCI_DOUBLE("Wave Playback Volume", 0, YDSXGR_NATIVEDACOUTVOL), 1574 YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL), 1575 YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL), 1576 YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL), 1577 YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL), 1578 YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL), 1579 YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL), 1580 YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL), 1581 YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL), 1582 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL), 1583 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL), 1584 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL), 1585 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL), 1586 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL), 1587 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL), 1588 { 1589 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1590 .name = "4ch Duplication", 1591 .info = snd_ymfpci_info_dup4ch, 1592 .get = snd_ymfpci_get_dup4ch, 1593 .put = snd_ymfpci_put_dup4ch, 1594 }, 1595 }; 1596 1597 1598 /* 1599 * GPIO 1600 */ 1601 1602 static int snd_ymfpci_get_gpio_out(ymfpci_t *chip, int pin) 1603 { 1604 u16 reg, mode; 1605 unsigned long flags; 1606 1607 spin_lock_irqsave(&chip->reg_lock, flags); 1608 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); 1609 reg &= ~(1 << (pin + 8)); 1610 reg |= (1 << pin); 1611 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); 1612 /* set the level mode for input line */ 1613 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG); 1614 mode &= ~(3 << (pin * 2)); 1615 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode); 1616 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); 1617 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS); 1618 spin_unlock_irqrestore(&chip->reg_lock, flags); 1619 return (mode >> pin) & 1; 1620 } 1621 1622 static int snd_ymfpci_set_gpio_out(ymfpci_t *chip, int pin, int enable) 1623 { 1624 u16 reg; 1625 unsigned long flags; 1626 1627 spin_lock_irqsave(&chip->reg_lock, flags); 1628 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); 1629 reg &= ~(1 << pin); 1630 reg &= ~(1 << (pin + 8)); 1631 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); 1632 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin); 1633 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); 1634 spin_unlock_irqrestore(&chip->reg_lock, flags); 1635 1636 return 0; 1637 } 1638 1639 static int snd_ymfpci_gpio_sw_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo) 1640 { 1641 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1642 uinfo->count = 1; 1643 uinfo->value.integer.min = 0; 1644 uinfo->value.integer.max = 1; 1645 return 0; 1646 } 1647 1648 static int snd_ymfpci_gpio_sw_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 1649 { 1650 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1651 int pin = (int)kcontrol->private_value; 1652 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); 1653 return 0; 1654 } 1655 1656 static int snd_ymfpci_gpio_sw_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 1657 { 1658 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1659 int pin = (int)kcontrol->private_value; 1660 1661 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) { 1662 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]); 1663 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); 1664 return 1; 1665 } 1666 return 0; 1667 } 1668 1669 static snd_kcontrol_new_t snd_ymfpci_rear_shared __devinitdata = { 1670 .name = "Shared Rear/Line-In Switch", 1671 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1672 .info = snd_ymfpci_gpio_sw_info, 1673 .get = snd_ymfpci_gpio_sw_get, 1674 .put = snd_ymfpci_gpio_sw_put, 1675 .private_value = 2, 1676 }; 1677 1678 /* 1679 * PCM voice volume 1680 */ 1681 1682 static int snd_ymfpci_pcm_vol_info(snd_kcontrol_t *kcontrol, 1683 snd_ctl_elem_info_t *uinfo) 1684 { 1685 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1686 uinfo->count = 2; 1687 uinfo->value.integer.min = 0; 1688 uinfo->value.integer.max = 0x8000; 1689 return 0; 1690 } 1691 1692 static int snd_ymfpci_pcm_vol_get(snd_kcontrol_t *kcontrol, 1693 snd_ctl_elem_value_t *ucontrol) 1694 { 1695 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1696 unsigned int subs = kcontrol->id.subdevice; 1697 1698 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left; 1699 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right; 1700 return 0; 1701 } 1702 1703 static int snd_ymfpci_pcm_vol_put(snd_kcontrol_t *kcontrol, 1704 snd_ctl_elem_value_t *ucontrol) 1705 { 1706 ymfpci_t *chip = snd_kcontrol_chip(kcontrol); 1707 unsigned int subs = kcontrol->id.subdevice; 1708 snd_pcm_substream_t *substream; 1709 unsigned long flags; 1710 1711 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left || 1712 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) { 1713 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0]; 1714 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1]; 1715 1716 substream = (snd_pcm_substream_t *)kcontrol->private_value; 1717 spin_lock_irqsave(&chip->voice_lock, flags); 1718 if (substream->runtime && substream->runtime->private_data) { 1719 ymfpci_pcm_t *ypcm = substream->runtime->private_data; 1720 ypcm->update_pcm_vol = 2; 1721 } 1722 spin_unlock_irqrestore(&chip->voice_lock, flags); 1723 return 1; 1724 } 1725 return 0; 1726 } 1727 1728 static snd_kcontrol_new_t snd_ymfpci_pcm_volume __devinitdata = { 1729 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1730 .name = "PCM Playback Volume", 1731 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 1732 SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1733 .info = snd_ymfpci_pcm_vol_info, 1734 .get = snd_ymfpci_pcm_vol_get, 1735 .put = snd_ymfpci_pcm_vol_put, 1736 }; 1737 1738 1739 /* 1740 * Mixer routines 1741 */ 1742 1743 static void snd_ymfpci_mixer_free_ac97_bus(ac97_bus_t *bus) 1744 { 1745 ymfpci_t *chip = bus->private_data; 1746 chip->ac97_bus = NULL; 1747 } 1748 1749 static void snd_ymfpci_mixer_free_ac97(ac97_t *ac97) 1750 { 1751 ymfpci_t *chip = ac97->private_data; 1752 chip->ac97 = NULL; 1753 } 1754 1755 int __devinit snd_ymfpci_mixer(ymfpci_t *chip, int rear_switch) 1756 { 1757 ac97_template_t ac97; 1758 snd_kcontrol_t *kctl; 1759 snd_pcm_substream_t *substream; 1760 unsigned int idx; 1761 int err; 1762 static ac97_bus_ops_t ops = { 1763 .write = snd_ymfpci_codec_write, 1764 .read = snd_ymfpci_codec_read, 1765 }; 1766 1767 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) 1768 return err; 1769 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus; 1770 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */ 1771 1772 memset(&ac97, 0, sizeof(ac97)); 1773 ac97.private_data = chip; 1774 ac97.private_free = snd_ymfpci_mixer_free_ac97; 1775 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) 1776 return err; 1777 1778 /* to be sure */ 1779 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 1780 AC97_EA_VRA|AC97_EA_VRM, 0); 1781 1782 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) { 1783 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0) 1784 return err; 1785 } 1786 1787 /* add S/PDIF control */ 1788 snd_assert(chip->pcm_spdif != NULL, return -EIO); 1789 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0) 1790 return err; 1791 kctl->id.device = chip->pcm_spdif->device; 1792 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0) 1793 return err; 1794 kctl->id.device = chip->pcm_spdif->device; 1795 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0) 1796 return err; 1797 kctl->id.device = chip->pcm_spdif->device; 1798 chip->spdif_pcm_ctl = kctl; 1799 1800 /* direct recording source */ 1801 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 && 1802 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0) 1803 return err; 1804 1805 /* 1806 * shared rear/line-in 1807 */ 1808 if (rear_switch) { 1809 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0) 1810 return err; 1811 } 1812 1813 /* per-voice volume */ 1814 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; 1815 for (idx = 0; idx < 32; ++idx) { 1816 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip); 1817 if (!kctl) 1818 return -ENOMEM; 1819 kctl->id.device = chip->pcm->device; 1820 kctl->id.subdevice = idx; 1821 kctl->private_value = (unsigned long)substream; 1822 if ((err = snd_ctl_add(chip->card, kctl)) < 0) 1823 return err; 1824 chip->pcm_mixer[idx].left = 0x8000; 1825 chip->pcm_mixer[idx].right = 0x8000; 1826 chip->pcm_mixer[idx].ctl = kctl; 1827 substream = substream->next; 1828 } 1829 1830 return 0; 1831 } 1832 1833 1834 /* 1835 * timer 1836 */ 1837 1838 static int snd_ymfpci_timer_start(snd_timer_t *timer) 1839 { 1840 ymfpci_t *chip; 1841 unsigned long flags; 1842 unsigned int count; 1843 1844 chip = snd_timer_chip(timer); 1845 count = timer->sticks - 1; 1846 if (count == 0) /* minimum time is 20.8 us */ 1847 count = 1; 1848 spin_lock_irqsave(&chip->reg_lock, flags); 1849 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count); 1850 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03); 1851 spin_unlock_irqrestore(&chip->reg_lock, flags); 1852 return 0; 1853 } 1854 1855 static int snd_ymfpci_timer_stop(snd_timer_t *timer) 1856 { 1857 ymfpci_t *chip; 1858 unsigned long flags; 1859 1860 chip = snd_timer_chip(timer); 1861 spin_lock_irqsave(&chip->reg_lock, flags); 1862 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00); 1863 spin_unlock_irqrestore(&chip->reg_lock, flags); 1864 return 0; 1865 } 1866 1867 static int snd_ymfpci_timer_precise_resolution(snd_timer_t *timer, 1868 unsigned long *num, unsigned long *den) 1869 { 1870 *num = 1; 1871 *den = 96000; 1872 return 0; 1873 } 1874 1875 static struct _snd_timer_hardware snd_ymfpci_timer_hw = { 1876 .flags = SNDRV_TIMER_HW_AUTO, 1877 .resolution = 10417, /* 1/2fs = 10.41666...us */ 1878 .ticks = 65536, 1879 .start = snd_ymfpci_timer_start, 1880 .stop = snd_ymfpci_timer_stop, 1881 .precise_resolution = snd_ymfpci_timer_precise_resolution, 1882 }; 1883 1884 int __devinit snd_ymfpci_timer(ymfpci_t *chip, int device) 1885 { 1886 snd_timer_t *timer = NULL; 1887 snd_timer_id_t tid; 1888 int err; 1889 1890 tid.dev_class = SNDRV_TIMER_CLASS_CARD; 1891 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; 1892 tid.card = chip->card->number; 1893 tid.device = device; 1894 tid.subdevice = 0; 1895 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) { 1896 strcpy(timer->name, "YMFPCI timer"); 1897 timer->private_data = chip; 1898 timer->hw = snd_ymfpci_timer_hw; 1899 } 1900 chip->timer = timer; 1901 return err; 1902 } 1903 1904 1905 /* 1906 * proc interface 1907 */ 1908 1909 static void snd_ymfpci_proc_read(snd_info_entry_t *entry, 1910 snd_info_buffer_t * buffer) 1911 { 1912 ymfpci_t *chip = entry->private_data; 1913 int i; 1914 1915 snd_iprintf(buffer, "YMFPCI\n\n"); 1916 for (i = 0; i <= YDSXGR_WORKBASE; i += 4) 1917 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i)); 1918 } 1919 1920 static int __devinit snd_ymfpci_proc_init(snd_card_t * card, ymfpci_t *chip) 1921 { 1922 snd_info_entry_t *entry; 1923 1924 if (! snd_card_proc_new(card, "ymfpci", &entry)) 1925 snd_info_set_text_ops(entry, chip, 1024, snd_ymfpci_proc_read); 1926 return 0; 1927 } 1928 1929 /* 1930 * initialization routines 1931 */ 1932 1933 static void snd_ymfpci_aclink_reset(struct pci_dev * pci) 1934 { 1935 u8 cmd; 1936 1937 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd); 1938 #if 0 // force to reset 1939 if (cmd & 0x03) { 1940 #endif 1941 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc); 1942 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03); 1943 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc); 1944 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0); 1945 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0); 1946 #if 0 1947 } 1948 #endif 1949 } 1950 1951 static void snd_ymfpci_enable_dsp(ymfpci_t *chip) 1952 { 1953 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001); 1954 } 1955 1956 static void snd_ymfpci_disable_dsp(ymfpci_t *chip) 1957 { 1958 u32 val; 1959 int timeout = 1000; 1960 1961 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG); 1962 if (val) 1963 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000); 1964 while (timeout-- > 0) { 1965 val = snd_ymfpci_readl(chip, YDSXGR_STATUS); 1966 if ((val & 0x00000002) == 0) 1967 break; 1968 } 1969 } 1970 1971 #include "ymfpci_image.h" 1972 1973 static void snd_ymfpci_download_image(ymfpci_t *chip) 1974 { 1975 int i; 1976 u16 ctrl; 1977 unsigned long *inst; 1978 1979 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000); 1980 snd_ymfpci_disable_dsp(chip); 1981 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000); 1982 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000); 1983 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000); 1984 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000); 1985 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000); 1986 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000); 1987 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000); 1988 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 1989 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); 1990 1991 /* setup DSP instruction code */ 1992 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++) 1993 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), DspInst[i]); 1994 1995 /* setup control instruction code */ 1996 switch (chip->device_id) { 1997 case PCI_DEVICE_ID_YAMAHA_724F: 1998 case PCI_DEVICE_ID_YAMAHA_740C: 1999 case PCI_DEVICE_ID_YAMAHA_744: 2000 case PCI_DEVICE_ID_YAMAHA_754: 2001 inst = CntrlInst1E; 2002 break; 2003 default: 2004 inst = CntrlInst; 2005 break; 2006 } 2007 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++) 2008 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), inst[i]); 2009 2010 snd_ymfpci_enable_dsp(chip); 2011 } 2012 2013 static int __devinit snd_ymfpci_memalloc(ymfpci_t *chip) 2014 { 2015 long size, playback_ctrl_size; 2016 int voice, bank, reg; 2017 u8 *ptr; 2018 dma_addr_t ptr_addr; 2019 2020 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES; 2021 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2; 2022 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2; 2023 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2; 2024 chip->work_size = YDSXG_DEFAULT_WORK_SIZE; 2025 2026 size = ((playback_ctrl_size + 0x00ff) & ~0x00ff) + 2027 ((chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES + 0x00ff) & ~0x00ff) + 2028 ((chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES + 0x00ff) & ~0x00ff) + 2029 ((chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES + 0x00ff) & ~0x00ff) + 2030 chip->work_size; 2031 /* work_ptr must be aligned to 256 bytes, but it's already 2032 covered with the kernel page allocation mechanism */ 2033 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 2034 size, &chip->work_ptr) < 0) 2035 return -ENOMEM; 2036 ptr = chip->work_ptr.area; 2037 ptr_addr = chip->work_ptr.addr; 2038 memset(ptr, 0, size); /* for sure */ 2039 2040 chip->bank_base_playback = ptr; 2041 chip->bank_base_playback_addr = ptr_addr; 2042 chip->ctrl_playback = (u32 *)ptr; 2043 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES); 2044 ptr += (playback_ctrl_size + 0x00ff) & ~0x00ff; 2045 ptr_addr += (playback_ctrl_size + 0x00ff) & ~0x00ff; 2046 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) { 2047 chip->voices[voice].number = voice; 2048 chip->voices[voice].bank = (snd_ymfpci_playback_bank_t *)ptr; 2049 chip->voices[voice].bank_addr = ptr_addr; 2050 for (bank = 0; bank < 2; bank++) { 2051 chip->bank_playback[voice][bank] = (snd_ymfpci_playback_bank_t *)ptr; 2052 ptr += chip->bank_size_playback; 2053 ptr_addr += chip->bank_size_playback; 2054 } 2055 } 2056 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff); 2057 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff; 2058 chip->bank_base_capture = ptr; 2059 chip->bank_base_capture_addr = ptr_addr; 2060 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++) 2061 for (bank = 0; bank < 2; bank++) { 2062 chip->bank_capture[voice][bank] = (snd_ymfpci_capture_bank_t *)ptr; 2063 ptr += chip->bank_size_capture; 2064 ptr_addr += chip->bank_size_capture; 2065 } 2066 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff); 2067 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff; 2068 chip->bank_base_effect = ptr; 2069 chip->bank_base_effect_addr = ptr_addr; 2070 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++) 2071 for (bank = 0; bank < 2; bank++) { 2072 chip->bank_effect[voice][bank] = (snd_ymfpci_effect_bank_t *)ptr; 2073 ptr += chip->bank_size_effect; 2074 ptr_addr += chip->bank_size_effect; 2075 } 2076 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff); 2077 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff; 2078 chip->work_base = ptr; 2079 chip->work_base_addr = ptr_addr; 2080 2081 snd_assert(ptr + chip->work_size == chip->work_ptr.area + chip->work_ptr.bytes, ); 2082 2083 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr); 2084 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr); 2085 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr); 2086 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr); 2087 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2); 2088 2089 /* S/PDIF output initialization */ 2090 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff; 2091 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0); 2092 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 2093 2094 /* S/PDIF input initialization */ 2095 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0); 2096 2097 /* digital mixer setup */ 2098 for (reg = 0x80; reg < 0xc0; reg += 4) 2099 snd_ymfpci_writel(chip, reg, 0); 2100 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff); 2101 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff); 2102 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff); 2103 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff); 2104 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff); 2105 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff); 2106 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff); 2107 2108 return 0; 2109 } 2110 2111 static int snd_ymfpci_free(ymfpci_t *chip) 2112 { 2113 u16 ctrl; 2114 2115 snd_assert(chip != NULL, return -EINVAL); 2116 2117 if (chip->res_reg_area) { /* don't touch busy hardware */ 2118 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); 2119 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0); 2120 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0); 2121 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0); 2122 snd_ymfpci_disable_dsp(chip); 2123 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0); 2124 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0); 2125 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0); 2126 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0); 2127 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0); 2128 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 2129 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); 2130 } 2131 2132 snd_ymfpci_ac3_done(chip); 2133 2134 /* Set PCI device to D3 state */ 2135 #if 0 2136 /* FIXME: temporarily disabled, otherwise we cannot fire up 2137 * the chip again unless reboot. ACPI bug? 2138 */ 2139 pci_set_power_state(chip->pci, 3); 2140 #endif 2141 2142 #ifdef CONFIG_PM 2143 vfree(chip->saved_regs); 2144 #endif 2145 if (chip->mpu_res) { 2146 release_resource(chip->mpu_res); 2147 kfree_nocheck(chip->mpu_res); 2148 } 2149 if (chip->fm_res) { 2150 release_resource(chip->fm_res); 2151 kfree_nocheck(chip->fm_res); 2152 } 2153 snd_ymfpci_free_gameport(chip); 2154 if (chip->reg_area_virt) 2155 iounmap(chip->reg_area_virt); 2156 if (chip->work_ptr.area) 2157 snd_dma_free_pages(&chip->work_ptr); 2158 2159 if (chip->irq >= 0) 2160 free_irq(chip->irq, (void *)chip); 2161 if (chip->res_reg_area) { 2162 release_resource(chip->res_reg_area); 2163 kfree_nocheck(chip->res_reg_area); 2164 } 2165 2166 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl); 2167 2168 pci_disable_device(chip->pci); 2169 kfree(chip); 2170 return 0; 2171 } 2172 2173 static int snd_ymfpci_dev_free(snd_device_t *device) 2174 { 2175 ymfpci_t *chip = device->device_data; 2176 return snd_ymfpci_free(chip); 2177 } 2178 2179 #ifdef CONFIG_PM 2180 static int saved_regs_index[] = { 2181 /* spdif */ 2182 YDSXGR_SPDIFOUTCTRL, 2183 YDSXGR_SPDIFOUTSTATUS, 2184 YDSXGR_SPDIFINCTRL, 2185 /* volumes */ 2186 YDSXGR_PRIADCLOOPVOL, 2187 YDSXGR_NATIVEDACINVOL, 2188 YDSXGR_NATIVEDACOUTVOL, 2189 // YDSXGR_BUF441OUTVOL, 2190 YDSXGR_NATIVEADCINVOL, 2191 YDSXGR_SPDIFLOOPVOL, 2192 YDSXGR_SPDIFOUTVOL, 2193 YDSXGR_ZVOUTVOL, 2194 YDSXGR_LEGACYOUTVOL, 2195 /* address bases */ 2196 YDSXGR_PLAYCTRLBASE, 2197 YDSXGR_RECCTRLBASE, 2198 YDSXGR_EFFCTRLBASE, 2199 YDSXGR_WORKBASE, 2200 /* capture set up */ 2201 YDSXGR_MAPOFREC, 2202 YDSXGR_RECFORMAT, 2203 YDSXGR_RECSLOTSR, 2204 YDSXGR_ADCFORMAT, 2205 YDSXGR_ADCSLOTSR, 2206 }; 2207 #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index) 2208 2209 static int snd_ymfpci_suspend(snd_card_t *card, pm_message_t state) 2210 { 2211 ymfpci_t *chip = card->pm_private_data; 2212 unsigned int i; 2213 2214 snd_pcm_suspend_all(chip->pcm); 2215 snd_pcm_suspend_all(chip->pcm2); 2216 snd_pcm_suspend_all(chip->pcm_spdif); 2217 snd_pcm_suspend_all(chip->pcm_4ch); 2218 snd_ac97_suspend(chip->ac97); 2219 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++) 2220 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]); 2221 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE); 2222 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); 2223 snd_ymfpci_disable_dsp(chip); 2224 pci_disable_device(chip->pci); 2225 return 0; 2226 } 2227 2228 static int snd_ymfpci_resume(snd_card_t *card) 2229 { 2230 ymfpci_t *chip = card->pm_private_data; 2231 unsigned int i; 2232 2233 pci_enable_device(chip->pci); 2234 pci_set_master(chip->pci); 2235 snd_ymfpci_aclink_reset(chip->pci); 2236 snd_ymfpci_codec_ready(chip, 0); 2237 snd_ymfpci_download_image(chip); 2238 udelay(100); 2239 2240 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++) 2241 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]); 2242 2243 snd_ac97_resume(chip->ac97); 2244 2245 /* start hw again */ 2246 if (chip->start_count > 0) { 2247 spin_lock_irq(&chip->reg_lock); 2248 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode); 2249 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT); 2250 spin_unlock_irq(&chip->reg_lock); 2251 } 2252 return 0; 2253 } 2254 #endif /* CONFIG_PM */ 2255 2256 int __devinit snd_ymfpci_create(snd_card_t * card, 2257 struct pci_dev * pci, 2258 unsigned short old_legacy_ctrl, 2259 ymfpci_t ** rchip) 2260 { 2261 ymfpci_t *chip; 2262 int err; 2263 static snd_device_ops_t ops = { 2264 .dev_free = snd_ymfpci_dev_free, 2265 }; 2266 2267 *rchip = NULL; 2268 2269 /* enable PCI device */ 2270 if ((err = pci_enable_device(pci)) < 0) 2271 return err; 2272 2273 chip = kcalloc(1, sizeof(*chip), GFP_KERNEL); 2274 if (chip == NULL) { 2275 pci_disable_device(pci); 2276 return -ENOMEM; 2277 } 2278 chip->old_legacy_ctrl = old_legacy_ctrl; 2279 spin_lock_init(&chip->reg_lock); 2280 spin_lock_init(&chip->voice_lock); 2281 init_waitqueue_head(&chip->interrupt_sleep); 2282 atomic_set(&chip->interrupt_sleep_count, 0); 2283 chip->card = card; 2284 chip->pci = pci; 2285 chip->irq = -1; 2286 chip->device_id = pci->device; 2287 pci_read_config_byte(pci, PCI_REVISION_ID, (u8 *)&chip->rev); 2288 chip->reg_area_phys = pci_resource_start(pci, 0); 2289 chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000); 2290 pci_set_master(pci); 2291 2292 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) { 2293 snd_printk("unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1); 2294 snd_ymfpci_free(chip); 2295 return -EBUSY; 2296 } 2297 if (request_irq(pci->irq, snd_ymfpci_interrupt, SA_INTERRUPT|SA_SHIRQ, "YMFPCI", (void *) chip)) { 2298 snd_printk("unable to grab IRQ %d\n", pci->irq); 2299 snd_ymfpci_free(chip); 2300 return -EBUSY; 2301 } 2302 chip->irq = pci->irq; 2303 2304 snd_ymfpci_aclink_reset(pci); 2305 if (snd_ymfpci_codec_ready(chip, 0) < 0) { 2306 snd_ymfpci_free(chip); 2307 return -EIO; 2308 } 2309 2310 snd_ymfpci_download_image(chip); 2311 2312 udelay(100); /* seems we need a delay after downloading image.. */ 2313 2314 if (snd_ymfpci_memalloc(chip) < 0) { 2315 snd_ymfpci_free(chip); 2316 return -EIO; 2317 } 2318 2319 if ((err = snd_ymfpci_ac3_init(chip)) < 0) { 2320 snd_ymfpci_free(chip); 2321 return err; 2322 } 2323 2324 #ifdef CONFIG_PM 2325 chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32)); 2326 if (chip->saved_regs == NULL) { 2327 snd_ymfpci_free(chip); 2328 return -ENOMEM; 2329 } 2330 snd_card_set_pm_callback(card, snd_ymfpci_suspend, snd_ymfpci_resume, chip); 2331 #endif 2332 2333 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 2334 snd_ymfpci_free(chip); 2335 return err; 2336 } 2337 2338 snd_ymfpci_proc_init(card, chip); 2339 2340 snd_card_set_dev(card, &pci->dev); 2341 2342 *rchip = chip; 2343 return 0; 2344 } 2345