1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Driver for NeoMagic 256AV and 256ZX chipsets. 4 * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de> 5 * 6 * Based on nm256_audio.c OSS driver in linux kernel. 7 * The original author of OSS nm256 driver wishes to remain anonymous, 8 * so I just put my acknoledgment to him/her here. 9 * The original author's web page is found at 10 * http://www.uglx.org/sony.html 11 */ 12 13 #include <linux/io.h> 14 #include <linux/delay.h> 15 #include <linux/interrupt.h> 16 #include <linux/init.h> 17 #include <linux/pci.h> 18 #include <linux/slab.h> 19 #include <linux/module.h> 20 #include <linux/mutex.h> 21 22 #include <sound/core.h> 23 #include <sound/info.h> 24 #include <sound/control.h> 25 #include <sound/pcm.h> 26 #include <sound/ac97_codec.h> 27 #include <sound/initval.h> 28 29 #define CARD_NAME "NeoMagic 256AV/ZX" 30 #define DRIVER_NAME "NM256" 31 32 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>"); 33 MODULE_DESCRIPTION("NeoMagic NM256AV/ZX"); 34 MODULE_LICENSE("GPL"); 35 36 /* 37 * some compile conditions. 38 */ 39 40 static int index = SNDRV_DEFAULT_IDX1; /* Index */ 41 static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */ 42 static int playback_bufsize = 16; 43 static int capture_bufsize = 16; 44 static bool force_ac97; /* disabled as default */ 45 static int buffer_top; /* not specified */ 46 static bool use_cache; /* disabled */ 47 static bool vaio_hack; /* disabled */ 48 static bool reset_workaround; 49 static bool reset_workaround_2; 50 51 module_param(index, int, 0444); 52 MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard."); 53 module_param(id, charp, 0444); 54 MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard."); 55 module_param(playback_bufsize, int, 0444); 56 MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard."); 57 module_param(capture_bufsize, int, 0444); 58 MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard."); 59 module_param(force_ac97, bool, 0444); 60 MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard."); 61 module_param(buffer_top, int, 0444); 62 MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard."); 63 module_param(use_cache, bool, 0444); 64 MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access."); 65 module_param(vaio_hack, bool, 0444); 66 MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks."); 67 module_param(reset_workaround, bool, 0444); 68 MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops."); 69 module_param(reset_workaround_2, bool, 0444); 70 MODULE_PARM_DESC(reset_workaround_2, "Enable extended AC97 RESET workaround for some other laptops."); 71 72 /* just for backward compatibility */ 73 static bool enable; 74 module_param(enable, bool, 0444); 75 76 77 78 /* 79 * hw definitions 80 */ 81 82 /* The BIOS signature. */ 83 #define NM_SIGNATURE 0x4e4d0000 84 /* Signature mask. */ 85 #define NM_SIG_MASK 0xffff0000 86 87 /* Size of the second memory area. */ 88 #define NM_PORT2_SIZE 4096 89 90 /* The base offset of the mixer in the second memory area. */ 91 #define NM_MIXER_OFFSET 0x600 92 93 /* The maximum size of a coefficient entry. */ 94 #define NM_MAX_PLAYBACK_COEF_SIZE 0x5000 95 #define NM_MAX_RECORD_COEF_SIZE 0x1260 96 97 /* The interrupt register. */ 98 #define NM_INT_REG 0xa04 99 /* And its bits. */ 100 #define NM_PLAYBACK_INT 0x40 101 #define NM_RECORD_INT 0x100 102 #define NM_MISC_INT_1 0x4000 103 #define NM_MISC_INT_2 0x1 104 #define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1) 105 106 /* The AV's "mixer ready" status bit and location. */ 107 #define NM_MIXER_STATUS_OFFSET 0xa04 108 #define NM_MIXER_READY_MASK 0x0800 109 #define NM_MIXER_PRESENCE 0xa06 110 #define NM_PRESENCE_MASK 0x0050 111 #define NM_PRESENCE_VALUE 0x0040 112 113 /* 114 * For the ZX. It uses the same interrupt register, but it holds 32 115 * bits instead of 16. 116 */ 117 #define NM2_PLAYBACK_INT 0x10000 118 #define NM2_RECORD_INT 0x80000 119 #define NM2_MISC_INT_1 0x8 120 #define NM2_MISC_INT_2 0x2 121 #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X)) 122 123 /* The ZX's "mixer ready" status bit and location. */ 124 #define NM2_MIXER_STATUS_OFFSET 0xa06 125 #define NM2_MIXER_READY_MASK 0x0800 126 127 /* The playback registers start from here. */ 128 #define NM_PLAYBACK_REG_OFFSET 0x0 129 /* The record registers start from here. */ 130 #define NM_RECORD_REG_OFFSET 0x200 131 132 /* The rate register is located 2 bytes from the start of the register area. */ 133 #define NM_RATE_REG_OFFSET 2 134 135 /* Mono/stereo flag, number of bits on playback, and rate mask. */ 136 #define NM_RATE_STEREO 1 137 #define NM_RATE_BITS_16 2 138 #define NM_RATE_MASK 0xf0 139 140 /* Playback enable register. */ 141 #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1) 142 #define NM_PLAYBACK_ENABLE_FLAG 1 143 #define NM_PLAYBACK_ONESHOT 2 144 #define NM_PLAYBACK_FREERUN 4 145 146 /* Mutes the audio output. */ 147 #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18) 148 #define NM_AUDIO_MUTE_LEFT 0x8000 149 #define NM_AUDIO_MUTE_RIGHT 0x0080 150 151 /* Recording enable register. */ 152 #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0) 153 #define NM_RECORD_ENABLE_FLAG 1 154 #define NM_RECORD_FREERUN 2 155 156 /* coefficient buffer pointer */ 157 #define NM_COEFF_START_OFFSET 0x1c 158 #define NM_COEFF_END_OFFSET 0x20 159 160 /* DMA buffer offsets */ 161 #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4) 162 #define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10) 163 #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc) 164 #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8) 165 166 #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4) 167 #define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14) 168 #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc) 169 #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8) 170 171 struct nm256_stream { 172 173 struct nm256 *chip; 174 struct snd_pcm_substream *substream; 175 int running; 176 int suspended; 177 178 u32 buf; /* offset from chip->buffer */ 179 int bufsize; /* buffer size in bytes */ 180 void __iomem *bufptr; /* mapped pointer */ 181 unsigned long bufptr_addr; /* physical address of the mapped pointer */ 182 183 int dma_size; /* buffer size of the substream in bytes */ 184 int period_size; /* period size in bytes */ 185 int periods; /* # of periods */ 186 int shift; /* bit shifts */ 187 int cur_period; /* current period # */ 188 189 }; 190 191 struct nm256 { 192 193 struct snd_card *card; 194 195 void __iomem *cport; /* control port */ 196 unsigned long cport_addr; /* physical address */ 197 198 void __iomem *buffer; /* buffer */ 199 unsigned long buffer_addr; /* buffer phyiscal address */ 200 201 u32 buffer_start; /* start offset from pci resource 0 */ 202 u32 buffer_end; /* end offset */ 203 u32 buffer_size; /* total buffer size */ 204 205 u32 all_coeff_buf; /* coefficient buffer */ 206 u32 coeff_buf[2]; /* coefficient buffer for each stream */ 207 208 unsigned int coeffs_current: 1; /* coeff. table is loaded? */ 209 unsigned int use_cache: 1; /* use one big coef. table */ 210 unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */ 211 unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */ 212 unsigned int in_resume: 1; 213 214 int mixer_base; /* register offset of ac97 mixer */ 215 int mixer_status_offset; /* offset of mixer status reg. */ 216 int mixer_status_mask; /* bit mask to test the mixer status */ 217 218 int irq; 219 int irq_acks; 220 irq_handler_t interrupt; 221 int badintrcount; /* counter to check bogus interrupts */ 222 struct mutex irq_mutex; 223 224 struct nm256_stream streams[2]; 225 226 struct snd_ac97 *ac97; 227 unsigned short *ac97_regs; /* register caches, only for valid regs */ 228 229 struct snd_pcm *pcm; 230 231 struct pci_dev *pci; 232 233 spinlock_t reg_lock; 234 235 }; 236 237 238 /* 239 * include coefficient table 240 */ 241 #include "nm256_coef.c" 242 243 244 /* 245 * PCI ids 246 */ 247 static const struct pci_device_id snd_nm256_ids[] = { 248 {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO), 0}, 249 {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO), 0}, 250 {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO), 0}, 251 {0,}, 252 }; 253 254 MODULE_DEVICE_TABLE(pci, snd_nm256_ids); 255 256 257 /* 258 * lowlvel stuffs 259 */ 260 261 static inline u8 262 snd_nm256_readb(struct nm256 *chip, int offset) 263 { 264 return readb(chip->cport + offset); 265 } 266 267 static inline u16 268 snd_nm256_readw(struct nm256 *chip, int offset) 269 { 270 return readw(chip->cport + offset); 271 } 272 273 static inline u32 274 snd_nm256_readl(struct nm256 *chip, int offset) 275 { 276 return readl(chip->cport + offset); 277 } 278 279 static inline void 280 snd_nm256_writeb(struct nm256 *chip, int offset, u8 val) 281 { 282 writeb(val, chip->cport + offset); 283 } 284 285 static inline void 286 snd_nm256_writew(struct nm256 *chip, int offset, u16 val) 287 { 288 writew(val, chip->cport + offset); 289 } 290 291 static inline void 292 snd_nm256_writel(struct nm256 *chip, int offset, u32 val) 293 { 294 writel(val, chip->cport + offset); 295 } 296 297 static inline void 298 snd_nm256_write_buffer(struct nm256 *chip, const void *src, int offset, int size) 299 { 300 offset -= chip->buffer_start; 301 #ifdef CONFIG_SND_DEBUG 302 if (offset < 0 || offset >= chip->buffer_size) { 303 dev_err(chip->card->dev, 304 "write_buffer invalid offset = %d size = %d\n", 305 offset, size); 306 return; 307 } 308 #endif 309 memcpy_toio(chip->buffer + offset, src, size); 310 } 311 312 /* 313 * coefficient handlers -- what a magic! 314 */ 315 316 static u16 317 snd_nm256_get_start_offset(int which) 318 { 319 u16 offset = 0; 320 while (which-- > 0) 321 offset += coefficient_sizes[which]; 322 return offset; 323 } 324 325 static void 326 snd_nm256_load_one_coefficient(struct nm256 *chip, int stream, u32 port, int which) 327 { 328 u32 coeff_buf = chip->coeff_buf[stream]; 329 u16 offset = snd_nm256_get_start_offset(which); 330 u16 size = coefficient_sizes[which]; 331 332 snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size); 333 snd_nm256_writel(chip, port, coeff_buf); 334 /* ??? Record seems to behave differently than playback. */ 335 if (stream == SNDRV_PCM_STREAM_PLAYBACK) 336 size--; 337 snd_nm256_writel(chip, port + 4, coeff_buf + size); 338 } 339 340 static void 341 snd_nm256_load_coefficient(struct nm256 *chip, int stream, int number) 342 { 343 /* The enable register for the specified engine. */ 344 u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ? 345 NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG); 346 u32 addr = NM_COEFF_START_OFFSET; 347 348 addr += (stream == SNDRV_PCM_STREAM_CAPTURE ? 349 NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET); 350 351 if (snd_nm256_readb(chip, poffset) & 1) { 352 dev_dbg(chip->card->dev, 353 "NM256: Engine was enabled while loading coefficients!\n"); 354 return; 355 } 356 357 /* The recording engine uses coefficient values 8-15. */ 358 number &= 7; 359 if (stream == SNDRV_PCM_STREAM_CAPTURE) 360 number += 8; 361 362 if (! chip->use_cache) { 363 snd_nm256_load_one_coefficient(chip, stream, addr, number); 364 return; 365 } 366 if (! chip->coeffs_current) { 367 snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf, 368 NM_TOTAL_COEFF_COUNT * 4); 369 chip->coeffs_current = 1; 370 } else { 371 u32 base = chip->all_coeff_buf; 372 u32 offset = snd_nm256_get_start_offset(number); 373 u32 end_offset = offset + coefficient_sizes[number]; 374 snd_nm256_writel(chip, addr, base + offset); 375 if (stream == SNDRV_PCM_STREAM_PLAYBACK) 376 end_offset--; 377 snd_nm256_writel(chip, addr + 4, base + end_offset); 378 } 379 } 380 381 382 /* The actual rates supported by the card. */ 383 static const unsigned int samplerates[8] = { 384 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000, 385 }; 386 static const struct snd_pcm_hw_constraint_list constraints_rates = { 387 .count = ARRAY_SIZE(samplerates), 388 .list = samplerates, 389 .mask = 0, 390 }; 391 392 /* 393 * return the index of the target rate 394 */ 395 static int 396 snd_nm256_fixed_rate(unsigned int rate) 397 { 398 unsigned int i; 399 for (i = 0; i < ARRAY_SIZE(samplerates); i++) { 400 if (rate == samplerates[i]) 401 return i; 402 } 403 snd_BUG(); 404 return 0; 405 } 406 407 /* 408 * set sample rate and format 409 */ 410 static void 411 snd_nm256_set_format(struct nm256 *chip, struct nm256_stream *s, 412 struct snd_pcm_substream *substream) 413 { 414 struct snd_pcm_runtime *runtime = substream->runtime; 415 int rate_index = snd_nm256_fixed_rate(runtime->rate); 416 unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK; 417 418 s->shift = 0; 419 if (snd_pcm_format_width(runtime->format) == 16) { 420 ratebits |= NM_RATE_BITS_16; 421 s->shift++; 422 } 423 if (runtime->channels > 1) { 424 ratebits |= NM_RATE_STEREO; 425 s->shift++; 426 } 427 428 runtime->rate = samplerates[rate_index]; 429 430 switch (substream->stream) { 431 case SNDRV_PCM_STREAM_PLAYBACK: 432 snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */ 433 snd_nm256_writeb(chip, 434 NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET, 435 ratebits); 436 break; 437 case SNDRV_PCM_STREAM_CAPTURE: 438 snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */ 439 snd_nm256_writeb(chip, 440 NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET, 441 ratebits); 442 break; 443 } 444 } 445 446 /* acquire interrupt */ 447 static int snd_nm256_acquire_irq(struct nm256 *chip) 448 { 449 mutex_lock(&chip->irq_mutex); 450 if (chip->irq < 0) { 451 if (request_irq(chip->pci->irq, chip->interrupt, IRQF_SHARED, 452 KBUILD_MODNAME, chip)) { 453 dev_err(chip->card->dev, 454 "unable to grab IRQ %d\n", chip->pci->irq); 455 mutex_unlock(&chip->irq_mutex); 456 return -EBUSY; 457 } 458 chip->irq = chip->pci->irq; 459 chip->card->sync_irq = chip->irq; 460 } 461 chip->irq_acks++; 462 mutex_unlock(&chip->irq_mutex); 463 return 0; 464 } 465 466 /* release interrupt */ 467 static void snd_nm256_release_irq(struct nm256 *chip) 468 { 469 mutex_lock(&chip->irq_mutex); 470 if (chip->irq_acks > 0) 471 chip->irq_acks--; 472 if (chip->irq_acks == 0 && chip->irq >= 0) { 473 free_irq(chip->irq, chip); 474 chip->irq = -1; 475 chip->card->sync_irq = -1; 476 } 477 mutex_unlock(&chip->irq_mutex); 478 } 479 480 /* 481 * start / stop 482 */ 483 484 /* update the watermark (current period) */ 485 static void snd_nm256_pcm_mark(struct nm256 *chip, struct nm256_stream *s, int reg) 486 { 487 s->cur_period++; 488 s->cur_period %= s->periods; 489 snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size); 490 } 491 492 #define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK) 493 #define snd_nm256_capture_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK) 494 495 static void 496 snd_nm256_playback_start(struct nm256 *chip, struct nm256_stream *s, 497 struct snd_pcm_substream *substream) 498 { 499 /* program buffer pointers */ 500 snd_nm256_writel(chip, NM_PBUFFER_START, s->buf); 501 snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift)); 502 snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf); 503 snd_nm256_playback_mark(chip, s); 504 505 /* Enable playback engine and interrupts. */ 506 snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 507 NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN); 508 /* Enable both channels. */ 509 snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0); 510 } 511 512 static void 513 snd_nm256_capture_start(struct nm256 *chip, struct nm256_stream *s, 514 struct snd_pcm_substream *substream) 515 { 516 /* program buffer pointers */ 517 snd_nm256_writel(chip, NM_RBUFFER_START, s->buf); 518 snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size); 519 snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf); 520 snd_nm256_capture_mark(chip, s); 521 522 /* Enable playback engine and interrupts. */ 523 snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 524 NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN); 525 } 526 527 /* Stop the play engine. */ 528 static void 529 snd_nm256_playback_stop(struct nm256 *chip) 530 { 531 /* Shut off sound from both channels. */ 532 snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 533 NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT); 534 /* Disable play engine. */ 535 snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0); 536 } 537 538 static void 539 snd_nm256_capture_stop(struct nm256 *chip) 540 { 541 /* Disable recording engine. */ 542 snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0); 543 } 544 545 static int 546 snd_nm256_playback_trigger(struct snd_pcm_substream *substream, int cmd) 547 { 548 struct nm256 *chip = snd_pcm_substream_chip(substream); 549 struct nm256_stream *s = substream->runtime->private_data; 550 int err = 0; 551 552 if (snd_BUG_ON(!s)) 553 return -ENXIO; 554 555 spin_lock(&chip->reg_lock); 556 switch (cmd) { 557 case SNDRV_PCM_TRIGGER_RESUME: 558 s->suspended = 0; 559 fallthrough; 560 case SNDRV_PCM_TRIGGER_START: 561 if (! s->running) { 562 snd_nm256_playback_start(chip, s, substream); 563 s->running = 1; 564 } 565 break; 566 case SNDRV_PCM_TRIGGER_SUSPEND: 567 s->suspended = 1; 568 fallthrough; 569 case SNDRV_PCM_TRIGGER_STOP: 570 if (s->running) { 571 snd_nm256_playback_stop(chip); 572 s->running = 0; 573 } 574 break; 575 default: 576 err = -EINVAL; 577 break; 578 } 579 spin_unlock(&chip->reg_lock); 580 return err; 581 } 582 583 static int 584 snd_nm256_capture_trigger(struct snd_pcm_substream *substream, int cmd) 585 { 586 struct nm256 *chip = snd_pcm_substream_chip(substream); 587 struct nm256_stream *s = substream->runtime->private_data; 588 int err = 0; 589 590 if (snd_BUG_ON(!s)) 591 return -ENXIO; 592 593 spin_lock(&chip->reg_lock); 594 switch (cmd) { 595 case SNDRV_PCM_TRIGGER_START: 596 case SNDRV_PCM_TRIGGER_RESUME: 597 if (! s->running) { 598 snd_nm256_capture_start(chip, s, substream); 599 s->running = 1; 600 } 601 break; 602 case SNDRV_PCM_TRIGGER_STOP: 603 case SNDRV_PCM_TRIGGER_SUSPEND: 604 if (s->running) { 605 snd_nm256_capture_stop(chip); 606 s->running = 0; 607 } 608 break; 609 default: 610 err = -EINVAL; 611 break; 612 } 613 spin_unlock(&chip->reg_lock); 614 return err; 615 } 616 617 618 /* 619 * prepare playback/capture channel 620 */ 621 static int snd_nm256_pcm_prepare(struct snd_pcm_substream *substream) 622 { 623 struct nm256 *chip = snd_pcm_substream_chip(substream); 624 struct snd_pcm_runtime *runtime = substream->runtime; 625 struct nm256_stream *s = runtime->private_data; 626 627 if (snd_BUG_ON(!s)) 628 return -ENXIO; 629 s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size); 630 s->period_size = frames_to_bytes(runtime, substream->runtime->period_size); 631 s->periods = substream->runtime->periods; 632 s->cur_period = 0; 633 634 spin_lock_irq(&chip->reg_lock); 635 s->running = 0; 636 snd_nm256_set_format(chip, s, substream); 637 spin_unlock_irq(&chip->reg_lock); 638 639 return 0; 640 } 641 642 643 /* 644 * get the current pointer 645 */ 646 static snd_pcm_uframes_t 647 snd_nm256_playback_pointer(struct snd_pcm_substream *substream) 648 { 649 struct nm256 *chip = snd_pcm_substream_chip(substream); 650 struct nm256_stream *s = substream->runtime->private_data; 651 unsigned long curp; 652 653 if (snd_BUG_ON(!s)) 654 return 0; 655 curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf; 656 curp %= s->dma_size; 657 return bytes_to_frames(substream->runtime, curp); 658 } 659 660 static snd_pcm_uframes_t 661 snd_nm256_capture_pointer(struct snd_pcm_substream *substream) 662 { 663 struct nm256 *chip = snd_pcm_substream_chip(substream); 664 struct nm256_stream *s = substream->runtime->private_data; 665 unsigned long curp; 666 667 if (snd_BUG_ON(!s)) 668 return 0; 669 curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf; 670 curp %= s->dma_size; 671 return bytes_to_frames(substream->runtime, curp); 672 } 673 674 /* Remapped I/O space can be accessible as pointer on i386 */ 675 /* This might be changed in the future */ 676 #ifndef __i386__ 677 /* 678 * silence / copy for playback 679 */ 680 static int 681 snd_nm256_playback_silence(struct snd_pcm_substream *substream, 682 int channel, unsigned long pos, unsigned long count) 683 { 684 struct snd_pcm_runtime *runtime = substream->runtime; 685 struct nm256_stream *s = runtime->private_data; 686 687 memset_io(s->bufptr + pos, 0, count); 688 return 0; 689 } 690 691 static int 692 snd_nm256_playback_copy(struct snd_pcm_substream *substream, 693 int channel, unsigned long pos, 694 void __user *src, unsigned long count) 695 { 696 struct snd_pcm_runtime *runtime = substream->runtime; 697 struct nm256_stream *s = runtime->private_data; 698 699 if (copy_from_user_toio(s->bufptr + pos, src, count)) 700 return -EFAULT; 701 return 0; 702 } 703 704 static int 705 snd_nm256_playback_copy_kernel(struct snd_pcm_substream *substream, 706 int channel, unsigned long pos, 707 void *src, unsigned long count) 708 { 709 struct snd_pcm_runtime *runtime = substream->runtime; 710 struct nm256_stream *s = runtime->private_data; 711 712 memcpy_toio(s->bufptr + pos, src, count); 713 return 0; 714 } 715 716 /* 717 * copy to user 718 */ 719 static int 720 snd_nm256_capture_copy(struct snd_pcm_substream *substream, 721 int channel, unsigned long pos, 722 void __user *dst, unsigned long count) 723 { 724 struct snd_pcm_runtime *runtime = substream->runtime; 725 struct nm256_stream *s = runtime->private_data; 726 727 if (copy_to_user_fromio(dst, s->bufptr + pos, count)) 728 return -EFAULT; 729 return 0; 730 } 731 732 static int 733 snd_nm256_capture_copy_kernel(struct snd_pcm_substream *substream, 734 int channel, unsigned long pos, 735 void *dst, unsigned long count) 736 { 737 struct snd_pcm_runtime *runtime = substream->runtime; 738 struct nm256_stream *s = runtime->private_data; 739 740 memcpy_fromio(dst, s->bufptr + pos, count); 741 return 0; 742 } 743 744 #endif /* !__i386__ */ 745 746 747 /* 748 * update playback/capture watermarks 749 */ 750 751 /* spinlock held! */ 752 static void 753 snd_nm256_playback_update(struct nm256 *chip) 754 { 755 struct nm256_stream *s; 756 757 s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK]; 758 if (s->running && s->substream) { 759 spin_unlock(&chip->reg_lock); 760 snd_pcm_period_elapsed(s->substream); 761 spin_lock(&chip->reg_lock); 762 snd_nm256_playback_mark(chip, s); 763 } 764 } 765 766 /* spinlock held! */ 767 static void 768 snd_nm256_capture_update(struct nm256 *chip) 769 { 770 struct nm256_stream *s; 771 772 s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE]; 773 if (s->running && s->substream) { 774 spin_unlock(&chip->reg_lock); 775 snd_pcm_period_elapsed(s->substream); 776 spin_lock(&chip->reg_lock); 777 snd_nm256_capture_mark(chip, s); 778 } 779 } 780 781 /* 782 * hardware info 783 */ 784 static const struct snd_pcm_hardware snd_nm256_playback = 785 { 786 .info = SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID | 787 SNDRV_PCM_INFO_INTERLEAVED | 788 /*SNDRV_PCM_INFO_PAUSE |*/ 789 SNDRV_PCM_INFO_RESUME, 790 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 791 .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000, 792 .rate_min = 8000, 793 .rate_max = 48000, 794 .channels_min = 1, 795 .channels_max = 2, 796 .periods_min = 2, 797 .periods_max = 1024, 798 .buffer_bytes_max = 128 * 1024, 799 .period_bytes_min = 256, 800 .period_bytes_max = 128 * 1024, 801 }; 802 803 static const struct snd_pcm_hardware snd_nm256_capture = 804 { 805 .info = SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID | 806 SNDRV_PCM_INFO_INTERLEAVED | 807 /*SNDRV_PCM_INFO_PAUSE |*/ 808 SNDRV_PCM_INFO_RESUME, 809 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 810 .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000, 811 .rate_min = 8000, 812 .rate_max = 48000, 813 .channels_min = 1, 814 .channels_max = 2, 815 .periods_min = 2, 816 .periods_max = 1024, 817 .buffer_bytes_max = 128 * 1024, 818 .period_bytes_min = 256, 819 .period_bytes_max = 128 * 1024, 820 }; 821 822 823 /* set dma transfer size */ 824 static int snd_nm256_pcm_hw_params(struct snd_pcm_substream *substream, 825 struct snd_pcm_hw_params *hw_params) 826 { 827 /* area and addr are already set and unchanged */ 828 substream->runtime->dma_bytes = params_buffer_bytes(hw_params); 829 return 0; 830 } 831 832 /* 833 * open 834 */ 835 static void snd_nm256_setup_stream(struct nm256 *chip, struct nm256_stream *s, 836 struct snd_pcm_substream *substream, 837 const struct snd_pcm_hardware *hw_ptr) 838 { 839 struct snd_pcm_runtime *runtime = substream->runtime; 840 841 s->running = 0; 842 runtime->hw = *hw_ptr; 843 runtime->hw.buffer_bytes_max = s->bufsize; 844 runtime->hw.period_bytes_max = s->bufsize / 2; 845 runtime->dma_area = (void __force *) s->bufptr; 846 runtime->dma_addr = s->bufptr_addr; 847 runtime->dma_bytes = s->bufsize; 848 runtime->private_data = s; 849 s->substream = substream; 850 851 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 852 &constraints_rates); 853 } 854 855 static int 856 snd_nm256_playback_open(struct snd_pcm_substream *substream) 857 { 858 struct nm256 *chip = snd_pcm_substream_chip(substream); 859 860 if (snd_nm256_acquire_irq(chip) < 0) 861 return -EBUSY; 862 snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK], 863 substream, &snd_nm256_playback); 864 return 0; 865 } 866 867 static int 868 snd_nm256_capture_open(struct snd_pcm_substream *substream) 869 { 870 struct nm256 *chip = snd_pcm_substream_chip(substream); 871 872 if (snd_nm256_acquire_irq(chip) < 0) 873 return -EBUSY; 874 snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE], 875 substream, &snd_nm256_capture); 876 return 0; 877 } 878 879 /* 880 * close - we don't have to do special.. 881 */ 882 static int 883 snd_nm256_playback_close(struct snd_pcm_substream *substream) 884 { 885 struct nm256 *chip = snd_pcm_substream_chip(substream); 886 887 snd_nm256_release_irq(chip); 888 return 0; 889 } 890 891 892 static int 893 snd_nm256_capture_close(struct snd_pcm_substream *substream) 894 { 895 struct nm256 *chip = snd_pcm_substream_chip(substream); 896 897 snd_nm256_release_irq(chip); 898 return 0; 899 } 900 901 /* 902 * create a pcm instance 903 */ 904 static const struct snd_pcm_ops snd_nm256_playback_ops = { 905 .open = snd_nm256_playback_open, 906 .close = snd_nm256_playback_close, 907 .hw_params = snd_nm256_pcm_hw_params, 908 .prepare = snd_nm256_pcm_prepare, 909 .trigger = snd_nm256_playback_trigger, 910 .pointer = snd_nm256_playback_pointer, 911 #ifndef __i386__ 912 .copy_user = snd_nm256_playback_copy, 913 .copy_kernel = snd_nm256_playback_copy_kernel, 914 .fill_silence = snd_nm256_playback_silence, 915 #endif 916 .mmap = snd_pcm_lib_mmap_iomem, 917 }; 918 919 static const struct snd_pcm_ops snd_nm256_capture_ops = { 920 .open = snd_nm256_capture_open, 921 .close = snd_nm256_capture_close, 922 .hw_params = snd_nm256_pcm_hw_params, 923 .prepare = snd_nm256_pcm_prepare, 924 .trigger = snd_nm256_capture_trigger, 925 .pointer = snd_nm256_capture_pointer, 926 #ifndef __i386__ 927 .copy_user = snd_nm256_capture_copy, 928 .copy_kernel = snd_nm256_capture_copy_kernel, 929 #endif 930 .mmap = snd_pcm_lib_mmap_iomem, 931 }; 932 933 static int 934 snd_nm256_pcm(struct nm256 *chip, int device) 935 { 936 struct snd_pcm *pcm; 937 int i, err; 938 939 for (i = 0; i < 2; i++) { 940 struct nm256_stream *s = &chip->streams[i]; 941 s->bufptr = chip->buffer + (s->buf - chip->buffer_start); 942 s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start); 943 } 944 945 err = snd_pcm_new(chip->card, chip->card->driver, device, 946 1, 1, &pcm); 947 if (err < 0) 948 return err; 949 950 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops); 951 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops); 952 953 pcm->private_data = chip; 954 pcm->info_flags = 0; 955 chip->pcm = pcm; 956 957 return 0; 958 } 959 960 961 /* 962 * Initialize the hardware. 963 */ 964 static void 965 snd_nm256_init_chip(struct nm256 *chip) 966 { 967 /* Reset everything. */ 968 snd_nm256_writeb(chip, 0x0, 0x11); 969 snd_nm256_writew(chip, 0x214, 0); 970 /* stop sounds.. */ 971 //snd_nm256_playback_stop(chip); 972 //snd_nm256_capture_stop(chip); 973 } 974 975 976 static irqreturn_t 977 snd_nm256_intr_check(struct nm256 *chip) 978 { 979 if (chip->badintrcount++ > 1000) { 980 /* 981 * I'm not sure if the best thing is to stop the card from 982 * playing or just release the interrupt (after all, we're in 983 * a bad situation, so doing fancy stuff may not be such a good 984 * idea). 985 * 986 * I worry about the card engine continuing to play noise 987 * over and over, however--that could become a very 988 * obnoxious problem. And we know that when this usually 989 * happens things are fairly safe, it just means the user's 990 * inserted a PCMCIA card and someone's spamming us with IRQ 9s. 991 */ 992 if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running) 993 snd_nm256_playback_stop(chip); 994 if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running) 995 snd_nm256_capture_stop(chip); 996 chip->badintrcount = 0; 997 return IRQ_HANDLED; 998 } 999 return IRQ_NONE; 1000 } 1001 1002 /* 1003 * Handle a potential interrupt for the device referred to by DEV_ID. 1004 * 1005 * I don't like the cut-n-paste job here either between the two routines, 1006 * but there are sufficient differences between the two interrupt handlers 1007 * that parameterizing it isn't all that great either. (Could use a macro, 1008 * I suppose...yucky bleah.) 1009 */ 1010 1011 static irqreturn_t 1012 snd_nm256_interrupt(int irq, void *dev_id) 1013 { 1014 struct nm256 *chip = dev_id; 1015 u16 status; 1016 u8 cbyte; 1017 1018 status = snd_nm256_readw(chip, NM_INT_REG); 1019 1020 /* Not ours. */ 1021 if (status == 0) 1022 return snd_nm256_intr_check(chip); 1023 1024 chip->badintrcount = 0; 1025 1026 /* Rather boring; check for individual interrupts and process them. */ 1027 1028 spin_lock(&chip->reg_lock); 1029 if (status & NM_PLAYBACK_INT) { 1030 status &= ~NM_PLAYBACK_INT; 1031 NM_ACK_INT(chip, NM_PLAYBACK_INT); 1032 snd_nm256_playback_update(chip); 1033 } 1034 1035 if (status & NM_RECORD_INT) { 1036 status &= ~NM_RECORD_INT; 1037 NM_ACK_INT(chip, NM_RECORD_INT); 1038 snd_nm256_capture_update(chip); 1039 } 1040 1041 if (status & NM_MISC_INT_1) { 1042 status &= ~NM_MISC_INT_1; 1043 NM_ACK_INT(chip, NM_MISC_INT_1); 1044 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #1\n"); 1045 snd_nm256_writew(chip, NM_INT_REG, 0x8000); 1046 cbyte = snd_nm256_readb(chip, 0x400); 1047 snd_nm256_writeb(chip, 0x400, cbyte | 2); 1048 } 1049 1050 if (status & NM_MISC_INT_2) { 1051 status &= ~NM_MISC_INT_2; 1052 NM_ACK_INT(chip, NM_MISC_INT_2); 1053 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #2\n"); 1054 cbyte = snd_nm256_readb(chip, 0x400); 1055 snd_nm256_writeb(chip, 0x400, cbyte & ~2); 1056 } 1057 1058 /* Unknown interrupt. */ 1059 if (status) { 1060 dev_dbg(chip->card->dev, 1061 "NM256: Fire in the hole! Unknown status 0x%x\n", 1062 status); 1063 /* Pray. */ 1064 NM_ACK_INT(chip, status); 1065 } 1066 1067 spin_unlock(&chip->reg_lock); 1068 return IRQ_HANDLED; 1069 } 1070 1071 /* 1072 * Handle a potential interrupt for the device referred to by DEV_ID. 1073 * This handler is for the 256ZX, and is very similar to the non-ZX 1074 * routine. 1075 */ 1076 1077 static irqreturn_t 1078 snd_nm256_interrupt_zx(int irq, void *dev_id) 1079 { 1080 struct nm256 *chip = dev_id; 1081 u32 status; 1082 u8 cbyte; 1083 1084 status = snd_nm256_readl(chip, NM_INT_REG); 1085 1086 /* Not ours. */ 1087 if (status == 0) 1088 return snd_nm256_intr_check(chip); 1089 1090 chip->badintrcount = 0; 1091 1092 /* Rather boring; check for individual interrupts and process them. */ 1093 1094 spin_lock(&chip->reg_lock); 1095 if (status & NM2_PLAYBACK_INT) { 1096 status &= ~NM2_PLAYBACK_INT; 1097 NM2_ACK_INT(chip, NM2_PLAYBACK_INT); 1098 snd_nm256_playback_update(chip); 1099 } 1100 1101 if (status & NM2_RECORD_INT) { 1102 status &= ~NM2_RECORD_INT; 1103 NM2_ACK_INT(chip, NM2_RECORD_INT); 1104 snd_nm256_capture_update(chip); 1105 } 1106 1107 if (status & NM2_MISC_INT_1) { 1108 status &= ~NM2_MISC_INT_1; 1109 NM2_ACK_INT(chip, NM2_MISC_INT_1); 1110 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #1\n"); 1111 cbyte = snd_nm256_readb(chip, 0x400); 1112 snd_nm256_writeb(chip, 0x400, cbyte | 2); 1113 } 1114 1115 if (status & NM2_MISC_INT_2) { 1116 status &= ~NM2_MISC_INT_2; 1117 NM2_ACK_INT(chip, NM2_MISC_INT_2); 1118 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #2\n"); 1119 cbyte = snd_nm256_readb(chip, 0x400); 1120 snd_nm256_writeb(chip, 0x400, cbyte & ~2); 1121 } 1122 1123 /* Unknown interrupt. */ 1124 if (status) { 1125 dev_dbg(chip->card->dev, 1126 "NM256: Fire in the hole! Unknown status 0x%x\n", 1127 status); 1128 /* Pray. */ 1129 NM2_ACK_INT(chip, status); 1130 } 1131 1132 spin_unlock(&chip->reg_lock); 1133 return IRQ_HANDLED; 1134 } 1135 1136 /* 1137 * AC97 interface 1138 */ 1139 1140 /* 1141 * Waits for the mixer to become ready to be written; returns a zero value 1142 * if it timed out. 1143 */ 1144 static int 1145 snd_nm256_ac97_ready(struct nm256 *chip) 1146 { 1147 int timeout = 10; 1148 u32 testaddr; 1149 u16 testb; 1150 1151 testaddr = chip->mixer_status_offset; 1152 testb = chip->mixer_status_mask; 1153 1154 /* 1155 * Loop around waiting for the mixer to become ready. 1156 */ 1157 while (timeout-- > 0) { 1158 if ((snd_nm256_readw(chip, testaddr) & testb) == 0) 1159 return 1; 1160 udelay(100); 1161 } 1162 return 0; 1163 } 1164 1165 /* 1166 * Initial register values to be written to the AC97 mixer. 1167 * While most of these are identical to the reset values, we do this 1168 * so that we have most of the register contents cached--this avoids 1169 * reading from the mixer directly (which seems to be problematic, 1170 * probably due to ignorance). 1171 */ 1172 1173 struct initialValues { 1174 unsigned short reg; 1175 unsigned short value; 1176 }; 1177 1178 static const struct initialValues nm256_ac97_init_val[] = 1179 { 1180 { AC97_MASTER, 0x8000 }, 1181 { AC97_HEADPHONE, 0x8000 }, 1182 { AC97_MASTER_MONO, 0x8000 }, 1183 { AC97_PC_BEEP, 0x8000 }, 1184 { AC97_PHONE, 0x8008 }, 1185 { AC97_MIC, 0x8000 }, 1186 { AC97_LINE, 0x8808 }, 1187 { AC97_CD, 0x8808 }, 1188 { AC97_VIDEO, 0x8808 }, 1189 { AC97_AUX, 0x8808 }, 1190 { AC97_PCM, 0x8808 }, 1191 { AC97_REC_SEL, 0x0000 }, 1192 { AC97_REC_GAIN, 0x0B0B }, 1193 { AC97_GENERAL_PURPOSE, 0x0000 }, 1194 { AC97_3D_CONTROL, 0x8000 }, 1195 { AC97_VENDOR_ID1, 0x8384 }, 1196 { AC97_VENDOR_ID2, 0x7609 }, 1197 }; 1198 1199 static int nm256_ac97_idx(unsigned short reg) 1200 { 1201 int i; 1202 for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) 1203 if (nm256_ac97_init_val[i].reg == reg) 1204 return i; 1205 return -1; 1206 } 1207 1208 /* 1209 * some nm256 easily crash when reading from mixer registers 1210 * thus we're treating it as a write-only mixer and cache the 1211 * written values 1212 */ 1213 static unsigned short 1214 snd_nm256_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 1215 { 1216 struct nm256 *chip = ac97->private_data; 1217 int idx = nm256_ac97_idx(reg); 1218 1219 if (idx < 0) 1220 return 0; 1221 return chip->ac97_regs[idx]; 1222 } 1223 1224 /* 1225 */ 1226 static void 1227 snd_nm256_ac97_write(struct snd_ac97 *ac97, 1228 unsigned short reg, unsigned short val) 1229 { 1230 struct nm256 *chip = ac97->private_data; 1231 int tries = 2; 1232 int idx = nm256_ac97_idx(reg); 1233 u32 base; 1234 1235 if (idx < 0) 1236 return; 1237 1238 base = chip->mixer_base; 1239 1240 snd_nm256_ac97_ready(chip); 1241 1242 /* Wait for the write to take, too. */ 1243 while (tries-- > 0) { 1244 snd_nm256_writew(chip, base + reg, val); 1245 msleep(1); /* a little delay here seems better.. */ 1246 if (snd_nm256_ac97_ready(chip)) { 1247 /* successful write: set cache */ 1248 chip->ac97_regs[idx] = val; 1249 return; 1250 } 1251 } 1252 dev_dbg(chip->card->dev, "nm256: ac97 codec not ready..\n"); 1253 } 1254 1255 /* static resolution table */ 1256 static const struct snd_ac97_res_table nm256_res_table[] = { 1257 { AC97_MASTER, 0x1f1f }, 1258 { AC97_HEADPHONE, 0x1f1f }, 1259 { AC97_MASTER_MONO, 0x001f }, 1260 { AC97_PC_BEEP, 0x001f }, 1261 { AC97_PHONE, 0x001f }, 1262 { AC97_MIC, 0x001f }, 1263 { AC97_LINE, 0x1f1f }, 1264 { AC97_CD, 0x1f1f }, 1265 { AC97_VIDEO, 0x1f1f }, 1266 { AC97_AUX, 0x1f1f }, 1267 { AC97_PCM, 0x1f1f }, 1268 { AC97_REC_GAIN, 0x0f0f }, 1269 { } /* terminator */ 1270 }; 1271 1272 /* initialize the ac97 into a known state */ 1273 static void 1274 snd_nm256_ac97_reset(struct snd_ac97 *ac97) 1275 { 1276 struct nm256 *chip = ac97->private_data; 1277 1278 /* Reset the mixer. 'Tis magic! */ 1279 snd_nm256_writeb(chip, 0x6c0, 1); 1280 if (! chip->reset_workaround) { 1281 /* Dell latitude LS will lock up by this */ 1282 snd_nm256_writeb(chip, 0x6cc, 0x87); 1283 } 1284 if (! chip->reset_workaround_2) { 1285 /* Dell latitude CSx will lock up by this */ 1286 snd_nm256_writeb(chip, 0x6cc, 0x80); 1287 snd_nm256_writeb(chip, 0x6cc, 0x0); 1288 } 1289 if (! chip->in_resume) { 1290 int i; 1291 for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) { 1292 /* preload the cache, so as to avoid even a single 1293 * read of the mixer regs 1294 */ 1295 snd_nm256_ac97_write(ac97, nm256_ac97_init_val[i].reg, 1296 nm256_ac97_init_val[i].value); 1297 } 1298 } 1299 } 1300 1301 /* create an ac97 mixer interface */ 1302 static int 1303 snd_nm256_mixer(struct nm256 *chip) 1304 { 1305 struct snd_ac97_bus *pbus; 1306 struct snd_ac97_template ac97; 1307 int err; 1308 static const struct snd_ac97_bus_ops ops = { 1309 .reset = snd_nm256_ac97_reset, 1310 .write = snd_nm256_ac97_write, 1311 .read = snd_nm256_ac97_read, 1312 }; 1313 1314 chip->ac97_regs = devm_kcalloc(chip->card->dev, 1315 ARRAY_SIZE(nm256_ac97_init_val), 1316 sizeof(short), GFP_KERNEL); 1317 if (! chip->ac97_regs) 1318 return -ENOMEM; 1319 1320 err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus); 1321 if (err < 0) 1322 return err; 1323 1324 memset(&ac97, 0, sizeof(ac97)); 1325 ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */ 1326 ac97.private_data = chip; 1327 ac97.res_table = nm256_res_table; 1328 pbus->no_vra = 1; 1329 err = snd_ac97_mixer(pbus, &ac97, &chip->ac97); 1330 if (err < 0) 1331 return err; 1332 if (! (chip->ac97->id & (0xf0000000))) { 1333 /* looks like an invalid id */ 1334 sprintf(chip->card->mixername, "%s AC97", chip->card->driver); 1335 } 1336 return 0; 1337 } 1338 1339 /* 1340 * See if the signature left by the NM256 BIOS is intact; if so, we use 1341 * the associated address as the end of our audio buffer in the video 1342 * RAM. 1343 */ 1344 1345 static int 1346 snd_nm256_peek_for_sig(struct nm256 *chip) 1347 { 1348 /* The signature is located 1K below the end of video RAM. */ 1349 void __iomem *temp; 1350 /* Default buffer end is 5120 bytes below the top of RAM. */ 1351 unsigned long pointer_found = chip->buffer_end - 0x1400; 1352 u32 sig; 1353 1354 temp = ioremap(chip->buffer_addr + chip->buffer_end - 0x400, 16); 1355 if (temp == NULL) { 1356 dev_err(chip->card->dev, 1357 "Unable to scan for card signature in video RAM\n"); 1358 return -EBUSY; 1359 } 1360 1361 sig = readl(temp); 1362 if ((sig & NM_SIG_MASK) == NM_SIGNATURE) { 1363 u32 pointer = readl(temp + 4); 1364 1365 /* 1366 * If it's obviously invalid, don't use it 1367 */ 1368 if (pointer == 0xffffffff || 1369 pointer < chip->buffer_size || 1370 pointer > chip->buffer_end) { 1371 dev_err(chip->card->dev, 1372 "invalid signature found: 0x%x\n", pointer); 1373 iounmap(temp); 1374 return -ENODEV; 1375 } else { 1376 pointer_found = pointer; 1377 dev_info(chip->card->dev, 1378 "found card signature in video RAM: 0x%x\n", 1379 pointer); 1380 } 1381 } 1382 1383 iounmap(temp); 1384 chip->buffer_end = pointer_found; 1385 1386 return 0; 1387 } 1388 1389 #ifdef CONFIG_PM_SLEEP 1390 /* 1391 * APM event handler, so the card is properly reinitialized after a power 1392 * event. 1393 */ 1394 static int nm256_suspend(struct device *dev) 1395 { 1396 struct snd_card *card = dev_get_drvdata(dev); 1397 struct nm256 *chip = card->private_data; 1398 1399 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 1400 snd_ac97_suspend(chip->ac97); 1401 chip->coeffs_current = 0; 1402 return 0; 1403 } 1404 1405 static int nm256_resume(struct device *dev) 1406 { 1407 struct snd_card *card = dev_get_drvdata(dev); 1408 struct nm256 *chip = card->private_data; 1409 int i; 1410 1411 /* Perform a full reset on the hardware */ 1412 chip->in_resume = 1; 1413 1414 snd_nm256_init_chip(chip); 1415 1416 /* restore ac97 */ 1417 snd_ac97_resume(chip->ac97); 1418 1419 for (i = 0; i < 2; i++) { 1420 struct nm256_stream *s = &chip->streams[i]; 1421 if (s->substream && s->suspended) { 1422 spin_lock_irq(&chip->reg_lock); 1423 snd_nm256_set_format(chip, s, s->substream); 1424 spin_unlock_irq(&chip->reg_lock); 1425 } 1426 } 1427 1428 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 1429 chip->in_resume = 0; 1430 return 0; 1431 } 1432 1433 static SIMPLE_DEV_PM_OPS(nm256_pm, nm256_suspend, nm256_resume); 1434 #define NM256_PM_OPS &nm256_pm 1435 #else 1436 #define NM256_PM_OPS NULL 1437 #endif /* CONFIG_PM_SLEEP */ 1438 1439 static void snd_nm256_free(struct snd_card *card) 1440 { 1441 struct nm256 *chip = card->private_data; 1442 1443 if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running) 1444 snd_nm256_playback_stop(chip); 1445 if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running) 1446 snd_nm256_capture_stop(chip); 1447 } 1448 1449 static int 1450 snd_nm256_create(struct snd_card *card, struct pci_dev *pci) 1451 { 1452 struct nm256 *chip = card->private_data; 1453 int err, pval; 1454 u32 addr; 1455 1456 err = pcim_enable_device(pci); 1457 if (err < 0) 1458 return err; 1459 1460 chip->card = card; 1461 chip->pci = pci; 1462 chip->use_cache = use_cache; 1463 spin_lock_init(&chip->reg_lock); 1464 chip->irq = -1; 1465 mutex_init(&chip->irq_mutex); 1466 1467 /* store buffer sizes in bytes */ 1468 chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = playback_bufsize * 1024; 1469 chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capture_bufsize * 1024; 1470 1471 /* 1472 * The NM256 has two memory ports. The first port is nothing 1473 * more than a chunk of video RAM, which is used as the I/O ring 1474 * buffer. The second port has the actual juicy stuff (like the 1475 * mixer and the playback engine control registers). 1476 */ 1477 1478 chip->buffer_addr = pci_resource_start(pci, 0); 1479 chip->cport_addr = pci_resource_start(pci, 1); 1480 1481 err = pci_request_regions(pci, card->driver); 1482 if (err < 0) 1483 return err; 1484 1485 /* Init the memory port info. */ 1486 /* remap control port (#2) */ 1487 chip->cport = devm_ioremap(&pci->dev, chip->cport_addr, NM_PORT2_SIZE); 1488 if (!chip->cport) { 1489 dev_err(card->dev, "unable to map control port %lx\n", 1490 chip->cport_addr); 1491 return -ENOMEM; 1492 } 1493 1494 if (!strcmp(card->driver, "NM256AV")) { 1495 /* Ok, try to see if this is a non-AC97 version of the hardware. */ 1496 pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE); 1497 if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) { 1498 if (! force_ac97) { 1499 dev_err(card->dev, 1500 "no ac97 is found!\n"); 1501 dev_err(card->dev, 1502 "force the driver to load by passing in the module parameter\n"); 1503 dev_err(card->dev, 1504 " force_ac97=1\n"); 1505 dev_err(card->dev, 1506 "or try sb16, opl3sa2, or cs423x drivers instead.\n"); 1507 return -ENXIO; 1508 } 1509 } 1510 chip->buffer_end = 2560 * 1024; 1511 chip->interrupt = snd_nm256_interrupt; 1512 chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET; 1513 chip->mixer_status_mask = NM_MIXER_READY_MASK; 1514 } else { 1515 /* Not sure if there is any relevant detect for the ZX or not. */ 1516 if (snd_nm256_readb(chip, 0xa0b) != 0) 1517 chip->buffer_end = 6144 * 1024; 1518 else 1519 chip->buffer_end = 4096 * 1024; 1520 1521 chip->interrupt = snd_nm256_interrupt_zx; 1522 chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET; 1523 chip->mixer_status_mask = NM2_MIXER_READY_MASK; 1524 } 1525 1526 chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize + 1527 chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize; 1528 if (chip->use_cache) 1529 chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4; 1530 else 1531 chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE; 1532 1533 if (buffer_top >= chip->buffer_size && buffer_top < chip->buffer_end) 1534 chip->buffer_end = buffer_top; 1535 else { 1536 /* get buffer end pointer from signature */ 1537 err = snd_nm256_peek_for_sig(chip); 1538 if (err < 0) 1539 return err; 1540 } 1541 1542 chip->buffer_start = chip->buffer_end - chip->buffer_size; 1543 chip->buffer_addr += chip->buffer_start; 1544 1545 dev_info(card->dev, "Mapping port 1 from 0x%x - 0x%x\n", 1546 chip->buffer_start, chip->buffer_end); 1547 1548 chip->buffer = devm_ioremap(&pci->dev, chip->buffer_addr, 1549 chip->buffer_size); 1550 if (!chip->buffer) { 1551 dev_err(card->dev, "unable to map ring buffer at %lx\n", 1552 chip->buffer_addr); 1553 return -ENOMEM; 1554 } 1555 1556 /* set offsets */ 1557 addr = chip->buffer_start; 1558 chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr; 1559 addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize; 1560 chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr; 1561 addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize; 1562 if (chip->use_cache) { 1563 chip->all_coeff_buf = addr; 1564 } else { 1565 chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr; 1566 addr += NM_MAX_PLAYBACK_COEF_SIZE; 1567 chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr; 1568 } 1569 1570 /* Fixed setting. */ 1571 chip->mixer_base = NM_MIXER_OFFSET; 1572 1573 chip->coeffs_current = 0; 1574 1575 snd_nm256_init_chip(chip); 1576 card->private_free = snd_nm256_free; 1577 1578 // pci_set_master(pci); /* needed? */ 1579 return 0; 1580 } 1581 1582 1583 enum { NM_IGNORED, NM_RESET_WORKAROUND, NM_RESET_WORKAROUND_2 }; 1584 1585 static const struct snd_pci_quirk nm256_quirks[] = { 1586 /* HP omnibook 4150 has cs4232 codec internally */ 1587 SND_PCI_QUIRK(0x103c, 0x0007, "HP omnibook 4150", NM_IGNORED), 1588 /* Reset workarounds to avoid lock-ups */ 1589 SND_PCI_QUIRK(0x104d, 0x8041, "Sony PCG-F305", NM_RESET_WORKAROUND), 1590 SND_PCI_QUIRK(0x1028, 0x0080, "Dell Latitude LS", NM_RESET_WORKAROUND), 1591 SND_PCI_QUIRK(0x1028, 0x0091, "Dell Latitude CSx", NM_RESET_WORKAROUND_2), 1592 { } /* terminator */ 1593 }; 1594 1595 1596 static int snd_nm256_probe(struct pci_dev *pci, 1597 const struct pci_device_id *pci_id) 1598 { 1599 struct snd_card *card; 1600 struct nm256 *chip; 1601 int err; 1602 const struct snd_pci_quirk *q; 1603 1604 q = snd_pci_quirk_lookup(pci, nm256_quirks); 1605 if (q) { 1606 dev_dbg(&pci->dev, "Enabled quirk for %s.\n", 1607 snd_pci_quirk_name(q)); 1608 switch (q->value) { 1609 case NM_IGNORED: 1610 dev_info(&pci->dev, 1611 "The device is on the denylist. Loading stopped\n"); 1612 return -ENODEV; 1613 case NM_RESET_WORKAROUND_2: 1614 reset_workaround_2 = 1; 1615 fallthrough; 1616 case NM_RESET_WORKAROUND: 1617 reset_workaround = 1; 1618 break; 1619 } 1620 } 1621 1622 err = snd_devm_card_new(&pci->dev, index, id, THIS_MODULE, 1623 sizeof(*chip), &card); 1624 if (err < 0) 1625 return err; 1626 chip = card->private_data; 1627 1628 switch (pci->device) { 1629 case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO: 1630 strcpy(card->driver, "NM256AV"); 1631 break; 1632 case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO: 1633 strcpy(card->driver, "NM256ZX"); 1634 break; 1635 case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO: 1636 strcpy(card->driver, "NM256XL+"); 1637 break; 1638 default: 1639 dev_err(&pci->dev, "invalid device id 0x%x\n", pci->device); 1640 return -EINVAL; 1641 } 1642 1643 if (vaio_hack) 1644 buffer_top = 0x25a800; /* this avoids conflicts with XFree86 server */ 1645 1646 if (playback_bufsize < 4) 1647 playback_bufsize = 4; 1648 if (playback_bufsize > 128) 1649 playback_bufsize = 128; 1650 if (capture_bufsize < 4) 1651 capture_bufsize = 4; 1652 if (capture_bufsize > 128) 1653 capture_bufsize = 128; 1654 err = snd_nm256_create(card, pci); 1655 if (err < 0) 1656 return err; 1657 1658 if (reset_workaround) { 1659 dev_dbg(&pci->dev, "reset_workaround activated\n"); 1660 chip->reset_workaround = 1; 1661 } 1662 1663 if (reset_workaround_2) { 1664 dev_dbg(&pci->dev, "reset_workaround_2 activated\n"); 1665 chip->reset_workaround_2 = 1; 1666 } 1667 1668 err = snd_nm256_pcm(chip, 0); 1669 if (err < 0) 1670 return err; 1671 err = snd_nm256_mixer(chip); 1672 if (err < 0) 1673 return err; 1674 1675 sprintf(card->shortname, "NeoMagic %s", card->driver); 1676 sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d", 1677 card->shortname, 1678 chip->buffer_addr, chip->cport_addr, chip->irq); 1679 1680 err = snd_card_register(card); 1681 if (err < 0) 1682 return err; 1683 1684 pci_set_drvdata(pci, card); 1685 return 0; 1686 } 1687 1688 static struct pci_driver nm256_driver = { 1689 .name = KBUILD_MODNAME, 1690 .id_table = snd_nm256_ids, 1691 .probe = snd_nm256_probe, 1692 .driver = { 1693 .pm = NM256_PM_OPS, 1694 }, 1695 }; 1696 1697 module_pci_driver(nm256_driver); 1698