1 /* 2 * ALSA driver for ICEnsemble VT1724 (Envy24HT) 3 * 4 * Lowlevel functions for Pontis MS300 5 * 6 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 21 * 22 */ 23 24 #include <sound/driver.h> 25 #include <asm/io.h> 26 #include <linux/delay.h> 27 #include <linux/interrupt.h> 28 #include <linux/init.h> 29 #include <linux/slab.h> 30 #include <linux/mutex.h> 31 32 #include <sound/core.h> 33 #include <sound/info.h> 34 35 #include "ice1712.h" 36 #include "envy24ht.h" 37 #include "pontis.h" 38 39 /* I2C addresses */ 40 #define WM_DEV 0x34 41 #define CS_DEV 0x20 42 43 /* WM8776 registers */ 44 #define WM_HP_ATTEN_L 0x00 /* headphone left attenuation */ 45 #define WM_HP_ATTEN_R 0x01 /* headphone left attenuation */ 46 #define WM_HP_MASTER 0x02 /* headphone master (both channels), override LLR */ 47 #define WM_DAC_ATTEN_L 0x03 /* digital left attenuation */ 48 #define WM_DAC_ATTEN_R 0x04 49 #define WM_DAC_MASTER 0x05 50 #define WM_PHASE_SWAP 0x06 /* DAC phase swap */ 51 #define WM_DAC_CTRL1 0x07 52 #define WM_DAC_MUTE 0x08 53 #define WM_DAC_CTRL2 0x09 54 #define WM_DAC_INT 0x0a 55 #define WM_ADC_INT 0x0b 56 #define WM_MASTER_CTRL 0x0c 57 #define WM_POWERDOWN 0x0d 58 #define WM_ADC_ATTEN_L 0x0e 59 #define WM_ADC_ATTEN_R 0x0f 60 #define WM_ALC_CTRL1 0x10 61 #define WM_ALC_CTRL2 0x11 62 #define WM_ALC_CTRL3 0x12 63 #define WM_NOISE_GATE 0x13 64 #define WM_LIMITER 0x14 65 #define WM_ADC_MUX 0x15 66 #define WM_OUT_MUX 0x16 67 #define WM_RESET 0x17 68 69 /* 70 * GPIO 71 */ 72 #define PONTIS_CS_CS (1<<4) /* CS */ 73 #define PONTIS_CS_CLK (1<<5) /* CLK */ 74 #define PONTIS_CS_RDATA (1<<6) /* CS8416 -> VT1720 */ 75 #define PONTIS_CS_WDATA (1<<7) /* VT1720 -> CS8416 */ 76 77 78 /* 79 * get the current register value of WM codec 80 */ 81 static unsigned short wm_get(struct snd_ice1712 *ice, int reg) 82 { 83 reg <<= 1; 84 return ((unsigned short)ice->akm[0].images[reg] << 8) | 85 ice->akm[0].images[reg + 1]; 86 } 87 88 /* 89 * set the register value of WM codec and remember it 90 */ 91 static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val) 92 { 93 unsigned short cval; 94 cval = (reg << 9) | val; 95 snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff); 96 } 97 98 static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val) 99 { 100 wm_put_nocache(ice, reg, val); 101 reg <<= 1; 102 ice->akm[0].images[reg] = val >> 8; 103 ice->akm[0].images[reg + 1] = val; 104 } 105 106 /* 107 * DAC volume attenuation mixer control (-64dB to 0dB) 108 */ 109 110 #define DAC_0dB 0xff 111 #define DAC_RES 128 112 #define DAC_MIN (DAC_0dB - DAC_RES) 113 114 static int wm_dac_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 115 { 116 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 117 uinfo->count = 2; 118 uinfo->value.integer.min = 0; /* mute */ 119 uinfo->value.integer.max = DAC_RES; /* 0dB, 0.5dB step */ 120 return 0; 121 } 122 123 static int wm_dac_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 124 { 125 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 126 unsigned short val; 127 int i; 128 129 mutex_lock(&ice->gpio_mutex); 130 for (i = 0; i < 2; i++) { 131 val = wm_get(ice, WM_DAC_ATTEN_L + i) & 0xff; 132 val = val > DAC_MIN ? (val - DAC_MIN) : 0; 133 ucontrol->value.integer.value[i] = val; 134 } 135 mutex_unlock(&ice->gpio_mutex); 136 return 0; 137 } 138 139 static int wm_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 140 { 141 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 142 unsigned short oval, nval; 143 int i, idx, change = 0; 144 145 mutex_lock(&ice->gpio_mutex); 146 for (i = 0; i < 2; i++) { 147 nval = ucontrol->value.integer.value[i]; 148 nval = (nval ? (nval + DAC_MIN) : 0) & 0xff; 149 idx = WM_DAC_ATTEN_L + i; 150 oval = wm_get(ice, idx) & 0xff; 151 if (oval != nval) { 152 wm_put(ice, idx, nval); 153 wm_put_nocache(ice, idx, nval | 0x100); 154 change = 1; 155 } 156 } 157 mutex_unlock(&ice->gpio_mutex); 158 return change; 159 } 160 161 /* 162 * ADC gain mixer control (-64dB to 0dB) 163 */ 164 165 #define ADC_0dB 0xcf 166 #define ADC_RES 128 167 #define ADC_MIN (ADC_0dB - ADC_RES) 168 169 static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 170 { 171 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 172 uinfo->count = 2; 173 uinfo->value.integer.min = 0; /* mute (-64dB) */ 174 uinfo->value.integer.max = ADC_RES; /* 0dB, 0.5dB step */ 175 return 0; 176 } 177 178 static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 179 { 180 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 181 unsigned short val; 182 int i; 183 184 mutex_lock(&ice->gpio_mutex); 185 for (i = 0; i < 2; i++) { 186 val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff; 187 val = val > ADC_MIN ? (val - ADC_MIN) : 0; 188 ucontrol->value.integer.value[i] = val; 189 } 190 mutex_unlock(&ice->gpio_mutex); 191 return 0; 192 } 193 194 static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 195 { 196 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 197 unsigned short ovol, nvol; 198 int i, idx, change = 0; 199 200 mutex_lock(&ice->gpio_mutex); 201 for (i = 0; i < 2; i++) { 202 nvol = ucontrol->value.integer.value[i]; 203 nvol = nvol ? (nvol + ADC_MIN) : 0; 204 idx = WM_ADC_ATTEN_L + i; 205 ovol = wm_get(ice, idx) & 0xff; 206 if (ovol != nvol) { 207 wm_put(ice, idx, nvol); 208 change = 1; 209 } 210 } 211 mutex_unlock(&ice->gpio_mutex); 212 return change; 213 } 214 215 /* 216 * ADC input mux mixer control 217 */ 218 static int wm_adc_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 219 { 220 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 221 uinfo->count = 1; 222 uinfo->value.integer.min = 0; 223 uinfo->value.integer.max = 1; 224 return 0; 225 } 226 227 static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 228 { 229 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 230 int bit = kcontrol->private_value; 231 232 mutex_lock(&ice->gpio_mutex); 233 ucontrol->value.integer.value[0] = (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0; 234 mutex_unlock(&ice->gpio_mutex); 235 return 0; 236 } 237 238 static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 239 { 240 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 241 int bit = kcontrol->private_value; 242 unsigned short oval, nval; 243 int change; 244 245 mutex_lock(&ice->gpio_mutex); 246 nval = oval = wm_get(ice, WM_ADC_MUX); 247 if (ucontrol->value.integer.value[0]) 248 nval |= (1 << bit); 249 else 250 nval &= ~(1 << bit); 251 change = nval != oval; 252 if (change) { 253 wm_put(ice, WM_ADC_MUX, nval); 254 } 255 mutex_unlock(&ice->gpio_mutex); 256 return 0; 257 } 258 259 /* 260 * Analog bypass (In -> Out) 261 */ 262 static int wm_bypass_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 263 { 264 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 265 uinfo->count = 1; 266 uinfo->value.integer.min = 0; 267 uinfo->value.integer.max = 1; 268 return 0; 269 } 270 271 static int wm_bypass_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 272 { 273 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 274 275 mutex_lock(&ice->gpio_mutex); 276 ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0; 277 mutex_unlock(&ice->gpio_mutex); 278 return 0; 279 } 280 281 static int wm_bypass_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 282 { 283 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 284 unsigned short val, oval; 285 int change = 0; 286 287 mutex_lock(&ice->gpio_mutex); 288 val = oval = wm_get(ice, WM_OUT_MUX); 289 if (ucontrol->value.integer.value[0]) 290 val |= 0x04; 291 else 292 val &= ~0x04; 293 if (val != oval) { 294 wm_put(ice, WM_OUT_MUX, val); 295 change = 1; 296 } 297 mutex_unlock(&ice->gpio_mutex); 298 return change; 299 } 300 301 /* 302 * Left/Right swap 303 */ 304 static int wm_chswap_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 305 { 306 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 307 uinfo->count = 1; 308 uinfo->value.integer.min = 0; 309 uinfo->value.integer.max = 1; 310 return 0; 311 } 312 313 static int wm_chswap_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 314 { 315 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 316 317 mutex_lock(&ice->gpio_mutex); 318 ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90; 319 mutex_unlock(&ice->gpio_mutex); 320 return 0; 321 } 322 323 static int wm_chswap_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 324 { 325 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 326 unsigned short val, oval; 327 int change = 0; 328 329 mutex_lock(&ice->gpio_mutex); 330 oval = wm_get(ice, WM_DAC_CTRL1); 331 val = oval & 0x0f; 332 if (ucontrol->value.integer.value[0]) 333 val |= 0x60; 334 else 335 val |= 0x90; 336 if (val != oval) { 337 wm_put(ice, WM_DAC_CTRL1, val); 338 wm_put_nocache(ice, WM_DAC_CTRL1, val); 339 change = 1; 340 } 341 mutex_unlock(&ice->gpio_mutex); 342 return change; 343 } 344 345 /* 346 * write data in the SPI mode 347 */ 348 static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val) 349 { 350 unsigned int tmp = snd_ice1712_gpio_read(ice); 351 if (val) 352 tmp |= bit; 353 else 354 tmp &= ~bit; 355 snd_ice1712_gpio_write(ice, tmp); 356 } 357 358 static void spi_send_byte(struct snd_ice1712 *ice, unsigned char data) 359 { 360 int i; 361 for (i = 0; i < 8; i++) { 362 set_gpio_bit(ice, PONTIS_CS_CLK, 0); 363 udelay(1); 364 set_gpio_bit(ice, PONTIS_CS_WDATA, data & 0x80); 365 udelay(1); 366 set_gpio_bit(ice, PONTIS_CS_CLK, 1); 367 udelay(1); 368 data <<= 1; 369 } 370 } 371 372 static unsigned int spi_read_byte(struct snd_ice1712 *ice) 373 { 374 int i; 375 unsigned int val = 0; 376 377 for (i = 0; i < 8; i++) { 378 val <<= 1; 379 set_gpio_bit(ice, PONTIS_CS_CLK, 0); 380 udelay(1); 381 if (snd_ice1712_gpio_read(ice) & PONTIS_CS_RDATA) 382 val |= 1; 383 udelay(1); 384 set_gpio_bit(ice, PONTIS_CS_CLK, 1); 385 udelay(1); 386 } 387 return val; 388 } 389 390 391 static void spi_write(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg, unsigned int data) 392 { 393 snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK); 394 snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK)); 395 set_gpio_bit(ice, PONTIS_CS_CS, 0); 396 spi_send_byte(ice, dev & ~1); /* WRITE */ 397 spi_send_byte(ice, reg); /* MAP */ 398 spi_send_byte(ice, data); /* DATA */ 399 /* trigger */ 400 set_gpio_bit(ice, PONTIS_CS_CS, 1); 401 udelay(1); 402 /* restore */ 403 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask); 404 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); 405 } 406 407 static unsigned int spi_read(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg) 408 { 409 unsigned int val; 410 snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK); 411 snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK)); 412 set_gpio_bit(ice, PONTIS_CS_CS, 0); 413 spi_send_byte(ice, dev & ~1); /* WRITE */ 414 spi_send_byte(ice, reg); /* MAP */ 415 /* trigger */ 416 set_gpio_bit(ice, PONTIS_CS_CS, 1); 417 udelay(1); 418 set_gpio_bit(ice, PONTIS_CS_CS, 0); 419 spi_send_byte(ice, dev | 1); /* READ */ 420 val = spi_read_byte(ice); 421 /* trigger */ 422 set_gpio_bit(ice, PONTIS_CS_CS, 1); 423 udelay(1); 424 /* restore */ 425 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask); 426 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); 427 return val; 428 } 429 430 431 /* 432 * SPDIF input source 433 */ 434 static int cs_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 435 { 436 static char *texts[] = { 437 "Coax", /* RXP0 */ 438 "Optical", /* RXP1 */ 439 "CD", /* RXP2 */ 440 }; 441 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 442 uinfo->count = 1; 443 uinfo->value.enumerated.items = 3; 444 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 445 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 446 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 447 return 0; 448 } 449 450 static int cs_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 451 { 452 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 453 454 mutex_lock(&ice->gpio_mutex); 455 ucontrol->value.enumerated.item[0] = ice->gpio.saved[0]; 456 mutex_unlock(&ice->gpio_mutex); 457 return 0; 458 } 459 460 static int cs_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 461 { 462 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 463 unsigned char val; 464 int change = 0; 465 466 mutex_lock(&ice->gpio_mutex); 467 if (ucontrol->value.enumerated.item[0] != ice->gpio.saved[0]) { 468 ice->gpio.saved[0] = ucontrol->value.enumerated.item[0] & 3; 469 val = 0x80 | (ice->gpio.saved[0] << 3); 470 spi_write(ice, CS_DEV, 0x04, val); 471 change = 1; 472 } 473 mutex_unlock(&ice->gpio_mutex); 474 return 0; 475 } 476 477 478 /* 479 * GPIO controls 480 */ 481 static int pontis_gpio_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 482 { 483 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 484 uinfo->count = 1; 485 uinfo->value.integer.min = 0; 486 uinfo->value.integer.max = 0xffff; /* 16bit */ 487 return 0; 488 } 489 490 static int pontis_gpio_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 491 { 492 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 493 mutex_lock(&ice->gpio_mutex); 494 /* 4-7 reserved */ 495 ucontrol->value.integer.value[0] = (~ice->gpio.write_mask & 0xffff) | 0x00f0; 496 mutex_unlock(&ice->gpio_mutex); 497 return 0; 498 } 499 500 static int pontis_gpio_mask_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 501 { 502 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 503 unsigned int val; 504 int changed; 505 mutex_lock(&ice->gpio_mutex); 506 /* 4-7 reserved */ 507 val = (~ucontrol->value.integer.value[0] & 0xffff) | 0x00f0; 508 changed = val != ice->gpio.write_mask; 509 ice->gpio.write_mask = val; 510 mutex_unlock(&ice->gpio_mutex); 511 return changed; 512 } 513 514 static int pontis_gpio_dir_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 515 { 516 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 517 mutex_lock(&ice->gpio_mutex); 518 /* 4-7 reserved */ 519 ucontrol->value.integer.value[0] = ice->gpio.direction & 0xff0f; 520 mutex_unlock(&ice->gpio_mutex); 521 return 0; 522 } 523 524 static int pontis_gpio_dir_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 525 { 526 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 527 unsigned int val; 528 int changed; 529 mutex_lock(&ice->gpio_mutex); 530 /* 4-7 reserved */ 531 val = ucontrol->value.integer.value[0] & 0xff0f; 532 changed = (val != ice->gpio.direction); 533 ice->gpio.direction = val; 534 mutex_unlock(&ice->gpio_mutex); 535 return changed; 536 } 537 538 static int pontis_gpio_data_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 539 { 540 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 541 mutex_lock(&ice->gpio_mutex); 542 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); 543 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask); 544 ucontrol->value.integer.value[0] = snd_ice1712_gpio_read(ice) & 0xffff; 545 mutex_unlock(&ice->gpio_mutex); 546 return 0; 547 } 548 549 static int pontis_gpio_data_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 550 { 551 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 552 unsigned int val, nval; 553 int changed = 0; 554 mutex_lock(&ice->gpio_mutex); 555 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); 556 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask); 557 val = snd_ice1712_gpio_read(ice) & 0xffff; 558 nval = ucontrol->value.integer.value[0] & 0xffff; 559 if (val != nval) { 560 snd_ice1712_gpio_write(ice, nval); 561 changed = 1; 562 } 563 mutex_unlock(&ice->gpio_mutex); 564 return changed; 565 } 566 567 /* 568 * mixers 569 */ 570 571 static struct snd_kcontrol_new pontis_controls[] __devinitdata = { 572 { 573 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 574 .name = "PCM Playback Volume", 575 .info = wm_dac_vol_info, 576 .get = wm_dac_vol_get, 577 .put = wm_dac_vol_put, 578 }, 579 { 580 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 581 .name = "Capture Volume", 582 .info = wm_adc_vol_info, 583 .get = wm_adc_vol_get, 584 .put = wm_adc_vol_put, 585 }, 586 { 587 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 588 .name = "CD Capture Switch", 589 .info = wm_adc_mux_info, 590 .get = wm_adc_mux_get, 591 .put = wm_adc_mux_put, 592 .private_value = 0, 593 }, 594 { 595 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 596 .name = "Line Capture Switch", 597 .info = wm_adc_mux_info, 598 .get = wm_adc_mux_get, 599 .put = wm_adc_mux_put, 600 .private_value = 1, 601 }, 602 { 603 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 604 .name = "Analog Bypass Switch", 605 .info = wm_bypass_info, 606 .get = wm_bypass_get, 607 .put = wm_bypass_put, 608 }, 609 { 610 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 611 .name = "Swap Output Channels", 612 .info = wm_chswap_info, 613 .get = wm_chswap_get, 614 .put = wm_chswap_put, 615 }, 616 { 617 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 618 .name = "IEC958 Input Source", 619 .info = cs_source_info, 620 .get = cs_source_get, 621 .put = cs_source_put, 622 }, 623 /* FIXME: which interface? */ 624 { 625 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 626 .name = "GPIO Mask", 627 .info = pontis_gpio_mask_info, 628 .get = pontis_gpio_mask_get, 629 .put = pontis_gpio_mask_put, 630 }, 631 { 632 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 633 .name = "GPIO Direction", 634 .info = pontis_gpio_mask_info, 635 .get = pontis_gpio_dir_get, 636 .put = pontis_gpio_dir_put, 637 }, 638 { 639 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 640 .name = "GPIO Data", 641 .info = pontis_gpio_mask_info, 642 .get = pontis_gpio_data_get, 643 .put = pontis_gpio_data_put, 644 }, 645 }; 646 647 648 /* 649 * WM codec registers 650 */ 651 static void wm_proc_regs_write(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 652 { 653 struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data; 654 char line[64]; 655 unsigned int reg, val; 656 mutex_lock(&ice->gpio_mutex); 657 while (!snd_info_get_line(buffer, line, sizeof(line))) { 658 if (sscanf(line, "%x %x", ®, &val) != 2) 659 continue; 660 if (reg <= 0x17 && val <= 0xffff) 661 wm_put(ice, reg, val); 662 } 663 mutex_unlock(&ice->gpio_mutex); 664 } 665 666 static void wm_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 667 { 668 struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data; 669 int reg, val; 670 671 mutex_lock(&ice->gpio_mutex); 672 for (reg = 0; reg <= 0x17; reg++) { 673 val = wm_get(ice, reg); 674 snd_iprintf(buffer, "%02x = %04x\n", reg, val); 675 } 676 mutex_unlock(&ice->gpio_mutex); 677 } 678 679 static void wm_proc_init(struct snd_ice1712 *ice) 680 { 681 struct snd_info_entry *entry; 682 if (! snd_card_proc_new(ice->card, "wm_codec", &entry)) { 683 snd_info_set_text_ops(entry, ice, wm_proc_regs_read); 684 entry->mode |= S_IWUSR; 685 entry->c.text.write = wm_proc_regs_write; 686 } 687 } 688 689 static void cs_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 690 { 691 struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data; 692 int reg, val; 693 694 mutex_lock(&ice->gpio_mutex); 695 for (reg = 0; reg <= 0x26; reg++) { 696 val = spi_read(ice, CS_DEV, reg); 697 snd_iprintf(buffer, "%02x = %02x\n", reg, val); 698 } 699 val = spi_read(ice, CS_DEV, 0x7f); 700 snd_iprintf(buffer, "%02x = %02x\n", 0x7f, val); 701 mutex_unlock(&ice->gpio_mutex); 702 } 703 704 static void cs_proc_init(struct snd_ice1712 *ice) 705 { 706 struct snd_info_entry *entry; 707 if (! snd_card_proc_new(ice->card, "cs_codec", &entry)) 708 snd_info_set_text_ops(entry, ice, cs_proc_regs_read); 709 } 710 711 712 static int __devinit pontis_add_controls(struct snd_ice1712 *ice) 713 { 714 unsigned int i; 715 int err; 716 717 for (i = 0; i < ARRAY_SIZE(pontis_controls); i++) { 718 err = snd_ctl_add(ice->card, snd_ctl_new1(&pontis_controls[i], ice)); 719 if (err < 0) 720 return err; 721 } 722 723 wm_proc_init(ice); 724 cs_proc_init(ice); 725 726 return 0; 727 } 728 729 730 /* 731 * initialize the chip 732 */ 733 static int __devinit pontis_init(struct snd_ice1712 *ice) 734 { 735 static unsigned short wm_inits[] = { 736 /* These come first to reduce init pop noise */ 737 WM_ADC_MUX, 0x00c0, /* ADC mute */ 738 WM_DAC_MUTE, 0x0001, /* DAC softmute */ 739 WM_DAC_CTRL1, 0x0000, /* DAC mute */ 740 741 WM_POWERDOWN, 0x0008, /* All power-up except HP */ 742 WM_RESET, 0x0000, /* reset */ 743 }; 744 static unsigned short wm_inits2[] = { 745 WM_MASTER_CTRL, 0x0022, /* 256fs, slave mode */ 746 WM_DAC_INT, 0x0022, /* I2S, normal polarity, 24bit */ 747 WM_ADC_INT, 0x0022, /* I2S, normal polarity, 24bit */ 748 WM_DAC_CTRL1, 0x0090, /* DAC L/R */ 749 WM_OUT_MUX, 0x0001, /* OUT DAC */ 750 WM_HP_ATTEN_L, 0x0179, /* HP 0dB */ 751 WM_HP_ATTEN_R, 0x0179, /* HP 0dB */ 752 WM_DAC_ATTEN_L, 0x0000, /* DAC 0dB */ 753 WM_DAC_ATTEN_L, 0x0100, /* DAC 0dB */ 754 WM_DAC_ATTEN_R, 0x0000, /* DAC 0dB */ 755 WM_DAC_ATTEN_R, 0x0100, /* DAC 0dB */ 756 // WM_DAC_MASTER, 0x0100, /* DAC master muted */ 757 WM_PHASE_SWAP, 0x0000, /* phase normal */ 758 WM_DAC_CTRL2, 0x0000, /* no deemphasis, no ZFLG */ 759 WM_ADC_ATTEN_L, 0x0000, /* ADC muted */ 760 WM_ADC_ATTEN_R, 0x0000, /* ADC muted */ 761 #if 0 762 WM_ALC_CTRL1, 0x007b, /* */ 763 WM_ALC_CTRL2, 0x0000, /* */ 764 WM_ALC_CTRL3, 0x0000, /* */ 765 WM_NOISE_GATE, 0x0000, /* */ 766 #endif 767 WM_DAC_MUTE, 0x0000, /* DAC unmute */ 768 WM_ADC_MUX, 0x0003, /* ADC unmute, both CD/Line On */ 769 }; 770 static unsigned char cs_inits[] = { 771 0x04, 0x80, /* RUN, RXP0 */ 772 0x05, 0x05, /* slave, 24bit */ 773 0x01, 0x00, 774 0x02, 0x00, 775 0x03, 0x00, 776 }; 777 unsigned int i; 778 779 ice->vt1720 = 1; 780 ice->num_total_dacs = 2; 781 ice->num_total_adcs = 2; 782 783 /* to remeber the register values */ 784 ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL); 785 if (! ice->akm) 786 return -ENOMEM; 787 ice->akm_codecs = 1; 788 789 /* HACK - use this as the SPDIF source. 790 * don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten 791 */ 792 ice->gpio.saved[0] = 0; 793 794 /* initialize WM8776 codec */ 795 for (i = 0; i < ARRAY_SIZE(wm_inits); i += 2) 796 wm_put(ice, wm_inits[i], wm_inits[i+1]); 797 schedule_timeout_uninterruptible(1); 798 for (i = 0; i < ARRAY_SIZE(wm_inits2); i += 2) 799 wm_put(ice, wm_inits2[i], wm_inits2[i+1]); 800 801 /* initialize CS8416 codec */ 802 /* assert PRST#; MT05 bit 7 */ 803 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD)); 804 mdelay(5); 805 /* deassert PRST# */ 806 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD)); 807 808 for (i = 0; i < ARRAY_SIZE(cs_inits); i += 2) 809 spi_write(ice, CS_DEV, cs_inits[i], cs_inits[i+1]); 810 811 return 0; 812 } 813 814 815 /* 816 * Pontis boards don't provide the EEPROM data at all. 817 * hence the driver needs to sets up it properly. 818 */ 819 820 static unsigned char pontis_eeprom[] __devinitdata = { 821 0x08, /* SYSCONF: clock 256, mpu401, spdif-in/ADC, 1DAC */ 822 0x80, /* ACLINK: I2S */ 823 0xf8, /* I2S: vol, 96k, 24bit, 192k */ 824 0xc3, /* SPDIF: out-en, out-int, spdif-in */ 825 0x07, /* GPIO_DIR */ 826 0x00, /* GPIO_DIR1 */ 827 0x00, /* GPIO_DIR2 (ignored) */ 828 0x0f, /* GPIO_MASK (4-7 reserved for CS8416) */ 829 0xff, /* GPIO_MASK1 */ 830 0x00, /* GPIO_MASK2 (ignored) */ 831 0x06, /* GPIO_STATE (0-low, 1-high, 2-high) */ 832 0x00, /* GPIO_STATE1 */ 833 0x00, /* GPIO_STATE2 (ignored) */ 834 }; 835 836 /* entry point */ 837 struct snd_ice1712_card_info snd_vt1720_pontis_cards[] __devinitdata = { 838 { 839 .subvendor = VT1720_SUBDEVICE_PONTIS_MS300, 840 .name = "Pontis MS300", 841 .model = "ms300", 842 .chip_init = pontis_init, 843 .build_controls = pontis_add_controls, 844 .eeprom_size = sizeof(pontis_eeprom), 845 .eeprom_data = pontis_eeprom, 846 }, 847 { } /* terminator */ 848 }; 849