1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * ALSA driver for ICEnsemble VT1724 (Envy24HT) 4 * 5 * Lowlevel functions for Pontis MS300 6 * 7 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> 8 */ 9 10 #include <linux/delay.h> 11 #include <linux/interrupt.h> 12 #include <linux/init.h> 13 #include <linux/slab.h> 14 #include <linux/mutex.h> 15 16 #include <sound/core.h> 17 #include <sound/info.h> 18 #include <sound/tlv.h> 19 20 #include "ice1712.h" 21 #include "envy24ht.h" 22 #include "pontis.h" 23 24 /* I2C addresses */ 25 #define WM_DEV 0x34 26 #define CS_DEV 0x20 27 28 /* WM8776 registers */ 29 #define WM_HP_ATTEN_L 0x00 /* headphone left attenuation */ 30 #define WM_HP_ATTEN_R 0x01 /* headphone left attenuation */ 31 #define WM_HP_MASTER 0x02 /* headphone master (both channels) */ 32 /* override LLR */ 33 #define WM_DAC_ATTEN_L 0x03 /* digital left attenuation */ 34 #define WM_DAC_ATTEN_R 0x04 35 #define WM_DAC_MASTER 0x05 36 #define WM_PHASE_SWAP 0x06 /* DAC phase swap */ 37 #define WM_DAC_CTRL1 0x07 38 #define WM_DAC_MUTE 0x08 39 #define WM_DAC_CTRL2 0x09 40 #define WM_DAC_INT 0x0a 41 #define WM_ADC_INT 0x0b 42 #define WM_MASTER_CTRL 0x0c 43 #define WM_POWERDOWN 0x0d 44 #define WM_ADC_ATTEN_L 0x0e 45 #define WM_ADC_ATTEN_R 0x0f 46 #define WM_ALC_CTRL1 0x10 47 #define WM_ALC_CTRL2 0x11 48 #define WM_ALC_CTRL3 0x12 49 #define WM_NOISE_GATE 0x13 50 #define WM_LIMITER 0x14 51 #define WM_ADC_MUX 0x15 52 #define WM_OUT_MUX 0x16 53 #define WM_RESET 0x17 54 55 /* 56 * GPIO 57 */ 58 #define PONTIS_CS_CS (1<<4) /* CS */ 59 #define PONTIS_CS_CLK (1<<5) /* CLK */ 60 #define PONTIS_CS_RDATA (1<<6) /* CS8416 -> VT1720 */ 61 #define PONTIS_CS_WDATA (1<<7) /* VT1720 -> CS8416 */ 62 63 64 /* 65 * get the current register value of WM codec 66 */ 67 static unsigned short wm_get(struct snd_ice1712 *ice, int reg) 68 { 69 reg <<= 1; 70 return ((unsigned short)ice->akm[0].images[reg] << 8) | 71 ice->akm[0].images[reg + 1]; 72 } 73 74 /* 75 * set the register value of WM codec and remember it 76 */ 77 static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val) 78 { 79 unsigned short cval; 80 cval = (reg << 9) | val; 81 snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff); 82 } 83 84 static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val) 85 { 86 wm_put_nocache(ice, reg, val); 87 reg <<= 1; 88 ice->akm[0].images[reg] = val >> 8; 89 ice->akm[0].images[reg + 1] = val; 90 } 91 92 /* 93 * DAC volume attenuation mixer control (-64dB to 0dB) 94 */ 95 96 #define DAC_0dB 0xff 97 #define DAC_RES 128 98 #define DAC_MIN (DAC_0dB - DAC_RES) 99 100 static int wm_dac_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 101 { 102 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 103 uinfo->count = 2; 104 uinfo->value.integer.min = 0; /* mute */ 105 uinfo->value.integer.max = DAC_RES; /* 0dB, 0.5dB step */ 106 return 0; 107 } 108 109 static int wm_dac_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 110 { 111 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 112 unsigned short val; 113 int i; 114 115 guard(mutex)(&ice->gpio_mutex); 116 for (i = 0; i < 2; i++) { 117 val = wm_get(ice, WM_DAC_ATTEN_L + i) & 0xff; 118 val = val > DAC_MIN ? (val - DAC_MIN) : 0; 119 ucontrol->value.integer.value[i] = val; 120 } 121 return 0; 122 } 123 124 static int wm_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 125 { 126 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 127 unsigned short oval, nval; 128 int i, idx, change = 0; 129 130 guard(mutex)(&ice->gpio_mutex); 131 for (i = 0; i < 2; i++) { 132 nval = ucontrol->value.integer.value[i]; 133 nval = (nval ? (nval + DAC_MIN) : 0) & 0xff; 134 idx = WM_DAC_ATTEN_L + i; 135 oval = wm_get(ice, idx) & 0xff; 136 if (oval != nval) { 137 wm_put(ice, idx, nval); 138 wm_put_nocache(ice, idx, nval | 0x100); 139 change = 1; 140 } 141 } 142 return change; 143 } 144 145 /* 146 * ADC gain mixer control (-64dB to 0dB) 147 */ 148 149 #define ADC_0dB 0xcf 150 #define ADC_RES 128 151 #define ADC_MIN (ADC_0dB - ADC_RES) 152 153 static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 154 { 155 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 156 uinfo->count = 2; 157 uinfo->value.integer.min = 0; /* mute (-64dB) */ 158 uinfo->value.integer.max = ADC_RES; /* 0dB, 0.5dB step */ 159 return 0; 160 } 161 162 static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 163 { 164 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 165 unsigned short val; 166 int i; 167 168 guard(mutex)(&ice->gpio_mutex); 169 for (i = 0; i < 2; i++) { 170 val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff; 171 val = val > ADC_MIN ? (val - ADC_MIN) : 0; 172 ucontrol->value.integer.value[i] = val; 173 } 174 return 0; 175 } 176 177 static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 178 { 179 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 180 unsigned short ovol, nvol; 181 int i, idx, change = 0; 182 183 guard(mutex)(&ice->gpio_mutex); 184 for (i = 0; i < 2; i++) { 185 nvol = ucontrol->value.integer.value[i]; 186 nvol = nvol ? (nvol + ADC_MIN) : 0; 187 idx = WM_ADC_ATTEN_L + i; 188 ovol = wm_get(ice, idx) & 0xff; 189 if (ovol != nvol) { 190 wm_put(ice, idx, nvol); 191 change = 1; 192 } 193 } 194 return change; 195 } 196 197 /* 198 * ADC input mux mixer control 199 */ 200 #define wm_adc_mux_info snd_ctl_boolean_mono_info 201 202 static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 203 { 204 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 205 int bit = kcontrol->private_value; 206 207 guard(mutex)(&ice->gpio_mutex); 208 ucontrol->value.integer.value[0] = (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0; 209 return 0; 210 } 211 212 static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 213 { 214 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 215 int bit = kcontrol->private_value; 216 unsigned short oval, nval; 217 int change; 218 219 guard(mutex)(&ice->gpio_mutex); 220 nval = oval = wm_get(ice, WM_ADC_MUX); 221 if (ucontrol->value.integer.value[0]) 222 nval |= (1 << bit); 223 else 224 nval &= ~(1 << bit); 225 change = nval != oval; 226 if (change) { 227 wm_put(ice, WM_ADC_MUX, nval); 228 } 229 return change; 230 } 231 232 /* 233 * Analog bypass (In -> Out) 234 */ 235 #define wm_bypass_info snd_ctl_boolean_mono_info 236 237 static int wm_bypass_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 238 { 239 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 240 241 guard(mutex)(&ice->gpio_mutex); 242 ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0; 243 return 0; 244 } 245 246 static int wm_bypass_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 247 { 248 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 249 unsigned short val, oval; 250 int change = 0; 251 252 guard(mutex)(&ice->gpio_mutex); 253 val = oval = wm_get(ice, WM_OUT_MUX); 254 if (ucontrol->value.integer.value[0]) 255 val |= 0x04; 256 else 257 val &= ~0x04; 258 if (val != oval) { 259 wm_put(ice, WM_OUT_MUX, val); 260 change = 1; 261 } 262 return change; 263 } 264 265 /* 266 * Left/Right swap 267 */ 268 #define wm_chswap_info snd_ctl_boolean_mono_info 269 270 static int wm_chswap_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 271 { 272 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 273 274 guard(mutex)(&ice->gpio_mutex); 275 ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90; 276 return 0; 277 } 278 279 static int wm_chswap_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 280 { 281 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 282 unsigned short val, oval; 283 int change = 0; 284 285 guard(mutex)(&ice->gpio_mutex); 286 oval = wm_get(ice, WM_DAC_CTRL1); 287 val = oval & 0x0f; 288 if (ucontrol->value.integer.value[0]) 289 val |= 0x60; 290 else 291 val |= 0x90; 292 if (val != oval) { 293 wm_put(ice, WM_DAC_CTRL1, val); 294 wm_put_nocache(ice, WM_DAC_CTRL1, val); 295 change = 1; 296 } 297 return change; 298 } 299 300 /* 301 * write data in the SPI mode 302 */ 303 static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val) 304 { 305 unsigned int tmp = snd_ice1712_gpio_read(ice); 306 if (val) 307 tmp |= bit; 308 else 309 tmp &= ~bit; 310 snd_ice1712_gpio_write(ice, tmp); 311 } 312 313 static void spi_send_byte(struct snd_ice1712 *ice, unsigned char data) 314 { 315 int i; 316 for (i = 0; i < 8; i++) { 317 set_gpio_bit(ice, PONTIS_CS_CLK, 0); 318 udelay(1); 319 set_gpio_bit(ice, PONTIS_CS_WDATA, data & 0x80); 320 udelay(1); 321 set_gpio_bit(ice, PONTIS_CS_CLK, 1); 322 udelay(1); 323 data <<= 1; 324 } 325 } 326 327 static unsigned int spi_read_byte(struct snd_ice1712 *ice) 328 { 329 int i; 330 unsigned int val = 0; 331 332 for (i = 0; i < 8; i++) { 333 val <<= 1; 334 set_gpio_bit(ice, PONTIS_CS_CLK, 0); 335 udelay(1); 336 if (snd_ice1712_gpio_read(ice) & PONTIS_CS_RDATA) 337 val |= 1; 338 udelay(1); 339 set_gpio_bit(ice, PONTIS_CS_CLK, 1); 340 udelay(1); 341 } 342 return val; 343 } 344 345 346 static void spi_write(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg, unsigned int data) 347 { 348 snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK); 349 snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK)); 350 set_gpio_bit(ice, PONTIS_CS_CS, 0); 351 spi_send_byte(ice, dev & ~1); /* WRITE */ 352 spi_send_byte(ice, reg); /* MAP */ 353 spi_send_byte(ice, data); /* DATA */ 354 /* trigger */ 355 set_gpio_bit(ice, PONTIS_CS_CS, 1); 356 udelay(1); 357 /* restore */ 358 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask); 359 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); 360 } 361 362 static unsigned int spi_read(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg) 363 { 364 unsigned int val; 365 snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK); 366 snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK)); 367 set_gpio_bit(ice, PONTIS_CS_CS, 0); 368 spi_send_byte(ice, dev & ~1); /* WRITE */ 369 spi_send_byte(ice, reg); /* MAP */ 370 /* trigger */ 371 set_gpio_bit(ice, PONTIS_CS_CS, 1); 372 udelay(1); 373 set_gpio_bit(ice, PONTIS_CS_CS, 0); 374 spi_send_byte(ice, dev | 1); /* READ */ 375 val = spi_read_byte(ice); 376 /* trigger */ 377 set_gpio_bit(ice, PONTIS_CS_CS, 1); 378 udelay(1); 379 /* restore */ 380 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask); 381 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); 382 return val; 383 } 384 385 386 /* 387 * SPDIF input source 388 */ 389 static int cs_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 390 { 391 static const char * const texts[] = { 392 "Coax", /* RXP0 */ 393 "Optical", /* RXP1 */ 394 "CD", /* RXP2 */ 395 }; 396 return snd_ctl_enum_info(uinfo, 1, 3, texts); 397 } 398 399 static int cs_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 400 { 401 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 402 403 guard(mutex)(&ice->gpio_mutex); 404 ucontrol->value.enumerated.item[0] = ice->gpio.saved[0]; 405 return 0; 406 } 407 408 static int cs_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 409 { 410 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 411 unsigned char val; 412 int change = 0; 413 414 guard(mutex)(&ice->gpio_mutex); 415 if (ucontrol->value.enumerated.item[0] != ice->gpio.saved[0]) { 416 ice->gpio.saved[0] = ucontrol->value.enumerated.item[0] & 3; 417 val = 0x80 | (ice->gpio.saved[0] << 3); 418 spi_write(ice, CS_DEV, 0x04, val); 419 change = 1; 420 } 421 return change; 422 } 423 424 425 /* 426 * GPIO controls 427 */ 428 static int pontis_gpio_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 429 { 430 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 431 uinfo->count = 1; 432 uinfo->value.integer.min = 0; 433 uinfo->value.integer.max = 0xffff; /* 16bit */ 434 return 0; 435 } 436 437 static int pontis_gpio_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 438 { 439 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 440 441 guard(mutex)(&ice->gpio_mutex); 442 /* 4-7 reserved */ 443 ucontrol->value.integer.value[0] = (~ice->gpio.write_mask & 0xffff) | 0x00f0; 444 return 0; 445 } 446 447 static int pontis_gpio_mask_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 448 { 449 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 450 unsigned int val; 451 int changed; 452 453 guard(mutex)(&ice->gpio_mutex); 454 /* 4-7 reserved */ 455 val = (~ucontrol->value.integer.value[0] & 0xffff) | 0x00f0; 456 changed = val != ice->gpio.write_mask; 457 ice->gpio.write_mask = val; 458 return changed; 459 } 460 461 static int pontis_gpio_dir_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 462 { 463 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 464 465 guard(mutex)(&ice->gpio_mutex); 466 /* 4-7 reserved */ 467 ucontrol->value.integer.value[0] = ice->gpio.direction & 0xff0f; 468 return 0; 469 } 470 471 static int pontis_gpio_dir_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 472 { 473 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 474 unsigned int val; 475 int changed; 476 477 guard(mutex)(&ice->gpio_mutex); 478 /* 4-7 reserved */ 479 val = ucontrol->value.integer.value[0] & 0xff0f; 480 changed = (val != ice->gpio.direction); 481 ice->gpio.direction = val; 482 return changed; 483 } 484 485 static int pontis_gpio_data_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 486 { 487 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 488 489 guard(mutex)(&ice->gpio_mutex); 490 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); 491 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask); 492 ucontrol->value.integer.value[0] = snd_ice1712_gpio_read(ice) & 0xffff; 493 return 0; 494 } 495 496 static int pontis_gpio_data_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 497 { 498 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 499 unsigned int val, nval; 500 int changed = 0; 501 502 guard(mutex)(&ice->gpio_mutex); 503 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); 504 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask); 505 val = snd_ice1712_gpio_read(ice) & 0xffff; 506 nval = ucontrol->value.integer.value[0] & 0xffff; 507 if (val != nval) { 508 snd_ice1712_gpio_write(ice, nval); 509 changed = 1; 510 } 511 return changed; 512 } 513 514 static const DECLARE_TLV_DB_SCALE(db_scale_volume, -6400, 50, 1); 515 516 /* 517 * mixers 518 */ 519 520 static const struct snd_kcontrol_new pontis_controls[] = { 521 { 522 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 523 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 524 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 525 .name = "PCM Playback Volume", 526 .info = wm_dac_vol_info, 527 .get = wm_dac_vol_get, 528 .put = wm_dac_vol_put, 529 .tlv = { .p = db_scale_volume }, 530 }, 531 { 532 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 533 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 534 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 535 .name = "Capture Volume", 536 .info = wm_adc_vol_info, 537 .get = wm_adc_vol_get, 538 .put = wm_adc_vol_put, 539 .tlv = { .p = db_scale_volume }, 540 }, 541 { 542 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 543 .name = "CD Capture Switch", 544 .info = wm_adc_mux_info, 545 .get = wm_adc_mux_get, 546 .put = wm_adc_mux_put, 547 .private_value = 0, 548 }, 549 { 550 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 551 .name = "Line Capture Switch", 552 .info = wm_adc_mux_info, 553 .get = wm_adc_mux_get, 554 .put = wm_adc_mux_put, 555 .private_value = 1, 556 }, 557 { 558 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 559 .name = "Analog Bypass Switch", 560 .info = wm_bypass_info, 561 .get = wm_bypass_get, 562 .put = wm_bypass_put, 563 }, 564 { 565 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 566 .name = "Swap Output Channels", 567 .info = wm_chswap_info, 568 .get = wm_chswap_get, 569 .put = wm_chswap_put, 570 }, 571 { 572 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 573 .name = "IEC958 Input Source", 574 .info = cs_source_info, 575 .get = cs_source_get, 576 .put = cs_source_put, 577 }, 578 /* FIXME: which interface? */ 579 { 580 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 581 .name = "GPIO Mask", 582 .info = pontis_gpio_mask_info, 583 .get = pontis_gpio_mask_get, 584 .put = pontis_gpio_mask_put, 585 }, 586 { 587 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 588 .name = "GPIO Direction", 589 .info = pontis_gpio_mask_info, 590 .get = pontis_gpio_dir_get, 591 .put = pontis_gpio_dir_put, 592 }, 593 { 594 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 595 .name = "GPIO Data", 596 .info = pontis_gpio_mask_info, 597 .get = pontis_gpio_data_get, 598 .put = pontis_gpio_data_put, 599 }, 600 }; 601 602 603 /* 604 * WM codec registers 605 */ 606 static void wm_proc_regs_write(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 607 { 608 struct snd_ice1712 *ice = entry->private_data; 609 char line[64]; 610 unsigned int reg, val; 611 612 guard(mutex)(&ice->gpio_mutex); 613 while (!snd_info_get_line(buffer, line, sizeof(line))) { 614 if (sscanf(line, "%x %x", ®, &val) != 2) 615 continue; 616 if (reg <= 0x17 && val <= 0xffff) 617 wm_put(ice, reg, val); 618 } 619 } 620 621 static void wm_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 622 { 623 struct snd_ice1712 *ice = entry->private_data; 624 int reg, val; 625 626 guard(mutex)(&ice->gpio_mutex); 627 for (reg = 0; reg <= 0x17; reg++) { 628 val = wm_get(ice, reg); 629 snd_iprintf(buffer, "%02x = %04x\n", reg, val); 630 } 631 } 632 633 static void wm_proc_init(struct snd_ice1712 *ice) 634 { 635 snd_card_rw_proc_new(ice->card, "wm_codec", ice, wm_proc_regs_read, 636 wm_proc_regs_write); 637 } 638 639 static void cs_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 640 { 641 struct snd_ice1712 *ice = entry->private_data; 642 int reg, val; 643 644 guard(mutex)(&ice->gpio_mutex); 645 for (reg = 0; reg <= 0x26; reg++) { 646 val = spi_read(ice, CS_DEV, reg); 647 snd_iprintf(buffer, "%02x = %02x\n", reg, val); 648 } 649 val = spi_read(ice, CS_DEV, 0x7f); 650 snd_iprintf(buffer, "%02x = %02x\n", 0x7f, val); 651 } 652 653 static void cs_proc_init(struct snd_ice1712 *ice) 654 { 655 snd_card_ro_proc_new(ice->card, "cs_codec", ice, cs_proc_regs_read); 656 } 657 658 659 static int pontis_add_controls(struct snd_ice1712 *ice) 660 { 661 unsigned int i; 662 int err; 663 664 for (i = 0; i < ARRAY_SIZE(pontis_controls); i++) { 665 err = snd_ctl_add(ice->card, snd_ctl_new1(&pontis_controls[i], ice)); 666 if (err < 0) 667 return err; 668 } 669 670 wm_proc_init(ice); 671 cs_proc_init(ice); 672 673 return 0; 674 } 675 676 677 /* 678 * initialize the chip 679 */ 680 static int pontis_init(struct snd_ice1712 *ice) 681 { 682 static const unsigned short wm_inits[] = { 683 /* These come first to reduce init pop noise */ 684 WM_ADC_MUX, 0x00c0, /* ADC mute */ 685 WM_DAC_MUTE, 0x0001, /* DAC softmute */ 686 WM_DAC_CTRL1, 0x0000, /* DAC mute */ 687 688 WM_POWERDOWN, 0x0008, /* All power-up except HP */ 689 WM_RESET, 0x0000, /* reset */ 690 }; 691 static const unsigned short wm_inits2[] = { 692 WM_MASTER_CTRL, 0x0022, /* 256fs, slave mode */ 693 WM_DAC_INT, 0x0022, /* I2S, normal polarity, 24bit */ 694 WM_ADC_INT, 0x0022, /* I2S, normal polarity, 24bit */ 695 WM_DAC_CTRL1, 0x0090, /* DAC L/R */ 696 WM_OUT_MUX, 0x0001, /* OUT DAC */ 697 WM_HP_ATTEN_L, 0x0179, /* HP 0dB */ 698 WM_HP_ATTEN_R, 0x0179, /* HP 0dB */ 699 WM_DAC_ATTEN_L, 0x0000, /* DAC 0dB */ 700 WM_DAC_ATTEN_L, 0x0100, /* DAC 0dB */ 701 WM_DAC_ATTEN_R, 0x0000, /* DAC 0dB */ 702 WM_DAC_ATTEN_R, 0x0100, /* DAC 0dB */ 703 /* WM_DAC_MASTER, 0x0100, */ /* DAC master muted */ 704 WM_PHASE_SWAP, 0x0000, /* phase normal */ 705 WM_DAC_CTRL2, 0x0000, /* no deemphasis, no ZFLG */ 706 WM_ADC_ATTEN_L, 0x0000, /* ADC muted */ 707 WM_ADC_ATTEN_R, 0x0000, /* ADC muted */ 708 #if 0 709 WM_ALC_CTRL1, 0x007b, /* */ 710 WM_ALC_CTRL2, 0x0000, /* */ 711 WM_ALC_CTRL3, 0x0000, /* */ 712 WM_NOISE_GATE, 0x0000, /* */ 713 #endif 714 WM_DAC_MUTE, 0x0000, /* DAC unmute */ 715 WM_ADC_MUX, 0x0003, /* ADC unmute, both CD/Line On */ 716 }; 717 static const unsigned char cs_inits[] = { 718 0x04, 0x80, /* RUN, RXP0 */ 719 0x05, 0x05, /* slave, 24bit */ 720 0x01, 0x00, 721 0x02, 0x00, 722 0x03, 0x00, 723 }; 724 unsigned int i; 725 726 ice->vt1720 = 1; 727 ice->num_total_dacs = 2; 728 ice->num_total_adcs = 2; 729 730 /* to remember the register values */ 731 ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL); 732 if (! ice->akm) 733 return -ENOMEM; 734 ice->akm_codecs = 1; 735 736 /* HACK - use this as the SPDIF source. 737 * don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten 738 */ 739 ice->gpio.saved[0] = 0; 740 741 /* initialize WM8776 codec */ 742 for (i = 0; i < ARRAY_SIZE(wm_inits); i += 2) 743 wm_put(ice, wm_inits[i], wm_inits[i+1]); 744 schedule_timeout_uninterruptible(1); 745 for (i = 0; i < ARRAY_SIZE(wm_inits2); i += 2) 746 wm_put(ice, wm_inits2[i], wm_inits2[i+1]); 747 748 /* initialize CS8416 codec */ 749 /* assert PRST#; MT05 bit 7 */ 750 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD)); 751 mdelay(5); 752 /* deassert PRST# */ 753 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD)); 754 755 for (i = 0; i < ARRAY_SIZE(cs_inits); i += 2) 756 spi_write(ice, CS_DEV, cs_inits[i], cs_inits[i+1]); 757 758 return 0; 759 } 760 761 762 /* 763 * Pontis boards don't provide the EEPROM data at all. 764 * hence the driver needs to sets up it properly. 765 */ 766 767 static const unsigned char pontis_eeprom[] = { 768 [ICE_EEP2_SYSCONF] = 0x08, /* clock 256, mpu401, spdif-in/ADC, 1DAC */ 769 [ICE_EEP2_ACLINK] = 0x80, /* I2S */ 770 [ICE_EEP2_I2S] = 0xf8, /* vol, 96k, 24bit, 192k */ 771 [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */ 772 [ICE_EEP2_GPIO_DIR] = 0x07, 773 [ICE_EEP2_GPIO_DIR1] = 0x00, 774 [ICE_EEP2_GPIO_DIR2] = 0x00, /* ignored */ 775 [ICE_EEP2_GPIO_MASK] = 0x0f, /* 4-7 reserved for CS8416 */ 776 [ICE_EEP2_GPIO_MASK1] = 0xff, 777 [ICE_EEP2_GPIO_MASK2] = 0x00, /* ignored */ 778 [ICE_EEP2_GPIO_STATE] = 0x06, /* 0-low, 1-high, 2-high */ 779 [ICE_EEP2_GPIO_STATE1] = 0x00, 780 [ICE_EEP2_GPIO_STATE2] = 0x00, /* ignored */ 781 }; 782 783 /* entry point */ 784 struct snd_ice1712_card_info snd_vt1720_pontis_cards[] = { 785 { 786 .subvendor = VT1720_SUBDEVICE_PONTIS_MS300, 787 .name = "Pontis MS300", 788 .model = "ms300", 789 .chip_init = pontis_init, 790 .build_controls = pontis_add_controls, 791 .eeprom_size = sizeof(pontis_eeprom), 792 .eeprom_data = pontis_eeprom, 793 }, 794 { } /* terminator */ 795 }; 796