1 /* 2 * ALSA driver for ICEnsemble VT1724 (Envy24HT) 3 * 4 * Lowlevel functions for ESI Juli@ cards 5 * 6 * Copyright (c) 2004 Jaroslav Kysela <perex@perex.cz> 7 * 2008 Pavel Hofman <dustin@seznam.cz> 8 * 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 * 24 */ 25 26 #include <linux/delay.h> 27 #include <linux/interrupt.h> 28 #include <linux/init.h> 29 #include <linux/slab.h> 30 #include <sound/core.h> 31 #include <sound/tlv.h> 32 33 #include "ice1712.h" 34 #include "envy24ht.h" 35 #include "juli.h" 36 37 struct juli_spec { 38 struct ak4114 *ak4114; 39 unsigned int analog:1; 40 }; 41 42 /* 43 * chip addresses on I2C bus 44 */ 45 #define AK4114_ADDR 0x20 /* S/PDIF receiver */ 46 #define AK4358_ADDR 0x22 /* DAC */ 47 48 /* 49 * Juli does not use the standard ICE1724 clock scheme. Juli's ice1724 chip is 50 * supplied by external clock provided by Xilinx array and MK73-1 PLL frequency 51 * multiplier. Actual frequency is set by ice1724 GPIOs hooked to the Xilinx. 52 * 53 * The clock circuitry is supplied by the two ice1724 crystals. This 54 * arrangement allows to generate independent clock signal for AK4114's input 55 * rate detection circuit. As a result, Juli, unlike most other 56 * ice1724+ak4114-based cards, detects spdif input rate correctly. 57 * This fact is applied in the driver, allowing to modify PCM stream rate 58 * parameter according to the actual input rate. 59 * 60 * Juli uses the remaining three stereo-channels of its DAC to optionally 61 * monitor analog input, digital input, and digital output. The corresponding 62 * I2S signals are routed by Xilinx, controlled by GPIOs. 63 * 64 * The master mute is implemented using output muting transistors (GPIO) in 65 * combination with smuting the DAC. 66 * 67 * The card itself has no HW master volume control, implemented using the 68 * vmaster control. 69 * 70 * TODO: 71 * researching and fixing the input monitors 72 */ 73 74 /* 75 * GPIO pins 76 */ 77 #define GPIO_FREQ_MASK (3<<0) 78 #define GPIO_FREQ_32KHZ (0<<0) 79 #define GPIO_FREQ_44KHZ (1<<0) 80 #define GPIO_FREQ_48KHZ (2<<0) 81 #define GPIO_MULTI_MASK (3<<2) 82 #define GPIO_MULTI_4X (0<<2) 83 #define GPIO_MULTI_2X (1<<2) 84 #define GPIO_MULTI_1X (2<<2) /* also external */ 85 #define GPIO_MULTI_HALF (3<<2) 86 #define GPIO_INTERNAL_CLOCK (1<<4) /* 0 = external, 1 = internal */ 87 #define GPIO_CLOCK_MASK (1<<4) 88 #define GPIO_ANALOG_PRESENT (1<<5) /* RO only: 0 = present */ 89 #define GPIO_RXMCLK_SEL (1<<7) /* must be 0 */ 90 #define GPIO_AK5385A_CKS0 (1<<8) 91 #define GPIO_AK5385A_DFS1 (1<<9) 92 #define GPIO_AK5385A_DFS0 (1<<10) 93 #define GPIO_DIGOUT_MONITOR (1<<11) /* 1 = active */ 94 #define GPIO_DIGIN_MONITOR (1<<12) /* 1 = active */ 95 #define GPIO_ANAIN_MONITOR (1<<13) /* 1 = active */ 96 #define GPIO_AK5385A_CKS1 (1<<14) /* must be 0 */ 97 #define GPIO_MUTE_CONTROL (1<<15) /* output mute, 1 = muted */ 98 99 #define GPIO_RATE_MASK (GPIO_FREQ_MASK | GPIO_MULTI_MASK | \ 100 GPIO_CLOCK_MASK) 101 #define GPIO_AK5385A_MASK (GPIO_AK5385A_CKS0 | GPIO_AK5385A_DFS0 | \ 102 GPIO_AK5385A_DFS1 | GPIO_AK5385A_CKS1) 103 104 #define JULI_PCM_RATE (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \ 105 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ 106 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \ 107 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | \ 108 SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000) 109 110 #define GPIO_RATE_16000 (GPIO_FREQ_32KHZ | GPIO_MULTI_HALF | \ 111 GPIO_INTERNAL_CLOCK) 112 #define GPIO_RATE_22050 (GPIO_FREQ_44KHZ | GPIO_MULTI_HALF | \ 113 GPIO_INTERNAL_CLOCK) 114 #define GPIO_RATE_24000 (GPIO_FREQ_48KHZ | GPIO_MULTI_HALF | \ 115 GPIO_INTERNAL_CLOCK) 116 #define GPIO_RATE_32000 (GPIO_FREQ_32KHZ | GPIO_MULTI_1X | \ 117 GPIO_INTERNAL_CLOCK) 118 #define GPIO_RATE_44100 (GPIO_FREQ_44KHZ | GPIO_MULTI_1X | \ 119 GPIO_INTERNAL_CLOCK) 120 #define GPIO_RATE_48000 (GPIO_FREQ_48KHZ | GPIO_MULTI_1X | \ 121 GPIO_INTERNAL_CLOCK) 122 #define GPIO_RATE_64000 (GPIO_FREQ_32KHZ | GPIO_MULTI_2X | \ 123 GPIO_INTERNAL_CLOCK) 124 #define GPIO_RATE_88200 (GPIO_FREQ_44KHZ | GPIO_MULTI_2X | \ 125 GPIO_INTERNAL_CLOCK) 126 #define GPIO_RATE_96000 (GPIO_FREQ_48KHZ | GPIO_MULTI_2X | \ 127 GPIO_INTERNAL_CLOCK) 128 #define GPIO_RATE_176400 (GPIO_FREQ_44KHZ | GPIO_MULTI_4X | \ 129 GPIO_INTERNAL_CLOCK) 130 #define GPIO_RATE_192000 (GPIO_FREQ_48KHZ | GPIO_MULTI_4X | \ 131 GPIO_INTERNAL_CLOCK) 132 133 /* 134 * Initial setup of the conversion array GPIO <-> rate 135 */ 136 static const unsigned int juli_rates[] = { 137 16000, 22050, 24000, 32000, 138 44100, 48000, 64000, 88200, 139 96000, 176400, 192000, 140 }; 141 142 static const unsigned int gpio_vals[] = { 143 GPIO_RATE_16000, GPIO_RATE_22050, GPIO_RATE_24000, GPIO_RATE_32000, 144 GPIO_RATE_44100, GPIO_RATE_48000, GPIO_RATE_64000, GPIO_RATE_88200, 145 GPIO_RATE_96000, GPIO_RATE_176400, GPIO_RATE_192000, 146 }; 147 148 static const struct snd_pcm_hw_constraint_list juli_rates_info = { 149 .count = ARRAY_SIZE(juli_rates), 150 .list = juli_rates, 151 .mask = 0, 152 }; 153 154 static int get_gpio_val(int rate) 155 { 156 int i; 157 for (i = 0; i < ARRAY_SIZE(juli_rates); i++) 158 if (juli_rates[i] == rate) 159 return gpio_vals[i]; 160 return 0; 161 } 162 163 static void juli_ak4114_write(void *private_data, unsigned char reg, 164 unsigned char val) 165 { 166 snd_vt1724_write_i2c((struct snd_ice1712 *)private_data, AK4114_ADDR, 167 reg, val); 168 } 169 170 static unsigned char juli_ak4114_read(void *private_data, unsigned char reg) 171 { 172 return snd_vt1724_read_i2c((struct snd_ice1712 *)private_data, 173 AK4114_ADDR, reg); 174 } 175 176 /* 177 * If SPDIF capture and slaved to SPDIF-IN, setting runtime rate 178 * to the external rate 179 */ 180 static void juli_spdif_in_open(struct snd_ice1712 *ice, 181 struct snd_pcm_substream *substream) 182 { 183 struct juli_spec *spec = ice->spec; 184 struct snd_pcm_runtime *runtime = substream->runtime; 185 int rate; 186 187 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK || 188 !ice->is_spdif_master(ice)) 189 return; 190 rate = snd_ak4114_external_rate(spec->ak4114); 191 if (rate >= runtime->hw.rate_min && rate <= runtime->hw.rate_max) { 192 runtime->hw.rate_min = rate; 193 runtime->hw.rate_max = rate; 194 } 195 } 196 197 /* 198 * AK4358 section 199 */ 200 201 static void juli_akm_lock(struct snd_akm4xxx *ak, int chip) 202 { 203 } 204 205 static void juli_akm_unlock(struct snd_akm4xxx *ak, int chip) 206 { 207 } 208 209 static void juli_akm_write(struct snd_akm4xxx *ak, int chip, 210 unsigned char addr, unsigned char data) 211 { 212 struct snd_ice1712 *ice = ak->private_data[0]; 213 214 if (snd_BUG_ON(chip)) 215 return; 216 snd_vt1724_write_i2c(ice, AK4358_ADDR, addr, data); 217 } 218 219 /* 220 * change the rate of envy24HT, AK4358, AK5385 221 */ 222 static void juli_akm_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate) 223 { 224 unsigned char old, tmp, ak4358_dfs; 225 unsigned int ak5385_pins, old_gpio, new_gpio; 226 struct snd_ice1712 *ice = ak->private_data[0]; 227 struct juli_spec *spec = ice->spec; 228 229 if (rate == 0) /* no hint - S/PDIF input is master or the new spdif 230 input rate undetected, simply return */ 231 return; 232 233 /* adjust DFS on codecs */ 234 if (rate > 96000) { 235 ak4358_dfs = 2; 236 ak5385_pins = GPIO_AK5385A_DFS1 | GPIO_AK5385A_CKS0; 237 } else if (rate > 48000) { 238 ak4358_dfs = 1; 239 ak5385_pins = GPIO_AK5385A_DFS0; 240 } else { 241 ak4358_dfs = 0; 242 ak5385_pins = 0; 243 } 244 /* AK5385 first, since it requires cold reset affecting both codecs */ 245 old_gpio = ice->gpio.get_data(ice); 246 new_gpio = (old_gpio & ~GPIO_AK5385A_MASK) | ak5385_pins; 247 /* dev_dbg(ice->card->dev, "JULI - ak5385 set_rate_val: new gpio 0x%x\n", 248 new_gpio); */ 249 ice->gpio.set_data(ice, new_gpio); 250 251 /* cold reset */ 252 old = inb(ICEMT1724(ice, AC97_CMD)); 253 outb(old | VT1724_AC97_COLD, ICEMT1724(ice, AC97_CMD)); 254 udelay(1); 255 outb(old & ~VT1724_AC97_COLD, ICEMT1724(ice, AC97_CMD)); 256 257 /* AK4358 */ 258 /* set new value, reset DFS */ 259 tmp = snd_akm4xxx_get(ak, 0, 2); 260 snd_akm4xxx_reset(ak, 1); 261 tmp = snd_akm4xxx_get(ak, 0, 2); 262 tmp &= ~(0x03 << 4); 263 tmp |= ak4358_dfs << 4; 264 snd_akm4xxx_set(ak, 0, 2, tmp); 265 snd_akm4xxx_reset(ak, 0); 266 267 /* reinit ak4114 */ 268 snd_ak4114_reinit(spec->ak4114); 269 } 270 271 #define AK_DAC(xname, xch) { .name = xname, .num_channels = xch } 272 #define PCM_VOLUME "PCM Playback Volume" 273 #define MONITOR_AN_IN_VOLUME "Monitor Analog In Volume" 274 #define MONITOR_DIG_IN_VOLUME "Monitor Digital In Volume" 275 #define MONITOR_DIG_OUT_VOLUME "Monitor Digital Out Volume" 276 277 static const struct snd_akm4xxx_dac_channel juli_dac[] = { 278 AK_DAC(PCM_VOLUME, 2), 279 AK_DAC(MONITOR_AN_IN_VOLUME, 2), 280 AK_DAC(MONITOR_DIG_OUT_VOLUME, 2), 281 AK_DAC(MONITOR_DIG_IN_VOLUME, 2), 282 }; 283 284 285 static struct snd_akm4xxx akm_juli_dac = { 286 .type = SND_AK4358, 287 .num_dacs = 8, /* DAC1 - analog out 288 DAC2 - analog in monitor 289 DAC3 - digital out monitor 290 DAC4 - digital in monitor 291 */ 292 .ops = { 293 .lock = juli_akm_lock, 294 .unlock = juli_akm_unlock, 295 .write = juli_akm_write, 296 .set_rate_val = juli_akm_set_rate_val 297 }, 298 .dac_info = juli_dac, 299 }; 300 301 #define juli_mute_info snd_ctl_boolean_mono_info 302 303 static int juli_mute_get(struct snd_kcontrol *kcontrol, 304 struct snd_ctl_elem_value *ucontrol) 305 { 306 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 307 unsigned int val; 308 val = ice->gpio.get_data(ice) & (unsigned int) kcontrol->private_value; 309 if (kcontrol->private_value == GPIO_MUTE_CONTROL) 310 /* val 0 = signal on */ 311 ucontrol->value.integer.value[0] = (val) ? 0 : 1; 312 else 313 /* val 1 = signal on */ 314 ucontrol->value.integer.value[0] = (val) ? 1 : 0; 315 return 0; 316 } 317 318 static int juli_mute_put(struct snd_kcontrol *kcontrol, 319 struct snd_ctl_elem_value *ucontrol) 320 { 321 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 322 unsigned int old_gpio, new_gpio; 323 old_gpio = ice->gpio.get_data(ice); 324 if (ucontrol->value.integer.value[0]) { 325 /* unmute */ 326 if (kcontrol->private_value == GPIO_MUTE_CONTROL) { 327 /* 0 = signal on */ 328 new_gpio = old_gpio & ~GPIO_MUTE_CONTROL; 329 /* un-smuting DAC */ 330 snd_akm4xxx_write(ice->akm, 0, 0x01, 0x01); 331 } else 332 /* 1 = signal on */ 333 new_gpio = old_gpio | 334 (unsigned int) kcontrol->private_value; 335 } else { 336 /* mute */ 337 if (kcontrol->private_value == GPIO_MUTE_CONTROL) { 338 /* 1 = signal off */ 339 new_gpio = old_gpio | GPIO_MUTE_CONTROL; 340 /* smuting DAC */ 341 snd_akm4xxx_write(ice->akm, 0, 0x01, 0x03); 342 } else 343 /* 0 = signal off */ 344 new_gpio = old_gpio & 345 ~((unsigned int) kcontrol->private_value); 346 } 347 /* dev_dbg(ice->card->dev, 348 "JULI - mute/unmute: control_value: 0x%x, old_gpio: 0x%x, " 349 "new_gpio 0x%x\n", 350 (unsigned int)ucontrol->value.integer.value[0], old_gpio, 351 new_gpio); */ 352 if (old_gpio != new_gpio) { 353 ice->gpio.set_data(ice, new_gpio); 354 return 1; 355 } 356 /* no change */ 357 return 0; 358 } 359 360 static struct snd_kcontrol_new juli_mute_controls[] = { 361 { 362 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 363 .name = "Master Playback Switch", 364 .info = juli_mute_info, 365 .get = juli_mute_get, 366 .put = juli_mute_put, 367 .private_value = GPIO_MUTE_CONTROL, 368 }, 369 /* Although the following functionality respects the succint NDA'd 370 * documentation from the card manufacturer, and the same way of 371 * operation is coded in OSS Juli driver, only Digital Out monitor 372 * seems to work. Surprisingly, Analog input monitor outputs Digital 373 * output data. The two are independent, as enabling both doubles 374 * volume of the monitor sound. 375 * 376 * Checking traces on the board suggests the functionality described 377 * by the manufacturer is correct - I2S from ADC and AK4114 378 * go to ICE as well as to Xilinx, I2S inputs of DAC2,3,4 (the monitor 379 * inputs) are fed from Xilinx. 380 * 381 * I even checked traces on board and coded a support in driver for 382 * an alternative possibility - the unused I2S ICE output channels 383 * switched to HW-IN/SPDIF-IN and providing the monitoring signal to 384 * the DAC - to no avail. The I2S outputs seem to be unconnected. 385 * 386 * The windows driver supports the monitoring correctly. 387 */ 388 { 389 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 390 .name = "Monitor Analog In Switch", 391 .info = juli_mute_info, 392 .get = juli_mute_get, 393 .put = juli_mute_put, 394 .private_value = GPIO_ANAIN_MONITOR, 395 }, 396 { 397 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 398 .name = "Monitor Digital Out Switch", 399 .info = juli_mute_info, 400 .get = juli_mute_get, 401 .put = juli_mute_put, 402 .private_value = GPIO_DIGOUT_MONITOR, 403 }, 404 { 405 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 406 .name = "Monitor Digital In Switch", 407 .info = juli_mute_info, 408 .get = juli_mute_get, 409 .put = juli_mute_put, 410 .private_value = GPIO_DIGIN_MONITOR, 411 }, 412 }; 413 414 static char *slave_vols[] = { 415 PCM_VOLUME, 416 MONITOR_AN_IN_VOLUME, 417 MONITOR_DIG_IN_VOLUME, 418 MONITOR_DIG_OUT_VOLUME, 419 NULL 420 }; 421 422 static 423 DECLARE_TLV_DB_SCALE(juli_master_db_scale, -6350, 50, 1); 424 425 static struct snd_kcontrol *ctl_find(struct snd_card *card, 426 const char *name) 427 { 428 struct snd_ctl_elem_id sid; 429 memset(&sid, 0, sizeof(sid)); 430 /* FIXME: strcpy is bad. */ 431 strcpy(sid.name, name); 432 sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER; 433 return snd_ctl_find_id(card, &sid); 434 } 435 436 static void add_slaves(struct snd_card *card, 437 struct snd_kcontrol *master, 438 char * const *list) 439 { 440 for (; *list; list++) { 441 struct snd_kcontrol *slave = ctl_find(card, *list); 442 /* dev_dbg(card->dev, "add_slaves - %s\n", *list); */ 443 if (slave) { 444 /* dev_dbg(card->dev, "slave %s found\n", *list); */ 445 snd_ctl_add_slave(master, slave); 446 } 447 } 448 } 449 450 static int juli_add_controls(struct snd_ice1712 *ice) 451 { 452 struct juli_spec *spec = ice->spec; 453 int err; 454 unsigned int i; 455 struct snd_kcontrol *vmaster; 456 457 err = snd_ice1712_akm4xxx_build_controls(ice); 458 if (err < 0) 459 return err; 460 461 for (i = 0; i < ARRAY_SIZE(juli_mute_controls); i++) { 462 err = snd_ctl_add(ice->card, 463 snd_ctl_new1(&juli_mute_controls[i], ice)); 464 if (err < 0) 465 return err; 466 } 467 /* Create virtual master control */ 468 vmaster = snd_ctl_make_virtual_master("Master Playback Volume", 469 juli_master_db_scale); 470 if (!vmaster) 471 return -ENOMEM; 472 add_slaves(ice->card, vmaster, slave_vols); 473 err = snd_ctl_add(ice->card, vmaster); 474 if (err < 0) 475 return err; 476 477 /* only capture SPDIF over AK4114 */ 478 return snd_ak4114_build(spec->ak4114, NULL, 479 ice->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream); 480 } 481 482 /* 483 * suspend/resume 484 * */ 485 486 #ifdef CONFIG_PM_SLEEP 487 static int juli_resume(struct snd_ice1712 *ice) 488 { 489 struct snd_akm4xxx *ak = ice->akm; 490 struct juli_spec *spec = ice->spec; 491 /* akm4358 un-reset, un-mute */ 492 snd_akm4xxx_reset(ak, 0); 493 /* reinit ak4114 */ 494 snd_ak4114_resume(spec->ak4114); 495 return 0; 496 } 497 498 static int juli_suspend(struct snd_ice1712 *ice) 499 { 500 struct snd_akm4xxx *ak = ice->akm; 501 struct juli_spec *spec = ice->spec; 502 /* akm4358 reset and soft-mute */ 503 snd_akm4xxx_reset(ak, 1); 504 snd_ak4114_suspend(spec->ak4114); 505 return 0; 506 } 507 #endif 508 509 /* 510 * initialize the chip 511 */ 512 513 static inline int juli_is_spdif_master(struct snd_ice1712 *ice) 514 { 515 return (ice->gpio.get_data(ice) & GPIO_INTERNAL_CLOCK) ? 0 : 1; 516 } 517 518 static unsigned int juli_get_rate(struct snd_ice1712 *ice) 519 { 520 int i; 521 unsigned char result; 522 523 result = ice->gpio.get_data(ice) & GPIO_RATE_MASK; 524 for (i = 0; i < ARRAY_SIZE(gpio_vals); i++) 525 if (gpio_vals[i] == result) 526 return juli_rates[i]; 527 return 0; 528 } 529 530 /* setting new rate */ 531 static void juli_set_rate(struct snd_ice1712 *ice, unsigned int rate) 532 { 533 unsigned int old, new; 534 unsigned char val; 535 536 old = ice->gpio.get_data(ice); 537 new = (old & ~GPIO_RATE_MASK) | get_gpio_val(rate); 538 /* dev_dbg(ice->card->dev, "JULI - set_rate: old %x, new %x\n", 539 old & GPIO_RATE_MASK, 540 new & GPIO_RATE_MASK); */ 541 542 ice->gpio.set_data(ice, new); 543 /* switching to external clock - supplied by external circuits */ 544 val = inb(ICEMT1724(ice, RATE)); 545 outb(val | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE)); 546 } 547 548 static inline unsigned char juli_set_mclk(struct snd_ice1712 *ice, 549 unsigned int rate) 550 { 551 /* no change in master clock */ 552 return 0; 553 } 554 555 /* setting clock to external - SPDIF */ 556 static int juli_set_spdif_clock(struct snd_ice1712 *ice, int type) 557 { 558 unsigned int old; 559 old = ice->gpio.get_data(ice); 560 /* external clock (= 0), multiply 1x, 48kHz */ 561 ice->gpio.set_data(ice, (old & ~GPIO_RATE_MASK) | GPIO_MULTI_1X | 562 GPIO_FREQ_48KHZ); 563 return 0; 564 } 565 566 /* Called when ak4114 detects change in the input SPDIF stream */ 567 static void juli_ak4114_change(struct ak4114 *ak4114, unsigned char c0, 568 unsigned char c1) 569 { 570 struct snd_ice1712 *ice = ak4114->change_callback_private; 571 int rate; 572 if (ice->is_spdif_master(ice) && c1) { 573 /* only for SPDIF master mode, rate was changed */ 574 rate = snd_ak4114_external_rate(ak4114); 575 /* dev_dbg(ice->card->dev, "ak4114 - input rate changed to %d\n", 576 rate); */ 577 juli_akm_set_rate_val(ice->akm, rate); 578 } 579 } 580 581 static int juli_init(struct snd_ice1712 *ice) 582 { 583 static const unsigned char ak4114_init_vals[] = { 584 /* AK4117_REG_PWRDN */ AK4114_RST | AK4114_PWN | 585 AK4114_OCKS0 | AK4114_OCKS1, 586 /* AK4114_REQ_FORMAT */ AK4114_DIF_I24I2S, 587 /* AK4114_REG_IO0 */ AK4114_TX1E, 588 /* AK4114_REG_IO1 */ AK4114_EFH_1024 | AK4114_DIT | 589 AK4114_IPS(1), 590 /* AK4114_REG_INT0_MASK */ 0, 591 /* AK4114_REG_INT1_MASK */ 0 592 }; 593 static const unsigned char ak4114_init_txcsb[] = { 594 0x41, 0x02, 0x2c, 0x00, 0x00 595 }; 596 int err; 597 struct juli_spec *spec; 598 struct snd_akm4xxx *ak; 599 600 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 601 if (!spec) 602 return -ENOMEM; 603 ice->spec = spec; 604 605 err = snd_ak4114_create(ice->card, 606 juli_ak4114_read, 607 juli_ak4114_write, 608 ak4114_init_vals, ak4114_init_txcsb, 609 ice, &spec->ak4114); 610 if (err < 0) 611 return err; 612 /* callback for codecs rate setting */ 613 spec->ak4114->change_callback = juli_ak4114_change; 614 spec->ak4114->change_callback_private = ice; 615 /* AK4114 in Juli can detect external rate correctly */ 616 spec->ak4114->check_flags = 0; 617 618 #if 0 619 /* 620 * it seems that the analog doughter board detection does not work reliably, so 621 * force the analog flag; it should be very rare (if ever) to come at Juli@ 622 * used without the analog daughter board 623 */ 624 spec->analog = (ice->gpio.get_data(ice) & GPIO_ANALOG_PRESENT) ? 0 : 1; 625 #else 626 spec->analog = 1; 627 #endif 628 629 if (spec->analog) { 630 dev_info(ice->card->dev, "juli@: analog I/O detected\n"); 631 ice->num_total_dacs = 2; 632 ice->num_total_adcs = 2; 633 634 ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL); 635 ak = ice->akm; 636 if (!ak) 637 return -ENOMEM; 638 ice->akm_codecs = 1; 639 err = snd_ice1712_akm4xxx_init(ak, &akm_juli_dac, NULL, ice); 640 if (err < 0) 641 return err; 642 } 643 644 /* juli is clocked by Xilinx array */ 645 ice->hw_rates = &juli_rates_info; 646 ice->is_spdif_master = juli_is_spdif_master; 647 ice->get_rate = juli_get_rate; 648 ice->set_rate = juli_set_rate; 649 ice->set_mclk = juli_set_mclk; 650 ice->set_spdif_clock = juli_set_spdif_clock; 651 652 ice->spdif.ops.open = juli_spdif_in_open; 653 654 #ifdef CONFIG_PM_SLEEP 655 ice->pm_resume = juli_resume; 656 ice->pm_suspend = juli_suspend; 657 ice->pm_suspend_enabled = 1; 658 #endif 659 660 return 0; 661 } 662 663 664 /* 665 * Juli@ boards don't provide the EEPROM data except for the vendor IDs. 666 * hence the driver needs to sets up it properly. 667 */ 668 669 static unsigned char juli_eeprom[] = { 670 [ICE_EEP2_SYSCONF] = 0x2b, /* clock 512, mpu401, 1xADC, 1xDACs, 671 SPDIF in */ 672 [ICE_EEP2_ACLINK] = 0x80, /* I2S */ 673 [ICE_EEP2_I2S] = 0xf8, /* vol, 96k, 24bit, 192k */ 674 [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */ 675 [ICE_EEP2_GPIO_DIR] = 0x9f, /* 5, 6:inputs; 7, 4-0 outputs*/ 676 [ICE_EEP2_GPIO_DIR1] = 0xff, 677 [ICE_EEP2_GPIO_DIR2] = 0x7f, 678 [ICE_EEP2_GPIO_MASK] = 0x60, /* 5, 6: locked; 7, 4-0 writable */ 679 [ICE_EEP2_GPIO_MASK1] = 0x00, /* 0-7 writable */ 680 [ICE_EEP2_GPIO_MASK2] = 0x7f, 681 [ICE_EEP2_GPIO_STATE] = GPIO_FREQ_48KHZ | GPIO_MULTI_1X | 682 GPIO_INTERNAL_CLOCK, /* internal clock, multiple 1x, 48kHz*/ 683 [ICE_EEP2_GPIO_STATE1] = 0x00, /* unmuted */ 684 [ICE_EEP2_GPIO_STATE2] = 0x00, 685 }; 686 687 /* entry point */ 688 struct snd_ice1712_card_info snd_vt1724_juli_cards[] = { 689 { 690 .subvendor = VT1724_SUBDEVICE_JULI, 691 .name = "ESI Juli@", 692 .model = "juli", 693 .chip_init = juli_init, 694 .build_controls = juli_add_controls, 695 .eeprom_size = sizeof(juli_eeprom), 696 .eeprom_data = juli_eeprom, 697 }, 698 { } /* terminator */ 699 }; 700