1 /* 2 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT) 3 * VIA VT1720 (Envy24PT) 4 * 5 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> 6 * 2002 James Stafford <jstafford@ampltd.com> 7 * 2003 Takashi Iwai <tiwai@suse.de> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 * 23 */ 24 25 #include <linux/io.h> 26 #include <linux/delay.h> 27 #include <linux/interrupt.h> 28 #include <linux/init.h> 29 #include <linux/pci.h> 30 #include <linux/slab.h> 31 #include <linux/moduleparam.h> 32 #include <linux/mutex.h> 33 #include <sound/core.h> 34 #include <sound/info.h> 35 #include <sound/rawmidi.h> 36 #include <sound/initval.h> 37 38 #include <sound/asoundef.h> 39 40 #include "ice1712.h" 41 #include "envy24ht.h" 42 43 /* lowlevel routines */ 44 #include "amp.h" 45 #include "revo.h" 46 #include "aureon.h" 47 #include "vt1720_mobo.h" 48 #include "pontis.h" 49 #include "prodigy192.h" 50 #include "prodigy_hifi.h" 51 #include "juli.h" 52 #include "maya44.h" 53 #include "phase.h" 54 #include "wtm.h" 55 #include "se.h" 56 #include "quartet.h" 57 58 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); 59 MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)"); 60 MODULE_LICENSE("GPL"); 61 MODULE_SUPPORTED_DEVICE("{" 62 REVO_DEVICE_DESC 63 AMP_AUDIO2000_DEVICE_DESC 64 AUREON_DEVICE_DESC 65 VT1720_MOBO_DEVICE_DESC 66 PONTIS_DEVICE_DESC 67 PRODIGY192_DEVICE_DESC 68 PRODIGY_HIFI_DEVICE_DESC 69 JULI_DEVICE_DESC 70 MAYA44_DEVICE_DESC 71 PHASE_DEVICE_DESC 72 WTM_DEVICE_DESC 73 SE_DEVICE_DESC 74 QTET_DEVICE_DESC 75 "{VIA,VT1720}," 76 "{VIA,VT1724}," 77 "{ICEnsemble,Generic ICE1724}," 78 "{ICEnsemble,Generic Envy24HT}" 79 "{ICEnsemble,Generic Envy24PT}}"); 80 81 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 82 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 83 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 84 static char *model[SNDRV_CARDS]; 85 86 module_param_array(index, int, NULL, 0444); 87 MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard."); 88 module_param_array(id, charp, NULL, 0444); 89 MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard."); 90 module_param_array(enable, bool, NULL, 0444); 91 MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard."); 92 module_param_array(model, charp, NULL, 0444); 93 MODULE_PARM_DESC(model, "Use the given board model."); 94 95 96 /* Both VT1720 and VT1724 have the same PCI IDs */ 97 static DEFINE_PCI_DEVICE_TABLE(snd_vt1724_ids) = { 98 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_VT1724), 0 }, 99 { 0, } 100 }; 101 102 MODULE_DEVICE_TABLE(pci, snd_vt1724_ids); 103 104 105 static int PRO_RATE_LOCKED; 106 static int PRO_RATE_RESET = 1; 107 static unsigned int PRO_RATE_DEFAULT = 44100; 108 109 static char *ext_clock_names[1] = { "IEC958 In" }; 110 111 /* 112 * Basic I/O 113 */ 114 115 /* 116 * default rates, default clock routines 117 */ 118 119 /* check whether the clock mode is spdif-in */ 120 static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice) 121 { 122 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0; 123 } 124 125 /* 126 * locking rate makes sense only for internal clock mode 127 */ 128 static inline int is_pro_rate_locked(struct snd_ice1712 *ice) 129 { 130 return (!ice->is_spdif_master(ice)) && PRO_RATE_LOCKED; 131 } 132 133 /* 134 * ac97 section 135 */ 136 137 static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice) 138 { 139 unsigned char old_cmd; 140 int tm; 141 for (tm = 0; tm < 0x10000; tm++) { 142 old_cmd = inb(ICEMT1724(ice, AC97_CMD)); 143 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ)) 144 continue; 145 if (!(old_cmd & VT1724_AC97_READY)) 146 continue; 147 return old_cmd; 148 } 149 snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n"); 150 return old_cmd; 151 } 152 153 static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit) 154 { 155 int tm; 156 for (tm = 0; tm < 0x10000; tm++) 157 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0) 158 return 0; 159 snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n"); 160 return -EIO; 161 } 162 163 static void snd_vt1724_ac97_write(struct snd_ac97 *ac97, 164 unsigned short reg, 165 unsigned short val) 166 { 167 struct snd_ice1712 *ice = ac97->private_data; 168 unsigned char old_cmd; 169 170 old_cmd = snd_vt1724_ac97_ready(ice); 171 old_cmd &= ~VT1724_AC97_ID_MASK; 172 old_cmd |= ac97->num; 173 outb(reg, ICEMT1724(ice, AC97_INDEX)); 174 outw(val, ICEMT1724(ice, AC97_DATA)); 175 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD)); 176 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE); 177 } 178 179 static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 180 { 181 struct snd_ice1712 *ice = ac97->private_data; 182 unsigned char old_cmd; 183 184 old_cmd = snd_vt1724_ac97_ready(ice); 185 old_cmd &= ~VT1724_AC97_ID_MASK; 186 old_cmd |= ac97->num; 187 outb(reg, ICEMT1724(ice, AC97_INDEX)); 188 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD)); 189 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0) 190 return ~0; 191 return inw(ICEMT1724(ice, AC97_DATA)); 192 } 193 194 195 /* 196 * GPIO operations 197 */ 198 199 /* set gpio direction 0 = read, 1 = write */ 200 static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data) 201 { 202 outl(data, ICEREG1724(ice, GPIO_DIRECTION)); 203 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */ 204 } 205 206 /* get gpio direction 0 = read, 1 = write */ 207 static unsigned int snd_vt1724_get_gpio_dir(struct snd_ice1712 *ice) 208 { 209 return inl(ICEREG1724(ice, GPIO_DIRECTION)); 210 } 211 212 /* set the gpio mask (0 = writable) */ 213 static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data) 214 { 215 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK)); 216 if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */ 217 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22)); 218 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */ 219 } 220 221 static unsigned int snd_vt1724_get_gpio_mask(struct snd_ice1712 *ice) 222 { 223 unsigned int mask; 224 if (!ice->vt1720) 225 mask = (unsigned int)inb(ICEREG1724(ice, GPIO_WRITE_MASK_22)); 226 else 227 mask = 0; 228 mask = (mask << 16) | inw(ICEREG1724(ice, GPIO_WRITE_MASK)); 229 return mask; 230 } 231 232 static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data) 233 { 234 outw(data, ICEREG1724(ice, GPIO_DATA)); 235 if (!ice->vt1720) 236 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22)); 237 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */ 238 } 239 240 static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice) 241 { 242 unsigned int data; 243 if (!ice->vt1720) 244 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22)); 245 else 246 data = 0; 247 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA)); 248 return data; 249 } 250 251 /* 252 * MIDI 253 */ 254 255 static void vt1724_midi_clear_rx(struct snd_ice1712 *ice) 256 { 257 unsigned int count; 258 259 for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count) 260 inb(ICEREG1724(ice, MPU_DATA)); 261 } 262 263 static inline struct snd_rawmidi_substream * 264 get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream) 265 { 266 return list_first_entry(&ice->rmidi[0]->streams[stream].substreams, 267 struct snd_rawmidi_substream, list); 268 } 269 270 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable); 271 272 static void vt1724_midi_write(struct snd_ice1712 *ice) 273 { 274 struct snd_rawmidi_substream *s; 275 int count, i; 276 u8 buffer[32]; 277 278 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT); 279 count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO)); 280 if (count > 0) { 281 count = snd_rawmidi_transmit(s, buffer, count); 282 for (i = 0; i < count; ++i) 283 outb(buffer[i], ICEREG1724(ice, MPU_DATA)); 284 } 285 /* mask irq when all bytes have been transmitted. 286 * enabled again in output_trigger when the new data comes in. 287 */ 288 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 289 !snd_rawmidi_transmit_empty(s)); 290 } 291 292 static void vt1724_midi_read(struct snd_ice1712 *ice) 293 { 294 struct snd_rawmidi_substream *s; 295 int count, i; 296 u8 buffer[32]; 297 298 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT); 299 count = inb(ICEREG1724(ice, MPU_RXFIFO)); 300 if (count > 0) { 301 count = min(count, 32); 302 for (i = 0; i < count; ++i) 303 buffer[i] = inb(ICEREG1724(ice, MPU_DATA)); 304 snd_rawmidi_receive(s, buffer, count); 305 } 306 } 307 308 /* call with ice->reg_lock */ 309 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable) 310 { 311 u8 mask = inb(ICEREG1724(ice, IRQMASK)); 312 if (enable) 313 mask &= ~flag; 314 else 315 mask |= flag; 316 outb(mask, ICEREG1724(ice, IRQMASK)); 317 } 318 319 static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream, 320 u8 flag, int enable) 321 { 322 struct snd_ice1712 *ice = substream->rmidi->private_data; 323 324 spin_lock_irq(&ice->reg_lock); 325 enable_midi_irq(ice, flag, enable); 326 spin_unlock_irq(&ice->reg_lock); 327 } 328 329 static int vt1724_midi_output_open(struct snd_rawmidi_substream *s) 330 { 331 return 0; 332 } 333 334 static int vt1724_midi_output_close(struct snd_rawmidi_substream *s) 335 { 336 return 0; 337 } 338 339 static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up) 340 { 341 struct snd_ice1712 *ice = s->rmidi->private_data; 342 unsigned long flags; 343 344 spin_lock_irqsave(&ice->reg_lock, flags); 345 if (up) { 346 ice->midi_output = 1; 347 vt1724_midi_write(ice); 348 } else { 349 ice->midi_output = 0; 350 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 351 } 352 spin_unlock_irqrestore(&ice->reg_lock, flags); 353 } 354 355 static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s) 356 { 357 struct snd_ice1712 *ice = s->rmidi->private_data; 358 unsigned long timeout; 359 360 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0); 361 /* 32 bytes should be transmitted in less than about 12 ms */ 362 timeout = jiffies + msecs_to_jiffies(15); 363 do { 364 if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY) 365 break; 366 schedule_timeout_uninterruptible(1); 367 } while (time_after(timeout, jiffies)); 368 } 369 370 static struct snd_rawmidi_ops vt1724_midi_output_ops = { 371 .open = vt1724_midi_output_open, 372 .close = vt1724_midi_output_close, 373 .trigger = vt1724_midi_output_trigger, 374 .drain = vt1724_midi_output_drain, 375 }; 376 377 static int vt1724_midi_input_open(struct snd_rawmidi_substream *s) 378 { 379 vt1724_midi_clear_rx(s->rmidi->private_data); 380 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1); 381 return 0; 382 } 383 384 static int vt1724_midi_input_close(struct snd_rawmidi_substream *s) 385 { 386 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0); 387 return 0; 388 } 389 390 static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up) 391 { 392 struct snd_ice1712 *ice = s->rmidi->private_data; 393 unsigned long flags; 394 395 spin_lock_irqsave(&ice->reg_lock, flags); 396 if (up) { 397 ice->midi_input = 1; 398 vt1724_midi_read(ice); 399 } else { 400 ice->midi_input = 0; 401 } 402 spin_unlock_irqrestore(&ice->reg_lock, flags); 403 } 404 405 static struct snd_rawmidi_ops vt1724_midi_input_ops = { 406 .open = vt1724_midi_input_open, 407 .close = vt1724_midi_input_close, 408 .trigger = vt1724_midi_input_trigger, 409 }; 410 411 412 /* 413 * Interrupt handler 414 */ 415 416 static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id) 417 { 418 struct snd_ice1712 *ice = dev_id; 419 unsigned char status; 420 unsigned char status_mask = 421 VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM; 422 int handled = 0; 423 int timeout = 0; 424 425 while (1) { 426 status = inb(ICEREG1724(ice, IRQSTAT)); 427 status &= status_mask; 428 if (status == 0) 429 break; 430 spin_lock(&ice->reg_lock); 431 if (++timeout > 10) { 432 status = inb(ICEREG1724(ice, IRQSTAT)); 433 printk(KERN_ERR "ice1724: Too long irq loop, " 434 "status = 0x%x\n", status); 435 if (status & VT1724_IRQ_MPU_TX) { 436 printk(KERN_ERR "ice1724: Disabling MPU_TX\n"); 437 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 438 } 439 spin_unlock(&ice->reg_lock); 440 break; 441 } 442 handled = 1; 443 if (status & VT1724_IRQ_MPU_TX) { 444 if (ice->midi_output) 445 vt1724_midi_write(ice); 446 else 447 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 448 /* Due to mysterical reasons, MPU_TX is always 449 * generated (and can't be cleared) when a PCM 450 * playback is going. So let's ignore at the 451 * next loop. 452 */ 453 status_mask &= ~VT1724_IRQ_MPU_TX; 454 } 455 if (status & VT1724_IRQ_MPU_RX) { 456 if (ice->midi_input) 457 vt1724_midi_read(ice); 458 else 459 vt1724_midi_clear_rx(ice); 460 } 461 /* ack MPU irq */ 462 outb(status, ICEREG1724(ice, IRQSTAT)); 463 spin_unlock(&ice->reg_lock); 464 if (status & VT1724_IRQ_MTPCM) { 465 /* 466 * Multi-track PCM 467 * PCM assignment are: 468 * Playback DMA0 (M/C) = playback_pro_substream 469 * Playback DMA1 = playback_con_substream_ds[0] 470 * Playback DMA2 = playback_con_substream_ds[1] 471 * Playback DMA3 = playback_con_substream_ds[2] 472 * Playback DMA4 (SPDIF) = playback_con_substream 473 * Record DMA0 = capture_pro_substream 474 * Record DMA1 = capture_con_substream 475 */ 476 unsigned char mtstat = inb(ICEMT1724(ice, IRQ)); 477 if (mtstat & VT1724_MULTI_PDMA0) { 478 if (ice->playback_pro_substream) 479 snd_pcm_period_elapsed(ice->playback_pro_substream); 480 } 481 if (mtstat & VT1724_MULTI_RDMA0) { 482 if (ice->capture_pro_substream) 483 snd_pcm_period_elapsed(ice->capture_pro_substream); 484 } 485 if (mtstat & VT1724_MULTI_PDMA1) { 486 if (ice->playback_con_substream_ds[0]) 487 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]); 488 } 489 if (mtstat & VT1724_MULTI_PDMA2) { 490 if (ice->playback_con_substream_ds[1]) 491 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]); 492 } 493 if (mtstat & VT1724_MULTI_PDMA3) { 494 if (ice->playback_con_substream_ds[2]) 495 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]); 496 } 497 if (mtstat & VT1724_MULTI_PDMA4) { 498 if (ice->playback_con_substream) 499 snd_pcm_period_elapsed(ice->playback_con_substream); 500 } 501 if (mtstat & VT1724_MULTI_RDMA1) { 502 if (ice->capture_con_substream) 503 snd_pcm_period_elapsed(ice->capture_con_substream); 504 } 505 /* ack anyway to avoid freeze */ 506 outb(mtstat, ICEMT1724(ice, IRQ)); 507 /* ought to really handle this properly */ 508 if (mtstat & VT1724_MULTI_FIFO_ERR) { 509 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR)); 510 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR)); 511 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK)); 512 /* If I don't do this, I get machine lockup due to continual interrupts */ 513 } 514 515 } 516 } 517 return IRQ_RETVAL(handled); 518 } 519 520 /* 521 * PCM code - professional part (multitrack) 522 */ 523 524 static unsigned int rates[] = { 525 8000, 9600, 11025, 12000, 16000, 22050, 24000, 526 32000, 44100, 48000, 64000, 88200, 96000, 527 176400, 192000, 528 }; 529 530 static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = { 531 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */ 532 .list = rates, 533 .mask = 0, 534 }; 535 536 static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = { 537 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */ 538 .list = rates, 539 .mask = 0, 540 }; 541 542 static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = { 543 .count = ARRAY_SIZE(rates), 544 .list = rates, 545 .mask = 0, 546 }; 547 548 struct vt1724_pcm_reg { 549 unsigned int addr; /* ADDR register offset */ 550 unsigned int size; /* SIZE register offset */ 551 unsigned int count; /* COUNT register offset */ 552 unsigned int start; /* start & pause bit */ 553 }; 554 555 static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 556 { 557 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 558 unsigned char what; 559 unsigned char old; 560 struct snd_pcm_substream *s; 561 562 what = 0; 563 snd_pcm_group_for_each_entry(s, substream) { 564 if (snd_pcm_substream_chip(s) == ice) { 565 const struct vt1724_pcm_reg *reg; 566 reg = s->runtime->private_data; 567 what |= reg->start; 568 snd_pcm_trigger_done(s, substream); 569 } 570 } 571 572 switch (cmd) { 573 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 574 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 575 spin_lock(&ice->reg_lock); 576 old = inb(ICEMT1724(ice, DMA_PAUSE)); 577 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) 578 old |= what; 579 else 580 old &= ~what; 581 outb(old, ICEMT1724(ice, DMA_PAUSE)); 582 spin_unlock(&ice->reg_lock); 583 break; 584 585 case SNDRV_PCM_TRIGGER_START: 586 case SNDRV_PCM_TRIGGER_STOP: 587 case SNDRV_PCM_TRIGGER_SUSPEND: 588 spin_lock(&ice->reg_lock); 589 old = inb(ICEMT1724(ice, DMA_CONTROL)); 590 if (cmd == SNDRV_PCM_TRIGGER_START) 591 old |= what; 592 else 593 old &= ~what; 594 outb(old, ICEMT1724(ice, DMA_CONTROL)); 595 spin_unlock(&ice->reg_lock); 596 break; 597 598 case SNDRV_PCM_TRIGGER_RESUME: 599 /* apps will have to restart stream */ 600 break; 601 602 default: 603 return -EINVAL; 604 } 605 return 0; 606 } 607 608 /* 609 */ 610 611 #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\ 612 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START) 613 #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\ 614 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE) 615 616 static const unsigned int stdclock_rate_list[16] = { 617 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100, 618 22050, 11025, 88200, 176400, 0, 192000, 64000 619 }; 620 621 static unsigned int stdclock_get_rate(struct snd_ice1712 *ice) 622 { 623 unsigned int rate; 624 rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15]; 625 return rate; 626 } 627 628 static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate) 629 { 630 int i; 631 for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) { 632 if (stdclock_rate_list[i] == rate) { 633 outb(i, ICEMT1724(ice, RATE)); 634 return; 635 } 636 } 637 } 638 639 static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice, 640 unsigned int rate) 641 { 642 unsigned char val, old; 643 /* check MT02 */ 644 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 645 val = old = inb(ICEMT1724(ice, I2S_FORMAT)); 646 if (rate > 96000) 647 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */ 648 else 649 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */ 650 if (val != old) { 651 outb(val, ICEMT1724(ice, I2S_FORMAT)); 652 /* master clock changed */ 653 return 1; 654 } 655 } 656 /* no change in master clock */ 657 return 0; 658 } 659 660 static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, 661 int force) 662 { 663 unsigned long flags; 664 unsigned char mclk_change; 665 unsigned int i, old_rate; 666 667 if (rate > ice->hw_rates->list[ice->hw_rates->count - 1]) 668 return -EINVAL; 669 670 spin_lock_irqsave(&ice->reg_lock, flags); 671 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) || 672 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) { 673 /* running? we cannot change the rate now... */ 674 spin_unlock_irqrestore(&ice->reg_lock, flags); 675 return ((rate == ice->cur_rate) && !force) ? 0 : -EBUSY; 676 } 677 if (!force && is_pro_rate_locked(ice)) { 678 /* comparing required and current rate - makes sense for 679 * internal clock only */ 680 spin_unlock_irqrestore(&ice->reg_lock, flags); 681 return (rate == ice->cur_rate) ? 0 : -EBUSY; 682 } 683 684 if (force || !ice->is_spdif_master(ice)) { 685 /* force means the rate was switched by ucontrol, otherwise 686 * setting clock rate for internal clock mode */ 687 old_rate = ice->get_rate(ice); 688 if (force || (old_rate != rate)) 689 ice->set_rate(ice, rate); 690 else if (rate == ice->cur_rate) { 691 spin_unlock_irqrestore(&ice->reg_lock, flags); 692 return 0; 693 } 694 } 695 696 ice->cur_rate = rate; 697 698 /* setting master clock */ 699 mclk_change = ice->set_mclk(ice, rate); 700 701 spin_unlock_irqrestore(&ice->reg_lock, flags); 702 703 if (mclk_change && ice->gpio.i2s_mclk_changed) 704 ice->gpio.i2s_mclk_changed(ice); 705 if (ice->gpio.set_pro_rate) 706 ice->gpio.set_pro_rate(ice, rate); 707 708 /* set up codecs */ 709 for (i = 0; i < ice->akm_codecs; i++) { 710 if (ice->akm[i].ops.set_rate_val) 711 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate); 712 } 713 if (ice->spdif.ops.setup_rate) 714 ice->spdif.ops.setup_rate(ice, rate); 715 716 return 0; 717 } 718 719 static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream, 720 struct snd_pcm_hw_params *hw_params) 721 { 722 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 723 int i, chs, err; 724 725 chs = params_channels(hw_params); 726 mutex_lock(&ice->open_mutex); 727 /* mark surround channels */ 728 if (substream == ice->playback_pro_substream) { 729 /* PDMA0 can be multi-channel up to 8 */ 730 chs = chs / 2 - 1; 731 for (i = 0; i < chs; i++) { 732 if (ice->pcm_reserved[i] && 733 ice->pcm_reserved[i] != substream) { 734 mutex_unlock(&ice->open_mutex); 735 return -EBUSY; 736 } 737 ice->pcm_reserved[i] = substream; 738 } 739 for (; i < 3; i++) { 740 if (ice->pcm_reserved[i] == substream) 741 ice->pcm_reserved[i] = NULL; 742 } 743 } else { 744 for (i = 0; i < 3; i++) { 745 /* check individual playback stream */ 746 if (ice->playback_con_substream_ds[i] == substream) { 747 if (ice->pcm_reserved[i] && 748 ice->pcm_reserved[i] != substream) { 749 mutex_unlock(&ice->open_mutex); 750 return -EBUSY; 751 } 752 ice->pcm_reserved[i] = substream; 753 break; 754 } 755 } 756 } 757 mutex_unlock(&ice->open_mutex); 758 759 err = snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0); 760 if (err < 0) 761 return err; 762 763 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 764 } 765 766 static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream) 767 { 768 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 769 int i; 770 771 mutex_lock(&ice->open_mutex); 772 /* unmark surround channels */ 773 for (i = 0; i < 3; i++) 774 if (ice->pcm_reserved[i] == substream) 775 ice->pcm_reserved[i] = NULL; 776 mutex_unlock(&ice->open_mutex); 777 return snd_pcm_lib_free_pages(substream); 778 } 779 780 static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream) 781 { 782 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 783 unsigned char val; 784 unsigned int size; 785 786 spin_lock_irq(&ice->reg_lock); 787 val = (8 - substream->runtime->channels) >> 1; 788 outb(val, ICEMT1724(ice, BURST)); 789 790 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR)); 791 792 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1; 793 /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */ 794 outw(size, ICEMT1724(ice, PLAYBACK_SIZE)); 795 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2); 796 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 797 /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */ 798 outw(size, ICEMT1724(ice, PLAYBACK_COUNT)); 799 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2); 800 801 spin_unlock_irq(&ice->reg_lock); 802 803 /* 804 printk(KERN_DEBUG "pro prepare: ch = %d, addr = 0x%x, " 805 "buffer = 0x%x, period = 0x%x\n", 806 substream->runtime->channels, 807 (unsigned int)substream->runtime->dma_addr, 808 snd_pcm_lib_buffer_bytes(substream), 809 snd_pcm_lib_period_bytes(substream)); 810 */ 811 return 0; 812 } 813 814 static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream) 815 { 816 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 817 size_t ptr; 818 819 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START)) 820 return 0; 821 #if 0 /* read PLAYBACK_ADDR */ 822 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR)); 823 if (ptr < substream->runtime->dma_addr) { 824 snd_printd("ice1724: invalid negative ptr\n"); 825 return 0; 826 } 827 ptr -= substream->runtime->dma_addr; 828 ptr = bytes_to_frames(substream->runtime, ptr); 829 if (ptr >= substream->runtime->buffer_size) { 830 snd_printd("ice1724: invalid ptr %d (size=%d)\n", 831 (int)ptr, (int)substream->runtime->period_size); 832 return 0; 833 } 834 #else /* read PLAYBACK_SIZE */ 835 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff; 836 ptr = (ptr + 1) << 2; 837 ptr = bytes_to_frames(substream->runtime, ptr); 838 if (!ptr) 839 ; 840 else if (ptr <= substream->runtime->buffer_size) 841 ptr = substream->runtime->buffer_size - ptr; 842 else { 843 snd_printd("ice1724: invalid ptr %d (size=%d)\n", 844 (int)ptr, (int)substream->runtime->buffer_size); 845 ptr = 0; 846 } 847 #endif 848 return ptr; 849 } 850 851 static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream) 852 { 853 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 854 const struct vt1724_pcm_reg *reg = substream->runtime->private_data; 855 856 spin_lock_irq(&ice->reg_lock); 857 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr); 858 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1, 859 ice->profi_port + reg->size); 860 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, 861 ice->profi_port + reg->count); 862 spin_unlock_irq(&ice->reg_lock); 863 return 0; 864 } 865 866 static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream) 867 { 868 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 869 const struct vt1724_pcm_reg *reg = substream->runtime->private_data; 870 size_t ptr; 871 872 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start)) 873 return 0; 874 #if 0 /* use ADDR register */ 875 ptr = inl(ice->profi_port + reg->addr); 876 ptr -= substream->runtime->dma_addr; 877 return bytes_to_frames(substream->runtime, ptr); 878 #else /* use SIZE register */ 879 ptr = inw(ice->profi_port + reg->size); 880 ptr = (ptr + 1) << 2; 881 ptr = bytes_to_frames(substream->runtime, ptr); 882 if (!ptr) 883 ; 884 else if (ptr <= substream->runtime->buffer_size) 885 ptr = substream->runtime->buffer_size - ptr; 886 else { 887 snd_printd("ice1724: invalid ptr %d (size=%d)\n", 888 (int)ptr, (int)substream->runtime->buffer_size); 889 ptr = 0; 890 } 891 return ptr; 892 #endif 893 } 894 895 static const struct vt1724_pcm_reg vt1724_pdma0_reg = { 896 .addr = VT1724_MT_PLAYBACK_ADDR, 897 .size = VT1724_MT_PLAYBACK_SIZE, 898 .count = VT1724_MT_PLAYBACK_COUNT, 899 .start = VT1724_PDMA0_START, 900 }; 901 902 static const struct vt1724_pcm_reg vt1724_pdma4_reg = { 903 .addr = VT1724_MT_PDMA4_ADDR, 904 .size = VT1724_MT_PDMA4_SIZE, 905 .count = VT1724_MT_PDMA4_COUNT, 906 .start = VT1724_PDMA4_START, 907 }; 908 909 static const struct vt1724_pcm_reg vt1724_rdma0_reg = { 910 .addr = VT1724_MT_CAPTURE_ADDR, 911 .size = VT1724_MT_CAPTURE_SIZE, 912 .count = VT1724_MT_CAPTURE_COUNT, 913 .start = VT1724_RDMA0_START, 914 }; 915 916 static const struct vt1724_pcm_reg vt1724_rdma1_reg = { 917 .addr = VT1724_MT_RDMA1_ADDR, 918 .size = VT1724_MT_RDMA1_SIZE, 919 .count = VT1724_MT_RDMA1_COUNT, 920 .start = VT1724_RDMA1_START, 921 }; 922 923 #define vt1724_playback_pro_reg vt1724_pdma0_reg 924 #define vt1724_playback_spdif_reg vt1724_pdma4_reg 925 #define vt1724_capture_pro_reg vt1724_rdma0_reg 926 #define vt1724_capture_spdif_reg vt1724_rdma1_reg 927 928 static const struct snd_pcm_hardware snd_vt1724_playback_pro = { 929 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 930 SNDRV_PCM_INFO_BLOCK_TRANSFER | 931 SNDRV_PCM_INFO_MMAP_VALID | 932 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 933 .formats = SNDRV_PCM_FMTBIT_S32_LE, 934 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, 935 .rate_min = 8000, 936 .rate_max = 192000, 937 .channels_min = 2, 938 .channels_max = 8, 939 .buffer_bytes_max = (1UL << 21), /* 19bits dword */ 940 .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */ 941 .period_bytes_max = (1UL << 21), 942 .periods_min = 2, 943 .periods_max = 1024, 944 }; 945 946 static const struct snd_pcm_hardware snd_vt1724_spdif = { 947 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 948 SNDRV_PCM_INFO_BLOCK_TRANSFER | 949 SNDRV_PCM_INFO_MMAP_VALID | 950 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 951 .formats = SNDRV_PCM_FMTBIT_S32_LE, 952 .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100| 953 SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200| 954 SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400| 955 SNDRV_PCM_RATE_192000), 956 .rate_min = 32000, 957 .rate_max = 192000, 958 .channels_min = 2, 959 .channels_max = 2, 960 .buffer_bytes_max = (1UL << 18), /* 16bits dword */ 961 .period_bytes_min = 2 * 4 * 2, 962 .period_bytes_max = (1UL << 18), 963 .periods_min = 2, 964 .periods_max = 1024, 965 }; 966 967 static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = { 968 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 969 SNDRV_PCM_INFO_BLOCK_TRANSFER | 970 SNDRV_PCM_INFO_MMAP_VALID | 971 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 972 .formats = SNDRV_PCM_FMTBIT_S32_LE, 973 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, 974 .rate_min = 8000, 975 .rate_max = 192000, 976 .channels_min = 2, 977 .channels_max = 2, 978 .buffer_bytes_max = (1UL << 18), /* 16bits dword */ 979 .period_bytes_min = 2 * 4 * 2, 980 .period_bytes_max = (1UL << 18), 981 .periods_min = 2, 982 .periods_max = 1024, 983 }; 984 985 /* 986 * set rate constraints 987 */ 988 static void set_std_hw_rates(struct snd_ice1712 *ice) 989 { 990 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 991 /* I2S */ 992 /* VT1720 doesn't support more than 96kHz */ 993 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720) 994 ice->hw_rates = &hw_constraints_rates_192; 995 else 996 ice->hw_rates = &hw_constraints_rates_96; 997 } else { 998 /* ACLINK */ 999 ice->hw_rates = &hw_constraints_rates_48; 1000 } 1001 } 1002 1003 static int set_rate_constraints(struct snd_ice1712 *ice, 1004 struct snd_pcm_substream *substream) 1005 { 1006 struct snd_pcm_runtime *runtime = substream->runtime; 1007 1008 runtime->hw.rate_min = ice->hw_rates->list[0]; 1009 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1]; 1010 runtime->hw.rates = SNDRV_PCM_RATE_KNOT; 1011 return snd_pcm_hw_constraint_list(runtime, 0, 1012 SNDRV_PCM_HW_PARAM_RATE, 1013 ice->hw_rates); 1014 } 1015 1016 /* multi-channel playback needs alignment 8x32bit regardless of the channels 1017 * actually used 1018 */ 1019 #define VT1724_BUFFER_ALIGN 0x20 1020 1021 static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream) 1022 { 1023 struct snd_pcm_runtime *runtime = substream->runtime; 1024 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1025 int chs, num_indeps; 1026 1027 runtime->private_data = (void *)&vt1724_playback_pro_reg; 1028 ice->playback_pro_substream = substream; 1029 runtime->hw = snd_vt1724_playback_pro; 1030 snd_pcm_set_sync(substream); 1031 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1032 set_rate_constraints(ice, substream); 1033 mutex_lock(&ice->open_mutex); 1034 /* calculate the currently available channels */ 1035 num_indeps = ice->num_total_dacs / 2 - 1; 1036 for (chs = 0; chs < num_indeps; chs++) { 1037 if (ice->pcm_reserved[chs]) 1038 break; 1039 } 1040 chs = (chs + 1) * 2; 1041 runtime->hw.channels_max = chs; 1042 if (chs > 2) /* channels must be even */ 1043 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2); 1044 mutex_unlock(&ice->open_mutex); 1045 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1046 VT1724_BUFFER_ALIGN); 1047 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1048 VT1724_BUFFER_ALIGN); 1049 if (ice->pro_open) 1050 ice->pro_open(ice, substream); 1051 return 0; 1052 } 1053 1054 static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream) 1055 { 1056 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1057 struct snd_pcm_runtime *runtime = substream->runtime; 1058 1059 runtime->private_data = (void *)&vt1724_capture_pro_reg; 1060 ice->capture_pro_substream = substream; 1061 runtime->hw = snd_vt1724_2ch_stereo; 1062 snd_pcm_set_sync(substream); 1063 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1064 set_rate_constraints(ice, substream); 1065 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1066 VT1724_BUFFER_ALIGN); 1067 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1068 VT1724_BUFFER_ALIGN); 1069 if (ice->pro_open) 1070 ice->pro_open(ice, substream); 1071 return 0; 1072 } 1073 1074 static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream) 1075 { 1076 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1077 1078 if (PRO_RATE_RESET) 1079 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1080 ice->playback_pro_substream = NULL; 1081 1082 return 0; 1083 } 1084 1085 static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream) 1086 { 1087 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1088 1089 if (PRO_RATE_RESET) 1090 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1091 ice->capture_pro_substream = NULL; 1092 return 0; 1093 } 1094 1095 static struct snd_pcm_ops snd_vt1724_playback_pro_ops = { 1096 .open = snd_vt1724_playback_pro_open, 1097 .close = snd_vt1724_playback_pro_close, 1098 .ioctl = snd_pcm_lib_ioctl, 1099 .hw_params = snd_vt1724_pcm_hw_params, 1100 .hw_free = snd_vt1724_pcm_hw_free, 1101 .prepare = snd_vt1724_playback_pro_prepare, 1102 .trigger = snd_vt1724_pcm_trigger, 1103 .pointer = snd_vt1724_playback_pro_pointer, 1104 }; 1105 1106 static struct snd_pcm_ops snd_vt1724_capture_pro_ops = { 1107 .open = snd_vt1724_capture_pro_open, 1108 .close = snd_vt1724_capture_pro_close, 1109 .ioctl = snd_pcm_lib_ioctl, 1110 .hw_params = snd_vt1724_pcm_hw_params, 1111 .hw_free = snd_vt1724_pcm_hw_free, 1112 .prepare = snd_vt1724_pcm_prepare, 1113 .trigger = snd_vt1724_pcm_trigger, 1114 .pointer = snd_vt1724_pcm_pointer, 1115 }; 1116 1117 static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device) 1118 { 1119 struct snd_pcm *pcm; 1120 int err; 1121 1122 err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm); 1123 if (err < 0) 1124 return err; 1125 1126 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops); 1127 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops); 1128 1129 pcm->private_data = ice; 1130 pcm->info_flags = 0; 1131 strcpy(pcm->name, "ICE1724"); 1132 1133 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1134 snd_dma_pci_data(ice->pci), 1135 256*1024, 256*1024); 1136 1137 ice->pcm_pro = pcm; 1138 1139 return 0; 1140 } 1141 1142 1143 /* 1144 * SPDIF PCM 1145 */ 1146 1147 /* update spdif control bits; call with reg_lock */ 1148 static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val) 1149 { 1150 unsigned char cbit, disabled; 1151 1152 cbit = inb(ICEREG1724(ice, SPDIF_CFG)); 1153 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN; 1154 if (cbit != disabled) 1155 outb(disabled, ICEREG1724(ice, SPDIF_CFG)); 1156 outw(val, ICEMT1724(ice, SPDIF_CTRL)); 1157 if (cbit != disabled) 1158 outb(cbit, ICEREG1724(ice, SPDIF_CFG)); 1159 outw(val, ICEMT1724(ice, SPDIF_CTRL)); 1160 } 1161 1162 /* update SPDIF control bits according to the given rate */ 1163 static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate) 1164 { 1165 unsigned int val, nval; 1166 unsigned long flags; 1167 1168 spin_lock_irqsave(&ice->reg_lock, flags); 1169 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL)); 1170 nval &= ~(7 << 12); 1171 switch (rate) { 1172 case 44100: break; 1173 case 48000: nval |= 2 << 12; break; 1174 case 32000: nval |= 3 << 12; break; 1175 case 88200: nval |= 4 << 12; break; 1176 case 96000: nval |= 5 << 12; break; 1177 case 192000: nval |= 6 << 12; break; 1178 case 176400: nval |= 7 << 12; break; 1179 } 1180 if (val != nval) 1181 update_spdif_bits(ice, nval); 1182 spin_unlock_irqrestore(&ice->reg_lock, flags); 1183 } 1184 1185 static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream) 1186 { 1187 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1188 if (!ice->force_pdma4) 1189 update_spdif_rate(ice, substream->runtime->rate); 1190 return snd_vt1724_pcm_prepare(substream); 1191 } 1192 1193 static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream) 1194 { 1195 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1196 struct snd_pcm_runtime *runtime = substream->runtime; 1197 1198 runtime->private_data = (void *)&vt1724_playback_spdif_reg; 1199 ice->playback_con_substream = substream; 1200 if (ice->force_pdma4) { 1201 runtime->hw = snd_vt1724_2ch_stereo; 1202 set_rate_constraints(ice, substream); 1203 } else 1204 runtime->hw = snd_vt1724_spdif; 1205 snd_pcm_set_sync(substream); 1206 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1207 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1208 VT1724_BUFFER_ALIGN); 1209 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1210 VT1724_BUFFER_ALIGN); 1211 if (ice->spdif.ops.open) 1212 ice->spdif.ops.open(ice, substream); 1213 return 0; 1214 } 1215 1216 static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream) 1217 { 1218 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1219 1220 if (PRO_RATE_RESET) 1221 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1222 ice->playback_con_substream = NULL; 1223 if (ice->spdif.ops.close) 1224 ice->spdif.ops.close(ice, substream); 1225 1226 return 0; 1227 } 1228 1229 static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream) 1230 { 1231 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1232 struct snd_pcm_runtime *runtime = substream->runtime; 1233 1234 runtime->private_data = (void *)&vt1724_capture_spdif_reg; 1235 ice->capture_con_substream = substream; 1236 if (ice->force_rdma1) { 1237 runtime->hw = snd_vt1724_2ch_stereo; 1238 set_rate_constraints(ice, substream); 1239 } else 1240 runtime->hw = snd_vt1724_spdif; 1241 snd_pcm_set_sync(substream); 1242 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1243 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1244 VT1724_BUFFER_ALIGN); 1245 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1246 VT1724_BUFFER_ALIGN); 1247 if (ice->spdif.ops.open) 1248 ice->spdif.ops.open(ice, substream); 1249 return 0; 1250 } 1251 1252 static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream) 1253 { 1254 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1255 1256 if (PRO_RATE_RESET) 1257 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1258 ice->capture_con_substream = NULL; 1259 if (ice->spdif.ops.close) 1260 ice->spdif.ops.close(ice, substream); 1261 1262 return 0; 1263 } 1264 1265 static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = { 1266 .open = snd_vt1724_playback_spdif_open, 1267 .close = snd_vt1724_playback_spdif_close, 1268 .ioctl = snd_pcm_lib_ioctl, 1269 .hw_params = snd_vt1724_pcm_hw_params, 1270 .hw_free = snd_vt1724_pcm_hw_free, 1271 .prepare = snd_vt1724_playback_spdif_prepare, 1272 .trigger = snd_vt1724_pcm_trigger, 1273 .pointer = snd_vt1724_pcm_pointer, 1274 }; 1275 1276 static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = { 1277 .open = snd_vt1724_capture_spdif_open, 1278 .close = snd_vt1724_capture_spdif_close, 1279 .ioctl = snd_pcm_lib_ioctl, 1280 .hw_params = snd_vt1724_pcm_hw_params, 1281 .hw_free = snd_vt1724_pcm_hw_free, 1282 .prepare = snd_vt1724_pcm_prepare, 1283 .trigger = snd_vt1724_pcm_trigger, 1284 .pointer = snd_vt1724_pcm_pointer, 1285 }; 1286 1287 1288 static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device) 1289 { 1290 char *name; 1291 struct snd_pcm *pcm; 1292 int play, capt; 1293 int err; 1294 1295 if (ice->force_pdma4 || 1296 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) { 1297 play = 1; 1298 ice->has_spdif = 1; 1299 } else 1300 play = 0; 1301 if (ice->force_rdma1 || 1302 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) { 1303 capt = 1; 1304 ice->has_spdif = 1; 1305 } else 1306 capt = 0; 1307 if (!play && !capt) 1308 return 0; /* no spdif device */ 1309 1310 if (ice->force_pdma4 || ice->force_rdma1) 1311 name = "ICE1724 Secondary"; 1312 else 1313 name = "ICE1724 IEC958"; 1314 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm); 1315 if (err < 0) 1316 return err; 1317 1318 if (play) 1319 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1320 &snd_vt1724_playback_spdif_ops); 1321 if (capt) 1322 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 1323 &snd_vt1724_capture_spdif_ops); 1324 1325 pcm->private_data = ice; 1326 pcm->info_flags = 0; 1327 strcpy(pcm->name, name); 1328 1329 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1330 snd_dma_pci_data(ice->pci), 1331 256*1024, 256*1024); 1332 1333 ice->pcm = pcm; 1334 1335 return 0; 1336 } 1337 1338 1339 /* 1340 * independent surround PCMs 1341 */ 1342 1343 static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = { 1344 { 1345 .addr = VT1724_MT_PDMA1_ADDR, 1346 .size = VT1724_MT_PDMA1_SIZE, 1347 .count = VT1724_MT_PDMA1_COUNT, 1348 .start = VT1724_PDMA1_START, 1349 }, 1350 { 1351 .addr = VT1724_MT_PDMA2_ADDR, 1352 .size = VT1724_MT_PDMA2_SIZE, 1353 .count = VT1724_MT_PDMA2_COUNT, 1354 .start = VT1724_PDMA2_START, 1355 }, 1356 { 1357 .addr = VT1724_MT_PDMA3_ADDR, 1358 .size = VT1724_MT_PDMA3_SIZE, 1359 .count = VT1724_MT_PDMA3_COUNT, 1360 .start = VT1724_PDMA3_START, 1361 }, 1362 }; 1363 1364 static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream) 1365 { 1366 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1367 unsigned char val; 1368 1369 spin_lock_irq(&ice->reg_lock); 1370 val = 3 - substream->number; 1371 if (inb(ICEMT1724(ice, BURST)) < val) 1372 outb(val, ICEMT1724(ice, BURST)); 1373 spin_unlock_irq(&ice->reg_lock); 1374 return snd_vt1724_pcm_prepare(substream); 1375 } 1376 1377 static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream) 1378 { 1379 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1380 struct snd_pcm_runtime *runtime = substream->runtime; 1381 1382 mutex_lock(&ice->open_mutex); 1383 /* already used by PDMA0? */ 1384 if (ice->pcm_reserved[substream->number]) { 1385 mutex_unlock(&ice->open_mutex); 1386 return -EBUSY; /* FIXME: should handle blocking mode properly */ 1387 } 1388 mutex_unlock(&ice->open_mutex); 1389 runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number]; 1390 ice->playback_con_substream_ds[substream->number] = substream; 1391 runtime->hw = snd_vt1724_2ch_stereo; 1392 snd_pcm_set_sync(substream); 1393 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1394 set_rate_constraints(ice, substream); 1395 return 0; 1396 } 1397 1398 static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream) 1399 { 1400 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1401 1402 if (PRO_RATE_RESET) 1403 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1404 ice->playback_con_substream_ds[substream->number] = NULL; 1405 ice->pcm_reserved[substream->number] = NULL; 1406 1407 return 0; 1408 } 1409 1410 static struct snd_pcm_ops snd_vt1724_playback_indep_ops = { 1411 .open = snd_vt1724_playback_indep_open, 1412 .close = snd_vt1724_playback_indep_close, 1413 .ioctl = snd_pcm_lib_ioctl, 1414 .hw_params = snd_vt1724_pcm_hw_params, 1415 .hw_free = snd_vt1724_pcm_hw_free, 1416 .prepare = snd_vt1724_playback_indep_prepare, 1417 .trigger = snd_vt1724_pcm_trigger, 1418 .pointer = snd_vt1724_pcm_pointer, 1419 }; 1420 1421 1422 static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device) 1423 { 1424 struct snd_pcm *pcm; 1425 int play; 1426 int err; 1427 1428 play = ice->num_total_dacs / 2 - 1; 1429 if (play <= 0) 1430 return 0; 1431 1432 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm); 1433 if (err < 0) 1434 return err; 1435 1436 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1437 &snd_vt1724_playback_indep_ops); 1438 1439 pcm->private_data = ice; 1440 pcm->info_flags = 0; 1441 strcpy(pcm->name, "ICE1724 Surround PCM"); 1442 1443 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1444 snd_dma_pci_data(ice->pci), 1445 256*1024, 256*1024); 1446 1447 ice->pcm_ds = pcm; 1448 1449 return 0; 1450 } 1451 1452 1453 /* 1454 * Mixer section 1455 */ 1456 1457 static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 *ice) 1458 { 1459 int err; 1460 1461 if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) { 1462 struct snd_ac97_bus *pbus; 1463 struct snd_ac97_template ac97; 1464 static struct snd_ac97_bus_ops ops = { 1465 .write = snd_vt1724_ac97_write, 1466 .read = snd_vt1724_ac97_read, 1467 }; 1468 1469 /* cold reset */ 1470 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD)); 1471 mdelay(5); /* FIXME */ 1472 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD)); 1473 1474 err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus); 1475 if (err < 0) 1476 return err; 1477 memset(&ac97, 0, sizeof(ac97)); 1478 ac97.private_data = ice; 1479 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97); 1480 if (err < 0) 1481 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n"); 1482 else 1483 return 0; 1484 } 1485 /* I2S mixer only */ 1486 strcat(ice->card->mixername, "ICE1724 - multitrack"); 1487 return 0; 1488 } 1489 1490 /* 1491 * 1492 */ 1493 1494 static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx) 1495 { 1496 return (unsigned int)ice->eeprom.data[idx] | \ 1497 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \ 1498 ((unsigned int)ice->eeprom.data[idx + 2] << 16); 1499 } 1500 1501 static void snd_vt1724_proc_read(struct snd_info_entry *entry, 1502 struct snd_info_buffer *buffer) 1503 { 1504 struct snd_ice1712 *ice = entry->private_data; 1505 unsigned int idx; 1506 1507 snd_iprintf(buffer, "%s\n\n", ice->card->longname); 1508 snd_iprintf(buffer, "EEPROM:\n"); 1509 1510 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor); 1511 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size); 1512 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version); 1513 snd_iprintf(buffer, " System Config : 0x%x\n", 1514 ice->eeprom.data[ICE_EEP2_SYSCONF]); 1515 snd_iprintf(buffer, " ACLink : 0x%x\n", 1516 ice->eeprom.data[ICE_EEP2_ACLINK]); 1517 snd_iprintf(buffer, " I2S : 0x%x\n", 1518 ice->eeprom.data[ICE_EEP2_I2S]); 1519 snd_iprintf(buffer, " S/PDIF : 0x%x\n", 1520 ice->eeprom.data[ICE_EEP2_SPDIF]); 1521 snd_iprintf(buffer, " GPIO direction : 0x%x\n", 1522 ice->eeprom.gpiodir); 1523 snd_iprintf(buffer, " GPIO mask : 0x%x\n", 1524 ice->eeprom.gpiomask); 1525 snd_iprintf(buffer, " GPIO state : 0x%x\n", 1526 ice->eeprom.gpiostate); 1527 for (idx = 0x12; idx < ice->eeprom.size; idx++) 1528 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", 1529 idx, ice->eeprom.data[idx]); 1530 1531 snd_iprintf(buffer, "\nRegisters:\n"); 1532 1533 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n", 1534 (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK))); 1535 for (idx = 0x0; idx < 0x20 ; idx++) 1536 snd_iprintf(buffer, " CCS%02x : 0x%02x\n", 1537 idx, inb(ice->port+idx)); 1538 for (idx = 0x0; idx < 0x30 ; idx++) 1539 snd_iprintf(buffer, " MT%02x : 0x%02x\n", 1540 idx, inb(ice->profi_port+idx)); 1541 } 1542 1543 static void __devinit snd_vt1724_proc_init(struct snd_ice1712 *ice) 1544 { 1545 struct snd_info_entry *entry; 1546 1547 if (!snd_card_proc_new(ice->card, "ice1724", &entry)) 1548 snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read); 1549 } 1550 1551 /* 1552 * 1553 */ 1554 1555 static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol, 1556 struct snd_ctl_elem_info *uinfo) 1557 { 1558 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 1559 uinfo->count = sizeof(struct snd_ice1712_eeprom); 1560 return 0; 1561 } 1562 1563 static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol, 1564 struct snd_ctl_elem_value *ucontrol) 1565 { 1566 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1567 1568 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom)); 1569 return 0; 1570 } 1571 1572 static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = { 1573 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 1574 .name = "ICE1724 EEPROM", 1575 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1576 .info = snd_vt1724_eeprom_info, 1577 .get = snd_vt1724_eeprom_get 1578 }; 1579 1580 /* 1581 */ 1582 static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol, 1583 struct snd_ctl_elem_info *uinfo) 1584 { 1585 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1586 uinfo->count = 1; 1587 return 0; 1588 } 1589 1590 static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga) 1591 { 1592 unsigned int val, rbits; 1593 1594 val = diga->status[0] & 0x03; /* professional, non-audio */ 1595 if (val & 0x01) { 1596 /* professional */ 1597 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) == 1598 IEC958_AES0_PRO_EMPHASIS_5015) 1599 val |= 1U << 3; 1600 rbits = (diga->status[4] >> 3) & 0x0f; 1601 if (rbits) { 1602 switch (rbits) { 1603 case 2: val |= 5 << 12; break; /* 96k */ 1604 case 3: val |= 6 << 12; break; /* 192k */ 1605 case 10: val |= 4 << 12; break; /* 88.2k */ 1606 case 11: val |= 7 << 12; break; /* 176.4k */ 1607 } 1608 } else { 1609 switch (diga->status[0] & IEC958_AES0_PRO_FS) { 1610 case IEC958_AES0_PRO_FS_44100: 1611 break; 1612 case IEC958_AES0_PRO_FS_32000: 1613 val |= 3U << 12; 1614 break; 1615 default: 1616 val |= 2U << 12; 1617 break; 1618 } 1619 } 1620 } else { 1621 /* consumer */ 1622 val |= diga->status[1] & 0x04; /* copyright */ 1623 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) == 1624 IEC958_AES0_CON_EMPHASIS_5015) 1625 val |= 1U << 3; 1626 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */ 1627 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */ 1628 } 1629 return val; 1630 } 1631 1632 static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val) 1633 { 1634 memset(diga->status, 0, sizeof(diga->status)); 1635 diga->status[0] = val & 0x03; /* professional, non-audio */ 1636 if (val & 0x01) { 1637 /* professional */ 1638 if (val & (1U << 3)) 1639 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015; 1640 switch ((val >> 12) & 0x7) { 1641 case 0: 1642 break; 1643 case 2: 1644 diga->status[0] |= IEC958_AES0_PRO_FS_32000; 1645 break; 1646 default: 1647 diga->status[0] |= IEC958_AES0_PRO_FS_48000; 1648 break; 1649 } 1650 } else { 1651 /* consumer */ 1652 diga->status[0] |= val & (1U << 2); /* copyright */ 1653 if (val & (1U << 3)) 1654 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015; 1655 diga->status[1] |= (val >> 4) & 0x3f; /* category */ 1656 diga->status[3] |= (val >> 12) & 0x07; /* fs */ 1657 } 1658 } 1659 1660 static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol, 1661 struct snd_ctl_elem_value *ucontrol) 1662 { 1663 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1664 unsigned int val; 1665 val = inw(ICEMT1724(ice, SPDIF_CTRL)); 1666 decode_spdif_bits(&ucontrol->value.iec958, val); 1667 return 0; 1668 } 1669 1670 static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol, 1671 struct snd_ctl_elem_value *ucontrol) 1672 { 1673 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1674 unsigned int val, old; 1675 1676 val = encode_spdif_bits(&ucontrol->value.iec958); 1677 spin_lock_irq(&ice->reg_lock); 1678 old = inw(ICEMT1724(ice, SPDIF_CTRL)); 1679 if (val != old) 1680 update_spdif_bits(ice, val); 1681 spin_unlock_irq(&ice->reg_lock); 1682 return val != old; 1683 } 1684 1685 static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata = 1686 { 1687 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1688 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), 1689 .info = snd_vt1724_spdif_info, 1690 .get = snd_vt1724_spdif_default_get, 1691 .put = snd_vt1724_spdif_default_put 1692 }; 1693 1694 static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol, 1695 struct snd_ctl_elem_value *ucontrol) 1696 { 1697 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1698 IEC958_AES0_PROFESSIONAL | 1699 IEC958_AES0_CON_NOT_COPYRIGHT | 1700 IEC958_AES0_CON_EMPHASIS; 1701 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL | 1702 IEC958_AES1_CON_CATEGORY; 1703 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS; 1704 return 0; 1705 } 1706 1707 static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol, 1708 struct snd_ctl_elem_value *ucontrol) 1709 { 1710 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1711 IEC958_AES0_PROFESSIONAL | 1712 IEC958_AES0_PRO_FS | 1713 IEC958_AES0_PRO_EMPHASIS; 1714 return 0; 1715 } 1716 1717 static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata = 1718 { 1719 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1720 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1721 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK), 1722 .info = snd_vt1724_spdif_info, 1723 .get = snd_vt1724_spdif_maskc_get, 1724 }; 1725 1726 static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata = 1727 { 1728 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1729 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1730 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK), 1731 .info = snd_vt1724_spdif_info, 1732 .get = snd_vt1724_spdif_maskp_get, 1733 }; 1734 1735 #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info 1736 1737 static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol, 1738 struct snd_ctl_elem_value *ucontrol) 1739 { 1740 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1741 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) & 1742 VT1724_CFG_SPDIF_OUT_EN ? 1 : 0; 1743 return 0; 1744 } 1745 1746 static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol, 1747 struct snd_ctl_elem_value *ucontrol) 1748 { 1749 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1750 unsigned char old, val; 1751 1752 spin_lock_irq(&ice->reg_lock); 1753 old = val = inb(ICEREG1724(ice, SPDIF_CFG)); 1754 val &= ~VT1724_CFG_SPDIF_OUT_EN; 1755 if (ucontrol->value.integer.value[0]) 1756 val |= VT1724_CFG_SPDIF_OUT_EN; 1757 if (old != val) 1758 outb(val, ICEREG1724(ice, SPDIF_CFG)); 1759 spin_unlock_irq(&ice->reg_lock); 1760 return old != val; 1761 } 1762 1763 static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata = 1764 { 1765 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1766 /* FIXME: the following conflict with IEC958 Playback Route */ 1767 /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */ 1768 .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH), 1769 .info = snd_vt1724_spdif_sw_info, 1770 .get = snd_vt1724_spdif_sw_get, 1771 .put = snd_vt1724_spdif_sw_put 1772 }; 1773 1774 1775 #if 0 /* NOT USED YET */ 1776 /* 1777 * GPIO access from extern 1778 */ 1779 1780 #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info 1781 1782 int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol, 1783 struct snd_ctl_elem_value *ucontrol) 1784 { 1785 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1786 int shift = kcontrol->private_value & 0xff; 1787 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0; 1788 1789 snd_ice1712_save_gpio_status(ice); 1790 ucontrol->value.integer.value[0] = 1791 (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert; 1792 snd_ice1712_restore_gpio_status(ice); 1793 return 0; 1794 } 1795 1796 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol, 1797 struct snd_ctl_elem_value *ucontrol) 1798 { 1799 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1800 int shift = kcontrol->private_value & 0xff; 1801 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0; 1802 unsigned int val, nval; 1803 1804 if (kcontrol->private_value & (1 << 31)) 1805 return -EPERM; 1806 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert; 1807 snd_ice1712_save_gpio_status(ice); 1808 val = snd_ice1712_gpio_read(ice); 1809 nval |= val & ~(1 << shift); 1810 if (val != nval) 1811 snd_ice1712_gpio_write(ice, nval); 1812 snd_ice1712_restore_gpio_status(ice); 1813 return val != nval; 1814 } 1815 #endif /* NOT USED YET */ 1816 1817 /* 1818 * rate 1819 */ 1820 static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol, 1821 struct snd_ctl_elem_info *uinfo) 1822 { 1823 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1824 int hw_rates_count = ice->hw_rates->count; 1825 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1826 uinfo->count = 1; 1827 1828 uinfo->value.enumerated.items = hw_rates_count + ice->ext_clock_count; 1829 /* upper limit - keep at top */ 1830 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1831 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1832 if (uinfo->value.enumerated.item >= hw_rates_count) 1833 /* ext_clock items */ 1834 strcpy(uinfo->value.enumerated.name, 1835 ice->ext_clock_names[ 1836 uinfo->value.enumerated.item - hw_rates_count]); 1837 else 1838 /* int clock items */ 1839 sprintf(uinfo->value.enumerated.name, "%d", 1840 ice->hw_rates->list[uinfo->value.enumerated.item]); 1841 return 0; 1842 } 1843 1844 static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol, 1845 struct snd_ctl_elem_value *ucontrol) 1846 { 1847 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1848 unsigned int i, rate; 1849 1850 spin_lock_irq(&ice->reg_lock); 1851 if (ice->is_spdif_master(ice)) { 1852 ucontrol->value.enumerated.item[0] = ice->hw_rates->count + 1853 ice->get_spdif_master_type(ice); 1854 } else { 1855 rate = ice->get_rate(ice); 1856 ucontrol->value.enumerated.item[0] = 0; 1857 for (i = 0; i < ice->hw_rates->count; i++) { 1858 if (ice->hw_rates->list[i] == rate) { 1859 ucontrol->value.enumerated.item[0] = i; 1860 break; 1861 } 1862 } 1863 } 1864 spin_unlock_irq(&ice->reg_lock); 1865 return 0; 1866 } 1867 1868 static int stdclock_get_spdif_master_type(struct snd_ice1712 *ice) 1869 { 1870 /* standard external clock - only single type - SPDIF IN */ 1871 return 0; 1872 } 1873 1874 /* setting clock to external - SPDIF */ 1875 static int stdclock_set_spdif_clock(struct snd_ice1712 *ice, int type) 1876 { 1877 unsigned char oval; 1878 unsigned char i2s_oval; 1879 oval = inb(ICEMT1724(ice, RATE)); 1880 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE)); 1881 /* setting 256fs */ 1882 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT)); 1883 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT)); 1884 return 0; 1885 } 1886 1887 1888 static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol, 1889 struct snd_ctl_elem_value *ucontrol) 1890 { 1891 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1892 unsigned int old_rate, new_rate; 1893 unsigned int item = ucontrol->value.enumerated.item[0]; 1894 unsigned int first_ext_clock = ice->hw_rates->count; 1895 1896 if (item > first_ext_clock + ice->ext_clock_count - 1) 1897 return -EINVAL; 1898 1899 /* if rate = 0 => external clock */ 1900 spin_lock_irq(&ice->reg_lock); 1901 if (ice->is_spdif_master(ice)) 1902 old_rate = 0; 1903 else 1904 old_rate = ice->get_rate(ice); 1905 if (item >= first_ext_clock) { 1906 /* switching to external clock */ 1907 ice->set_spdif_clock(ice, item - first_ext_clock); 1908 new_rate = 0; 1909 } else { 1910 /* internal on-card clock */ 1911 new_rate = ice->hw_rates->list[item]; 1912 ice->pro_rate_default = new_rate; 1913 spin_unlock_irq(&ice->reg_lock); 1914 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1); 1915 spin_lock_irq(&ice->reg_lock); 1916 } 1917 spin_unlock_irq(&ice->reg_lock); 1918 1919 /* the first switch to the ext. clock mode? */ 1920 if (old_rate != new_rate && !new_rate) { 1921 /* notify akm chips as well */ 1922 unsigned int i; 1923 if (ice->gpio.set_pro_rate) 1924 ice->gpio.set_pro_rate(ice, 0); 1925 for (i = 0; i < ice->akm_codecs; i++) { 1926 if (ice->akm[i].ops.set_rate_val) 1927 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); 1928 } 1929 } 1930 return old_rate != new_rate; 1931 } 1932 1933 static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = { 1934 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1935 .name = "Multi Track Internal Clock", 1936 .info = snd_vt1724_pro_internal_clock_info, 1937 .get = snd_vt1724_pro_internal_clock_get, 1938 .put = snd_vt1724_pro_internal_clock_put 1939 }; 1940 1941 #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info 1942 1943 static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol, 1944 struct snd_ctl_elem_value *ucontrol) 1945 { 1946 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED; 1947 return 0; 1948 } 1949 1950 static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol, 1951 struct snd_ctl_elem_value *ucontrol) 1952 { 1953 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1954 int change = 0, nval; 1955 1956 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1957 spin_lock_irq(&ice->reg_lock); 1958 change = PRO_RATE_LOCKED != nval; 1959 PRO_RATE_LOCKED = nval; 1960 spin_unlock_irq(&ice->reg_lock); 1961 return change; 1962 } 1963 1964 static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = { 1965 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1966 .name = "Multi Track Rate Locking", 1967 .info = snd_vt1724_pro_rate_locking_info, 1968 .get = snd_vt1724_pro_rate_locking_get, 1969 .put = snd_vt1724_pro_rate_locking_put 1970 }; 1971 1972 #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info 1973 1974 static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol, 1975 struct snd_ctl_elem_value *ucontrol) 1976 { 1977 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0; 1978 return 0; 1979 } 1980 1981 static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol, 1982 struct snd_ctl_elem_value *ucontrol) 1983 { 1984 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1985 int change = 0, nval; 1986 1987 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1988 spin_lock_irq(&ice->reg_lock); 1989 change = PRO_RATE_RESET != nval; 1990 PRO_RATE_RESET = nval; 1991 spin_unlock_irq(&ice->reg_lock); 1992 return change; 1993 } 1994 1995 static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = { 1996 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1997 .name = "Multi Track Rate Reset", 1998 .info = snd_vt1724_pro_rate_reset_info, 1999 .get = snd_vt1724_pro_rate_reset_get, 2000 .put = snd_vt1724_pro_rate_reset_put 2001 }; 2002 2003 2004 /* 2005 * routing 2006 */ 2007 static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol, 2008 struct snd_ctl_elem_info *uinfo) 2009 { 2010 static char *texts[] = { 2011 "PCM Out", /* 0 */ 2012 "H/W In 0", "H/W In 1", /* 1-2 */ 2013 "IEC958 In L", "IEC958 In R", /* 3-4 */ 2014 }; 2015 2016 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 2017 uinfo->count = 1; 2018 uinfo->value.enumerated.items = 5; 2019 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 2020 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 2021 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 2022 return 0; 2023 } 2024 2025 static inline int analog_route_shift(int idx) 2026 { 2027 return (idx % 2) * 12 + ((idx / 2) * 3) + 8; 2028 } 2029 2030 static inline int digital_route_shift(int idx) 2031 { 2032 return idx * 3; 2033 } 2034 2035 int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift) 2036 { 2037 unsigned long val; 2038 unsigned char eitem; 2039 static const unsigned char xlate[8] = { 2040 0, 255, 1, 2, 255, 255, 3, 4, 2041 }; 2042 2043 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2044 val >>= shift; 2045 val &= 7; /* we now have 3 bits per output */ 2046 eitem = xlate[val]; 2047 if (eitem == 255) { 2048 snd_BUG(); 2049 return 0; 2050 } 2051 return eitem; 2052 } 2053 2054 int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val, 2055 int shift) 2056 { 2057 unsigned int old_val, nval; 2058 int change; 2059 static const unsigned char xroute[8] = { 2060 0, /* PCM */ 2061 2, /* PSDIN0 Left */ 2062 3, /* PSDIN0 Right */ 2063 6, /* SPDIN Left */ 2064 7, /* SPDIN Right */ 2065 }; 2066 2067 nval = xroute[val % 5]; 2068 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2069 val &= ~(0x07 << shift); 2070 val |= nval << shift; 2071 change = val != old_val; 2072 if (change) 2073 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK)); 2074 return change; 2075 } 2076 2077 static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol, 2078 struct snd_ctl_elem_value *ucontrol) 2079 { 2080 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2081 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2082 ucontrol->value.enumerated.item[0] = 2083 snd_ice1724_get_route_val(ice, analog_route_shift(idx)); 2084 return 0; 2085 } 2086 2087 static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol, 2088 struct snd_ctl_elem_value *ucontrol) 2089 { 2090 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2091 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2092 return snd_ice1724_put_route_val(ice, 2093 ucontrol->value.enumerated.item[0], 2094 analog_route_shift(idx)); 2095 } 2096 2097 static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol, 2098 struct snd_ctl_elem_value *ucontrol) 2099 { 2100 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2101 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2102 ucontrol->value.enumerated.item[0] = 2103 snd_ice1724_get_route_val(ice, digital_route_shift(idx)); 2104 return 0; 2105 } 2106 2107 static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol, 2108 struct snd_ctl_elem_value *ucontrol) 2109 { 2110 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2111 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2112 return snd_ice1724_put_route_val(ice, 2113 ucontrol->value.enumerated.item[0], 2114 digital_route_shift(idx)); 2115 } 2116 2117 static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata = 2118 { 2119 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2120 .name = "H/W Playback Route", 2121 .info = snd_vt1724_pro_route_info, 2122 .get = snd_vt1724_pro_route_analog_get, 2123 .put = snd_vt1724_pro_route_analog_put, 2124 }; 2125 2126 static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = { 2127 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2128 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route", 2129 .info = snd_vt1724_pro_route_info, 2130 .get = snd_vt1724_pro_route_spdif_get, 2131 .put = snd_vt1724_pro_route_spdif_put, 2132 .count = 2, 2133 }; 2134 2135 2136 static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol, 2137 struct snd_ctl_elem_info *uinfo) 2138 { 2139 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2140 uinfo->count = 22; /* FIXME: for compatibility with ice1712... */ 2141 uinfo->value.integer.min = 0; 2142 uinfo->value.integer.max = 255; 2143 return 0; 2144 } 2145 2146 static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol, 2147 struct snd_ctl_elem_value *ucontrol) 2148 { 2149 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2150 int idx; 2151 2152 spin_lock_irq(&ice->reg_lock); 2153 for (idx = 0; idx < 22; idx++) { 2154 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX)); 2155 ucontrol->value.integer.value[idx] = 2156 inb(ICEMT1724(ice, MONITOR_PEAKDATA)); 2157 } 2158 spin_unlock_irq(&ice->reg_lock); 2159 return 0; 2160 } 2161 2162 static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = { 2163 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 2164 .name = "Multi Track Peak", 2165 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 2166 .info = snd_vt1724_pro_peak_info, 2167 .get = snd_vt1724_pro_peak_get 2168 }; 2169 2170 /* 2171 * 2172 */ 2173 2174 static struct snd_ice1712_card_info no_matched __devinitdata; 2175 2176 static struct snd_ice1712_card_info *card_tables[] __devinitdata = { 2177 snd_vt1724_revo_cards, 2178 snd_vt1724_amp_cards, 2179 snd_vt1724_aureon_cards, 2180 snd_vt1720_mobo_cards, 2181 snd_vt1720_pontis_cards, 2182 snd_vt1724_prodigy_hifi_cards, 2183 snd_vt1724_prodigy192_cards, 2184 snd_vt1724_juli_cards, 2185 snd_vt1724_maya44_cards, 2186 snd_vt1724_phase_cards, 2187 snd_vt1724_wtm_cards, 2188 snd_vt1724_se_cards, 2189 snd_vt1724_qtet_cards, 2190 NULL, 2191 }; 2192 2193 2194 /* 2195 */ 2196 2197 static void wait_i2c_busy(struct snd_ice1712 *ice) 2198 { 2199 int t = 0x10000; 2200 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--) 2201 ; 2202 if (t == -1) 2203 printk(KERN_ERR "ice1724: i2c busy timeout\n"); 2204 } 2205 2206 unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice, 2207 unsigned char dev, unsigned char addr) 2208 { 2209 unsigned char val; 2210 2211 mutex_lock(&ice->i2c_mutex); 2212 wait_i2c_busy(ice); 2213 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); 2214 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); 2215 wait_i2c_busy(ice); 2216 val = inb(ICEREG1724(ice, I2C_DATA)); 2217 mutex_unlock(&ice->i2c_mutex); 2218 /* 2219 printk(KERN_DEBUG "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val); 2220 */ 2221 return val; 2222 } 2223 2224 void snd_vt1724_write_i2c(struct snd_ice1712 *ice, 2225 unsigned char dev, unsigned char addr, unsigned char data) 2226 { 2227 mutex_lock(&ice->i2c_mutex); 2228 wait_i2c_busy(ice); 2229 /* 2230 printk(KERN_DEBUG "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data); 2231 */ 2232 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); 2233 outb(data, ICEREG1724(ice, I2C_DATA)); 2234 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); 2235 wait_i2c_busy(ice); 2236 mutex_unlock(&ice->i2c_mutex); 2237 } 2238 2239 static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice, 2240 const char *modelname) 2241 { 2242 const int dev = 0xa0; /* EEPROM device address */ 2243 unsigned int i, size; 2244 struct snd_ice1712_card_info * const *tbl, *c; 2245 2246 if (!modelname || !*modelname) { 2247 ice->eeprom.subvendor = 0; 2248 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0) 2249 ice->eeprom.subvendor = 2250 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) | 2251 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) | 2252 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) | 2253 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24); 2254 if (ice->eeprom.subvendor == 0 || 2255 ice->eeprom.subvendor == (unsigned int)-1) { 2256 /* invalid subvendor from EEPROM, try the PCI 2257 * subststem ID instead 2258 */ 2259 u16 vendor, device; 2260 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, 2261 &vendor); 2262 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device); 2263 ice->eeprom.subvendor = 2264 ((unsigned int)swab16(vendor) << 16) | swab16(device); 2265 if (ice->eeprom.subvendor == 0 || 2266 ice->eeprom.subvendor == (unsigned int)-1) { 2267 printk(KERN_ERR "ice1724: No valid ID is found\n"); 2268 return -ENXIO; 2269 } 2270 } 2271 } 2272 for (tbl = card_tables; *tbl; tbl++) { 2273 for (c = *tbl; c->subvendor; c++) { 2274 if (modelname && c->model && 2275 !strcmp(modelname, c->model)) { 2276 printk(KERN_INFO "ice1724: Using board model %s\n", 2277 c->name); 2278 ice->eeprom.subvendor = c->subvendor; 2279 } else if (c->subvendor != ice->eeprom.subvendor) 2280 continue; 2281 if (!c->eeprom_size || !c->eeprom_data) 2282 goto found; 2283 /* if the EEPROM is given by the driver, use it */ 2284 snd_printdd("using the defined eeprom..\n"); 2285 ice->eeprom.version = 2; 2286 ice->eeprom.size = c->eeprom_size + 6; 2287 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size); 2288 goto read_skipped; 2289 } 2290 } 2291 printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n", 2292 ice->eeprom.subvendor); 2293 2294 found: 2295 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04); 2296 if (ice->eeprom.size < 6) 2297 ice->eeprom.size = 32; 2298 else if (ice->eeprom.size > 32) { 2299 printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n", 2300 ice->eeprom.size); 2301 return -EIO; 2302 } 2303 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05); 2304 if (ice->eeprom.version != 2) 2305 printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n", 2306 ice->eeprom.version); 2307 size = ice->eeprom.size - 6; 2308 for (i = 0; i < size; i++) 2309 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6); 2310 2311 read_skipped: 2312 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK); 2313 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE); 2314 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR); 2315 2316 return 0; 2317 } 2318 2319 2320 2321 static void snd_vt1724_chip_reset(struct snd_ice1712 *ice) 2322 { 2323 outb(VT1724_RESET , ICEREG1724(ice, CONTROL)); 2324 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */ 2325 msleep(10); 2326 outb(0, ICEREG1724(ice, CONTROL)); 2327 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */ 2328 msleep(10); 2329 } 2330 2331 static int snd_vt1724_chip_init(struct snd_ice1712 *ice) 2332 { 2333 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG)); 2334 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG)); 2335 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES)); 2336 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG)); 2337 2338 ice->gpio.write_mask = ice->eeprom.gpiomask; 2339 ice->gpio.direction = ice->eeprom.gpiodir; 2340 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask); 2341 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir); 2342 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate); 2343 2344 outb(0, ICEREG1724(ice, POWERDOWN)); 2345 2346 /* MPU_RX and TX irq masks are cleared later dynamically */ 2347 outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK)); 2348 2349 /* don't handle FIFO overrun/underruns (just yet), 2350 * since they cause machine lockups 2351 */ 2352 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK)); 2353 2354 return 0; 2355 } 2356 2357 static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice) 2358 { 2359 int err; 2360 struct snd_kcontrol *kctl; 2361 2362 if (snd_BUG_ON(!ice->pcm)) 2363 return -EIO; 2364 2365 if (!ice->own_routing) { 2366 err = snd_ctl_add(ice->card, 2367 snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice)); 2368 if (err < 0) 2369 return err; 2370 } 2371 2372 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice)); 2373 if (err < 0) 2374 return err; 2375 2376 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice)); 2377 if (err < 0) 2378 return err; 2379 kctl->id.device = ice->pcm->device; 2380 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice)); 2381 if (err < 0) 2382 return err; 2383 kctl->id.device = ice->pcm->device; 2384 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice)); 2385 if (err < 0) 2386 return err; 2387 kctl->id.device = ice->pcm->device; 2388 #if 0 /* use default only */ 2389 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice)); 2390 if (err < 0) 2391 return err; 2392 kctl->id.device = ice->pcm->device; 2393 ice->spdif.stream_ctl = kctl; 2394 #endif 2395 return 0; 2396 } 2397 2398 2399 static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice) 2400 { 2401 int err; 2402 2403 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice)); 2404 if (err < 0) 2405 return err; 2406 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice)); 2407 if (err < 0) 2408 return err; 2409 2410 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice)); 2411 if (err < 0) 2412 return err; 2413 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice)); 2414 if (err < 0) 2415 return err; 2416 2417 if (!ice->own_routing && ice->num_total_dacs > 0) { 2418 struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route; 2419 tmp.count = ice->num_total_dacs; 2420 if (ice->vt1720 && tmp.count > 2) 2421 tmp.count = 2; 2422 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice)); 2423 if (err < 0) 2424 return err; 2425 } 2426 2427 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice)); 2428 if (err < 0) 2429 return err; 2430 2431 return 0; 2432 } 2433 2434 static int snd_vt1724_free(struct snd_ice1712 *ice) 2435 { 2436 if (!ice->port) 2437 goto __hw_end; 2438 /* mask all interrupts */ 2439 outb(0xff, ICEMT1724(ice, DMA_INT_MASK)); 2440 outb(0xff, ICEREG1724(ice, IRQMASK)); 2441 /* --- */ 2442 __hw_end: 2443 if (ice->irq >= 0) 2444 free_irq(ice->irq, ice); 2445 pci_release_regions(ice->pci); 2446 snd_ice1712_akm4xxx_free(ice); 2447 pci_disable_device(ice->pci); 2448 kfree(ice->spec); 2449 kfree(ice); 2450 return 0; 2451 } 2452 2453 static int snd_vt1724_dev_free(struct snd_device *device) 2454 { 2455 struct snd_ice1712 *ice = device->device_data; 2456 return snd_vt1724_free(ice); 2457 } 2458 2459 static int __devinit snd_vt1724_create(struct snd_card *card, 2460 struct pci_dev *pci, 2461 const char *modelname, 2462 struct snd_ice1712 **r_ice1712) 2463 { 2464 struct snd_ice1712 *ice; 2465 int err; 2466 static struct snd_device_ops ops = { 2467 .dev_free = snd_vt1724_dev_free, 2468 }; 2469 2470 *r_ice1712 = NULL; 2471 2472 /* enable PCI device */ 2473 err = pci_enable_device(pci); 2474 if (err < 0) 2475 return err; 2476 2477 ice = kzalloc(sizeof(*ice), GFP_KERNEL); 2478 if (ice == NULL) { 2479 pci_disable_device(pci); 2480 return -ENOMEM; 2481 } 2482 ice->vt1724 = 1; 2483 spin_lock_init(&ice->reg_lock); 2484 mutex_init(&ice->gpio_mutex); 2485 mutex_init(&ice->open_mutex); 2486 mutex_init(&ice->i2c_mutex); 2487 ice->gpio.set_mask = snd_vt1724_set_gpio_mask; 2488 ice->gpio.get_mask = snd_vt1724_get_gpio_mask; 2489 ice->gpio.set_dir = snd_vt1724_set_gpio_dir; 2490 ice->gpio.get_dir = snd_vt1724_get_gpio_dir; 2491 ice->gpio.set_data = snd_vt1724_set_gpio_data; 2492 ice->gpio.get_data = snd_vt1724_get_gpio_data; 2493 ice->card = card; 2494 ice->pci = pci; 2495 ice->irq = -1; 2496 pci_set_master(pci); 2497 snd_vt1724_proc_init(ice); 2498 synchronize_irq(pci->irq); 2499 2500 card->private_data = ice; 2501 2502 err = pci_request_regions(pci, "ICE1724"); 2503 if (err < 0) { 2504 kfree(ice); 2505 pci_disable_device(pci); 2506 return err; 2507 } 2508 ice->port = pci_resource_start(pci, 0); 2509 ice->profi_port = pci_resource_start(pci, 1); 2510 2511 if (request_irq(pci->irq, snd_vt1724_interrupt, 2512 IRQF_SHARED, "ICE1724", ice)) { 2513 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); 2514 snd_vt1724_free(ice); 2515 return -EIO; 2516 } 2517 2518 ice->irq = pci->irq; 2519 2520 snd_vt1724_chip_reset(ice); 2521 if (snd_vt1724_read_eeprom(ice, modelname) < 0) { 2522 snd_vt1724_free(ice); 2523 return -EIO; 2524 } 2525 if (snd_vt1724_chip_init(ice) < 0) { 2526 snd_vt1724_free(ice); 2527 return -EIO; 2528 } 2529 2530 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops); 2531 if (err < 0) { 2532 snd_vt1724_free(ice); 2533 return err; 2534 } 2535 2536 snd_card_set_dev(card, &pci->dev); 2537 2538 *r_ice1712 = ice; 2539 return 0; 2540 } 2541 2542 2543 /* 2544 * 2545 * Registration 2546 * 2547 */ 2548 2549 static int __devinit snd_vt1724_probe(struct pci_dev *pci, 2550 const struct pci_device_id *pci_id) 2551 { 2552 static int dev; 2553 struct snd_card *card; 2554 struct snd_ice1712 *ice; 2555 int pcm_dev = 0, err; 2556 struct snd_ice1712_card_info * const *tbl, *c; 2557 2558 if (dev >= SNDRV_CARDS) 2559 return -ENODEV; 2560 if (!enable[dev]) { 2561 dev++; 2562 return -ENOENT; 2563 } 2564 2565 err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card); 2566 if (err < 0) 2567 return err; 2568 2569 strcpy(card->driver, "ICE1724"); 2570 strcpy(card->shortname, "ICEnsemble ICE1724"); 2571 2572 err = snd_vt1724_create(card, pci, model[dev], &ice); 2573 if (err < 0) { 2574 snd_card_free(card); 2575 return err; 2576 } 2577 2578 /* field init before calling chip_init */ 2579 ice->ext_clock_count = 0; 2580 2581 for (tbl = card_tables; *tbl; tbl++) { 2582 for (c = *tbl; c->subvendor; c++) { 2583 if (c->subvendor == ice->eeprom.subvendor) { 2584 strcpy(card->shortname, c->name); 2585 if (c->driver) /* specific driver? */ 2586 strcpy(card->driver, c->driver); 2587 if (c->chip_init) { 2588 err = c->chip_init(ice); 2589 if (err < 0) { 2590 snd_card_free(card); 2591 return err; 2592 } 2593 } 2594 goto __found; 2595 } 2596 } 2597 } 2598 c = &no_matched; 2599 __found: 2600 /* 2601 * VT1724 has separate DMAs for the analog and the SPDIF streams while 2602 * ICE1712 has only one for both (mixed up). 2603 * 2604 * Confusingly the analog PCM is named "professional" here because it 2605 * was called so in ice1712 driver, and vt1724 driver is derived from 2606 * ice1712 driver. 2607 */ 2608 ice->pro_rate_default = PRO_RATE_DEFAULT; 2609 if (!ice->is_spdif_master) 2610 ice->is_spdif_master = stdclock_is_spdif_master; 2611 if (!ice->get_rate) 2612 ice->get_rate = stdclock_get_rate; 2613 if (!ice->set_rate) 2614 ice->set_rate = stdclock_set_rate; 2615 if (!ice->set_mclk) 2616 ice->set_mclk = stdclock_set_mclk; 2617 if (!ice->set_spdif_clock) 2618 ice->set_spdif_clock = stdclock_set_spdif_clock; 2619 if (!ice->get_spdif_master_type) 2620 ice->get_spdif_master_type = stdclock_get_spdif_master_type; 2621 if (!ice->ext_clock_names) 2622 ice->ext_clock_names = ext_clock_names; 2623 if (!ice->ext_clock_count) 2624 ice->ext_clock_count = ARRAY_SIZE(ext_clock_names); 2625 2626 if (!ice->hw_rates) 2627 set_std_hw_rates(ice); 2628 2629 err = snd_vt1724_pcm_profi(ice, pcm_dev++); 2630 if (err < 0) { 2631 snd_card_free(card); 2632 return err; 2633 } 2634 2635 err = snd_vt1724_pcm_spdif(ice, pcm_dev++); 2636 if (err < 0) { 2637 snd_card_free(card); 2638 return err; 2639 } 2640 2641 err = snd_vt1724_pcm_indep(ice, pcm_dev++); 2642 if (err < 0) { 2643 snd_card_free(card); 2644 return err; 2645 } 2646 2647 err = snd_vt1724_ac97_mixer(ice); 2648 if (err < 0) { 2649 snd_card_free(card); 2650 return err; 2651 } 2652 2653 err = snd_vt1724_build_controls(ice); 2654 if (err < 0) { 2655 snd_card_free(card); 2656 return err; 2657 } 2658 2659 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */ 2660 err = snd_vt1724_spdif_build_controls(ice); 2661 if (err < 0) { 2662 snd_card_free(card); 2663 return err; 2664 } 2665 } 2666 2667 if (c->build_controls) { 2668 err = c->build_controls(ice); 2669 if (err < 0) { 2670 snd_card_free(card); 2671 return err; 2672 } 2673 } 2674 2675 if (!c->no_mpu401) { 2676 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) { 2677 struct snd_rawmidi *rmidi; 2678 2679 err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi); 2680 if (err < 0) { 2681 snd_card_free(card); 2682 return err; 2683 } 2684 ice->rmidi[0] = rmidi; 2685 rmidi->private_data = ice; 2686 strcpy(rmidi->name, "ICE1724 MIDI"); 2687 rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT | 2688 SNDRV_RAWMIDI_INFO_INPUT | 2689 SNDRV_RAWMIDI_INFO_DUPLEX; 2690 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, 2691 &vt1724_midi_output_ops); 2692 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, 2693 &vt1724_midi_input_ops); 2694 2695 /* set watermarks */ 2696 outb(VT1724_MPU_RX_FIFO | 0x1, 2697 ICEREG1724(ice, MPU_FIFO_WM)); 2698 outb(0x1, ICEREG1724(ice, MPU_FIFO_WM)); 2699 /* set UART mode */ 2700 outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL)); 2701 } 2702 } 2703 2704 sprintf(card->longname, "%s at 0x%lx, irq %i", 2705 card->shortname, ice->port, ice->irq); 2706 2707 err = snd_card_register(card); 2708 if (err < 0) { 2709 snd_card_free(card); 2710 return err; 2711 } 2712 pci_set_drvdata(pci, card); 2713 dev++; 2714 return 0; 2715 } 2716 2717 static void __devexit snd_vt1724_remove(struct pci_dev *pci) 2718 { 2719 snd_card_free(pci_get_drvdata(pci)); 2720 pci_set_drvdata(pci, NULL); 2721 } 2722 2723 #ifdef CONFIG_PM 2724 static int snd_vt1724_suspend(struct pci_dev *pci, pm_message_t state) 2725 { 2726 struct snd_card *card = pci_get_drvdata(pci); 2727 struct snd_ice1712 *ice = card->private_data; 2728 2729 if (!ice->pm_suspend_enabled) 2730 return 0; 2731 2732 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2733 2734 snd_pcm_suspend_all(ice->pcm); 2735 snd_pcm_suspend_all(ice->pcm_pro); 2736 snd_pcm_suspend_all(ice->pcm_ds); 2737 snd_ac97_suspend(ice->ac97); 2738 2739 spin_lock_irq(&ice->reg_lock); 2740 ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice); 2741 ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL)); 2742 ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG)); 2743 ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2744 spin_unlock_irq(&ice->reg_lock); 2745 2746 if (ice->pm_suspend) 2747 ice->pm_suspend(ice); 2748 2749 pci_disable_device(pci); 2750 pci_save_state(pci); 2751 pci_set_power_state(pci, pci_choose_state(pci, state)); 2752 return 0; 2753 } 2754 2755 static int snd_vt1724_resume(struct pci_dev *pci) 2756 { 2757 struct snd_card *card = pci_get_drvdata(pci); 2758 struct snd_ice1712 *ice = card->private_data; 2759 2760 if (!ice->pm_suspend_enabled) 2761 return 0; 2762 2763 pci_set_power_state(pci, PCI_D0); 2764 pci_restore_state(pci); 2765 2766 if (pci_enable_device(pci) < 0) { 2767 snd_card_disconnect(card); 2768 return -EIO; 2769 } 2770 2771 pci_set_master(pci); 2772 2773 snd_vt1724_chip_reset(ice); 2774 2775 if (snd_vt1724_chip_init(ice) < 0) { 2776 snd_card_disconnect(card); 2777 return -EIO; 2778 } 2779 2780 if (ice->pm_resume) 2781 ice->pm_resume(ice); 2782 2783 if (ice->pm_saved_is_spdif_master) { 2784 /* switching to external clock via SPDIF */ 2785 ice->set_spdif_clock(ice, 0); 2786 } else { 2787 /* internal on-card clock */ 2788 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1); 2789 } 2790 2791 update_spdif_bits(ice, ice->pm_saved_spdif_ctrl); 2792 2793 outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG)); 2794 outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK)); 2795 2796 if (ice->ac97) 2797 snd_ac97_resume(ice->ac97); 2798 2799 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2800 return 0; 2801 } 2802 #endif 2803 2804 static struct pci_driver driver = { 2805 .name = "ICE1724", 2806 .id_table = snd_vt1724_ids, 2807 .probe = snd_vt1724_probe, 2808 .remove = __devexit_p(snd_vt1724_remove), 2809 #ifdef CONFIG_PM 2810 .suspend = snd_vt1724_suspend, 2811 .resume = snd_vt1724_resume, 2812 #endif 2813 }; 2814 2815 static int __init alsa_card_ice1724_init(void) 2816 { 2817 return pci_register_driver(&driver); 2818 } 2819 2820 static void __exit alsa_card_ice1724_exit(void) 2821 { 2822 pci_unregister_driver(&driver); 2823 } 2824 2825 module_init(alsa_card_ice1724_init) 2826 module_exit(alsa_card_ice1724_exit) 2827