1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * ALSA driver for ICEnsemble ICE1712 (Envy24) 4 * 5 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> 6 */ 7 8 /* 9 NOTES: 10 - spdif nonaudio consumer mode does not work (at least with my 11 Sony STR-DB830) 12 */ 13 14 /* 15 * Changes: 16 * 17 * 2002.09.09 Takashi Iwai <tiwai@suse.de> 18 * split the code to several files. each low-level routine 19 * is stored in the local file and called from registration 20 * function from card_info struct. 21 * 22 * 2002.11.26 James Stafford <jstafford@ampltd.com> 23 * Added support for VT1724 (Envy24HT) 24 * I have left out support for 176.4 and 192 KHz for the moment. 25 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401 26 * 27 * 2003.02.20 Taksahi Iwai <tiwai@suse.de> 28 * Split vt1724 part to an independent driver. 29 * The GPIO is accessed through the callback functions now. 30 * 31 * 2004.03.31 Doug McLain <nostar@comcast.net> 32 * Added support for Event Electronics EZ8 card to hoontech.c. 33 */ 34 35 36 #include <linux/delay.h> 37 #include <linux/interrupt.h> 38 #include <linux/init.h> 39 #include <linux/pci.h> 40 #include <linux/dma-mapping.h> 41 #include <linux/slab.h> 42 #include <linux/module.h> 43 #include <linux/mutex.h> 44 45 #include <sound/core.h> 46 #include <sound/cs8427.h> 47 #include <sound/info.h> 48 #include <sound/initval.h> 49 #include <sound/tlv.h> 50 51 #include <sound/asoundef.h> 52 53 #include "ice1712.h" 54 55 /* lowlevel routines */ 56 #include "delta.h" 57 #include "ews.h" 58 #include "hoontech.h" 59 60 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); 61 MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)"); 62 MODULE_LICENSE("GPL"); 63 MODULE_SUPPORTED_DEVICE("{" 64 HOONTECH_DEVICE_DESC 65 DELTA_DEVICE_DESC 66 EWS_DEVICE_DESC 67 "{ICEnsemble,Generic ICE1712}," 68 "{ICEnsemble,Generic Envy24}}"); 69 70 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 71 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 72 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */ 73 static char *model[SNDRV_CARDS]; 74 static bool omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */ 75 static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transceiver reset timeout value in msec */ 76 static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */ 77 78 module_param_array(index, int, NULL, 0444); 79 MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard."); 80 module_param_array(id, charp, NULL, 0444); 81 MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard."); 82 module_param_array(enable, bool, NULL, 0444); 83 MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard."); 84 module_param_array(omni, bool, NULL, 0444); 85 MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support."); 86 module_param_array(cs8427_timeout, int, NULL, 0444); 87 MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution."); 88 module_param_array(model, charp, NULL, 0444); 89 MODULE_PARM_DESC(model, "Use the given board model."); 90 module_param_array(dxr_enable, int, NULL, 0444); 91 MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE."); 92 93 94 static const struct pci_device_id snd_ice1712_ids[] = { 95 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_ICE_1712), 0 }, /* ICE1712 */ 96 { 0, } 97 }; 98 99 MODULE_DEVICE_TABLE(pci, snd_ice1712_ids); 100 101 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice); 102 static int snd_ice1712_build_controls(struct snd_ice1712 *ice); 103 104 static int PRO_RATE_LOCKED; 105 static int PRO_RATE_RESET = 1; 106 static unsigned int PRO_RATE_DEFAULT = 44100; 107 108 /* 109 * Basic I/O 110 */ 111 112 /* check whether the clock mode is spdif-in */ 113 static inline int is_spdif_master(struct snd_ice1712 *ice) 114 { 115 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0; 116 } 117 118 static inline int is_pro_rate_locked(struct snd_ice1712 *ice) 119 { 120 return is_spdif_master(ice) || PRO_RATE_LOCKED; 121 } 122 123 static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data) 124 { 125 outb((channel << 4) | addr, ICEDS(ice, INDEX)); 126 outl(data, ICEDS(ice, DATA)); 127 } 128 129 static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr) 130 { 131 outb((channel << 4) | addr, ICEDS(ice, INDEX)); 132 return inl(ICEDS(ice, DATA)); 133 } 134 135 static void snd_ice1712_ac97_write(struct snd_ac97 *ac97, 136 unsigned short reg, 137 unsigned short val) 138 { 139 struct snd_ice1712 *ice = ac97->private_data; 140 int tm; 141 unsigned char old_cmd = 0; 142 143 for (tm = 0; tm < 0x10000; tm++) { 144 old_cmd = inb(ICEREG(ice, AC97_CMD)); 145 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 146 continue; 147 if (!(old_cmd & ICE1712_AC97_READY)) 148 continue; 149 break; 150 } 151 outb(reg, ICEREG(ice, AC97_INDEX)); 152 outw(val, ICEREG(ice, AC97_DATA)); 153 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR); 154 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD)); 155 for (tm = 0; tm < 0x10000; tm++) 156 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0) 157 break; 158 } 159 160 static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97, 161 unsigned short reg) 162 { 163 struct snd_ice1712 *ice = ac97->private_data; 164 int tm; 165 unsigned char old_cmd = 0; 166 167 for (tm = 0; tm < 0x10000; tm++) { 168 old_cmd = inb(ICEREG(ice, AC97_CMD)); 169 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 170 continue; 171 if (!(old_cmd & ICE1712_AC97_READY)) 172 continue; 173 break; 174 } 175 outb(reg, ICEREG(ice, AC97_INDEX)); 176 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD)); 177 for (tm = 0; tm < 0x10000; tm++) 178 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0) 179 break; 180 if (tm >= 0x10000) /* timeout */ 181 return ~0; 182 return inw(ICEREG(ice, AC97_DATA)); 183 } 184 185 /* 186 * pro ac97 section 187 */ 188 189 static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97, 190 unsigned short reg, 191 unsigned short val) 192 { 193 struct snd_ice1712 *ice = ac97->private_data; 194 int tm; 195 unsigned char old_cmd = 0; 196 197 for (tm = 0; tm < 0x10000; tm++) { 198 old_cmd = inb(ICEMT(ice, AC97_CMD)); 199 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 200 continue; 201 if (!(old_cmd & ICE1712_AC97_READY)) 202 continue; 203 break; 204 } 205 outb(reg, ICEMT(ice, AC97_INDEX)); 206 outw(val, ICEMT(ice, AC97_DATA)); 207 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR); 208 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD)); 209 for (tm = 0; tm < 0x10000; tm++) 210 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0) 211 break; 212 } 213 214 215 static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97, 216 unsigned short reg) 217 { 218 struct snd_ice1712 *ice = ac97->private_data; 219 int tm; 220 unsigned char old_cmd = 0; 221 222 for (tm = 0; tm < 0x10000; tm++) { 223 old_cmd = inb(ICEMT(ice, AC97_CMD)); 224 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 225 continue; 226 if (!(old_cmd & ICE1712_AC97_READY)) 227 continue; 228 break; 229 } 230 outb(reg, ICEMT(ice, AC97_INDEX)); 231 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD)); 232 for (tm = 0; tm < 0x10000; tm++) 233 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0) 234 break; 235 if (tm >= 0x10000) /* timeout */ 236 return ~0; 237 return inw(ICEMT(ice, AC97_DATA)); 238 } 239 240 /* 241 * consumer ac97 digital mix 242 */ 243 #define snd_ice1712_digmix_route_ac97_info snd_ctl_boolean_mono_info 244 245 static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 246 { 247 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 248 249 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0; 250 return 0; 251 } 252 253 static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 254 { 255 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 256 unsigned char val, nval; 257 258 spin_lock_irq(&ice->reg_lock); 259 val = inb(ICEMT(ice, MONITOR_ROUTECTRL)); 260 nval = val & ~ICE1712_ROUTE_AC97; 261 if (ucontrol->value.integer.value[0]) 262 nval |= ICE1712_ROUTE_AC97; 263 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL)); 264 spin_unlock_irq(&ice->reg_lock); 265 return val != nval; 266 } 267 268 static const struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 = { 269 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 270 .name = "Digital Mixer To AC97", 271 .info = snd_ice1712_digmix_route_ac97_info, 272 .get = snd_ice1712_digmix_route_ac97_get, 273 .put = snd_ice1712_digmix_route_ac97_put, 274 }; 275 276 277 /* 278 * gpio operations 279 */ 280 static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data) 281 { 282 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data); 283 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 284 } 285 286 static unsigned int snd_ice1712_get_gpio_dir(struct snd_ice1712 *ice) 287 { 288 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION); 289 } 290 291 static unsigned int snd_ice1712_get_gpio_mask(struct snd_ice1712 *ice) 292 { 293 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK); 294 } 295 296 static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data) 297 { 298 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data); 299 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 300 } 301 302 static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice) 303 { 304 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 305 } 306 307 static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val) 308 { 309 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val); 310 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 311 } 312 313 /* 314 * 315 * CS8427 interface 316 * 317 */ 318 319 /* 320 * change the input clock selection 321 * spdif_clock = 1 - IEC958 input, 0 - Envy24 322 */ 323 static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock) 324 { 325 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */ 326 unsigned char val, nval; 327 int res = 0; 328 329 snd_i2c_lock(ice->i2c); 330 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) { 331 snd_i2c_unlock(ice->i2c); 332 return -EIO; 333 } 334 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) { 335 snd_i2c_unlock(ice->i2c); 336 return -EIO; 337 } 338 nval = val & 0xf0; 339 if (spdif_clock) 340 nval |= 0x01; 341 else 342 nval |= 0x04; 343 if (val != nval) { 344 reg[1] = nval; 345 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) { 346 res = -EIO; 347 } else { 348 res++; 349 } 350 } 351 snd_i2c_unlock(ice->i2c); 352 return res; 353 } 354 355 /* 356 * spdif callbacks 357 */ 358 static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream) 359 { 360 snd_cs8427_iec958_active(ice->cs8427, 1); 361 } 362 363 static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream) 364 { 365 snd_cs8427_iec958_active(ice->cs8427, 0); 366 } 367 368 static void setup_cs8427(struct snd_ice1712 *ice, int rate) 369 { 370 snd_cs8427_iec958_pcm(ice->cs8427, rate); 371 } 372 373 /* 374 * create and initialize callbacks for cs8427 interface 375 */ 376 int snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr) 377 { 378 int err; 379 380 err = snd_cs8427_create(ice->i2c, addr, 381 (ice->cs8427_timeout * HZ) / 1000, &ice->cs8427); 382 if (err < 0) { 383 dev_err(ice->card->dev, "CS8427 initialization failed\n"); 384 return err; 385 } 386 ice->spdif.ops.open = open_cs8427; 387 ice->spdif.ops.close = close_cs8427; 388 ice->spdif.ops.setup_rate = setup_cs8427; 389 return 0; 390 } 391 392 static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master) 393 { 394 /* change CS8427 clock source too */ 395 if (ice->cs8427) 396 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master); 397 /* notify ak4524 chip as well */ 398 if (spdif_is_master) { 399 unsigned int i; 400 for (i = 0; i < ice->akm_codecs; i++) { 401 if (ice->akm[i].ops.set_rate_val) 402 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); 403 } 404 } 405 } 406 407 /* 408 * Interrupt handler 409 */ 410 411 static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id) 412 { 413 struct snd_ice1712 *ice = dev_id; 414 unsigned char status; 415 int handled = 0; 416 417 while (1) { 418 status = inb(ICEREG(ice, IRQSTAT)); 419 if (status == 0) 420 break; 421 handled = 1; 422 if (status & ICE1712_IRQ_MPU1) { 423 if (ice->rmidi[0]) 424 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data); 425 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT)); 426 status &= ~ICE1712_IRQ_MPU1; 427 } 428 if (status & ICE1712_IRQ_TIMER) 429 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT)); 430 if (status & ICE1712_IRQ_MPU2) { 431 if (ice->rmidi[1]) 432 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data); 433 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT)); 434 status &= ~ICE1712_IRQ_MPU2; 435 } 436 if (status & ICE1712_IRQ_PROPCM) { 437 unsigned char mtstat = inb(ICEMT(ice, IRQ)); 438 if (mtstat & ICE1712_MULTI_PBKSTATUS) { 439 if (ice->playback_pro_substream) 440 snd_pcm_period_elapsed(ice->playback_pro_substream); 441 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ)); 442 } 443 if (mtstat & ICE1712_MULTI_CAPSTATUS) { 444 if (ice->capture_pro_substream) 445 snd_pcm_period_elapsed(ice->capture_pro_substream); 446 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ)); 447 } 448 } 449 if (status & ICE1712_IRQ_FM) 450 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT)); 451 if (status & ICE1712_IRQ_PBKDS) { 452 u32 idx; 453 u16 pbkstatus; 454 struct snd_pcm_substream *substream; 455 pbkstatus = inw(ICEDS(ice, INTSTAT)); 456 /* dev_dbg(ice->card->dev, "pbkstatus = 0x%x\n", pbkstatus); */ 457 for (idx = 0; idx < 6; idx++) { 458 if ((pbkstatus & (3 << (idx * 2))) == 0) 459 continue; 460 substream = ice->playback_con_substream_ds[idx]; 461 if (substream != NULL) 462 snd_pcm_period_elapsed(substream); 463 outw(3 << (idx * 2), ICEDS(ice, INTSTAT)); 464 } 465 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT)); 466 } 467 if (status & ICE1712_IRQ_CONCAP) { 468 if (ice->capture_con_substream) 469 snd_pcm_period_elapsed(ice->capture_con_substream); 470 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT)); 471 } 472 if (status & ICE1712_IRQ_CONPBK) { 473 if (ice->playback_con_substream) 474 snd_pcm_period_elapsed(ice->playback_con_substream); 475 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT)); 476 } 477 } 478 return IRQ_RETVAL(handled); 479 } 480 481 482 /* 483 * PCM part - misc 484 */ 485 486 static int snd_ice1712_hw_params(struct snd_pcm_substream *substream, 487 struct snd_pcm_hw_params *hw_params) 488 { 489 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 490 } 491 492 static int snd_ice1712_hw_free(struct snd_pcm_substream *substream) 493 { 494 return snd_pcm_lib_free_pages(substream); 495 } 496 497 /* 498 * PCM part - consumer I/O 499 */ 500 501 static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream, 502 int cmd) 503 { 504 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 505 int result = 0; 506 u32 tmp; 507 508 spin_lock(&ice->reg_lock); 509 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL); 510 if (cmd == SNDRV_PCM_TRIGGER_START) { 511 tmp |= 1; 512 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 513 tmp &= ~1; 514 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) { 515 tmp |= 2; 516 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) { 517 tmp &= ~2; 518 } else { 519 result = -EINVAL; 520 } 521 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp); 522 spin_unlock(&ice->reg_lock); 523 return result; 524 } 525 526 static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream, 527 int cmd) 528 { 529 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 530 int result = 0; 531 u32 tmp; 532 533 spin_lock(&ice->reg_lock); 534 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL); 535 if (cmd == SNDRV_PCM_TRIGGER_START) { 536 tmp |= 1; 537 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 538 tmp &= ~1; 539 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) { 540 tmp |= 2; 541 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) { 542 tmp &= ~2; 543 } else { 544 result = -EINVAL; 545 } 546 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp); 547 spin_unlock(&ice->reg_lock); 548 return result; 549 } 550 551 static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream, 552 int cmd) 553 { 554 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 555 int result = 0; 556 u8 tmp; 557 558 spin_lock(&ice->reg_lock); 559 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL); 560 if (cmd == SNDRV_PCM_TRIGGER_START) { 561 tmp |= 1; 562 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 563 tmp &= ~1; 564 } else { 565 result = -EINVAL; 566 } 567 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp); 568 spin_unlock(&ice->reg_lock); 569 return result; 570 } 571 572 static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream) 573 { 574 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 575 struct snd_pcm_runtime *runtime = substream->runtime; 576 u32 period_size, buf_size, rate, tmp; 577 578 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 579 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1; 580 tmp = 0x0000; 581 if (snd_pcm_format_width(runtime->format) == 16) 582 tmp |= 0x10; 583 if (runtime->channels == 2) 584 tmp |= 0x08; 585 rate = (runtime->rate * 8192) / 375; 586 if (rate > 0x000fffff) 587 rate = 0x000fffff; 588 spin_lock_irq(&ice->reg_lock); 589 outb(0, ice->ddma_port + 15); 590 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b); 591 outl(runtime->dma_addr, ice->ddma_port + 0); 592 outw(buf_size, ice->ddma_port + 4); 593 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff); 594 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff); 595 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff); 596 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp); 597 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff); 598 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8); 599 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0); 600 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0); 601 spin_unlock_irq(&ice->reg_lock); 602 return 0; 603 } 604 605 static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream) 606 { 607 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 608 struct snd_pcm_runtime *runtime = substream->runtime; 609 u32 period_size, rate, tmp, chn; 610 611 period_size = snd_pcm_lib_period_bytes(substream) - 1; 612 tmp = 0x0064; 613 if (snd_pcm_format_width(runtime->format) == 16) 614 tmp &= ~0x04; 615 if (runtime->channels == 2) 616 tmp |= 0x08; 617 rate = (runtime->rate * 8192) / 375; 618 if (rate > 0x000fffff) 619 rate = 0x000fffff; 620 ice->playback_con_active_buf[substream->number] = 0; 621 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr; 622 chn = substream->number * 2; 623 spin_lock_irq(&ice->reg_lock); 624 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr); 625 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size); 626 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0)); 627 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size); 628 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate); 629 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0); 630 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp); 631 if (runtime->channels == 2) { 632 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate); 633 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0); 634 } 635 spin_unlock_irq(&ice->reg_lock); 636 return 0; 637 } 638 639 static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream) 640 { 641 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 642 struct snd_pcm_runtime *runtime = substream->runtime; 643 u32 period_size, buf_size; 644 u8 tmp; 645 646 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 647 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1; 648 tmp = 0x06; 649 if (snd_pcm_format_width(runtime->format) == 16) 650 tmp &= ~0x04; 651 if (runtime->channels == 2) 652 tmp &= ~0x02; 653 spin_lock_irq(&ice->reg_lock); 654 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR)); 655 outw(buf_size, ICEREG(ice, CONCAP_COUNT)); 656 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8); 657 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff); 658 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp); 659 spin_unlock_irq(&ice->reg_lock); 660 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); 661 return 0; 662 } 663 664 static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream) 665 { 666 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 667 struct snd_pcm_runtime *runtime = substream->runtime; 668 size_t ptr; 669 670 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1)) 671 return 0; 672 ptr = runtime->buffer_size - inw(ice->ddma_port + 4); 673 ptr = bytes_to_frames(substream->runtime, ptr); 674 if (ptr == runtime->buffer_size) 675 ptr = 0; 676 return ptr; 677 } 678 679 static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream) 680 { 681 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 682 u8 addr; 683 size_t ptr; 684 685 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1)) 686 return 0; 687 if (ice->playback_con_active_buf[substream->number]) 688 addr = ICE1712_DSC_ADDR1; 689 else 690 addr = ICE1712_DSC_ADDR0; 691 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) - 692 ice->playback_con_virt_addr[substream->number]; 693 ptr = bytes_to_frames(substream->runtime, ptr); 694 if (ptr == substream->runtime->buffer_size) 695 ptr = 0; 696 return ptr; 697 } 698 699 static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream) 700 { 701 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 702 size_t ptr; 703 704 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1)) 705 return 0; 706 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr; 707 ptr = bytes_to_frames(substream->runtime, ptr); 708 if (ptr == substream->runtime->buffer_size) 709 ptr = 0; 710 return ptr; 711 } 712 713 static const struct snd_pcm_hardware snd_ice1712_playback = { 714 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 715 SNDRV_PCM_INFO_BLOCK_TRANSFER | 716 SNDRV_PCM_INFO_MMAP_VALID | 717 SNDRV_PCM_INFO_PAUSE), 718 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 719 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 720 .rate_min = 4000, 721 .rate_max = 48000, 722 .channels_min = 1, 723 .channels_max = 2, 724 .buffer_bytes_max = (64*1024), 725 .period_bytes_min = 64, 726 .period_bytes_max = (64*1024), 727 .periods_min = 1, 728 .periods_max = 1024, 729 .fifo_size = 0, 730 }; 731 732 static const struct snd_pcm_hardware snd_ice1712_playback_ds = { 733 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 734 SNDRV_PCM_INFO_BLOCK_TRANSFER | 735 SNDRV_PCM_INFO_MMAP_VALID | 736 SNDRV_PCM_INFO_PAUSE), 737 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 738 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 739 .rate_min = 4000, 740 .rate_max = 48000, 741 .channels_min = 1, 742 .channels_max = 2, 743 .buffer_bytes_max = (128*1024), 744 .period_bytes_min = 64, 745 .period_bytes_max = (128*1024), 746 .periods_min = 2, 747 .periods_max = 2, 748 .fifo_size = 0, 749 }; 750 751 static const struct snd_pcm_hardware snd_ice1712_capture = { 752 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 753 SNDRV_PCM_INFO_BLOCK_TRANSFER | 754 SNDRV_PCM_INFO_MMAP_VALID), 755 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 756 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 757 .rate_min = 4000, 758 .rate_max = 48000, 759 .channels_min = 1, 760 .channels_max = 2, 761 .buffer_bytes_max = (64*1024), 762 .period_bytes_min = 64, 763 .period_bytes_max = (64*1024), 764 .periods_min = 1, 765 .periods_max = 1024, 766 .fifo_size = 0, 767 }; 768 769 static int snd_ice1712_playback_open(struct snd_pcm_substream *substream) 770 { 771 struct snd_pcm_runtime *runtime = substream->runtime; 772 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 773 774 ice->playback_con_substream = substream; 775 runtime->hw = snd_ice1712_playback; 776 return 0; 777 } 778 779 static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream) 780 { 781 struct snd_pcm_runtime *runtime = substream->runtime; 782 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 783 u32 tmp; 784 785 ice->playback_con_substream_ds[substream->number] = substream; 786 runtime->hw = snd_ice1712_playback_ds; 787 spin_lock_irq(&ice->reg_lock); 788 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2)); 789 outw(tmp, ICEDS(ice, INTMASK)); 790 spin_unlock_irq(&ice->reg_lock); 791 return 0; 792 } 793 794 static int snd_ice1712_capture_open(struct snd_pcm_substream *substream) 795 { 796 struct snd_pcm_runtime *runtime = substream->runtime; 797 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 798 799 ice->capture_con_substream = substream; 800 runtime->hw = snd_ice1712_capture; 801 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC]; 802 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000)) 803 runtime->hw.rate_min = 48000; 804 return 0; 805 } 806 807 static int snd_ice1712_playback_close(struct snd_pcm_substream *substream) 808 { 809 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 810 811 ice->playback_con_substream = NULL; 812 return 0; 813 } 814 815 static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream) 816 { 817 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 818 u32 tmp; 819 820 spin_lock_irq(&ice->reg_lock); 821 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2)); 822 outw(tmp, ICEDS(ice, INTMASK)); 823 spin_unlock_irq(&ice->reg_lock); 824 ice->playback_con_substream_ds[substream->number] = NULL; 825 return 0; 826 } 827 828 static int snd_ice1712_capture_close(struct snd_pcm_substream *substream) 829 { 830 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 831 832 ice->capture_con_substream = NULL; 833 return 0; 834 } 835 836 static const struct snd_pcm_ops snd_ice1712_playback_ops = { 837 .open = snd_ice1712_playback_open, 838 .close = snd_ice1712_playback_close, 839 .ioctl = snd_pcm_lib_ioctl, 840 .hw_params = snd_ice1712_hw_params, 841 .hw_free = snd_ice1712_hw_free, 842 .prepare = snd_ice1712_playback_prepare, 843 .trigger = snd_ice1712_playback_trigger, 844 .pointer = snd_ice1712_playback_pointer, 845 }; 846 847 static const struct snd_pcm_ops snd_ice1712_playback_ds_ops = { 848 .open = snd_ice1712_playback_ds_open, 849 .close = snd_ice1712_playback_ds_close, 850 .ioctl = snd_pcm_lib_ioctl, 851 .hw_params = snd_ice1712_hw_params, 852 .hw_free = snd_ice1712_hw_free, 853 .prepare = snd_ice1712_playback_ds_prepare, 854 .trigger = snd_ice1712_playback_ds_trigger, 855 .pointer = snd_ice1712_playback_ds_pointer, 856 }; 857 858 static const struct snd_pcm_ops snd_ice1712_capture_ops = { 859 .open = snd_ice1712_capture_open, 860 .close = snd_ice1712_capture_close, 861 .ioctl = snd_pcm_lib_ioctl, 862 .hw_params = snd_ice1712_hw_params, 863 .hw_free = snd_ice1712_hw_free, 864 .prepare = snd_ice1712_capture_prepare, 865 .trigger = snd_ice1712_capture_trigger, 866 .pointer = snd_ice1712_capture_pointer, 867 }; 868 869 static int snd_ice1712_pcm(struct snd_ice1712 *ice, int device) 870 { 871 struct snd_pcm *pcm; 872 int err; 873 874 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm); 875 if (err < 0) 876 return err; 877 878 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops); 879 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops); 880 881 pcm->private_data = ice; 882 pcm->info_flags = 0; 883 strcpy(pcm->name, "ICE1712 consumer"); 884 ice->pcm = pcm; 885 886 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 887 snd_dma_pci_data(ice->pci), 64*1024, 64*1024); 888 889 dev_warn(ice->card->dev, 890 "Consumer PCM code does not work well at the moment --jk\n"); 891 892 return 0; 893 } 894 895 static int snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device) 896 { 897 struct snd_pcm *pcm; 898 int err; 899 900 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm); 901 if (err < 0) 902 return err; 903 904 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops); 905 906 pcm->private_data = ice; 907 pcm->info_flags = 0; 908 strcpy(pcm->name, "ICE1712 consumer (DS)"); 909 ice->pcm_ds = pcm; 910 911 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 912 snd_dma_pci_data(ice->pci), 64*1024, 128*1024); 913 914 return 0; 915 } 916 917 /* 918 * PCM code - professional part (multitrack) 919 */ 920 921 static const unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000, 922 32000, 44100, 48000, 64000, 88200, 96000 }; 923 924 static const struct snd_pcm_hw_constraint_list hw_constraints_rates = { 925 .count = ARRAY_SIZE(rates), 926 .list = rates, 927 .mask = 0, 928 }; 929 930 static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream, 931 int cmd) 932 { 933 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 934 switch (cmd) { 935 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 936 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 937 { 938 unsigned int what; 939 unsigned int old; 940 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK) 941 return -EINVAL; 942 what = ICE1712_PLAYBACK_PAUSE; 943 snd_pcm_trigger_done(substream, substream); 944 spin_lock(&ice->reg_lock); 945 old = inl(ICEMT(ice, PLAYBACK_CONTROL)); 946 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) 947 old |= what; 948 else 949 old &= ~what; 950 outl(old, ICEMT(ice, PLAYBACK_CONTROL)); 951 spin_unlock(&ice->reg_lock); 952 break; 953 } 954 case SNDRV_PCM_TRIGGER_START: 955 case SNDRV_PCM_TRIGGER_STOP: 956 { 957 unsigned int what = 0; 958 unsigned int old; 959 struct snd_pcm_substream *s; 960 961 snd_pcm_group_for_each_entry(s, substream) { 962 if (s == ice->playback_pro_substream) { 963 what |= ICE1712_PLAYBACK_START; 964 snd_pcm_trigger_done(s, substream); 965 } else if (s == ice->capture_pro_substream) { 966 what |= ICE1712_CAPTURE_START_SHADOW; 967 snd_pcm_trigger_done(s, substream); 968 } 969 } 970 spin_lock(&ice->reg_lock); 971 old = inl(ICEMT(ice, PLAYBACK_CONTROL)); 972 if (cmd == SNDRV_PCM_TRIGGER_START) 973 old |= what; 974 else 975 old &= ~what; 976 outl(old, ICEMT(ice, PLAYBACK_CONTROL)); 977 spin_unlock(&ice->reg_lock); 978 break; 979 } 980 default: 981 return -EINVAL; 982 } 983 return 0; 984 } 985 986 /* 987 */ 988 static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force) 989 { 990 unsigned long flags; 991 unsigned char val, old; 992 unsigned int i; 993 994 switch (rate) { 995 case 8000: val = 6; break; 996 case 9600: val = 3; break; 997 case 11025: val = 10; break; 998 case 12000: val = 2; break; 999 case 16000: val = 5; break; 1000 case 22050: val = 9; break; 1001 case 24000: val = 1; break; 1002 case 32000: val = 4; break; 1003 case 44100: val = 8; break; 1004 case 48000: val = 0; break; 1005 case 64000: val = 15; break; 1006 case 88200: val = 11; break; 1007 case 96000: val = 7; break; 1008 default: 1009 snd_BUG(); 1010 val = 0; 1011 rate = 48000; 1012 break; 1013 } 1014 1015 spin_lock_irqsave(&ice->reg_lock, flags); 1016 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW| 1017 ICE1712_PLAYBACK_PAUSE| 1018 ICE1712_PLAYBACK_START)) { 1019 __out: 1020 spin_unlock_irqrestore(&ice->reg_lock, flags); 1021 return; 1022 } 1023 if (!force && is_pro_rate_locked(ice)) 1024 goto __out; 1025 1026 old = inb(ICEMT(ice, RATE)); 1027 if (!force && old == val) 1028 goto __out; 1029 1030 ice->cur_rate = rate; 1031 outb(val, ICEMT(ice, RATE)); 1032 spin_unlock_irqrestore(&ice->reg_lock, flags); 1033 1034 if (ice->gpio.set_pro_rate) 1035 ice->gpio.set_pro_rate(ice, rate); 1036 for (i = 0; i < ice->akm_codecs; i++) { 1037 if (ice->akm[i].ops.set_rate_val) 1038 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate); 1039 } 1040 if (ice->spdif.ops.setup_rate) 1041 ice->spdif.ops.setup_rate(ice, rate); 1042 } 1043 1044 static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream) 1045 { 1046 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1047 1048 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream); 1049 spin_lock_irq(&ice->reg_lock); 1050 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR)); 1051 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE)); 1052 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT)); 1053 spin_unlock_irq(&ice->reg_lock); 1054 1055 return 0; 1056 } 1057 1058 static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream, 1059 struct snd_pcm_hw_params *hw_params) 1060 { 1061 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1062 1063 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0); 1064 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 1065 } 1066 1067 static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream) 1068 { 1069 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1070 1071 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream); 1072 spin_lock_irq(&ice->reg_lock); 1073 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR)); 1074 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE)); 1075 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT)); 1076 spin_unlock_irq(&ice->reg_lock); 1077 return 0; 1078 } 1079 1080 static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream, 1081 struct snd_pcm_hw_params *hw_params) 1082 { 1083 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1084 1085 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0); 1086 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 1087 } 1088 1089 static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream) 1090 { 1091 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1092 size_t ptr; 1093 1094 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START)) 1095 return 0; 1096 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2); 1097 ptr = bytes_to_frames(substream->runtime, ptr); 1098 if (ptr == substream->runtime->buffer_size) 1099 ptr = 0; 1100 return ptr; 1101 } 1102 1103 static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream) 1104 { 1105 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1106 size_t ptr; 1107 1108 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW)) 1109 return 0; 1110 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2); 1111 ptr = bytes_to_frames(substream->runtime, ptr); 1112 if (ptr == substream->runtime->buffer_size) 1113 ptr = 0; 1114 return ptr; 1115 } 1116 1117 static const struct snd_pcm_hardware snd_ice1712_playback_pro = { 1118 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1119 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1120 SNDRV_PCM_INFO_MMAP_VALID | 1121 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 1122 .formats = SNDRV_PCM_FMTBIT_S32_LE, 1123 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000, 1124 .rate_min = 4000, 1125 .rate_max = 96000, 1126 .channels_min = 10, 1127 .channels_max = 10, 1128 .buffer_bytes_max = (256*1024), 1129 .period_bytes_min = 10 * 4 * 2, 1130 .period_bytes_max = 131040, 1131 .periods_min = 1, 1132 .periods_max = 1024, 1133 .fifo_size = 0, 1134 }; 1135 1136 static const struct snd_pcm_hardware snd_ice1712_capture_pro = { 1137 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1138 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1139 SNDRV_PCM_INFO_MMAP_VALID | 1140 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 1141 .formats = SNDRV_PCM_FMTBIT_S32_LE, 1142 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000, 1143 .rate_min = 4000, 1144 .rate_max = 96000, 1145 .channels_min = 12, 1146 .channels_max = 12, 1147 .buffer_bytes_max = (256*1024), 1148 .period_bytes_min = 12 * 4 * 2, 1149 .period_bytes_max = 131040, 1150 .periods_min = 1, 1151 .periods_max = 1024, 1152 .fifo_size = 0, 1153 }; 1154 1155 static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream) 1156 { 1157 struct snd_pcm_runtime *runtime = substream->runtime; 1158 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1159 1160 ice->playback_pro_substream = substream; 1161 runtime->hw = snd_ice1712_playback_pro; 1162 snd_pcm_set_sync(substream); 1163 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1164 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates); 1165 if (is_pro_rate_locked(ice)) { 1166 runtime->hw.rate_min = PRO_RATE_DEFAULT; 1167 runtime->hw.rate_max = PRO_RATE_DEFAULT; 1168 } 1169 1170 if (ice->spdif.ops.open) 1171 ice->spdif.ops.open(ice, substream); 1172 1173 return 0; 1174 } 1175 1176 static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream) 1177 { 1178 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1179 struct snd_pcm_runtime *runtime = substream->runtime; 1180 1181 ice->capture_pro_substream = substream; 1182 runtime->hw = snd_ice1712_capture_pro; 1183 snd_pcm_set_sync(substream); 1184 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1185 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates); 1186 if (is_pro_rate_locked(ice)) { 1187 runtime->hw.rate_min = PRO_RATE_DEFAULT; 1188 runtime->hw.rate_max = PRO_RATE_DEFAULT; 1189 } 1190 1191 return 0; 1192 } 1193 1194 static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream) 1195 { 1196 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1197 1198 if (PRO_RATE_RESET) 1199 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 1200 ice->playback_pro_substream = NULL; 1201 if (ice->spdif.ops.close) 1202 ice->spdif.ops.close(ice, substream); 1203 1204 return 0; 1205 } 1206 1207 static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream) 1208 { 1209 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1210 1211 if (PRO_RATE_RESET) 1212 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 1213 ice->capture_pro_substream = NULL; 1214 return 0; 1215 } 1216 1217 static const struct snd_pcm_ops snd_ice1712_playback_pro_ops = { 1218 .open = snd_ice1712_playback_pro_open, 1219 .close = snd_ice1712_playback_pro_close, 1220 .ioctl = snd_pcm_lib_ioctl, 1221 .hw_params = snd_ice1712_playback_pro_hw_params, 1222 .hw_free = snd_ice1712_hw_free, 1223 .prepare = snd_ice1712_playback_pro_prepare, 1224 .trigger = snd_ice1712_pro_trigger, 1225 .pointer = snd_ice1712_playback_pro_pointer, 1226 }; 1227 1228 static const struct snd_pcm_ops snd_ice1712_capture_pro_ops = { 1229 .open = snd_ice1712_capture_pro_open, 1230 .close = snd_ice1712_capture_pro_close, 1231 .ioctl = snd_pcm_lib_ioctl, 1232 .hw_params = snd_ice1712_capture_pro_hw_params, 1233 .hw_free = snd_ice1712_hw_free, 1234 .prepare = snd_ice1712_capture_pro_prepare, 1235 .trigger = snd_ice1712_pro_trigger, 1236 .pointer = snd_ice1712_capture_pro_pointer, 1237 }; 1238 1239 static int snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device) 1240 { 1241 struct snd_pcm *pcm; 1242 int err; 1243 1244 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm); 1245 if (err < 0) 1246 return err; 1247 1248 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops); 1249 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops); 1250 1251 pcm->private_data = ice; 1252 pcm->info_flags = 0; 1253 strcpy(pcm->name, "ICE1712 multi"); 1254 1255 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1256 snd_dma_pci_data(ice->pci), 256*1024, 256*1024); 1257 1258 ice->pcm_pro = pcm; 1259 1260 if (ice->cs8427) { 1261 /* assign channels to iec958 */ 1262 err = snd_cs8427_iec958_build(ice->cs8427, 1263 pcm->streams[0].substream, 1264 pcm->streams[1].substream); 1265 if (err < 0) 1266 return err; 1267 } 1268 1269 return snd_ice1712_build_pro_mixer(ice); 1270 } 1271 1272 /* 1273 * Mixer section 1274 */ 1275 1276 static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index) 1277 { 1278 unsigned int vol = ice->pro_volumes[index]; 1279 unsigned short val = 0; 1280 1281 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f; 1282 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8; 1283 outb(index, ICEMT(ice, MONITOR_INDEX)); 1284 outw(val, ICEMT(ice, MONITOR_VOLUME)); 1285 } 1286 1287 #define snd_ice1712_pro_mixer_switch_info snd_ctl_boolean_stereo_info 1288 1289 static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1290 { 1291 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1292 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1293 kcontrol->private_value; 1294 1295 spin_lock_irq(&ice->reg_lock); 1296 ucontrol->value.integer.value[0] = 1297 !((ice->pro_volumes[priv_idx] >> 15) & 1); 1298 ucontrol->value.integer.value[1] = 1299 !((ice->pro_volumes[priv_idx] >> 31) & 1); 1300 spin_unlock_irq(&ice->reg_lock); 1301 return 0; 1302 } 1303 1304 static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1305 { 1306 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1307 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1308 kcontrol->private_value; 1309 unsigned int nval, change; 1310 1311 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) | 1312 (ucontrol->value.integer.value[1] ? 0 : 0x80000000); 1313 spin_lock_irq(&ice->reg_lock); 1314 nval |= ice->pro_volumes[priv_idx] & ~0x80008000; 1315 change = nval != ice->pro_volumes[priv_idx]; 1316 ice->pro_volumes[priv_idx] = nval; 1317 snd_ice1712_update_volume(ice, priv_idx); 1318 spin_unlock_irq(&ice->reg_lock); 1319 return change; 1320 } 1321 1322 static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1323 { 1324 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1325 uinfo->count = 2; 1326 uinfo->value.integer.min = 0; 1327 uinfo->value.integer.max = 96; 1328 return 0; 1329 } 1330 1331 static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1332 { 1333 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1334 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1335 kcontrol->private_value; 1336 1337 spin_lock_irq(&ice->reg_lock); 1338 ucontrol->value.integer.value[0] = 1339 (ice->pro_volumes[priv_idx] >> 0) & 127; 1340 ucontrol->value.integer.value[1] = 1341 (ice->pro_volumes[priv_idx] >> 16) & 127; 1342 spin_unlock_irq(&ice->reg_lock); 1343 return 0; 1344 } 1345 1346 static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1347 { 1348 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1349 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1350 kcontrol->private_value; 1351 unsigned int nval, change; 1352 1353 nval = (ucontrol->value.integer.value[0] & 127) | 1354 ((ucontrol->value.integer.value[1] & 127) << 16); 1355 spin_lock_irq(&ice->reg_lock); 1356 nval |= ice->pro_volumes[priv_idx] & ~0x007f007f; 1357 change = nval != ice->pro_volumes[priv_idx]; 1358 ice->pro_volumes[priv_idx] = nval; 1359 snd_ice1712_update_volume(ice, priv_idx); 1360 spin_unlock_irq(&ice->reg_lock); 1361 return change; 1362 } 1363 1364 static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0); 1365 1366 static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] = { 1367 { 1368 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1369 .name = "Multi Playback Switch", 1370 .info = snd_ice1712_pro_mixer_switch_info, 1371 .get = snd_ice1712_pro_mixer_switch_get, 1372 .put = snd_ice1712_pro_mixer_switch_put, 1373 .private_value = 0, 1374 .count = 10, 1375 }, 1376 { 1377 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1378 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1379 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 1380 .name = "Multi Playback Volume", 1381 .info = snd_ice1712_pro_mixer_volume_info, 1382 .get = snd_ice1712_pro_mixer_volume_get, 1383 .put = snd_ice1712_pro_mixer_volume_put, 1384 .private_value = 0, 1385 .count = 10, 1386 .tlv = { .p = db_scale_playback } 1387 }, 1388 }; 1389 1390 static const struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch = { 1391 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1392 .name = "H/W Multi Capture Switch", 1393 .info = snd_ice1712_pro_mixer_switch_info, 1394 .get = snd_ice1712_pro_mixer_switch_get, 1395 .put = snd_ice1712_pro_mixer_switch_put, 1396 .private_value = 10, 1397 }; 1398 1399 static const struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch = { 1400 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1401 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, SWITCH), 1402 .info = snd_ice1712_pro_mixer_switch_info, 1403 .get = snd_ice1712_pro_mixer_switch_get, 1404 .put = snd_ice1712_pro_mixer_switch_put, 1405 .private_value = 18, 1406 .count = 2, 1407 }; 1408 1409 static const struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume = { 1410 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1411 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1412 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 1413 .name = "H/W Multi Capture Volume", 1414 .info = snd_ice1712_pro_mixer_volume_info, 1415 .get = snd_ice1712_pro_mixer_volume_get, 1416 .put = snd_ice1712_pro_mixer_volume_put, 1417 .private_value = 10, 1418 .tlv = { .p = db_scale_playback } 1419 }; 1420 1421 static const struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume = { 1422 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1423 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, VOLUME), 1424 .info = snd_ice1712_pro_mixer_volume_info, 1425 .get = snd_ice1712_pro_mixer_volume_get, 1426 .put = snd_ice1712_pro_mixer_volume_put, 1427 .private_value = 18, 1428 .count = 2, 1429 }; 1430 1431 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice) 1432 { 1433 struct snd_card *card = ice->card; 1434 unsigned int idx; 1435 int err; 1436 1437 /* multi-channel mixer */ 1438 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) { 1439 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice)); 1440 if (err < 0) 1441 return err; 1442 } 1443 1444 if (ice->num_total_adcs > 0) { 1445 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch; 1446 tmp.count = ice->num_total_adcs; 1447 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice)); 1448 if (err < 0) 1449 return err; 1450 } 1451 1452 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice)); 1453 if (err < 0) 1454 return err; 1455 1456 if (ice->num_total_adcs > 0) { 1457 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume; 1458 tmp.count = ice->num_total_adcs; 1459 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice)); 1460 if (err < 0) 1461 return err; 1462 } 1463 1464 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice)); 1465 if (err < 0) 1466 return err; 1467 1468 /* initialize volumes */ 1469 for (idx = 0; idx < 10; idx++) { 1470 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1471 snd_ice1712_update_volume(ice, idx); 1472 } 1473 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) { 1474 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1475 snd_ice1712_update_volume(ice, idx); 1476 } 1477 for (idx = 18; idx < 20; idx++) { 1478 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1479 snd_ice1712_update_volume(ice, idx); 1480 } 1481 return 0; 1482 } 1483 1484 static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97) 1485 { 1486 struct snd_ice1712 *ice = ac97->private_data; 1487 ice->ac97 = NULL; 1488 } 1489 1490 static int snd_ice1712_ac97_mixer(struct snd_ice1712 *ice) 1491 { 1492 int err, bus_num = 0; 1493 struct snd_ac97_template ac97; 1494 struct snd_ac97_bus *pbus; 1495 static struct snd_ac97_bus_ops con_ops = { 1496 .write = snd_ice1712_ac97_write, 1497 .read = snd_ice1712_ac97_read, 1498 }; 1499 static struct snd_ac97_bus_ops pro_ops = { 1500 .write = snd_ice1712_pro_ac97_write, 1501 .read = snd_ice1712_pro_ac97_read, 1502 }; 1503 1504 if (ice_has_con_ac97(ice)) { 1505 err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus); 1506 if (err < 0) 1507 return err; 1508 memset(&ac97, 0, sizeof(ac97)); 1509 ac97.private_data = ice; 1510 ac97.private_free = snd_ice1712_mixer_free_ac97; 1511 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97); 1512 if (err < 0) 1513 dev_warn(ice->card->dev, 1514 "cannot initialize ac97 for consumer, skipped\n"); 1515 else { 1516 return snd_ctl_add(ice->card, 1517 snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, 1518 ice)); 1519 } 1520 } 1521 1522 if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) { 1523 err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus); 1524 if (err < 0) 1525 return err; 1526 memset(&ac97, 0, sizeof(ac97)); 1527 ac97.private_data = ice; 1528 ac97.private_free = snd_ice1712_mixer_free_ac97; 1529 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97); 1530 if (err < 0) 1531 dev_warn(ice->card->dev, 1532 "cannot initialize pro ac97, skipped\n"); 1533 else 1534 return 0; 1535 } 1536 /* I2S mixer only */ 1537 strcat(ice->card->mixername, "ICE1712 - multitrack"); 1538 return 0; 1539 } 1540 1541 /* 1542 * 1543 */ 1544 1545 static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx) 1546 { 1547 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8); 1548 } 1549 1550 static void snd_ice1712_proc_read(struct snd_info_entry *entry, 1551 struct snd_info_buffer *buffer) 1552 { 1553 struct snd_ice1712 *ice = entry->private_data; 1554 unsigned int idx; 1555 1556 snd_iprintf(buffer, "%s\n\n", ice->card->longname); 1557 snd_iprintf(buffer, "EEPROM:\n"); 1558 1559 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor); 1560 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size); 1561 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version); 1562 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]); 1563 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]); 1564 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]); 1565 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]); 1566 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask); 1567 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate); 1568 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir); 1569 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO)); 1570 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO)); 1571 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO)); 1572 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]); 1573 for (idx = 0; idx < 4; idx++) 1574 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]); 1575 for (idx = 0; idx < 4; idx++) 1576 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]); 1577 for (idx = 0x1c; idx < ice->eeprom.size; idx++) 1578 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]); 1579 1580 snd_iprintf(buffer, "\nRegisters:\n"); 1581 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03))); 1582 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE))); 1583 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT))); 1584 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE))); 1585 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice)); 1586 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK)); 1587 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION)); 1588 } 1589 1590 static void snd_ice1712_proc_init(struct snd_ice1712 *ice) 1591 { 1592 snd_card_ro_proc_new(ice->card, "ice1712", ice, snd_ice1712_proc_read); 1593 } 1594 1595 /* 1596 * 1597 */ 1598 1599 static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol, 1600 struct snd_ctl_elem_info *uinfo) 1601 { 1602 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 1603 uinfo->count = sizeof(struct snd_ice1712_eeprom); 1604 return 0; 1605 } 1606 1607 static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol, 1608 struct snd_ctl_elem_value *ucontrol) 1609 { 1610 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1611 1612 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom)); 1613 return 0; 1614 } 1615 1616 static const struct snd_kcontrol_new snd_ice1712_eeprom = { 1617 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 1618 .name = "ICE1712 EEPROM", 1619 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1620 .info = snd_ice1712_eeprom_info, 1621 .get = snd_ice1712_eeprom_get 1622 }; 1623 1624 /* 1625 */ 1626 static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol, 1627 struct snd_ctl_elem_info *uinfo) 1628 { 1629 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1630 uinfo->count = 1; 1631 return 0; 1632 } 1633 1634 static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol, 1635 struct snd_ctl_elem_value *ucontrol) 1636 { 1637 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1638 if (ice->spdif.ops.default_get) 1639 ice->spdif.ops.default_get(ice, ucontrol); 1640 return 0; 1641 } 1642 1643 static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol, 1644 struct snd_ctl_elem_value *ucontrol) 1645 { 1646 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1647 if (ice->spdif.ops.default_put) 1648 return ice->spdif.ops.default_put(ice, ucontrol); 1649 return 0; 1650 } 1651 1652 static const struct snd_kcontrol_new snd_ice1712_spdif_default = 1653 { 1654 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1655 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), 1656 .info = snd_ice1712_spdif_info, 1657 .get = snd_ice1712_spdif_default_get, 1658 .put = snd_ice1712_spdif_default_put 1659 }; 1660 1661 static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol, 1662 struct snd_ctl_elem_value *ucontrol) 1663 { 1664 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1665 if (ice->spdif.ops.default_get) { 1666 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1667 IEC958_AES0_PROFESSIONAL | 1668 IEC958_AES0_CON_NOT_COPYRIGHT | 1669 IEC958_AES0_CON_EMPHASIS; 1670 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL | 1671 IEC958_AES1_CON_CATEGORY; 1672 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS; 1673 } else { 1674 ucontrol->value.iec958.status[0] = 0xff; 1675 ucontrol->value.iec958.status[1] = 0xff; 1676 ucontrol->value.iec958.status[2] = 0xff; 1677 ucontrol->value.iec958.status[3] = 0xff; 1678 ucontrol->value.iec958.status[4] = 0xff; 1679 } 1680 return 0; 1681 } 1682 1683 static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol, 1684 struct snd_ctl_elem_value *ucontrol) 1685 { 1686 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1687 if (ice->spdif.ops.default_get) { 1688 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1689 IEC958_AES0_PROFESSIONAL | 1690 IEC958_AES0_PRO_FS | 1691 IEC958_AES0_PRO_EMPHASIS; 1692 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE; 1693 } else { 1694 ucontrol->value.iec958.status[0] = 0xff; 1695 ucontrol->value.iec958.status[1] = 0xff; 1696 ucontrol->value.iec958.status[2] = 0xff; 1697 ucontrol->value.iec958.status[3] = 0xff; 1698 ucontrol->value.iec958.status[4] = 0xff; 1699 } 1700 return 0; 1701 } 1702 1703 static const struct snd_kcontrol_new snd_ice1712_spdif_maskc = 1704 { 1705 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1706 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1707 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK), 1708 .info = snd_ice1712_spdif_info, 1709 .get = snd_ice1712_spdif_maskc_get, 1710 }; 1711 1712 static const struct snd_kcontrol_new snd_ice1712_spdif_maskp = 1713 { 1714 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1715 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1716 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK), 1717 .info = snd_ice1712_spdif_info, 1718 .get = snd_ice1712_spdif_maskp_get, 1719 }; 1720 1721 static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol, 1722 struct snd_ctl_elem_value *ucontrol) 1723 { 1724 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1725 if (ice->spdif.ops.stream_get) 1726 ice->spdif.ops.stream_get(ice, ucontrol); 1727 return 0; 1728 } 1729 1730 static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol, 1731 struct snd_ctl_elem_value *ucontrol) 1732 { 1733 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1734 if (ice->spdif.ops.stream_put) 1735 return ice->spdif.ops.stream_put(ice, ucontrol); 1736 return 0; 1737 } 1738 1739 static const struct snd_kcontrol_new snd_ice1712_spdif_stream = 1740 { 1741 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1742 SNDRV_CTL_ELEM_ACCESS_INACTIVE), 1743 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1744 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM), 1745 .info = snd_ice1712_spdif_info, 1746 .get = snd_ice1712_spdif_stream_get, 1747 .put = snd_ice1712_spdif_stream_put 1748 }; 1749 1750 int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol, 1751 struct snd_ctl_elem_value *ucontrol) 1752 { 1753 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1754 unsigned char mask = kcontrol->private_value & 0xff; 1755 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0; 1756 1757 snd_ice1712_save_gpio_status(ice); 1758 ucontrol->value.integer.value[0] = 1759 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert; 1760 snd_ice1712_restore_gpio_status(ice); 1761 return 0; 1762 } 1763 1764 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol, 1765 struct snd_ctl_elem_value *ucontrol) 1766 { 1767 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1768 unsigned char mask = kcontrol->private_value & 0xff; 1769 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0; 1770 unsigned int val, nval; 1771 1772 if (kcontrol->private_value & (1 << 31)) 1773 return -EPERM; 1774 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert; 1775 snd_ice1712_save_gpio_status(ice); 1776 val = snd_ice1712_gpio_read(ice); 1777 nval |= val & ~mask; 1778 if (val != nval) 1779 snd_ice1712_gpio_write(ice, nval); 1780 snd_ice1712_restore_gpio_status(ice); 1781 return val != nval; 1782 } 1783 1784 /* 1785 * rate 1786 */ 1787 static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol, 1788 struct snd_ctl_elem_info *uinfo) 1789 { 1790 static const char * const texts[] = { 1791 "8000", /* 0: 6 */ 1792 "9600", /* 1: 3 */ 1793 "11025", /* 2: 10 */ 1794 "12000", /* 3: 2 */ 1795 "16000", /* 4: 5 */ 1796 "22050", /* 5: 9 */ 1797 "24000", /* 6: 1 */ 1798 "32000", /* 7: 4 */ 1799 "44100", /* 8: 8 */ 1800 "48000", /* 9: 0 */ 1801 "64000", /* 10: 15 */ 1802 "88200", /* 11: 11 */ 1803 "96000", /* 12: 7 */ 1804 "IEC958 Input", /* 13: -- */ 1805 }; 1806 return snd_ctl_enum_info(uinfo, 1, 14, texts); 1807 } 1808 1809 static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol, 1810 struct snd_ctl_elem_value *ucontrol) 1811 { 1812 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1813 static const unsigned char xlate[16] = { 1814 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10 1815 }; 1816 unsigned char val; 1817 1818 spin_lock_irq(&ice->reg_lock); 1819 if (is_spdif_master(ice)) { 1820 ucontrol->value.enumerated.item[0] = 13; 1821 } else { 1822 val = xlate[inb(ICEMT(ice, RATE)) & 15]; 1823 if (val == 255) { 1824 snd_BUG(); 1825 val = 0; 1826 } 1827 ucontrol->value.enumerated.item[0] = val; 1828 } 1829 spin_unlock_irq(&ice->reg_lock); 1830 return 0; 1831 } 1832 1833 static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol, 1834 struct snd_ctl_elem_value *ucontrol) 1835 { 1836 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1837 static const unsigned int xrate[13] = { 1838 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1839 32000, 44100, 48000, 64000, 88200, 96000 1840 }; 1841 unsigned char oval; 1842 int change = 0; 1843 1844 spin_lock_irq(&ice->reg_lock); 1845 oval = inb(ICEMT(ice, RATE)); 1846 if (ucontrol->value.enumerated.item[0] == 13) { 1847 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE)); 1848 } else { 1849 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13]; 1850 spin_unlock_irq(&ice->reg_lock); 1851 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1); 1852 spin_lock_irq(&ice->reg_lock); 1853 } 1854 change = inb(ICEMT(ice, RATE)) != oval; 1855 spin_unlock_irq(&ice->reg_lock); 1856 1857 if ((oval & ICE1712_SPDIF_MASTER) != 1858 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER)) 1859 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice)); 1860 1861 return change; 1862 } 1863 1864 static const struct snd_kcontrol_new snd_ice1712_pro_internal_clock = { 1865 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1866 .name = "Multi Track Internal Clock", 1867 .info = snd_ice1712_pro_internal_clock_info, 1868 .get = snd_ice1712_pro_internal_clock_get, 1869 .put = snd_ice1712_pro_internal_clock_put 1870 }; 1871 1872 static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol, 1873 struct snd_ctl_elem_info *uinfo) 1874 { 1875 static const char * const texts[] = { 1876 "8000", /* 0: 6 */ 1877 "9600", /* 1: 3 */ 1878 "11025", /* 2: 10 */ 1879 "12000", /* 3: 2 */ 1880 "16000", /* 4: 5 */ 1881 "22050", /* 5: 9 */ 1882 "24000", /* 6: 1 */ 1883 "32000", /* 7: 4 */ 1884 "44100", /* 8: 8 */ 1885 "48000", /* 9: 0 */ 1886 "64000", /* 10: 15 */ 1887 "88200", /* 11: 11 */ 1888 "96000", /* 12: 7 */ 1889 /* "IEC958 Input", 13: -- */ 1890 }; 1891 return snd_ctl_enum_info(uinfo, 1, 13, texts); 1892 } 1893 1894 static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol, 1895 struct snd_ctl_elem_value *ucontrol) 1896 { 1897 int val; 1898 static const unsigned int xrate[13] = { 1899 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1900 32000, 44100, 48000, 64000, 88200, 96000 1901 }; 1902 1903 for (val = 0; val < 13; val++) { 1904 if (xrate[val] == PRO_RATE_DEFAULT) 1905 break; 1906 } 1907 1908 ucontrol->value.enumerated.item[0] = val; 1909 return 0; 1910 } 1911 1912 static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol, 1913 struct snd_ctl_elem_value *ucontrol) 1914 { 1915 static const unsigned int xrate[13] = { 1916 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1917 32000, 44100, 48000, 64000, 88200, 96000 1918 }; 1919 unsigned char oval; 1920 int change = 0; 1921 1922 oval = PRO_RATE_DEFAULT; 1923 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13]; 1924 change = PRO_RATE_DEFAULT != oval; 1925 1926 return change; 1927 } 1928 1929 static const struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default = { 1930 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1931 .name = "Multi Track Internal Clock Default", 1932 .info = snd_ice1712_pro_internal_clock_default_info, 1933 .get = snd_ice1712_pro_internal_clock_default_get, 1934 .put = snd_ice1712_pro_internal_clock_default_put 1935 }; 1936 1937 #define snd_ice1712_pro_rate_locking_info snd_ctl_boolean_mono_info 1938 1939 static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol, 1940 struct snd_ctl_elem_value *ucontrol) 1941 { 1942 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED; 1943 return 0; 1944 } 1945 1946 static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol, 1947 struct snd_ctl_elem_value *ucontrol) 1948 { 1949 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1950 int change = 0, nval; 1951 1952 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1953 spin_lock_irq(&ice->reg_lock); 1954 change = PRO_RATE_LOCKED != nval; 1955 PRO_RATE_LOCKED = nval; 1956 spin_unlock_irq(&ice->reg_lock); 1957 return change; 1958 } 1959 1960 static const struct snd_kcontrol_new snd_ice1712_pro_rate_locking = { 1961 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1962 .name = "Multi Track Rate Locking", 1963 .info = snd_ice1712_pro_rate_locking_info, 1964 .get = snd_ice1712_pro_rate_locking_get, 1965 .put = snd_ice1712_pro_rate_locking_put 1966 }; 1967 1968 #define snd_ice1712_pro_rate_reset_info snd_ctl_boolean_mono_info 1969 1970 static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol, 1971 struct snd_ctl_elem_value *ucontrol) 1972 { 1973 ucontrol->value.integer.value[0] = PRO_RATE_RESET; 1974 return 0; 1975 } 1976 1977 static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol, 1978 struct snd_ctl_elem_value *ucontrol) 1979 { 1980 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1981 int change = 0, nval; 1982 1983 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1984 spin_lock_irq(&ice->reg_lock); 1985 change = PRO_RATE_RESET != nval; 1986 PRO_RATE_RESET = nval; 1987 spin_unlock_irq(&ice->reg_lock); 1988 return change; 1989 } 1990 1991 static const struct snd_kcontrol_new snd_ice1712_pro_rate_reset = { 1992 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1993 .name = "Multi Track Rate Reset", 1994 .info = snd_ice1712_pro_rate_reset_info, 1995 .get = snd_ice1712_pro_rate_reset_get, 1996 .put = snd_ice1712_pro_rate_reset_put 1997 }; 1998 1999 /* 2000 * routing 2001 */ 2002 static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol, 2003 struct snd_ctl_elem_info *uinfo) 2004 { 2005 static const char * const texts[] = { 2006 "PCM Out", /* 0 */ 2007 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */ 2008 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */ 2009 "IEC958 In L", "IEC958 In R", /* 9-10 */ 2010 "Digital Mixer", /* 11 - optional */ 2011 }; 2012 int num_items = snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11; 2013 return snd_ctl_enum_info(uinfo, 1, num_items, texts); 2014 } 2015 2016 static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol, 2017 struct snd_ctl_elem_value *ucontrol) 2018 { 2019 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2020 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2021 unsigned int val, cval; 2022 2023 spin_lock_irq(&ice->reg_lock); 2024 val = inw(ICEMT(ice, ROUTE_PSDOUT03)); 2025 cval = inl(ICEMT(ice, ROUTE_CAPTURE)); 2026 spin_unlock_irq(&ice->reg_lock); 2027 2028 val >>= ((idx % 2) * 8) + ((idx / 2) * 2); 2029 val &= 3; 2030 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4); 2031 if (val == 1 && idx < 2) 2032 ucontrol->value.enumerated.item[0] = 11; 2033 else if (val == 2) 2034 ucontrol->value.enumerated.item[0] = (cval & 7) + 1; 2035 else if (val == 3) 2036 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9; 2037 else 2038 ucontrol->value.enumerated.item[0] = 0; 2039 return 0; 2040 } 2041 2042 static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol, 2043 struct snd_ctl_elem_value *ucontrol) 2044 { 2045 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2046 int change, shift; 2047 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2048 unsigned int val, old_val, nval; 2049 2050 /* update PSDOUT */ 2051 if (ucontrol->value.enumerated.item[0] >= 11) 2052 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */ 2053 else if (ucontrol->value.enumerated.item[0] >= 9) 2054 nval = 3; /* spdif in */ 2055 else if (ucontrol->value.enumerated.item[0] >= 1) 2056 nval = 2; /* analog in */ 2057 else 2058 nval = 0; /* pcm */ 2059 shift = ((idx % 2) * 8) + ((idx / 2) * 2); 2060 spin_lock_irq(&ice->reg_lock); 2061 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03)); 2062 val &= ~(0x03 << shift); 2063 val |= nval << shift; 2064 change = val != old_val; 2065 if (change) 2066 outw(val, ICEMT(ice, ROUTE_PSDOUT03)); 2067 spin_unlock_irq(&ice->reg_lock); 2068 if (nval < 2) /* dig mixer of pcm */ 2069 return change; 2070 2071 /* update CAPTURE */ 2072 spin_lock_irq(&ice->reg_lock); 2073 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE)); 2074 shift = ((idx / 2) * 8) + ((idx % 2) * 4); 2075 if (nval == 2) { /* analog in */ 2076 nval = ucontrol->value.enumerated.item[0] - 1; 2077 val &= ~(0x07 << shift); 2078 val |= nval << shift; 2079 } else { /* spdif in */ 2080 nval = (ucontrol->value.enumerated.item[0] - 9) << 3; 2081 val &= ~(0x08 << shift); 2082 val |= nval << shift; 2083 } 2084 if (val != old_val) { 2085 change = 1; 2086 outl(val, ICEMT(ice, ROUTE_CAPTURE)); 2087 } 2088 spin_unlock_irq(&ice->reg_lock); 2089 return change; 2090 } 2091 2092 static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol, 2093 struct snd_ctl_elem_value *ucontrol) 2094 { 2095 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2096 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2097 unsigned int val, cval; 2098 val = inw(ICEMT(ice, ROUTE_SPDOUT)); 2099 cval = (val >> (idx * 4 + 8)) & 0x0f; 2100 val = (val >> (idx * 2)) & 0x03; 2101 if (val == 1) 2102 ucontrol->value.enumerated.item[0] = 11; 2103 else if (val == 2) 2104 ucontrol->value.enumerated.item[0] = (cval & 7) + 1; 2105 else if (val == 3) 2106 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9; 2107 else 2108 ucontrol->value.enumerated.item[0] = 0; 2109 return 0; 2110 } 2111 2112 static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol, 2113 struct snd_ctl_elem_value *ucontrol) 2114 { 2115 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2116 int change, shift; 2117 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2118 unsigned int val, old_val, nval; 2119 2120 /* update SPDOUT */ 2121 spin_lock_irq(&ice->reg_lock); 2122 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT)); 2123 if (ucontrol->value.enumerated.item[0] >= 11) 2124 nval = 1; 2125 else if (ucontrol->value.enumerated.item[0] >= 9) 2126 nval = 3; 2127 else if (ucontrol->value.enumerated.item[0] >= 1) 2128 nval = 2; 2129 else 2130 nval = 0; 2131 shift = idx * 2; 2132 val &= ~(0x03 << shift); 2133 val |= nval << shift; 2134 shift = idx * 4 + 8; 2135 if (nval == 2) { 2136 nval = ucontrol->value.enumerated.item[0] - 1; 2137 val &= ~(0x07 << shift); 2138 val |= nval << shift; 2139 } else if (nval == 3) { 2140 nval = (ucontrol->value.enumerated.item[0] - 9) << 3; 2141 val &= ~(0x08 << shift); 2142 val |= nval << shift; 2143 } 2144 change = val != old_val; 2145 if (change) 2146 outw(val, ICEMT(ice, ROUTE_SPDOUT)); 2147 spin_unlock_irq(&ice->reg_lock); 2148 return change; 2149 } 2150 2151 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route = { 2152 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2153 .name = "H/W Playback Route", 2154 .info = snd_ice1712_pro_route_info, 2155 .get = snd_ice1712_pro_route_analog_get, 2156 .put = snd_ice1712_pro_route_analog_put, 2157 }; 2158 2159 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route = { 2160 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2161 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route", 2162 .info = snd_ice1712_pro_route_info, 2163 .get = snd_ice1712_pro_route_spdif_get, 2164 .put = snd_ice1712_pro_route_spdif_put, 2165 .count = 2, 2166 }; 2167 2168 2169 static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol, 2170 struct snd_ctl_elem_info *uinfo) 2171 { 2172 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2173 uinfo->count = 1; 2174 uinfo->value.integer.min = 0; 2175 uinfo->value.integer.max = 255; 2176 return 0; 2177 } 2178 2179 static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol, 2180 struct snd_ctl_elem_value *ucontrol) 2181 { 2182 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2183 2184 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE)); 2185 return 0; 2186 } 2187 2188 static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol, 2189 struct snd_ctl_elem_value *ucontrol) 2190 { 2191 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2192 int change; 2193 2194 spin_lock_irq(&ice->reg_lock); 2195 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0]; 2196 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE)); 2197 spin_unlock_irq(&ice->reg_lock); 2198 return change; 2199 } 2200 2201 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate = { 2202 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2203 .name = "Multi Track Volume Rate", 2204 .info = snd_ice1712_pro_volume_rate_info, 2205 .get = snd_ice1712_pro_volume_rate_get, 2206 .put = snd_ice1712_pro_volume_rate_put 2207 }; 2208 2209 static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol, 2210 struct snd_ctl_elem_info *uinfo) 2211 { 2212 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2213 uinfo->count = 22; 2214 uinfo->value.integer.min = 0; 2215 uinfo->value.integer.max = 255; 2216 return 0; 2217 } 2218 2219 static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol, 2220 struct snd_ctl_elem_value *ucontrol) 2221 { 2222 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2223 int idx; 2224 2225 spin_lock_irq(&ice->reg_lock); 2226 for (idx = 0; idx < 22; idx++) { 2227 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX)); 2228 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA)); 2229 } 2230 spin_unlock_irq(&ice->reg_lock); 2231 return 0; 2232 } 2233 2234 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_peak = { 2235 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 2236 .name = "Multi Track Peak", 2237 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 2238 .info = snd_ice1712_pro_peak_info, 2239 .get = snd_ice1712_pro_peak_get 2240 }; 2241 2242 /* 2243 * 2244 */ 2245 2246 /* 2247 * list of available boards 2248 */ 2249 static struct snd_ice1712_card_info *card_tables[] = { 2250 snd_ice1712_hoontech_cards, 2251 snd_ice1712_delta_cards, 2252 snd_ice1712_ews_cards, 2253 NULL, 2254 }; 2255 2256 static unsigned char snd_ice1712_read_i2c(struct snd_ice1712 *ice, 2257 unsigned char dev, 2258 unsigned char addr) 2259 { 2260 long t = 0x10000; 2261 2262 outb(addr, ICEREG(ice, I2C_BYTE_ADDR)); 2263 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR)); 2264 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ; 2265 return inb(ICEREG(ice, I2C_DATA)); 2266 } 2267 2268 static int snd_ice1712_read_eeprom(struct snd_ice1712 *ice, 2269 const char *modelname) 2270 { 2271 int dev = ICE_I2C_EEPROM_ADDR; /* I2C EEPROM device address */ 2272 unsigned int i, size; 2273 struct snd_ice1712_card_info * const *tbl, *c; 2274 2275 if (!modelname || !*modelname) { 2276 ice->eeprom.subvendor = 0; 2277 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0) 2278 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) | 2279 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) | 2280 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) | 2281 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24); 2282 if (ice->eeprom.subvendor == 0 || 2283 ice->eeprom.subvendor == (unsigned int)-1) { 2284 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */ 2285 u16 vendor, device; 2286 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor); 2287 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device); 2288 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device); 2289 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) { 2290 dev_err(ice->card->dev, 2291 "No valid ID is found\n"); 2292 return -ENXIO; 2293 } 2294 } 2295 } 2296 for (tbl = card_tables; *tbl; tbl++) { 2297 for (c = *tbl; c->subvendor; c++) { 2298 if (modelname && c->model && !strcmp(modelname, c->model)) { 2299 dev_info(ice->card->dev, 2300 "Using board model %s\n", c->name); 2301 ice->eeprom.subvendor = c->subvendor; 2302 } else if (c->subvendor != ice->eeprom.subvendor) 2303 continue; 2304 if (!c->eeprom_size || !c->eeprom_data) 2305 goto found; 2306 /* if the EEPROM is given by the driver, use it */ 2307 dev_dbg(ice->card->dev, "using the defined eeprom..\n"); 2308 ice->eeprom.version = 1; 2309 ice->eeprom.size = c->eeprom_size + 6; 2310 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size); 2311 goto read_skipped; 2312 } 2313 } 2314 dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n", 2315 ice->eeprom.subvendor); 2316 2317 found: 2318 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04); 2319 if (ice->eeprom.size < 6) 2320 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */ 2321 else if (ice->eeprom.size > 32) { 2322 dev_err(ice->card->dev, 2323 "invalid EEPROM (size = %i)\n", ice->eeprom.size); 2324 return -EIO; 2325 } 2326 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05); 2327 if (ice->eeprom.version != 1) { 2328 dev_err(ice->card->dev, "invalid EEPROM version %i\n", 2329 ice->eeprom.version); 2330 /* return -EIO; */ 2331 } 2332 size = ice->eeprom.size - 6; 2333 for (i = 0; i < size; i++) 2334 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6); 2335 2336 read_skipped: 2337 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK]; 2338 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE]; 2339 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR]; 2340 2341 return 0; 2342 } 2343 2344 2345 2346 static int snd_ice1712_chip_init(struct snd_ice1712 *ice) 2347 { 2348 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL)); 2349 udelay(200); 2350 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL)); 2351 udelay(200); 2352 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE && 2353 !ice->dxr_enable) 2354 /* Set eeprom value to limit active ADCs and DACs to 6; 2355 * Also disable AC97 as no hardware in standard 6fire card/box 2356 * Note: DXR extensions are not currently supported 2357 */ 2358 ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a; 2359 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]); 2360 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]); 2361 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]); 2362 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]); 2363 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) { 2364 ice->gpio.write_mask = ice->eeprom.gpiomask; 2365 ice->gpio.direction = ice->eeprom.gpiodir; 2366 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 2367 ice->eeprom.gpiomask); 2368 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 2369 ice->eeprom.gpiodir); 2370 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, 2371 ice->eeprom.gpiostate); 2372 } else { 2373 ice->gpio.write_mask = 0xc0; 2374 ice->gpio.direction = 0xff; 2375 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0); 2376 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff); 2377 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, 2378 ICE1712_STDSP24_CLOCK_BIT); 2379 } 2380 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0); 2381 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) { 2382 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD)); 2383 udelay(100); 2384 outb(0, ICEREG(ice, AC97_CMD)); 2385 udelay(200); 2386 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0); 2387 } 2388 snd_ice1712_set_pro_rate(ice, 48000, 1); 2389 /* unmask used interrupts */ 2390 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ? 2391 ICE1712_IRQ_MPU2 : 0) | 2392 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ? 2393 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0), 2394 ICEREG(ice, IRQMASK)); 2395 outb(0x00, ICEMT(ice, IRQ)); 2396 2397 return 0; 2398 } 2399 2400 int snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice) 2401 { 2402 int err; 2403 struct snd_kcontrol *kctl; 2404 2405 if (snd_BUG_ON(!ice->pcm_pro)) 2406 return -EIO; 2407 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice)); 2408 if (err < 0) 2409 return err; 2410 kctl->id.device = ice->pcm_pro->device; 2411 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice)); 2412 if (err < 0) 2413 return err; 2414 kctl->id.device = ice->pcm_pro->device; 2415 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice)); 2416 if (err < 0) 2417 return err; 2418 kctl->id.device = ice->pcm_pro->device; 2419 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice)); 2420 if (err < 0) 2421 return err; 2422 kctl->id.device = ice->pcm_pro->device; 2423 ice->spdif.stream_ctl = kctl; 2424 return 0; 2425 } 2426 2427 2428 static int snd_ice1712_build_controls(struct snd_ice1712 *ice) 2429 { 2430 int err; 2431 2432 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice)); 2433 if (err < 0) 2434 return err; 2435 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice)); 2436 if (err < 0) 2437 return err; 2438 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice)); 2439 if (err < 0) 2440 return err; 2441 2442 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice)); 2443 if (err < 0) 2444 return err; 2445 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice)); 2446 if (err < 0) 2447 return err; 2448 2449 if (ice->num_total_dacs > 0) { 2450 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route; 2451 tmp.count = ice->num_total_dacs; 2452 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice)); 2453 if (err < 0) 2454 return err; 2455 } 2456 2457 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice)); 2458 if (err < 0) 2459 return err; 2460 2461 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice)); 2462 if (err < 0) 2463 return err; 2464 return snd_ctl_add(ice->card, 2465 snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice)); 2466 } 2467 2468 static int snd_ice1712_free(struct snd_ice1712 *ice) 2469 { 2470 if (!ice->port) 2471 goto __hw_end; 2472 /* mask all interrupts */ 2473 outb(ICE1712_MULTI_CAPTURE | ICE1712_MULTI_PLAYBACK, ICEMT(ice, IRQ)); 2474 outb(0xff, ICEREG(ice, IRQMASK)); 2475 /* --- */ 2476 __hw_end: 2477 if (ice->irq >= 0) 2478 free_irq(ice->irq, ice); 2479 2480 if (ice->port) 2481 pci_release_regions(ice->pci); 2482 snd_ice1712_akm4xxx_free(ice); 2483 pci_disable_device(ice->pci); 2484 kfree(ice->spec); 2485 kfree(ice); 2486 return 0; 2487 } 2488 2489 static int snd_ice1712_dev_free(struct snd_device *device) 2490 { 2491 struct snd_ice1712 *ice = device->device_data; 2492 return snd_ice1712_free(ice); 2493 } 2494 2495 static int snd_ice1712_create(struct snd_card *card, 2496 struct pci_dev *pci, 2497 const char *modelname, 2498 int omni, 2499 int cs8427_timeout, 2500 int dxr_enable, 2501 struct snd_ice1712 **r_ice1712) 2502 { 2503 struct snd_ice1712 *ice; 2504 int err; 2505 static struct snd_device_ops ops = { 2506 .dev_free = snd_ice1712_dev_free, 2507 }; 2508 2509 *r_ice1712 = NULL; 2510 2511 /* enable PCI device */ 2512 err = pci_enable_device(pci); 2513 if (err < 0) 2514 return err; 2515 /* check, if we can restrict PCI DMA transfers to 28 bits */ 2516 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(28)) < 0 || 2517 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(28)) < 0) { 2518 dev_err(card->dev, 2519 "architecture does not support 28bit PCI busmaster DMA\n"); 2520 pci_disable_device(pci); 2521 return -ENXIO; 2522 } 2523 2524 ice = kzalloc(sizeof(*ice), GFP_KERNEL); 2525 if (ice == NULL) { 2526 pci_disable_device(pci); 2527 return -ENOMEM; 2528 } 2529 ice->omni = omni ? 1 : 0; 2530 if (cs8427_timeout < 1) 2531 cs8427_timeout = 1; 2532 else if (cs8427_timeout > 1000) 2533 cs8427_timeout = 1000; 2534 ice->cs8427_timeout = cs8427_timeout; 2535 ice->dxr_enable = dxr_enable; 2536 spin_lock_init(&ice->reg_lock); 2537 mutex_init(&ice->gpio_mutex); 2538 mutex_init(&ice->i2c_mutex); 2539 mutex_init(&ice->open_mutex); 2540 ice->gpio.set_mask = snd_ice1712_set_gpio_mask; 2541 ice->gpio.get_mask = snd_ice1712_get_gpio_mask; 2542 ice->gpio.set_dir = snd_ice1712_set_gpio_dir; 2543 ice->gpio.get_dir = snd_ice1712_get_gpio_dir; 2544 ice->gpio.set_data = snd_ice1712_set_gpio_data; 2545 ice->gpio.get_data = snd_ice1712_get_gpio_data; 2546 2547 ice->spdif.cs8403_bits = 2548 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */ 2549 0x10 | /* no emphasis */ 2550 0x20); /* PCM encoder/decoder */ 2551 ice->card = card; 2552 ice->pci = pci; 2553 ice->irq = -1; 2554 pci_set_master(pci); 2555 /* disable legacy emulation */ 2556 pci_write_config_word(ice->pci, 0x40, 0x807f); 2557 pci_write_config_word(ice->pci, 0x42, 0x0006); 2558 snd_ice1712_proc_init(ice); 2559 synchronize_irq(pci->irq); 2560 2561 card->private_data = ice; 2562 2563 err = pci_request_regions(pci, "ICE1712"); 2564 if (err < 0) { 2565 kfree(ice); 2566 pci_disable_device(pci); 2567 return err; 2568 } 2569 ice->port = pci_resource_start(pci, 0); 2570 ice->ddma_port = pci_resource_start(pci, 1); 2571 ice->dmapath_port = pci_resource_start(pci, 2); 2572 ice->profi_port = pci_resource_start(pci, 3); 2573 2574 if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED, 2575 KBUILD_MODNAME, ice)) { 2576 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); 2577 snd_ice1712_free(ice); 2578 return -EIO; 2579 } 2580 2581 ice->irq = pci->irq; 2582 2583 if (snd_ice1712_read_eeprom(ice, modelname) < 0) { 2584 snd_ice1712_free(ice); 2585 return -EIO; 2586 } 2587 if (snd_ice1712_chip_init(ice) < 0) { 2588 snd_ice1712_free(ice); 2589 return -EIO; 2590 } 2591 2592 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops); 2593 if (err < 0) { 2594 snd_ice1712_free(ice); 2595 return err; 2596 } 2597 2598 *r_ice1712 = ice; 2599 return 0; 2600 } 2601 2602 2603 /* 2604 * 2605 * Registration 2606 * 2607 */ 2608 2609 static struct snd_ice1712_card_info no_matched; 2610 2611 static int snd_ice1712_probe(struct pci_dev *pci, 2612 const struct pci_device_id *pci_id) 2613 { 2614 static int dev; 2615 struct snd_card *card; 2616 struct snd_ice1712 *ice; 2617 int pcm_dev = 0, err; 2618 struct snd_ice1712_card_info * const *tbl, *c; 2619 2620 if (dev >= SNDRV_CARDS) 2621 return -ENODEV; 2622 if (!enable[dev]) { 2623 dev++; 2624 return -ENOENT; 2625 } 2626 2627 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 2628 0, &card); 2629 if (err < 0) 2630 return err; 2631 2632 strcpy(card->driver, "ICE1712"); 2633 strcpy(card->shortname, "ICEnsemble ICE1712"); 2634 2635 err = snd_ice1712_create(card, pci, model[dev], omni[dev], 2636 cs8427_timeout[dev], dxr_enable[dev], &ice); 2637 if (err < 0) { 2638 snd_card_free(card); 2639 return err; 2640 } 2641 2642 for (tbl = card_tables; *tbl; tbl++) { 2643 for (c = *tbl; c->subvendor; c++) { 2644 if (c->subvendor == ice->eeprom.subvendor) { 2645 ice->card_info = c; 2646 strcpy(card->shortname, c->name); 2647 if (c->driver) /* specific driver? */ 2648 strcpy(card->driver, c->driver); 2649 if (c->chip_init) { 2650 err = c->chip_init(ice); 2651 if (err < 0) { 2652 snd_card_free(card); 2653 return err; 2654 } 2655 } 2656 goto __found; 2657 } 2658 } 2659 } 2660 c = &no_matched; 2661 __found: 2662 2663 err = snd_ice1712_pcm_profi(ice, pcm_dev++); 2664 if (err < 0) { 2665 snd_card_free(card); 2666 return err; 2667 } 2668 2669 if (ice_has_con_ac97(ice)) { 2670 err = snd_ice1712_pcm(ice, pcm_dev++); 2671 if (err < 0) { 2672 snd_card_free(card); 2673 return err; 2674 } 2675 } 2676 2677 err = snd_ice1712_ac97_mixer(ice); 2678 if (err < 0) { 2679 snd_card_free(card); 2680 return err; 2681 } 2682 2683 err = snd_ice1712_build_controls(ice); 2684 if (err < 0) { 2685 snd_card_free(card); 2686 return err; 2687 } 2688 2689 if (c->build_controls) { 2690 err = c->build_controls(ice); 2691 if (err < 0) { 2692 snd_card_free(card); 2693 return err; 2694 } 2695 } 2696 2697 if (ice_has_con_ac97(ice)) { 2698 err = snd_ice1712_pcm_ds(ice, pcm_dev++); 2699 if (err < 0) { 2700 snd_card_free(card); 2701 return err; 2702 } 2703 } 2704 2705 if (!c->no_mpu401) { 2706 err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712, 2707 ICEREG(ice, MPU1_CTRL), 2708 c->mpu401_1_info_flags | 2709 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK, 2710 -1, &ice->rmidi[0]); 2711 if (err < 0) { 2712 snd_card_free(card); 2713 return err; 2714 } 2715 if (c->mpu401_1_name) 2716 /* Preferred name available in card_info */ 2717 snprintf(ice->rmidi[0]->name, 2718 sizeof(ice->rmidi[0]->name), 2719 "%s %d", c->mpu401_1_name, card->number); 2720 2721 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) { 2722 /* 2nd port used */ 2723 err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712, 2724 ICEREG(ice, MPU2_CTRL), 2725 c->mpu401_2_info_flags | 2726 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK, 2727 -1, &ice->rmidi[1]); 2728 2729 if (err < 0) { 2730 snd_card_free(card); 2731 return err; 2732 } 2733 if (c->mpu401_2_name) 2734 /* Preferred name available in card_info */ 2735 snprintf(ice->rmidi[1]->name, 2736 sizeof(ice->rmidi[1]->name), 2737 "%s %d", c->mpu401_2_name, 2738 card->number); 2739 } 2740 } 2741 2742 snd_ice1712_set_input_clock_source(ice, 0); 2743 2744 sprintf(card->longname, "%s at 0x%lx, irq %i", 2745 card->shortname, ice->port, ice->irq); 2746 2747 err = snd_card_register(card); 2748 if (err < 0) { 2749 snd_card_free(card); 2750 return err; 2751 } 2752 pci_set_drvdata(pci, card); 2753 dev++; 2754 return 0; 2755 } 2756 2757 static void snd_ice1712_remove(struct pci_dev *pci) 2758 { 2759 struct snd_card *card = pci_get_drvdata(pci); 2760 struct snd_ice1712 *ice = card->private_data; 2761 2762 if (ice->card_info && ice->card_info->chip_exit) 2763 ice->card_info->chip_exit(ice); 2764 snd_card_free(card); 2765 } 2766 2767 #ifdef CONFIG_PM_SLEEP 2768 static int snd_ice1712_suspend(struct device *dev) 2769 { 2770 struct snd_card *card = dev_get_drvdata(dev); 2771 struct snd_ice1712 *ice = card->private_data; 2772 2773 if (!ice->pm_suspend_enabled) 2774 return 0; 2775 2776 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2777 2778 snd_ac97_suspend(ice->ac97); 2779 2780 spin_lock_irq(&ice->reg_lock); 2781 ice->pm_saved_is_spdif_master = is_spdif_master(ice); 2782 ice->pm_saved_spdif_ctrl = inw(ICEMT(ice, ROUTE_SPDOUT)); 2783 ice->pm_saved_route = inw(ICEMT(ice, ROUTE_PSDOUT03)); 2784 spin_unlock_irq(&ice->reg_lock); 2785 2786 if (ice->pm_suspend) 2787 ice->pm_suspend(ice); 2788 return 0; 2789 } 2790 2791 static int snd_ice1712_resume(struct device *dev) 2792 { 2793 struct snd_card *card = dev_get_drvdata(dev); 2794 struct snd_ice1712 *ice = card->private_data; 2795 int rate; 2796 2797 if (!ice->pm_suspend_enabled) 2798 return 0; 2799 2800 if (ice->cur_rate) 2801 rate = ice->cur_rate; 2802 else 2803 rate = PRO_RATE_DEFAULT; 2804 2805 if (snd_ice1712_chip_init(ice) < 0) { 2806 snd_card_disconnect(card); 2807 return -EIO; 2808 } 2809 2810 ice->cur_rate = rate; 2811 2812 if (ice->pm_resume) 2813 ice->pm_resume(ice); 2814 2815 if (ice->pm_saved_is_spdif_master) { 2816 /* switching to external clock via SPDIF */ 2817 spin_lock_irq(&ice->reg_lock); 2818 outb(inb(ICEMT(ice, RATE)) | ICE1712_SPDIF_MASTER, 2819 ICEMT(ice, RATE)); 2820 spin_unlock_irq(&ice->reg_lock); 2821 snd_ice1712_set_input_clock_source(ice, 1); 2822 } else { 2823 /* internal on-card clock */ 2824 snd_ice1712_set_pro_rate(ice, rate, 1); 2825 snd_ice1712_set_input_clock_source(ice, 0); 2826 } 2827 2828 outw(ice->pm_saved_spdif_ctrl, ICEMT(ice, ROUTE_SPDOUT)); 2829 outw(ice->pm_saved_route, ICEMT(ice, ROUTE_PSDOUT03)); 2830 2831 snd_ac97_resume(ice->ac97); 2832 2833 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2834 return 0; 2835 } 2836 2837 static SIMPLE_DEV_PM_OPS(snd_ice1712_pm, snd_ice1712_suspend, snd_ice1712_resume); 2838 #define SND_VT1712_PM_OPS &snd_ice1712_pm 2839 #else 2840 #define SND_VT1712_PM_OPS NULL 2841 #endif /* CONFIG_PM_SLEEP */ 2842 2843 static struct pci_driver ice1712_driver = { 2844 .name = KBUILD_MODNAME, 2845 .id_table = snd_ice1712_ids, 2846 .probe = snd_ice1712_probe, 2847 .remove = snd_ice1712_remove, 2848 .driver = { 2849 .pm = SND_VT1712_PM_OPS, 2850 }, 2851 }; 2852 2853 module_pci_driver(ice1712_driver); 2854