1 /* 2 * 3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs 4 * 5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved. 6 * Copyright (c) 2006 ATI Technologies Inc. 7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved. 8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com> 9 * 10 * Authors: 11 * Wu Fengguang <wfg@linux.intel.com> 12 * 13 * Maintained by: 14 * Wu Fengguang <wfg@linux.intel.com> 15 * 16 * This program is free software; you can redistribute it and/or modify it 17 * under the terms of the GNU General Public License as published by the Free 18 * Software Foundation; either version 2 of the License, or (at your option) 19 * any later version. 20 * 21 * This program is distributed in the hope that it will be useful, but 22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 * for more details. 25 * 26 * You should have received a copy of the GNU General Public License 27 * along with this program; if not, write to the Free Software Foundation, 28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 29 */ 30 31 #include <linux/init.h> 32 #include <linux/delay.h> 33 #include <linux/slab.h> 34 #include <linux/module.h> 35 #include <sound/core.h> 36 #include <sound/jack.h> 37 #include "hda_codec.h" 38 #include "hda_local.h" 39 40 static bool static_hdmi_pcm; 41 module_param(static_hdmi_pcm, bool, 0644); 42 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info"); 43 44 /* 45 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device 46 * could support N independent pipes, each of them can be connected to one or 47 * more ports (DVI, HDMI or DisplayPort). 48 * 49 * The HDA correspondence of pipes/ports are converter/pin nodes. 50 */ 51 #define MAX_HDMI_CVTS 4 52 #define MAX_HDMI_PINS 4 53 54 struct hdmi_spec_per_cvt { 55 hda_nid_t cvt_nid; 56 int assigned; 57 unsigned int channels_min; 58 unsigned int channels_max; 59 u32 rates; 60 u64 formats; 61 unsigned int maxbps; 62 }; 63 64 struct hdmi_spec_per_pin { 65 hda_nid_t pin_nid; 66 int num_mux_nids; 67 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS]; 68 struct hdmi_eld sink_eld; 69 }; 70 71 struct hdmi_spec { 72 int num_cvts; 73 struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS]; 74 75 int num_pins; 76 struct hdmi_spec_per_pin pins[MAX_HDMI_PINS]; 77 struct hda_pcm pcm_rec[MAX_HDMI_PINS]; 78 79 /* 80 * Non-generic ATI/NVIDIA specific 81 */ 82 struct hda_multi_out multiout; 83 const struct hda_pcm_stream *pcm_playback; 84 }; 85 86 87 struct hdmi_audio_infoframe { 88 u8 type; /* 0x84 */ 89 u8 ver; /* 0x01 */ 90 u8 len; /* 0x0a */ 91 92 u8 checksum; 93 94 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */ 95 u8 SS01_SF24; 96 u8 CXT04; 97 u8 CA; 98 u8 LFEPBL01_LSV36_DM_INH7; 99 }; 100 101 struct dp_audio_infoframe { 102 u8 type; /* 0x84 */ 103 u8 len; /* 0x1b */ 104 u8 ver; /* 0x11 << 2 */ 105 106 u8 CC02_CT47; /* match with HDMI infoframe from this on */ 107 u8 SS01_SF24; 108 u8 CXT04; 109 u8 CA; 110 u8 LFEPBL01_LSV36_DM_INH7; 111 }; 112 113 union audio_infoframe { 114 struct hdmi_audio_infoframe hdmi; 115 struct dp_audio_infoframe dp; 116 u8 bytes[0]; 117 }; 118 119 /* 120 * CEA speaker placement: 121 * 122 * FLH FCH FRH 123 * FLW FL FLC FC FRC FR FRW 124 * 125 * LFE 126 * TC 127 * 128 * RL RLC RC RRC RR 129 * 130 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to 131 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC. 132 */ 133 enum cea_speaker_placement { 134 FL = (1 << 0), /* Front Left */ 135 FC = (1 << 1), /* Front Center */ 136 FR = (1 << 2), /* Front Right */ 137 FLC = (1 << 3), /* Front Left Center */ 138 FRC = (1 << 4), /* Front Right Center */ 139 RL = (1 << 5), /* Rear Left */ 140 RC = (1 << 6), /* Rear Center */ 141 RR = (1 << 7), /* Rear Right */ 142 RLC = (1 << 8), /* Rear Left Center */ 143 RRC = (1 << 9), /* Rear Right Center */ 144 LFE = (1 << 10), /* Low Frequency Effect */ 145 FLW = (1 << 11), /* Front Left Wide */ 146 FRW = (1 << 12), /* Front Right Wide */ 147 FLH = (1 << 13), /* Front Left High */ 148 FCH = (1 << 14), /* Front Center High */ 149 FRH = (1 << 15), /* Front Right High */ 150 TC = (1 << 16), /* Top Center */ 151 }; 152 153 /* 154 * ELD SA bits in the CEA Speaker Allocation data block 155 */ 156 static int eld_speaker_allocation_bits[] = { 157 [0] = FL | FR, 158 [1] = LFE, 159 [2] = FC, 160 [3] = RL | RR, 161 [4] = RC, 162 [5] = FLC | FRC, 163 [6] = RLC | RRC, 164 /* the following are not defined in ELD yet */ 165 [7] = FLW | FRW, 166 [8] = FLH | FRH, 167 [9] = TC, 168 [10] = FCH, 169 }; 170 171 struct cea_channel_speaker_allocation { 172 int ca_index; 173 int speakers[8]; 174 175 /* derived values, just for convenience */ 176 int channels; 177 int spk_mask; 178 }; 179 180 /* 181 * ALSA sequence is: 182 * 183 * surround40 surround41 surround50 surround51 surround71 184 * ch0 front left = = = = 185 * ch1 front right = = = = 186 * ch2 rear left = = = = 187 * ch3 rear right = = = = 188 * ch4 LFE center center center 189 * ch5 LFE LFE 190 * ch6 side left 191 * ch7 side right 192 * 193 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR} 194 */ 195 static int hdmi_channel_mapping[0x32][8] = { 196 /* stereo */ 197 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 }, 198 /* 2.1 */ 199 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 }, 200 /* Dolby Surround */ 201 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 }, 202 /* surround40 */ 203 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 }, 204 /* 4ch */ 205 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 }, 206 /* surround41 */ 207 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 }, 208 /* surround50 */ 209 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 }, 210 /* surround51 */ 211 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 }, 212 /* 7.1 */ 213 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 }, 214 }; 215 216 /* 217 * This is an ordered list! 218 * 219 * The preceding ones have better chances to be selected by 220 * hdmi_channel_allocation(). 221 */ 222 static struct cea_channel_speaker_allocation channel_allocations[] = { 223 /* channel: 7 6 5 4 3 2 1 0 */ 224 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } }, 225 /* 2.1 */ 226 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } }, 227 /* Dolby Surround */ 228 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } }, 229 /* surround40 */ 230 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } }, 231 /* surround41 */ 232 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } }, 233 /* surround50 */ 234 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } }, 235 /* surround51 */ 236 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } }, 237 /* 6.1 */ 238 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } }, 239 /* surround71 */ 240 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } }, 241 242 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } }, 243 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } }, 244 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } }, 245 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } }, 246 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } }, 247 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } }, 248 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } }, 249 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } }, 250 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } }, 251 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } }, 252 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } }, 253 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } }, 254 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } }, 255 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } }, 256 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } }, 257 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } }, 258 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } }, 259 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } }, 260 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } }, 261 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } }, 262 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } }, 263 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } }, 264 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } }, 265 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } }, 266 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } }, 267 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } }, 268 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } }, 269 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } }, 270 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } }, 271 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } }, 272 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } }, 273 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } }, 274 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } }, 275 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } }, 276 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } }, 277 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } }, 278 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } }, 279 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } }, 280 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } }, 281 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } }, 282 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } }, 283 }; 284 285 286 /* 287 * HDMI routines 288 */ 289 290 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid) 291 { 292 int pin_idx; 293 294 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) 295 if (spec->pins[pin_idx].pin_nid == pin_nid) 296 return pin_idx; 297 298 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid); 299 return -EINVAL; 300 } 301 302 static int hinfo_to_pin_index(struct hdmi_spec *spec, 303 struct hda_pcm_stream *hinfo) 304 { 305 int pin_idx; 306 307 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) 308 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo) 309 return pin_idx; 310 311 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo); 312 return -EINVAL; 313 } 314 315 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid) 316 { 317 int cvt_idx; 318 319 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) 320 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid) 321 return cvt_idx; 322 323 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid); 324 return -EINVAL; 325 } 326 327 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol, 328 struct snd_ctl_elem_info *uinfo) 329 { 330 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 331 struct hdmi_spec *spec; 332 int pin_idx; 333 334 spec = codec->spec; 335 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 336 337 pin_idx = kcontrol->private_value; 338 uinfo->count = spec->pins[pin_idx].sink_eld.eld_size; 339 340 return 0; 341 } 342 343 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol, 344 struct snd_ctl_elem_value *ucontrol) 345 { 346 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 347 struct hdmi_spec *spec; 348 int pin_idx; 349 350 spec = codec->spec; 351 pin_idx = kcontrol->private_value; 352 353 memcpy(ucontrol->value.bytes.data, 354 spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE); 355 356 return 0; 357 } 358 359 static struct snd_kcontrol_new eld_bytes_ctl = { 360 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 361 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 362 .name = "ELD", 363 .info = hdmi_eld_ctl_info, 364 .get = hdmi_eld_ctl_get, 365 }; 366 367 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx, 368 int device) 369 { 370 struct snd_kcontrol *kctl; 371 struct hdmi_spec *spec = codec->spec; 372 int err; 373 374 kctl = snd_ctl_new1(&eld_bytes_ctl, codec); 375 if (!kctl) 376 return -ENOMEM; 377 kctl->private_value = pin_idx; 378 kctl->id.device = device; 379 380 err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl); 381 if (err < 0) 382 return err; 383 384 return 0; 385 } 386 387 #ifdef BE_PARANOID 388 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid, 389 int *packet_index, int *byte_index) 390 { 391 int val; 392 393 val = snd_hda_codec_read(codec, pin_nid, 0, 394 AC_VERB_GET_HDMI_DIP_INDEX, 0); 395 396 *packet_index = val >> 5; 397 *byte_index = val & 0x1f; 398 } 399 #endif 400 401 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid, 402 int packet_index, int byte_index) 403 { 404 int val; 405 406 val = (packet_index << 5) | (byte_index & 0x1f); 407 408 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val); 409 } 410 411 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid, 412 unsigned char val) 413 { 414 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val); 415 } 416 417 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid) 418 { 419 /* Unmute */ 420 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP) 421 snd_hda_codec_write(codec, pin_nid, 0, 422 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE); 423 /* Disable pin out until stream is active*/ 424 snd_hda_codec_write(codec, pin_nid, 0, 425 AC_VERB_SET_PIN_WIDGET_CONTROL, 0); 426 } 427 428 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid) 429 { 430 return 1 + snd_hda_codec_read(codec, cvt_nid, 0, 431 AC_VERB_GET_CVT_CHAN_COUNT, 0); 432 } 433 434 static void hdmi_set_channel_count(struct hda_codec *codec, 435 hda_nid_t cvt_nid, int chs) 436 { 437 if (chs != hdmi_get_channel_count(codec, cvt_nid)) 438 snd_hda_codec_write(codec, cvt_nid, 0, 439 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1); 440 } 441 442 443 /* 444 * Channel mapping routines 445 */ 446 447 /* 448 * Compute derived values in channel_allocations[]. 449 */ 450 static void init_channel_allocations(void) 451 { 452 int i, j; 453 struct cea_channel_speaker_allocation *p; 454 455 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { 456 p = channel_allocations + i; 457 p->channels = 0; 458 p->spk_mask = 0; 459 for (j = 0; j < ARRAY_SIZE(p->speakers); j++) 460 if (p->speakers[j]) { 461 p->channels++; 462 p->spk_mask |= p->speakers[j]; 463 } 464 } 465 } 466 467 /* 468 * The transformation takes two steps: 469 * 470 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask 471 * spk_mask => (channel_allocations[]) => ai->CA 472 * 473 * TODO: it could select the wrong CA from multiple candidates. 474 */ 475 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels) 476 { 477 int i; 478 int ca = 0; 479 int spk_mask = 0; 480 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE]; 481 482 /* 483 * CA defaults to 0 for basic stereo audio 484 */ 485 if (channels <= 2) 486 return 0; 487 488 /* 489 * expand ELD's speaker allocation mask 490 * 491 * ELD tells the speaker mask in a compact(paired) form, 492 * expand ELD's notions to match the ones used by Audio InfoFrame. 493 */ 494 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) { 495 if (eld->spk_alloc & (1 << i)) 496 spk_mask |= eld_speaker_allocation_bits[i]; 497 } 498 499 /* search for the first working match in the CA table */ 500 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { 501 if (channels == channel_allocations[i].channels && 502 (spk_mask & channel_allocations[i].spk_mask) == 503 channel_allocations[i].spk_mask) { 504 ca = channel_allocations[i].ca_index; 505 break; 506 } 507 } 508 509 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf)); 510 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n", 511 ca, channels, buf); 512 513 return ca; 514 } 515 516 static void hdmi_debug_channel_mapping(struct hda_codec *codec, 517 hda_nid_t pin_nid) 518 { 519 #ifdef CONFIG_SND_DEBUG_VERBOSE 520 int i; 521 int slot; 522 523 for (i = 0; i < 8; i++) { 524 slot = snd_hda_codec_read(codec, pin_nid, 0, 525 AC_VERB_GET_HDMI_CHAN_SLOT, i); 526 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n", 527 slot >> 4, slot & 0xf); 528 } 529 #endif 530 } 531 532 533 static void hdmi_setup_channel_mapping(struct hda_codec *codec, 534 hda_nid_t pin_nid, 535 int ca) 536 { 537 int i; 538 int err; 539 540 if (hdmi_channel_mapping[ca][1] == 0) { 541 for (i = 0; i < channel_allocations[ca].channels; i++) 542 hdmi_channel_mapping[ca][i] = i | (i << 4); 543 for (; i < 8; i++) 544 hdmi_channel_mapping[ca][i] = 0xf | (i << 4); 545 } 546 547 for (i = 0; i < 8; i++) { 548 err = snd_hda_codec_write(codec, pin_nid, 0, 549 AC_VERB_SET_HDMI_CHAN_SLOT, 550 hdmi_channel_mapping[ca][i]); 551 if (err) { 552 snd_printdd(KERN_NOTICE 553 "HDMI: channel mapping failed\n"); 554 break; 555 } 556 } 557 558 hdmi_debug_channel_mapping(codec, pin_nid); 559 } 560 561 562 /* 563 * Audio InfoFrame routines 564 */ 565 566 /* 567 * Enable Audio InfoFrame Transmission 568 */ 569 static void hdmi_start_infoframe_trans(struct hda_codec *codec, 570 hda_nid_t pin_nid) 571 { 572 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 573 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT, 574 AC_DIPXMIT_BEST); 575 } 576 577 /* 578 * Disable Audio InfoFrame Transmission 579 */ 580 static void hdmi_stop_infoframe_trans(struct hda_codec *codec, 581 hda_nid_t pin_nid) 582 { 583 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 584 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT, 585 AC_DIPXMIT_DISABLE); 586 } 587 588 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid) 589 { 590 #ifdef CONFIG_SND_DEBUG_VERBOSE 591 int i; 592 int size; 593 594 size = snd_hdmi_get_eld_size(codec, pin_nid); 595 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size); 596 597 for (i = 0; i < 8; i++) { 598 size = snd_hda_codec_read(codec, pin_nid, 0, 599 AC_VERB_GET_HDMI_DIP_SIZE, i); 600 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size); 601 } 602 #endif 603 } 604 605 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid) 606 { 607 #ifdef BE_PARANOID 608 int i, j; 609 int size; 610 int pi, bi; 611 for (i = 0; i < 8; i++) { 612 size = snd_hda_codec_read(codec, pin_nid, 0, 613 AC_VERB_GET_HDMI_DIP_SIZE, i); 614 if (size == 0) 615 continue; 616 617 hdmi_set_dip_index(codec, pin_nid, i, 0x0); 618 for (j = 1; j < 1000; j++) { 619 hdmi_write_dip_byte(codec, pin_nid, 0x0); 620 hdmi_get_dip_index(codec, pin_nid, &pi, &bi); 621 if (pi != i) 622 snd_printd(KERN_INFO "dip index %d: %d != %d\n", 623 bi, pi, i); 624 if (bi == 0) /* byte index wrapped around */ 625 break; 626 } 627 snd_printd(KERN_INFO 628 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n", 629 i, size, j); 630 } 631 #endif 632 } 633 634 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai) 635 { 636 u8 *bytes = (u8 *)hdmi_ai; 637 u8 sum = 0; 638 int i; 639 640 hdmi_ai->checksum = 0; 641 642 for (i = 0; i < sizeof(*hdmi_ai); i++) 643 sum += bytes[i]; 644 645 hdmi_ai->checksum = -sum; 646 } 647 648 static void hdmi_fill_audio_infoframe(struct hda_codec *codec, 649 hda_nid_t pin_nid, 650 u8 *dip, int size) 651 { 652 int i; 653 654 hdmi_debug_dip_size(codec, pin_nid); 655 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */ 656 657 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 658 for (i = 0; i < size; i++) 659 hdmi_write_dip_byte(codec, pin_nid, dip[i]); 660 } 661 662 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid, 663 u8 *dip, int size) 664 { 665 u8 val; 666 int i; 667 668 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0) 669 != AC_DIPXMIT_BEST) 670 return false; 671 672 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 673 for (i = 0; i < size; i++) { 674 val = snd_hda_codec_read(codec, pin_nid, 0, 675 AC_VERB_GET_HDMI_DIP_DATA, 0); 676 if (val != dip[i]) 677 return false; 678 } 679 680 return true; 681 } 682 683 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx, 684 struct snd_pcm_substream *substream) 685 { 686 struct hdmi_spec *spec = codec->spec; 687 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 688 hda_nid_t pin_nid = per_pin->pin_nid; 689 int channels = substream->runtime->channels; 690 struct hdmi_eld *eld; 691 int ca; 692 union audio_infoframe ai; 693 694 eld = &spec->pins[pin_idx].sink_eld; 695 if (!eld->monitor_present) 696 return; 697 698 ca = hdmi_channel_allocation(eld, channels); 699 700 memset(&ai, 0, sizeof(ai)); 701 if (eld->conn_type == 0) { /* HDMI */ 702 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi; 703 704 hdmi_ai->type = 0x84; 705 hdmi_ai->ver = 0x01; 706 hdmi_ai->len = 0x0a; 707 hdmi_ai->CC02_CT47 = channels - 1; 708 hdmi_ai->CA = ca; 709 hdmi_checksum_audio_infoframe(hdmi_ai); 710 } else if (eld->conn_type == 1) { /* DisplayPort */ 711 struct dp_audio_infoframe *dp_ai = &ai.dp; 712 713 dp_ai->type = 0x84; 714 dp_ai->len = 0x1b; 715 dp_ai->ver = 0x11 << 2; 716 dp_ai->CC02_CT47 = channels - 1; 717 dp_ai->CA = ca; 718 } else { 719 snd_printd("HDMI: unknown connection type at pin %d\n", 720 pin_nid); 721 return; 722 } 723 724 /* 725 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or 726 * sizeof(*dp_ai) to avoid partial match/update problems when 727 * the user switches between HDMI/DP monitors. 728 */ 729 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes, 730 sizeof(ai))) { 731 snd_printdd("hdmi_setup_audio_infoframe: " 732 "pin=%d channels=%d\n", 733 pin_nid, 734 channels); 735 hdmi_setup_channel_mapping(codec, pin_nid, ca); 736 hdmi_stop_infoframe_trans(codec, pin_nid); 737 hdmi_fill_audio_infoframe(codec, pin_nid, 738 ai.bytes, sizeof(ai)); 739 hdmi_start_infoframe_trans(codec, pin_nid); 740 } 741 } 742 743 744 /* 745 * Unsolicited events 746 */ 747 748 static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid, 749 struct hdmi_eld *eld); 750 751 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res) 752 { 753 struct hdmi_spec *spec = codec->spec; 754 int pin_nid = res >> AC_UNSOL_RES_TAG_SHIFT; 755 int pd = !!(res & AC_UNSOL_RES_PD); 756 int eldv = !!(res & AC_UNSOL_RES_ELDV); 757 int pin_idx; 758 struct hdmi_eld *eld; 759 760 printk(KERN_INFO 761 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n", 762 codec->addr, pin_nid, pd, eldv); 763 764 pin_idx = pin_nid_to_pin_index(spec, pin_nid); 765 if (pin_idx < 0) 766 return; 767 eld = &spec->pins[pin_idx].sink_eld; 768 769 hdmi_present_sense(codec, pin_nid, eld); 770 771 /* 772 * HDMI sink's ELD info cannot always be retrieved for now, e.g. 773 * in console or for audio devices. Assume the highest speakers 774 * configuration, to _not_ prohibit multi-channel audio playback. 775 */ 776 if (!eld->spk_alloc) 777 eld->spk_alloc = 0xffff; 778 } 779 780 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res) 781 { 782 int tag = res >> AC_UNSOL_RES_TAG_SHIFT; 783 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT; 784 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE); 785 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY); 786 787 printk(KERN_INFO 788 "HDMI CP event: CODEC=%d PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n", 789 codec->addr, 790 tag, 791 subtag, 792 cp_state, 793 cp_ready); 794 795 /* TODO */ 796 if (cp_state) 797 ; 798 if (cp_ready) 799 ; 800 } 801 802 803 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res) 804 { 805 struct hdmi_spec *spec = codec->spec; 806 int tag = res >> AC_UNSOL_RES_TAG_SHIFT; 807 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT; 808 809 if (pin_nid_to_pin_index(spec, tag) < 0) { 810 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag); 811 return; 812 } 813 814 if (subtag == 0) 815 hdmi_intrinsic_event(codec, res); 816 else 817 hdmi_non_intrinsic_event(codec, res); 818 } 819 820 /* 821 * Callbacks 822 */ 823 824 /* HBR should be Non-PCM, 8 channels */ 825 #define is_hbr_format(format) \ 826 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7) 827 828 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid, 829 hda_nid_t pin_nid, u32 stream_tag, int format) 830 { 831 int pinctl; 832 int new_pinctl = 0; 833 834 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) { 835 pinctl = snd_hda_codec_read(codec, pin_nid, 0, 836 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 837 838 new_pinctl = pinctl & ~AC_PINCTL_EPT; 839 if (is_hbr_format(format)) 840 new_pinctl |= AC_PINCTL_EPT_HBR; 841 else 842 new_pinctl |= AC_PINCTL_EPT_NATIVE; 843 844 snd_printdd("hdmi_setup_stream: " 845 "NID=0x%x, %spinctl=0x%x\n", 846 pin_nid, 847 pinctl == new_pinctl ? "" : "new-", 848 new_pinctl); 849 850 if (pinctl != new_pinctl) 851 snd_hda_codec_write(codec, pin_nid, 0, 852 AC_VERB_SET_PIN_WIDGET_CONTROL, 853 new_pinctl); 854 855 } 856 if (is_hbr_format(format) && !new_pinctl) { 857 snd_printdd("hdmi_setup_stream: HBR is not supported\n"); 858 return -EINVAL; 859 } 860 861 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format); 862 return 0; 863 } 864 865 /* 866 * HDA PCM callbacks 867 */ 868 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo, 869 struct hda_codec *codec, 870 struct snd_pcm_substream *substream) 871 { 872 struct hdmi_spec *spec = codec->spec; 873 struct snd_pcm_runtime *runtime = substream->runtime; 874 int pin_idx, cvt_idx, mux_idx = 0; 875 struct hdmi_spec_per_pin *per_pin; 876 struct hdmi_eld *eld; 877 struct hdmi_spec_per_cvt *per_cvt = NULL; 878 int pinctl; 879 880 /* Validate hinfo */ 881 pin_idx = hinfo_to_pin_index(spec, hinfo); 882 if (snd_BUG_ON(pin_idx < 0)) 883 return -EINVAL; 884 per_pin = &spec->pins[pin_idx]; 885 eld = &per_pin->sink_eld; 886 887 /* Dynamically assign converter to stream */ 888 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) { 889 per_cvt = &spec->cvts[cvt_idx]; 890 891 /* Must not already be assigned */ 892 if (per_cvt->assigned) 893 continue; 894 /* Must be in pin's mux's list of converters */ 895 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++) 896 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid) 897 break; 898 /* Not in mux list */ 899 if (mux_idx == per_pin->num_mux_nids) 900 continue; 901 break; 902 } 903 /* No free converters */ 904 if (cvt_idx == spec->num_cvts) 905 return -ENODEV; 906 907 /* Claim converter */ 908 per_cvt->assigned = 1; 909 hinfo->nid = per_cvt->cvt_nid; 910 911 snd_hda_codec_write(codec, per_pin->pin_nid, 0, 912 AC_VERB_SET_CONNECT_SEL, 913 mux_idx); 914 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0, 915 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 916 snd_hda_codec_write(codec, per_pin->pin_nid, 0, 917 AC_VERB_SET_PIN_WIDGET_CONTROL, 918 pinctl | PIN_OUT); 919 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid); 920 921 /* Initially set the converter's capabilities */ 922 hinfo->channels_min = per_cvt->channels_min; 923 hinfo->channels_max = per_cvt->channels_max; 924 hinfo->rates = per_cvt->rates; 925 hinfo->formats = per_cvt->formats; 926 hinfo->maxbps = per_cvt->maxbps; 927 928 /* Restrict capabilities by ELD if this isn't disabled */ 929 if (!static_hdmi_pcm && eld->eld_valid) { 930 snd_hdmi_eld_update_pcm_info(eld, hinfo); 931 if (hinfo->channels_min > hinfo->channels_max || 932 !hinfo->rates || !hinfo->formats) 933 return -ENODEV; 934 } 935 936 /* Store the updated parameters */ 937 runtime->hw.channels_min = hinfo->channels_min; 938 runtime->hw.channels_max = hinfo->channels_max; 939 runtime->hw.formats = hinfo->formats; 940 runtime->hw.rates = hinfo->rates; 941 942 snd_pcm_hw_constraint_step(substream->runtime, 0, 943 SNDRV_PCM_HW_PARAM_CHANNELS, 2); 944 return 0; 945 } 946 947 /* 948 * HDA/HDMI auto parsing 949 */ 950 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx) 951 { 952 struct hdmi_spec *spec = codec->spec; 953 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 954 hda_nid_t pin_nid = per_pin->pin_nid; 955 956 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) { 957 snd_printk(KERN_WARNING 958 "HDMI: pin %d wcaps %#x " 959 "does not support connection list\n", 960 pin_nid, get_wcaps(codec, pin_nid)); 961 return -EINVAL; 962 } 963 964 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid, 965 per_pin->mux_nids, 966 HDA_MAX_CONNECTIONS); 967 968 return 0; 969 } 970 971 static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid, 972 struct hdmi_eld *eld) 973 { 974 /* 975 * Always execute a GetPinSense verb here, even when called from 976 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited 977 * response's PD bit is not the real PD value, but indicates that 978 * the real PD value changed. An older version of the HD-audio 979 * specification worked this way. Hence, we just ignore the data in 980 * the unsolicited response to avoid custom WARs. 981 */ 982 int present = snd_hda_pin_sense(codec, pin_nid); 983 984 memset(eld, 0, sizeof(*eld)); 985 986 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE); 987 if (eld->monitor_present) 988 eld->eld_valid = !!(present & AC_PINSENSE_ELDV); 989 else 990 eld->eld_valid = 0; 991 992 printk(KERN_INFO 993 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n", 994 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid); 995 996 if (eld->eld_valid) 997 if (!snd_hdmi_get_eld(eld, codec, pin_nid)) 998 snd_hdmi_show_eld(eld); 999 1000 snd_hda_input_jack_report(codec, pin_nid); 1001 } 1002 1003 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid) 1004 { 1005 struct hdmi_spec *spec = codec->spec; 1006 unsigned int caps, config; 1007 int pin_idx; 1008 struct hdmi_spec_per_pin *per_pin; 1009 int err; 1010 1011 caps = snd_hda_param_read(codec, pin_nid, AC_PAR_PIN_CAP); 1012 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP))) 1013 return 0; 1014 1015 config = snd_hda_codec_read(codec, pin_nid, 0, 1016 AC_VERB_GET_CONFIG_DEFAULT, 0); 1017 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE) 1018 return 0; 1019 1020 if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS)) 1021 return -E2BIG; 1022 1023 pin_idx = spec->num_pins; 1024 per_pin = &spec->pins[pin_idx]; 1025 1026 per_pin->pin_nid = pin_nid; 1027 1028 err = hdmi_read_pin_conn(codec, pin_idx); 1029 if (err < 0) 1030 return err; 1031 1032 spec->num_pins++; 1033 1034 return 0; 1035 } 1036 1037 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid) 1038 { 1039 struct hdmi_spec *spec = codec->spec; 1040 int cvt_idx; 1041 struct hdmi_spec_per_cvt *per_cvt; 1042 unsigned int chans; 1043 int err; 1044 1045 if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS)) 1046 return -E2BIG; 1047 1048 chans = get_wcaps(codec, cvt_nid); 1049 chans = get_wcaps_channels(chans); 1050 1051 cvt_idx = spec->num_cvts; 1052 per_cvt = &spec->cvts[cvt_idx]; 1053 1054 per_cvt->cvt_nid = cvt_nid; 1055 per_cvt->channels_min = 2; 1056 if (chans <= 16) 1057 per_cvt->channels_max = chans; 1058 1059 err = snd_hda_query_supported_pcm(codec, cvt_nid, 1060 &per_cvt->rates, 1061 &per_cvt->formats, 1062 &per_cvt->maxbps); 1063 if (err < 0) 1064 return err; 1065 1066 spec->num_cvts++; 1067 1068 return 0; 1069 } 1070 1071 static int hdmi_parse_codec(struct hda_codec *codec) 1072 { 1073 hda_nid_t nid; 1074 int i, nodes; 1075 1076 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid); 1077 if (!nid || nodes < 0) { 1078 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n"); 1079 return -EINVAL; 1080 } 1081 1082 for (i = 0; i < nodes; i++, nid++) { 1083 unsigned int caps; 1084 unsigned int type; 1085 1086 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP); 1087 type = get_wcaps_type(caps); 1088 1089 if (!(caps & AC_WCAP_DIGITAL)) 1090 continue; 1091 1092 switch (type) { 1093 case AC_WID_AUD_OUT: 1094 hdmi_add_cvt(codec, nid); 1095 break; 1096 case AC_WID_PIN: 1097 hdmi_add_pin(codec, nid); 1098 break; 1099 } 1100 } 1101 1102 /* 1103 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event 1104 * can be lost and presence sense verb will become inaccurate if the 1105 * HDA link is powered off at hot plug or hw initialization time. 1106 */ 1107 #ifdef CONFIG_SND_HDA_POWER_SAVE 1108 if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) & 1109 AC_PWRST_EPSS)) 1110 codec->bus->power_keep_link_on = 1; 1111 #endif 1112 1113 return 0; 1114 } 1115 1116 /* 1117 */ 1118 static char *generic_hdmi_pcm_names[MAX_HDMI_PINS] = { 1119 "HDMI 0", 1120 "HDMI 1", 1121 "HDMI 2", 1122 "HDMI 3", 1123 }; 1124 1125 /* 1126 * HDMI callbacks 1127 */ 1128 1129 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo, 1130 struct hda_codec *codec, 1131 unsigned int stream_tag, 1132 unsigned int format, 1133 struct snd_pcm_substream *substream) 1134 { 1135 hda_nid_t cvt_nid = hinfo->nid; 1136 struct hdmi_spec *spec = codec->spec; 1137 int pin_idx = hinfo_to_pin_index(spec, hinfo); 1138 hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid; 1139 1140 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels); 1141 1142 hdmi_setup_audio_infoframe(codec, pin_idx, substream); 1143 1144 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format); 1145 } 1146 1147 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo, 1148 struct hda_codec *codec, 1149 struct snd_pcm_substream *substream) 1150 { 1151 struct hdmi_spec *spec = codec->spec; 1152 int cvt_idx, pin_idx; 1153 struct hdmi_spec_per_cvt *per_cvt; 1154 struct hdmi_spec_per_pin *per_pin; 1155 int pinctl; 1156 1157 snd_hda_codec_cleanup_stream(codec, hinfo->nid); 1158 1159 if (hinfo->nid) { 1160 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid); 1161 if (snd_BUG_ON(cvt_idx < 0)) 1162 return -EINVAL; 1163 per_cvt = &spec->cvts[cvt_idx]; 1164 1165 snd_BUG_ON(!per_cvt->assigned); 1166 per_cvt->assigned = 0; 1167 hinfo->nid = 0; 1168 1169 pin_idx = hinfo_to_pin_index(spec, hinfo); 1170 if (snd_BUG_ON(pin_idx < 0)) 1171 return -EINVAL; 1172 per_pin = &spec->pins[pin_idx]; 1173 1174 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0, 1175 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 1176 snd_hda_codec_write(codec, per_pin->pin_nid, 0, 1177 AC_VERB_SET_PIN_WIDGET_CONTROL, 1178 pinctl & ~PIN_OUT); 1179 snd_hda_spdif_ctls_unassign(codec, pin_idx); 1180 } 1181 1182 return 0; 1183 } 1184 1185 static const struct hda_pcm_ops generic_ops = { 1186 .open = hdmi_pcm_open, 1187 .prepare = generic_hdmi_playback_pcm_prepare, 1188 .cleanup = generic_hdmi_playback_pcm_cleanup, 1189 }; 1190 1191 static int generic_hdmi_build_pcms(struct hda_codec *codec) 1192 { 1193 struct hdmi_spec *spec = codec->spec; 1194 int pin_idx; 1195 1196 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1197 struct hda_pcm *info; 1198 struct hda_pcm_stream *pstr; 1199 1200 info = &spec->pcm_rec[pin_idx]; 1201 info->name = generic_hdmi_pcm_names[pin_idx]; 1202 info->pcm_type = HDA_PCM_TYPE_HDMI; 1203 1204 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK]; 1205 pstr->substreams = 1; 1206 pstr->ops = generic_ops; 1207 /* other pstr fields are set in open */ 1208 } 1209 1210 codec->num_pcms = spec->num_pins; 1211 codec->pcm_info = spec->pcm_rec; 1212 1213 return 0; 1214 } 1215 1216 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx) 1217 { 1218 int err; 1219 char hdmi_str[32]; 1220 struct hdmi_spec *spec = codec->spec; 1221 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1222 int pcmdev = spec->pcm_rec[pin_idx].device; 1223 1224 snprintf(hdmi_str, sizeof(hdmi_str), "HDMI/DP,pcm=%d", pcmdev); 1225 1226 err = snd_hda_input_jack_add(codec, per_pin->pin_nid, 1227 SND_JACK_VIDEOOUT, pcmdev > 0 ? hdmi_str : NULL); 1228 if (err < 0) 1229 return err; 1230 1231 hdmi_present_sense(codec, per_pin->pin_nid, &per_pin->sink_eld); 1232 return 0; 1233 } 1234 1235 static int generic_hdmi_build_controls(struct hda_codec *codec) 1236 { 1237 struct hdmi_spec *spec = codec->spec; 1238 int err; 1239 int pin_idx; 1240 1241 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1242 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1243 1244 err = generic_hdmi_build_jack(codec, pin_idx); 1245 if (err < 0) 1246 return err; 1247 1248 err = snd_hda_create_spdif_out_ctls(codec, 1249 per_pin->pin_nid, 1250 per_pin->mux_nids[0]); 1251 if (err < 0) 1252 return err; 1253 snd_hda_spdif_ctls_unassign(codec, pin_idx); 1254 1255 /* add control for ELD Bytes */ 1256 err = hdmi_create_eld_ctl(codec, 1257 pin_idx, 1258 spec->pcm_rec[pin_idx].device); 1259 1260 if (err < 0) 1261 return err; 1262 } 1263 1264 return 0; 1265 } 1266 1267 static int generic_hdmi_init(struct hda_codec *codec) 1268 { 1269 struct hdmi_spec *spec = codec->spec; 1270 int pin_idx; 1271 1272 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1273 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1274 hda_nid_t pin_nid = per_pin->pin_nid; 1275 struct hdmi_eld *eld = &per_pin->sink_eld; 1276 1277 hdmi_init_pin(codec, pin_nid); 1278 snd_hda_codec_write(codec, pin_nid, 0, 1279 AC_VERB_SET_UNSOLICITED_ENABLE, 1280 AC_USRSP_EN | pin_nid); 1281 1282 snd_hda_eld_proc_new(codec, eld, pin_idx); 1283 } 1284 return 0; 1285 } 1286 1287 static void generic_hdmi_free(struct hda_codec *codec) 1288 { 1289 struct hdmi_spec *spec = codec->spec; 1290 int pin_idx; 1291 1292 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1293 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1294 struct hdmi_eld *eld = &per_pin->sink_eld; 1295 1296 snd_hda_eld_proc_free(codec, eld); 1297 } 1298 snd_hda_input_jack_free(codec); 1299 1300 kfree(spec); 1301 } 1302 1303 static const struct hda_codec_ops generic_hdmi_patch_ops = { 1304 .init = generic_hdmi_init, 1305 .free = generic_hdmi_free, 1306 .build_pcms = generic_hdmi_build_pcms, 1307 .build_controls = generic_hdmi_build_controls, 1308 .unsol_event = hdmi_unsol_event, 1309 }; 1310 1311 static int patch_generic_hdmi(struct hda_codec *codec) 1312 { 1313 struct hdmi_spec *spec; 1314 1315 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 1316 if (spec == NULL) 1317 return -ENOMEM; 1318 1319 codec->spec = spec; 1320 if (hdmi_parse_codec(codec) < 0) { 1321 codec->spec = NULL; 1322 kfree(spec); 1323 return -EINVAL; 1324 } 1325 codec->patch_ops = generic_hdmi_patch_ops; 1326 1327 init_channel_allocations(); 1328 1329 return 0; 1330 } 1331 1332 /* 1333 * Shared non-generic implementations 1334 */ 1335 1336 static int simple_playback_build_pcms(struct hda_codec *codec) 1337 { 1338 struct hdmi_spec *spec = codec->spec; 1339 struct hda_pcm *info = spec->pcm_rec; 1340 int i; 1341 1342 codec->num_pcms = spec->num_cvts; 1343 codec->pcm_info = info; 1344 1345 for (i = 0; i < codec->num_pcms; i++, info++) { 1346 unsigned int chans; 1347 struct hda_pcm_stream *pstr; 1348 1349 chans = get_wcaps(codec, spec->cvts[i].cvt_nid); 1350 chans = get_wcaps_channels(chans); 1351 1352 info->name = generic_hdmi_pcm_names[i]; 1353 info->pcm_type = HDA_PCM_TYPE_HDMI; 1354 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK]; 1355 snd_BUG_ON(!spec->pcm_playback); 1356 *pstr = *spec->pcm_playback; 1357 pstr->nid = spec->cvts[i].cvt_nid; 1358 if (pstr->channels_max <= 2 && chans && chans <= 16) 1359 pstr->channels_max = chans; 1360 } 1361 1362 return 0; 1363 } 1364 1365 static int simple_playback_build_controls(struct hda_codec *codec) 1366 { 1367 struct hdmi_spec *spec = codec->spec; 1368 int err; 1369 int i; 1370 1371 for (i = 0; i < codec->num_pcms; i++) { 1372 err = snd_hda_create_spdif_out_ctls(codec, 1373 spec->cvts[i].cvt_nid, 1374 spec->cvts[i].cvt_nid); 1375 if (err < 0) 1376 return err; 1377 } 1378 1379 return 0; 1380 } 1381 1382 static void simple_playback_free(struct hda_codec *codec) 1383 { 1384 struct hdmi_spec *spec = codec->spec; 1385 1386 kfree(spec); 1387 } 1388 1389 /* 1390 * Nvidia specific implementations 1391 */ 1392 1393 #define Nv_VERB_SET_Channel_Allocation 0xF79 1394 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A 1395 #define Nv_VERB_SET_Audio_Protection_On 0xF98 1396 #define Nv_VERB_SET_Audio_Protection_Off 0xF99 1397 1398 #define nvhdmi_master_con_nid_7x 0x04 1399 #define nvhdmi_master_pin_nid_7x 0x05 1400 1401 static const hda_nid_t nvhdmi_con_nids_7x[4] = { 1402 /*front, rear, clfe, rear_surr */ 1403 0x6, 0x8, 0xa, 0xc, 1404 }; 1405 1406 static const struct hda_verb nvhdmi_basic_init_7x[] = { 1407 /* set audio protect on */ 1408 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1}, 1409 /* enable digital output on pin widget */ 1410 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1411 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1412 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1413 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1414 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1415 {} /* terminator */ 1416 }; 1417 1418 #ifdef LIMITED_RATE_FMT_SUPPORT 1419 /* support only the safe format and rate */ 1420 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000 1421 #define SUPPORTED_MAXBPS 16 1422 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE 1423 #else 1424 /* support all rates and formats */ 1425 #define SUPPORTED_RATES \ 1426 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\ 1427 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\ 1428 SNDRV_PCM_RATE_192000) 1429 #define SUPPORTED_MAXBPS 24 1430 #define SUPPORTED_FORMATS \ 1431 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE) 1432 #endif 1433 1434 static int nvhdmi_7x_init(struct hda_codec *codec) 1435 { 1436 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x); 1437 return 0; 1438 } 1439 1440 static unsigned int channels_2_6_8[] = { 1441 2, 6, 8 1442 }; 1443 1444 static unsigned int channels_2_8[] = { 1445 2, 8 1446 }; 1447 1448 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = { 1449 .count = ARRAY_SIZE(channels_2_6_8), 1450 .list = channels_2_6_8, 1451 .mask = 0, 1452 }; 1453 1454 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = { 1455 .count = ARRAY_SIZE(channels_2_8), 1456 .list = channels_2_8, 1457 .mask = 0, 1458 }; 1459 1460 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo, 1461 struct hda_codec *codec, 1462 struct snd_pcm_substream *substream) 1463 { 1464 struct hdmi_spec *spec = codec->spec; 1465 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL; 1466 1467 switch (codec->preset->id) { 1468 case 0x10de0002: 1469 case 0x10de0003: 1470 case 0x10de0005: 1471 case 0x10de0006: 1472 hw_constraints_channels = &hw_constraints_2_8_channels; 1473 break; 1474 case 0x10de0007: 1475 hw_constraints_channels = &hw_constraints_2_6_8_channels; 1476 break; 1477 default: 1478 break; 1479 } 1480 1481 if (hw_constraints_channels != NULL) { 1482 snd_pcm_hw_constraint_list(substream->runtime, 0, 1483 SNDRV_PCM_HW_PARAM_CHANNELS, 1484 hw_constraints_channels); 1485 } else { 1486 snd_pcm_hw_constraint_step(substream->runtime, 0, 1487 SNDRV_PCM_HW_PARAM_CHANNELS, 2); 1488 } 1489 1490 return snd_hda_multi_out_dig_open(codec, &spec->multiout); 1491 } 1492 1493 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo, 1494 struct hda_codec *codec, 1495 struct snd_pcm_substream *substream) 1496 { 1497 struct hdmi_spec *spec = codec->spec; 1498 return snd_hda_multi_out_dig_close(codec, &spec->multiout); 1499 } 1500 1501 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo, 1502 struct hda_codec *codec, 1503 unsigned int stream_tag, 1504 unsigned int format, 1505 struct snd_pcm_substream *substream) 1506 { 1507 struct hdmi_spec *spec = codec->spec; 1508 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, 1509 stream_tag, format, substream); 1510 } 1511 1512 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec, 1513 int channels) 1514 { 1515 unsigned int chanmask; 1516 int chan = channels ? (channels - 1) : 1; 1517 1518 switch (channels) { 1519 default: 1520 case 0: 1521 case 2: 1522 chanmask = 0x00; 1523 break; 1524 case 4: 1525 chanmask = 0x08; 1526 break; 1527 case 6: 1528 chanmask = 0x0b; 1529 break; 1530 case 8: 1531 chanmask = 0x13; 1532 break; 1533 } 1534 1535 /* Set the audio infoframe channel allocation and checksum fields. The 1536 * channel count is computed implicitly by the hardware. */ 1537 snd_hda_codec_write(codec, 0x1, 0, 1538 Nv_VERB_SET_Channel_Allocation, chanmask); 1539 1540 snd_hda_codec_write(codec, 0x1, 0, 1541 Nv_VERB_SET_Info_Frame_Checksum, 1542 (0x71 - chan - chanmask)); 1543 } 1544 1545 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo, 1546 struct hda_codec *codec, 1547 struct snd_pcm_substream *substream) 1548 { 1549 struct hdmi_spec *spec = codec->spec; 1550 int i; 1551 1552 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 1553 0, AC_VERB_SET_CHANNEL_STREAMID, 0); 1554 for (i = 0; i < 4; i++) { 1555 /* set the stream id */ 1556 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0, 1557 AC_VERB_SET_CHANNEL_STREAMID, 0); 1558 /* set the stream format */ 1559 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0, 1560 AC_VERB_SET_STREAM_FORMAT, 0); 1561 } 1562 1563 /* The audio hardware sends a channel count of 0x7 (8ch) when all the 1564 * streams are disabled. */ 1565 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8); 1566 1567 return snd_hda_multi_out_dig_close(codec, &spec->multiout); 1568 } 1569 1570 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo, 1571 struct hda_codec *codec, 1572 unsigned int stream_tag, 1573 unsigned int format, 1574 struct snd_pcm_substream *substream) 1575 { 1576 int chs; 1577 unsigned int dataDCC2, channel_id; 1578 int i; 1579 struct hdmi_spec *spec = codec->spec; 1580 struct hda_spdif_out *spdif = 1581 snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid); 1582 1583 mutex_lock(&codec->spdif_mutex); 1584 1585 chs = substream->runtime->channels; 1586 1587 dataDCC2 = 0x2; 1588 1589 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */ 1590 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) 1591 snd_hda_codec_write(codec, 1592 nvhdmi_master_con_nid_7x, 1593 0, 1594 AC_VERB_SET_DIGI_CONVERT_1, 1595 spdif->ctls & ~AC_DIG1_ENABLE & 0xff); 1596 1597 /* set the stream id */ 1598 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0, 1599 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0); 1600 1601 /* set the stream format */ 1602 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0, 1603 AC_VERB_SET_STREAM_FORMAT, format); 1604 1605 /* turn on again (if needed) */ 1606 /* enable and set the channel status audio/data flag */ 1607 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) { 1608 snd_hda_codec_write(codec, 1609 nvhdmi_master_con_nid_7x, 1610 0, 1611 AC_VERB_SET_DIGI_CONVERT_1, 1612 spdif->ctls & 0xff); 1613 snd_hda_codec_write(codec, 1614 nvhdmi_master_con_nid_7x, 1615 0, 1616 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2); 1617 } 1618 1619 for (i = 0; i < 4; i++) { 1620 if (chs == 2) 1621 channel_id = 0; 1622 else 1623 channel_id = i * 2; 1624 1625 /* turn off SPDIF once; 1626 *otherwise the IEC958 bits won't be updated 1627 */ 1628 if (codec->spdif_status_reset && 1629 (spdif->ctls & AC_DIG1_ENABLE)) 1630 snd_hda_codec_write(codec, 1631 nvhdmi_con_nids_7x[i], 1632 0, 1633 AC_VERB_SET_DIGI_CONVERT_1, 1634 spdif->ctls & ~AC_DIG1_ENABLE & 0xff); 1635 /* set the stream id */ 1636 snd_hda_codec_write(codec, 1637 nvhdmi_con_nids_7x[i], 1638 0, 1639 AC_VERB_SET_CHANNEL_STREAMID, 1640 (stream_tag << 4) | channel_id); 1641 /* set the stream format */ 1642 snd_hda_codec_write(codec, 1643 nvhdmi_con_nids_7x[i], 1644 0, 1645 AC_VERB_SET_STREAM_FORMAT, 1646 format); 1647 /* turn on again (if needed) */ 1648 /* enable and set the channel status audio/data flag */ 1649 if (codec->spdif_status_reset && 1650 (spdif->ctls & AC_DIG1_ENABLE)) { 1651 snd_hda_codec_write(codec, 1652 nvhdmi_con_nids_7x[i], 1653 0, 1654 AC_VERB_SET_DIGI_CONVERT_1, 1655 spdif->ctls & 0xff); 1656 snd_hda_codec_write(codec, 1657 nvhdmi_con_nids_7x[i], 1658 0, 1659 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2); 1660 } 1661 } 1662 1663 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs); 1664 1665 mutex_unlock(&codec->spdif_mutex); 1666 return 0; 1667 } 1668 1669 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = { 1670 .substreams = 1, 1671 .channels_min = 2, 1672 .channels_max = 8, 1673 .nid = nvhdmi_master_con_nid_7x, 1674 .rates = SUPPORTED_RATES, 1675 .maxbps = SUPPORTED_MAXBPS, 1676 .formats = SUPPORTED_FORMATS, 1677 .ops = { 1678 .open = simple_playback_pcm_open, 1679 .close = nvhdmi_8ch_7x_pcm_close, 1680 .prepare = nvhdmi_8ch_7x_pcm_prepare 1681 }, 1682 }; 1683 1684 static const struct hda_pcm_stream nvhdmi_pcm_playback_2ch = { 1685 .substreams = 1, 1686 .channels_min = 2, 1687 .channels_max = 2, 1688 .nid = nvhdmi_master_con_nid_7x, 1689 .rates = SUPPORTED_RATES, 1690 .maxbps = SUPPORTED_MAXBPS, 1691 .formats = SUPPORTED_FORMATS, 1692 .ops = { 1693 .open = simple_playback_pcm_open, 1694 .close = simple_playback_pcm_close, 1695 .prepare = simple_playback_pcm_prepare 1696 }, 1697 }; 1698 1699 static const struct hda_codec_ops nvhdmi_patch_ops_8ch_7x = { 1700 .build_controls = simple_playback_build_controls, 1701 .build_pcms = simple_playback_build_pcms, 1702 .init = nvhdmi_7x_init, 1703 .free = simple_playback_free, 1704 }; 1705 1706 static const struct hda_codec_ops nvhdmi_patch_ops_2ch = { 1707 .build_controls = simple_playback_build_controls, 1708 .build_pcms = simple_playback_build_pcms, 1709 .init = nvhdmi_7x_init, 1710 .free = simple_playback_free, 1711 }; 1712 1713 static int patch_nvhdmi_2ch(struct hda_codec *codec) 1714 { 1715 struct hdmi_spec *spec; 1716 1717 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 1718 if (spec == NULL) 1719 return -ENOMEM; 1720 1721 codec->spec = spec; 1722 1723 spec->multiout.num_dacs = 0; /* no analog */ 1724 spec->multiout.max_channels = 2; 1725 spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x; 1726 spec->num_cvts = 1; 1727 spec->cvts[0].cvt_nid = nvhdmi_master_con_nid_7x; 1728 spec->pcm_playback = &nvhdmi_pcm_playback_2ch; 1729 1730 codec->patch_ops = nvhdmi_patch_ops_2ch; 1731 1732 return 0; 1733 } 1734 1735 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec) 1736 { 1737 struct hdmi_spec *spec; 1738 int err = patch_nvhdmi_2ch(codec); 1739 1740 if (err < 0) 1741 return err; 1742 spec = codec->spec; 1743 spec->multiout.max_channels = 8; 1744 spec->pcm_playback = &nvhdmi_pcm_playback_8ch_7x; 1745 codec->patch_ops = nvhdmi_patch_ops_8ch_7x; 1746 1747 /* Initialize the audio infoframe channel mask and checksum to something 1748 * valid */ 1749 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8); 1750 1751 return 0; 1752 } 1753 1754 /* 1755 * ATI-specific implementations 1756 * 1757 * FIXME: we may omit the whole this and use the generic code once after 1758 * it's confirmed to work. 1759 */ 1760 1761 #define ATIHDMI_CVT_NID 0x02 /* audio converter */ 1762 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */ 1763 1764 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo, 1765 struct hda_codec *codec, 1766 unsigned int stream_tag, 1767 unsigned int format, 1768 struct snd_pcm_substream *substream) 1769 { 1770 struct hdmi_spec *spec = codec->spec; 1771 int chans = substream->runtime->channels; 1772 int i, err; 1773 1774 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format, 1775 substream); 1776 if (err < 0) 1777 return err; 1778 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0, 1779 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1); 1780 /* FIXME: XXX */ 1781 for (i = 0; i < chans; i++) { 1782 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0, 1783 AC_VERB_SET_HDMI_CHAN_SLOT, 1784 (i << 4) | i); 1785 } 1786 return 0; 1787 } 1788 1789 static const struct hda_pcm_stream atihdmi_pcm_digital_playback = { 1790 .substreams = 1, 1791 .channels_min = 2, 1792 .channels_max = 2, 1793 .nid = ATIHDMI_CVT_NID, 1794 .ops = { 1795 .open = simple_playback_pcm_open, 1796 .close = simple_playback_pcm_close, 1797 .prepare = atihdmi_playback_pcm_prepare 1798 }, 1799 }; 1800 1801 static const struct hda_verb atihdmi_basic_init[] = { 1802 /* enable digital output on pin widget */ 1803 { 0x03, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, 1804 {} /* terminator */ 1805 }; 1806 1807 static int atihdmi_init(struct hda_codec *codec) 1808 { 1809 struct hdmi_spec *spec = codec->spec; 1810 1811 snd_hda_sequence_write(codec, atihdmi_basic_init); 1812 /* SI codec requires to unmute the pin */ 1813 if (get_wcaps(codec, spec->pins[0].pin_nid) & AC_WCAP_OUT_AMP) 1814 snd_hda_codec_write(codec, spec->pins[0].pin_nid, 0, 1815 AC_VERB_SET_AMP_GAIN_MUTE, 1816 AMP_OUT_UNMUTE); 1817 return 0; 1818 } 1819 1820 static const struct hda_codec_ops atihdmi_patch_ops = { 1821 .build_controls = simple_playback_build_controls, 1822 .build_pcms = simple_playback_build_pcms, 1823 .init = atihdmi_init, 1824 .free = simple_playback_free, 1825 }; 1826 1827 1828 static int patch_atihdmi(struct hda_codec *codec) 1829 { 1830 struct hdmi_spec *spec; 1831 1832 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 1833 if (spec == NULL) 1834 return -ENOMEM; 1835 1836 codec->spec = spec; 1837 1838 spec->multiout.num_dacs = 0; /* no analog */ 1839 spec->multiout.max_channels = 2; 1840 spec->multiout.dig_out_nid = ATIHDMI_CVT_NID; 1841 spec->num_cvts = 1; 1842 spec->cvts[0].cvt_nid = ATIHDMI_CVT_NID; 1843 spec->pins[0].pin_nid = ATIHDMI_PIN_NID; 1844 spec->pcm_playback = &atihdmi_pcm_digital_playback; 1845 1846 codec->patch_ops = atihdmi_patch_ops; 1847 1848 return 0; 1849 } 1850 1851 1852 /* 1853 * patch entries 1854 */ 1855 static const struct hda_codec_preset snd_hda_preset_hdmi[] = { 1856 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi }, 1857 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi }, 1858 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi }, 1859 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi }, 1860 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi }, 1861 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi }, 1862 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi }, 1863 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 1864 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 1865 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 1866 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 1867 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x }, 1868 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi }, 1869 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi }, 1870 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi }, 1871 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi }, 1872 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi }, 1873 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi }, 1874 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi }, 1875 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi }, 1876 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi }, 1877 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi }, 1878 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi }, 1879 /* 17 is known to be absent */ 1880 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi }, 1881 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi }, 1882 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi }, 1883 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi }, 1884 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi }, 1885 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi }, 1886 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi }, 1887 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi }, 1888 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi }, 1889 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi }, 1890 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch }, 1891 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch }, 1892 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi }, 1893 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi }, 1894 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi }, 1895 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi }, 1896 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi }, 1897 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi }, 1898 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi }, 1899 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi }, 1900 {} /* terminator */ 1901 }; 1902 1903 MODULE_ALIAS("snd-hda-codec-id:1002793c"); 1904 MODULE_ALIAS("snd-hda-codec-id:10027919"); 1905 MODULE_ALIAS("snd-hda-codec-id:1002791a"); 1906 MODULE_ALIAS("snd-hda-codec-id:1002aa01"); 1907 MODULE_ALIAS("snd-hda-codec-id:10951390"); 1908 MODULE_ALIAS("snd-hda-codec-id:10951392"); 1909 MODULE_ALIAS("snd-hda-codec-id:10de0002"); 1910 MODULE_ALIAS("snd-hda-codec-id:10de0003"); 1911 MODULE_ALIAS("snd-hda-codec-id:10de0005"); 1912 MODULE_ALIAS("snd-hda-codec-id:10de0006"); 1913 MODULE_ALIAS("snd-hda-codec-id:10de0007"); 1914 MODULE_ALIAS("snd-hda-codec-id:10de000a"); 1915 MODULE_ALIAS("snd-hda-codec-id:10de000b"); 1916 MODULE_ALIAS("snd-hda-codec-id:10de000c"); 1917 MODULE_ALIAS("snd-hda-codec-id:10de000d"); 1918 MODULE_ALIAS("snd-hda-codec-id:10de0010"); 1919 MODULE_ALIAS("snd-hda-codec-id:10de0011"); 1920 MODULE_ALIAS("snd-hda-codec-id:10de0012"); 1921 MODULE_ALIAS("snd-hda-codec-id:10de0013"); 1922 MODULE_ALIAS("snd-hda-codec-id:10de0014"); 1923 MODULE_ALIAS("snd-hda-codec-id:10de0015"); 1924 MODULE_ALIAS("snd-hda-codec-id:10de0016"); 1925 MODULE_ALIAS("snd-hda-codec-id:10de0018"); 1926 MODULE_ALIAS("snd-hda-codec-id:10de0019"); 1927 MODULE_ALIAS("snd-hda-codec-id:10de001a"); 1928 MODULE_ALIAS("snd-hda-codec-id:10de001b"); 1929 MODULE_ALIAS("snd-hda-codec-id:10de001c"); 1930 MODULE_ALIAS("snd-hda-codec-id:10de0040"); 1931 MODULE_ALIAS("snd-hda-codec-id:10de0041"); 1932 MODULE_ALIAS("snd-hda-codec-id:10de0042"); 1933 MODULE_ALIAS("snd-hda-codec-id:10de0043"); 1934 MODULE_ALIAS("snd-hda-codec-id:10de0044"); 1935 MODULE_ALIAS("snd-hda-codec-id:10de0067"); 1936 MODULE_ALIAS("snd-hda-codec-id:10de8001"); 1937 MODULE_ALIAS("snd-hda-codec-id:17e80047"); 1938 MODULE_ALIAS("snd-hda-codec-id:80860054"); 1939 MODULE_ALIAS("snd-hda-codec-id:80862801"); 1940 MODULE_ALIAS("snd-hda-codec-id:80862802"); 1941 MODULE_ALIAS("snd-hda-codec-id:80862803"); 1942 MODULE_ALIAS("snd-hda-codec-id:80862804"); 1943 MODULE_ALIAS("snd-hda-codec-id:80862805"); 1944 MODULE_ALIAS("snd-hda-codec-id:80862806"); 1945 MODULE_ALIAS("snd-hda-codec-id:808629fb"); 1946 1947 MODULE_LICENSE("GPL"); 1948 MODULE_DESCRIPTION("HDMI HD-audio codec"); 1949 MODULE_ALIAS("snd-hda-codec-intelhdmi"); 1950 MODULE_ALIAS("snd-hda-codec-nvhdmi"); 1951 MODULE_ALIAS("snd-hda-codec-atihdmi"); 1952 1953 static struct hda_codec_preset_list intel_list = { 1954 .preset = snd_hda_preset_hdmi, 1955 .owner = THIS_MODULE, 1956 }; 1957 1958 static int __init patch_hdmi_init(void) 1959 { 1960 return snd_hda_add_codec_preset(&intel_list); 1961 } 1962 1963 static void __exit patch_hdmi_exit(void) 1964 { 1965 snd_hda_delete_codec_preset(&intel_list); 1966 } 1967 1968 module_init(patch_hdmi_init) 1969 module_exit(patch_hdmi_exit) 1970