1 /* 2 * 3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs 4 * 5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved. 6 * Copyright (c) 2006 ATI Technologies Inc. 7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved. 8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com> 9 * 10 * Authors: 11 * Wu Fengguang <wfg@linux.intel.com> 12 * 13 * Maintained by: 14 * Wu Fengguang <wfg@linux.intel.com> 15 * 16 * This program is free software; you can redistribute it and/or modify it 17 * under the terms of the GNU General Public License as published by the Free 18 * Software Foundation; either version 2 of the License, or (at your option) 19 * any later version. 20 * 21 * This program is distributed in the hope that it will be useful, but 22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 * for more details. 25 * 26 * You should have received a copy of the GNU General Public License 27 * along with this program; if not, write to the Free Software Foundation, 28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 29 */ 30 31 #include <linux/init.h> 32 #include <linux/delay.h> 33 #include <linux/slab.h> 34 #include <linux/module.h> 35 #include <sound/core.h> 36 #include <sound/jack.h> 37 #include "hda_codec.h" 38 #include "hda_local.h" 39 #include "hda_jack.h" 40 41 static bool static_hdmi_pcm; 42 module_param(static_hdmi_pcm, bool, 0644); 43 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info"); 44 45 /* 46 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device 47 * could support N independent pipes, each of them can be connected to one or 48 * more ports (DVI, HDMI or DisplayPort). 49 * 50 * The HDA correspondence of pipes/ports are converter/pin nodes. 51 */ 52 #define MAX_HDMI_CVTS 8 53 #define MAX_HDMI_PINS 8 54 55 struct hdmi_spec_per_cvt { 56 hda_nid_t cvt_nid; 57 int assigned; 58 unsigned int channels_min; 59 unsigned int channels_max; 60 u32 rates; 61 u64 formats; 62 unsigned int maxbps; 63 }; 64 65 struct hdmi_spec_per_pin { 66 hda_nid_t pin_nid; 67 int num_mux_nids; 68 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS]; 69 70 struct hda_codec *codec; 71 struct hdmi_eld sink_eld; 72 struct delayed_work work; 73 int repoll_count; 74 }; 75 76 struct hdmi_spec { 77 int num_cvts; 78 struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS]; 79 80 int num_pins; 81 struct hdmi_spec_per_pin pins[MAX_HDMI_PINS]; 82 struct hda_pcm pcm_rec[MAX_HDMI_PINS]; 83 84 /* 85 * Non-generic ATI/NVIDIA specific 86 */ 87 struct hda_multi_out multiout; 88 struct hda_pcm_stream pcm_playback; 89 }; 90 91 92 struct hdmi_audio_infoframe { 93 u8 type; /* 0x84 */ 94 u8 ver; /* 0x01 */ 95 u8 len; /* 0x0a */ 96 97 u8 checksum; 98 99 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */ 100 u8 SS01_SF24; 101 u8 CXT04; 102 u8 CA; 103 u8 LFEPBL01_LSV36_DM_INH7; 104 }; 105 106 struct dp_audio_infoframe { 107 u8 type; /* 0x84 */ 108 u8 len; /* 0x1b */ 109 u8 ver; /* 0x11 << 2 */ 110 111 u8 CC02_CT47; /* match with HDMI infoframe from this on */ 112 u8 SS01_SF24; 113 u8 CXT04; 114 u8 CA; 115 u8 LFEPBL01_LSV36_DM_INH7; 116 }; 117 118 union audio_infoframe { 119 struct hdmi_audio_infoframe hdmi; 120 struct dp_audio_infoframe dp; 121 u8 bytes[0]; 122 }; 123 124 /* 125 * CEA speaker placement: 126 * 127 * FLH FCH FRH 128 * FLW FL FLC FC FRC FR FRW 129 * 130 * LFE 131 * TC 132 * 133 * RL RLC RC RRC RR 134 * 135 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to 136 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC. 137 */ 138 enum cea_speaker_placement { 139 FL = (1 << 0), /* Front Left */ 140 FC = (1 << 1), /* Front Center */ 141 FR = (1 << 2), /* Front Right */ 142 FLC = (1 << 3), /* Front Left Center */ 143 FRC = (1 << 4), /* Front Right Center */ 144 RL = (1 << 5), /* Rear Left */ 145 RC = (1 << 6), /* Rear Center */ 146 RR = (1 << 7), /* Rear Right */ 147 RLC = (1 << 8), /* Rear Left Center */ 148 RRC = (1 << 9), /* Rear Right Center */ 149 LFE = (1 << 10), /* Low Frequency Effect */ 150 FLW = (1 << 11), /* Front Left Wide */ 151 FRW = (1 << 12), /* Front Right Wide */ 152 FLH = (1 << 13), /* Front Left High */ 153 FCH = (1 << 14), /* Front Center High */ 154 FRH = (1 << 15), /* Front Right High */ 155 TC = (1 << 16), /* Top Center */ 156 }; 157 158 /* 159 * ELD SA bits in the CEA Speaker Allocation data block 160 */ 161 static int eld_speaker_allocation_bits[] = { 162 [0] = FL | FR, 163 [1] = LFE, 164 [2] = FC, 165 [3] = RL | RR, 166 [4] = RC, 167 [5] = FLC | FRC, 168 [6] = RLC | RRC, 169 /* the following are not defined in ELD yet */ 170 [7] = FLW | FRW, 171 [8] = FLH | FRH, 172 [9] = TC, 173 [10] = FCH, 174 }; 175 176 struct cea_channel_speaker_allocation { 177 int ca_index; 178 int speakers[8]; 179 180 /* derived values, just for convenience */ 181 int channels; 182 int spk_mask; 183 }; 184 185 /* 186 * ALSA sequence is: 187 * 188 * surround40 surround41 surround50 surround51 surround71 189 * ch0 front left = = = = 190 * ch1 front right = = = = 191 * ch2 rear left = = = = 192 * ch3 rear right = = = = 193 * ch4 LFE center center center 194 * ch5 LFE LFE 195 * ch6 side left 196 * ch7 side right 197 * 198 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR} 199 */ 200 static int hdmi_channel_mapping[0x32][8] = { 201 /* stereo */ 202 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 }, 203 /* 2.1 */ 204 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 }, 205 /* Dolby Surround */ 206 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 }, 207 /* surround40 */ 208 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 }, 209 /* 4ch */ 210 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 }, 211 /* surround41 */ 212 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 }, 213 /* surround50 */ 214 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 }, 215 /* surround51 */ 216 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 }, 217 /* 7.1 */ 218 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 }, 219 }; 220 221 /* 222 * This is an ordered list! 223 * 224 * The preceding ones have better chances to be selected by 225 * hdmi_channel_allocation(). 226 */ 227 static struct cea_channel_speaker_allocation channel_allocations[] = { 228 /* channel: 7 6 5 4 3 2 1 0 */ 229 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } }, 230 /* 2.1 */ 231 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } }, 232 /* Dolby Surround */ 233 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } }, 234 /* surround40 */ 235 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } }, 236 /* surround41 */ 237 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } }, 238 /* surround50 */ 239 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } }, 240 /* surround51 */ 241 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } }, 242 /* 6.1 */ 243 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } }, 244 /* surround71 */ 245 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } }, 246 247 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } }, 248 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } }, 249 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } }, 250 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } }, 251 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } }, 252 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } }, 253 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } }, 254 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } }, 255 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } }, 256 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } }, 257 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } }, 258 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } }, 259 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } }, 260 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } }, 261 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } }, 262 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } }, 263 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } }, 264 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } }, 265 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } }, 266 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } }, 267 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } }, 268 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } }, 269 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } }, 270 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } }, 271 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } }, 272 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } }, 273 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } }, 274 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } }, 275 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } }, 276 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } }, 277 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } }, 278 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } }, 279 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } }, 280 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } }, 281 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } }, 282 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } }, 283 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } }, 284 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } }, 285 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } }, 286 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } }, 287 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } }, 288 }; 289 290 291 /* 292 * HDMI routines 293 */ 294 295 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid) 296 { 297 int pin_idx; 298 299 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) 300 if (spec->pins[pin_idx].pin_nid == pin_nid) 301 return pin_idx; 302 303 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid); 304 return -EINVAL; 305 } 306 307 static int hinfo_to_pin_index(struct hdmi_spec *spec, 308 struct hda_pcm_stream *hinfo) 309 { 310 int pin_idx; 311 312 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) 313 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo) 314 return pin_idx; 315 316 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo); 317 return -EINVAL; 318 } 319 320 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid) 321 { 322 int cvt_idx; 323 324 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) 325 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid) 326 return cvt_idx; 327 328 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid); 329 return -EINVAL; 330 } 331 332 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol, 333 struct snd_ctl_elem_info *uinfo) 334 { 335 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 336 struct hdmi_spec *spec; 337 int pin_idx; 338 339 spec = codec->spec; 340 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 341 342 pin_idx = kcontrol->private_value; 343 uinfo->count = spec->pins[pin_idx].sink_eld.eld_size; 344 345 return 0; 346 } 347 348 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol, 349 struct snd_ctl_elem_value *ucontrol) 350 { 351 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 352 struct hdmi_spec *spec; 353 int pin_idx; 354 355 spec = codec->spec; 356 pin_idx = kcontrol->private_value; 357 358 memcpy(ucontrol->value.bytes.data, 359 spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE); 360 361 return 0; 362 } 363 364 static struct snd_kcontrol_new eld_bytes_ctl = { 365 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 366 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 367 .name = "ELD", 368 .info = hdmi_eld_ctl_info, 369 .get = hdmi_eld_ctl_get, 370 }; 371 372 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx, 373 int device) 374 { 375 struct snd_kcontrol *kctl; 376 struct hdmi_spec *spec = codec->spec; 377 int err; 378 379 kctl = snd_ctl_new1(&eld_bytes_ctl, codec); 380 if (!kctl) 381 return -ENOMEM; 382 kctl->private_value = pin_idx; 383 kctl->id.device = device; 384 385 err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl); 386 if (err < 0) 387 return err; 388 389 return 0; 390 } 391 392 #ifdef BE_PARANOID 393 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid, 394 int *packet_index, int *byte_index) 395 { 396 int val; 397 398 val = snd_hda_codec_read(codec, pin_nid, 0, 399 AC_VERB_GET_HDMI_DIP_INDEX, 0); 400 401 *packet_index = val >> 5; 402 *byte_index = val & 0x1f; 403 } 404 #endif 405 406 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid, 407 int packet_index, int byte_index) 408 { 409 int val; 410 411 val = (packet_index << 5) | (byte_index & 0x1f); 412 413 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val); 414 } 415 416 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid, 417 unsigned char val) 418 { 419 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val); 420 } 421 422 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid) 423 { 424 /* Unmute */ 425 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP) 426 snd_hda_codec_write(codec, pin_nid, 0, 427 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE); 428 /* Disable pin out until stream is active*/ 429 snd_hda_codec_write(codec, pin_nid, 0, 430 AC_VERB_SET_PIN_WIDGET_CONTROL, 0); 431 } 432 433 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid) 434 { 435 return 1 + snd_hda_codec_read(codec, cvt_nid, 0, 436 AC_VERB_GET_CVT_CHAN_COUNT, 0); 437 } 438 439 static void hdmi_set_channel_count(struct hda_codec *codec, 440 hda_nid_t cvt_nid, int chs) 441 { 442 if (chs != hdmi_get_channel_count(codec, cvt_nid)) 443 snd_hda_codec_write(codec, cvt_nid, 0, 444 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1); 445 } 446 447 448 /* 449 * Channel mapping routines 450 */ 451 452 /* 453 * Compute derived values in channel_allocations[]. 454 */ 455 static void init_channel_allocations(void) 456 { 457 int i, j; 458 struct cea_channel_speaker_allocation *p; 459 460 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { 461 p = channel_allocations + i; 462 p->channels = 0; 463 p->spk_mask = 0; 464 for (j = 0; j < ARRAY_SIZE(p->speakers); j++) 465 if (p->speakers[j]) { 466 p->channels++; 467 p->spk_mask |= p->speakers[j]; 468 } 469 } 470 } 471 472 /* 473 * The transformation takes two steps: 474 * 475 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask 476 * spk_mask => (channel_allocations[]) => ai->CA 477 * 478 * TODO: it could select the wrong CA from multiple candidates. 479 */ 480 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels) 481 { 482 int i; 483 int ca = 0; 484 int spk_mask = 0; 485 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE]; 486 487 /* 488 * CA defaults to 0 for basic stereo audio 489 */ 490 if (channels <= 2) 491 return 0; 492 493 /* 494 * expand ELD's speaker allocation mask 495 * 496 * ELD tells the speaker mask in a compact(paired) form, 497 * expand ELD's notions to match the ones used by Audio InfoFrame. 498 */ 499 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) { 500 if (eld->spk_alloc & (1 << i)) 501 spk_mask |= eld_speaker_allocation_bits[i]; 502 } 503 504 /* search for the first working match in the CA table */ 505 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { 506 if (channels == channel_allocations[i].channels && 507 (spk_mask & channel_allocations[i].spk_mask) == 508 channel_allocations[i].spk_mask) { 509 ca = channel_allocations[i].ca_index; 510 break; 511 } 512 } 513 514 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf)); 515 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n", 516 ca, channels, buf); 517 518 return ca; 519 } 520 521 static void hdmi_debug_channel_mapping(struct hda_codec *codec, 522 hda_nid_t pin_nid) 523 { 524 #ifdef CONFIG_SND_DEBUG_VERBOSE 525 int i; 526 int slot; 527 528 for (i = 0; i < 8; i++) { 529 slot = snd_hda_codec_read(codec, pin_nid, 0, 530 AC_VERB_GET_HDMI_CHAN_SLOT, i); 531 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n", 532 slot >> 4, slot & 0xf); 533 } 534 #endif 535 } 536 537 538 static void hdmi_setup_channel_mapping(struct hda_codec *codec, 539 hda_nid_t pin_nid, 540 int ca) 541 { 542 int i; 543 int err; 544 545 if (hdmi_channel_mapping[ca][1] == 0) { 546 for (i = 0; i < channel_allocations[ca].channels; i++) 547 hdmi_channel_mapping[ca][i] = i | (i << 4); 548 for (; i < 8; i++) 549 hdmi_channel_mapping[ca][i] = 0xf | (i << 4); 550 } 551 552 for (i = 0; i < 8; i++) { 553 err = snd_hda_codec_write(codec, pin_nid, 0, 554 AC_VERB_SET_HDMI_CHAN_SLOT, 555 hdmi_channel_mapping[ca][i]); 556 if (err) { 557 snd_printdd(KERN_NOTICE 558 "HDMI: channel mapping failed\n"); 559 break; 560 } 561 } 562 563 hdmi_debug_channel_mapping(codec, pin_nid); 564 } 565 566 567 /* 568 * Audio InfoFrame routines 569 */ 570 571 /* 572 * Enable Audio InfoFrame Transmission 573 */ 574 static void hdmi_start_infoframe_trans(struct hda_codec *codec, 575 hda_nid_t pin_nid) 576 { 577 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 578 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT, 579 AC_DIPXMIT_BEST); 580 } 581 582 /* 583 * Disable Audio InfoFrame Transmission 584 */ 585 static void hdmi_stop_infoframe_trans(struct hda_codec *codec, 586 hda_nid_t pin_nid) 587 { 588 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 589 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT, 590 AC_DIPXMIT_DISABLE); 591 } 592 593 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid) 594 { 595 #ifdef CONFIG_SND_DEBUG_VERBOSE 596 int i; 597 int size; 598 599 size = snd_hdmi_get_eld_size(codec, pin_nid); 600 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size); 601 602 for (i = 0; i < 8; i++) { 603 size = snd_hda_codec_read(codec, pin_nid, 0, 604 AC_VERB_GET_HDMI_DIP_SIZE, i); 605 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size); 606 } 607 #endif 608 } 609 610 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid) 611 { 612 #ifdef BE_PARANOID 613 int i, j; 614 int size; 615 int pi, bi; 616 for (i = 0; i < 8; i++) { 617 size = snd_hda_codec_read(codec, pin_nid, 0, 618 AC_VERB_GET_HDMI_DIP_SIZE, i); 619 if (size == 0) 620 continue; 621 622 hdmi_set_dip_index(codec, pin_nid, i, 0x0); 623 for (j = 1; j < 1000; j++) { 624 hdmi_write_dip_byte(codec, pin_nid, 0x0); 625 hdmi_get_dip_index(codec, pin_nid, &pi, &bi); 626 if (pi != i) 627 snd_printd(KERN_INFO "dip index %d: %d != %d\n", 628 bi, pi, i); 629 if (bi == 0) /* byte index wrapped around */ 630 break; 631 } 632 snd_printd(KERN_INFO 633 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n", 634 i, size, j); 635 } 636 #endif 637 } 638 639 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai) 640 { 641 u8 *bytes = (u8 *)hdmi_ai; 642 u8 sum = 0; 643 int i; 644 645 hdmi_ai->checksum = 0; 646 647 for (i = 0; i < sizeof(*hdmi_ai); i++) 648 sum += bytes[i]; 649 650 hdmi_ai->checksum = -sum; 651 } 652 653 static void hdmi_fill_audio_infoframe(struct hda_codec *codec, 654 hda_nid_t pin_nid, 655 u8 *dip, int size) 656 { 657 int i; 658 659 hdmi_debug_dip_size(codec, pin_nid); 660 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */ 661 662 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 663 for (i = 0; i < size; i++) 664 hdmi_write_dip_byte(codec, pin_nid, dip[i]); 665 } 666 667 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid, 668 u8 *dip, int size) 669 { 670 u8 val; 671 int i; 672 673 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0) 674 != AC_DIPXMIT_BEST) 675 return false; 676 677 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 678 for (i = 0; i < size; i++) { 679 val = snd_hda_codec_read(codec, pin_nid, 0, 680 AC_VERB_GET_HDMI_DIP_DATA, 0); 681 if (val != dip[i]) 682 return false; 683 } 684 685 return true; 686 } 687 688 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx, 689 struct snd_pcm_substream *substream) 690 { 691 struct hdmi_spec *spec = codec->spec; 692 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 693 hda_nid_t pin_nid = per_pin->pin_nid; 694 int channels = substream->runtime->channels; 695 struct hdmi_eld *eld; 696 int ca; 697 union audio_infoframe ai; 698 699 eld = &spec->pins[pin_idx].sink_eld; 700 if (!eld->monitor_present) 701 return; 702 703 ca = hdmi_channel_allocation(eld, channels); 704 705 memset(&ai, 0, sizeof(ai)); 706 if (eld->conn_type == 0) { /* HDMI */ 707 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi; 708 709 hdmi_ai->type = 0x84; 710 hdmi_ai->ver = 0x01; 711 hdmi_ai->len = 0x0a; 712 hdmi_ai->CC02_CT47 = channels - 1; 713 hdmi_ai->CA = ca; 714 hdmi_checksum_audio_infoframe(hdmi_ai); 715 } else if (eld->conn_type == 1) { /* DisplayPort */ 716 struct dp_audio_infoframe *dp_ai = &ai.dp; 717 718 dp_ai->type = 0x84; 719 dp_ai->len = 0x1b; 720 dp_ai->ver = 0x11 << 2; 721 dp_ai->CC02_CT47 = channels - 1; 722 dp_ai->CA = ca; 723 } else { 724 snd_printd("HDMI: unknown connection type at pin %d\n", 725 pin_nid); 726 return; 727 } 728 729 /* 730 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or 731 * sizeof(*dp_ai) to avoid partial match/update problems when 732 * the user switches between HDMI/DP monitors. 733 */ 734 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes, 735 sizeof(ai))) { 736 snd_printdd("hdmi_setup_audio_infoframe: " 737 "pin=%d channels=%d\n", 738 pin_nid, 739 channels); 740 hdmi_setup_channel_mapping(codec, pin_nid, ca); 741 hdmi_stop_infoframe_trans(codec, pin_nid); 742 hdmi_fill_audio_infoframe(codec, pin_nid, 743 ai.bytes, sizeof(ai)); 744 hdmi_start_infoframe_trans(codec, pin_nid); 745 } 746 } 747 748 749 /* 750 * Unsolicited events 751 */ 752 753 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll); 754 755 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res) 756 { 757 struct hdmi_spec *spec = codec->spec; 758 int tag = res >> AC_UNSOL_RES_TAG_SHIFT; 759 int pin_nid; 760 int pin_idx; 761 struct hda_jack_tbl *jack; 762 763 jack = snd_hda_jack_tbl_get_from_tag(codec, tag); 764 if (!jack) 765 return; 766 pin_nid = jack->nid; 767 jack->jack_dirty = 1; 768 769 _snd_printd(SND_PR_VERBOSE, 770 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n", 771 codec->addr, pin_nid, 772 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV)); 773 774 pin_idx = pin_nid_to_pin_index(spec, pin_nid); 775 if (pin_idx < 0) 776 return; 777 778 hdmi_present_sense(&spec->pins[pin_idx], 1); 779 snd_hda_jack_report_sync(codec); 780 } 781 782 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res) 783 { 784 int tag = res >> AC_UNSOL_RES_TAG_SHIFT; 785 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT; 786 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE); 787 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY); 788 789 printk(KERN_INFO 790 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n", 791 codec->addr, 792 tag, 793 subtag, 794 cp_state, 795 cp_ready); 796 797 /* TODO */ 798 if (cp_state) 799 ; 800 if (cp_ready) 801 ; 802 } 803 804 805 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res) 806 { 807 int tag = res >> AC_UNSOL_RES_TAG_SHIFT; 808 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT; 809 810 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) { 811 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag); 812 return; 813 } 814 815 if (subtag == 0) 816 hdmi_intrinsic_event(codec, res); 817 else 818 hdmi_non_intrinsic_event(codec, res); 819 } 820 821 /* 822 * Callbacks 823 */ 824 825 /* HBR should be Non-PCM, 8 channels */ 826 #define is_hbr_format(format) \ 827 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7) 828 829 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid, 830 hda_nid_t pin_nid, u32 stream_tag, int format) 831 { 832 int pinctl; 833 int new_pinctl = 0; 834 835 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) { 836 pinctl = snd_hda_codec_read(codec, pin_nid, 0, 837 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 838 839 new_pinctl = pinctl & ~AC_PINCTL_EPT; 840 if (is_hbr_format(format)) 841 new_pinctl |= AC_PINCTL_EPT_HBR; 842 else 843 new_pinctl |= AC_PINCTL_EPT_NATIVE; 844 845 snd_printdd("hdmi_setup_stream: " 846 "NID=0x%x, %spinctl=0x%x\n", 847 pin_nid, 848 pinctl == new_pinctl ? "" : "new-", 849 new_pinctl); 850 851 if (pinctl != new_pinctl) 852 snd_hda_codec_write(codec, pin_nid, 0, 853 AC_VERB_SET_PIN_WIDGET_CONTROL, 854 new_pinctl); 855 856 } 857 if (is_hbr_format(format) && !new_pinctl) { 858 snd_printdd("hdmi_setup_stream: HBR is not supported\n"); 859 return -EINVAL; 860 } 861 862 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format); 863 return 0; 864 } 865 866 /* 867 * HDA PCM callbacks 868 */ 869 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo, 870 struct hda_codec *codec, 871 struct snd_pcm_substream *substream) 872 { 873 struct hdmi_spec *spec = codec->spec; 874 struct snd_pcm_runtime *runtime = substream->runtime; 875 int pin_idx, cvt_idx, mux_idx = 0; 876 struct hdmi_spec_per_pin *per_pin; 877 struct hdmi_eld *eld; 878 struct hdmi_spec_per_cvt *per_cvt = NULL; 879 880 hinfo->nid = 0; /* clear the leftover value */ 881 882 /* Validate hinfo */ 883 pin_idx = hinfo_to_pin_index(spec, hinfo); 884 if (snd_BUG_ON(pin_idx < 0)) 885 return -EINVAL; 886 per_pin = &spec->pins[pin_idx]; 887 eld = &per_pin->sink_eld; 888 889 /* Dynamically assign converter to stream */ 890 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) { 891 per_cvt = &spec->cvts[cvt_idx]; 892 893 /* Must not already be assigned */ 894 if (per_cvt->assigned) 895 continue; 896 /* Must be in pin's mux's list of converters */ 897 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++) 898 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid) 899 break; 900 /* Not in mux list */ 901 if (mux_idx == per_pin->num_mux_nids) 902 continue; 903 break; 904 } 905 /* No free converters */ 906 if (cvt_idx == spec->num_cvts) 907 return -ENODEV; 908 909 /* Claim converter */ 910 per_cvt->assigned = 1; 911 hinfo->nid = per_cvt->cvt_nid; 912 913 snd_hda_codec_write(codec, per_pin->pin_nid, 0, 914 AC_VERB_SET_CONNECT_SEL, 915 mux_idx); 916 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid); 917 918 /* Initially set the converter's capabilities */ 919 hinfo->channels_min = per_cvt->channels_min; 920 hinfo->channels_max = per_cvt->channels_max; 921 hinfo->rates = per_cvt->rates; 922 hinfo->formats = per_cvt->formats; 923 hinfo->maxbps = per_cvt->maxbps; 924 925 /* Restrict capabilities by ELD if this isn't disabled */ 926 if (!static_hdmi_pcm && eld->eld_valid) { 927 snd_hdmi_eld_update_pcm_info(eld, hinfo); 928 if (hinfo->channels_min > hinfo->channels_max || 929 !hinfo->rates || !hinfo->formats) 930 return -ENODEV; 931 } 932 933 /* Store the updated parameters */ 934 runtime->hw.channels_min = hinfo->channels_min; 935 runtime->hw.channels_max = hinfo->channels_max; 936 runtime->hw.formats = hinfo->formats; 937 runtime->hw.rates = hinfo->rates; 938 939 snd_pcm_hw_constraint_step(substream->runtime, 0, 940 SNDRV_PCM_HW_PARAM_CHANNELS, 2); 941 return 0; 942 } 943 944 /* 945 * HDA/HDMI auto parsing 946 */ 947 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx) 948 { 949 struct hdmi_spec *spec = codec->spec; 950 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 951 hda_nid_t pin_nid = per_pin->pin_nid; 952 953 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) { 954 snd_printk(KERN_WARNING 955 "HDMI: pin %d wcaps %#x " 956 "does not support connection list\n", 957 pin_nid, get_wcaps(codec, pin_nid)); 958 return -EINVAL; 959 } 960 961 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid, 962 per_pin->mux_nids, 963 HDA_MAX_CONNECTIONS); 964 965 return 0; 966 } 967 968 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll) 969 { 970 struct hda_codec *codec = per_pin->codec; 971 struct hdmi_eld *eld = &per_pin->sink_eld; 972 hda_nid_t pin_nid = per_pin->pin_nid; 973 /* 974 * Always execute a GetPinSense verb here, even when called from 975 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited 976 * response's PD bit is not the real PD value, but indicates that 977 * the real PD value changed. An older version of the HD-audio 978 * specification worked this way. Hence, we just ignore the data in 979 * the unsolicited response to avoid custom WARs. 980 */ 981 int present = snd_hda_pin_sense(codec, pin_nid); 982 bool eld_valid = false; 983 984 memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer)); 985 986 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE); 987 if (eld->monitor_present) 988 eld_valid = !!(present & AC_PINSENSE_ELDV); 989 990 _snd_printd(SND_PR_VERBOSE, 991 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n", 992 codec->addr, pin_nid, eld->monitor_present, eld_valid); 993 994 if (eld_valid) { 995 if (!snd_hdmi_get_eld(eld, codec, pin_nid)) 996 snd_hdmi_show_eld(eld); 997 else if (repoll) { 998 queue_delayed_work(codec->bus->workq, 999 &per_pin->work, 1000 msecs_to_jiffies(300)); 1001 } 1002 } 1003 } 1004 1005 static void hdmi_repoll_eld(struct work_struct *work) 1006 { 1007 struct hdmi_spec_per_pin *per_pin = 1008 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work); 1009 1010 if (per_pin->repoll_count++ > 6) 1011 per_pin->repoll_count = 0; 1012 1013 hdmi_present_sense(per_pin, per_pin->repoll_count); 1014 } 1015 1016 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid) 1017 { 1018 struct hdmi_spec *spec = codec->spec; 1019 unsigned int caps, config; 1020 int pin_idx; 1021 struct hdmi_spec_per_pin *per_pin; 1022 int err; 1023 1024 caps = snd_hda_param_read(codec, pin_nid, AC_PAR_PIN_CAP); 1025 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP))) 1026 return 0; 1027 1028 config = snd_hda_codec_read(codec, pin_nid, 0, 1029 AC_VERB_GET_CONFIG_DEFAULT, 0); 1030 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE) 1031 return 0; 1032 1033 if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS)) 1034 return -E2BIG; 1035 1036 pin_idx = spec->num_pins; 1037 per_pin = &spec->pins[pin_idx]; 1038 1039 per_pin->pin_nid = pin_nid; 1040 1041 err = hdmi_read_pin_conn(codec, pin_idx); 1042 if (err < 0) 1043 return err; 1044 1045 spec->num_pins++; 1046 1047 return 0; 1048 } 1049 1050 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid) 1051 { 1052 struct hdmi_spec *spec = codec->spec; 1053 int cvt_idx; 1054 struct hdmi_spec_per_cvt *per_cvt; 1055 unsigned int chans; 1056 int err; 1057 1058 if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS)) 1059 return -E2BIG; 1060 1061 chans = get_wcaps(codec, cvt_nid); 1062 chans = get_wcaps_channels(chans); 1063 1064 cvt_idx = spec->num_cvts; 1065 per_cvt = &spec->cvts[cvt_idx]; 1066 1067 per_cvt->cvt_nid = cvt_nid; 1068 per_cvt->channels_min = 2; 1069 if (chans <= 16) 1070 per_cvt->channels_max = chans; 1071 1072 err = snd_hda_query_supported_pcm(codec, cvt_nid, 1073 &per_cvt->rates, 1074 &per_cvt->formats, 1075 &per_cvt->maxbps); 1076 if (err < 0) 1077 return err; 1078 1079 spec->num_cvts++; 1080 1081 return 0; 1082 } 1083 1084 static int hdmi_parse_codec(struct hda_codec *codec) 1085 { 1086 hda_nid_t nid; 1087 int i, nodes; 1088 1089 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid); 1090 if (!nid || nodes < 0) { 1091 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n"); 1092 return -EINVAL; 1093 } 1094 1095 for (i = 0; i < nodes; i++, nid++) { 1096 unsigned int caps; 1097 unsigned int type; 1098 1099 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP); 1100 type = get_wcaps_type(caps); 1101 1102 if (!(caps & AC_WCAP_DIGITAL)) 1103 continue; 1104 1105 switch (type) { 1106 case AC_WID_AUD_OUT: 1107 hdmi_add_cvt(codec, nid); 1108 break; 1109 case AC_WID_PIN: 1110 hdmi_add_pin(codec, nid); 1111 break; 1112 } 1113 } 1114 1115 /* 1116 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event 1117 * can be lost and presence sense verb will become inaccurate if the 1118 * HDA link is powered off at hot plug or hw initialization time. 1119 */ 1120 #ifdef CONFIG_SND_HDA_POWER_SAVE 1121 if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) & 1122 AC_PWRST_EPSS)) 1123 codec->bus->power_keep_link_on = 1; 1124 #endif 1125 1126 return 0; 1127 } 1128 1129 /* 1130 */ 1131 static char *get_hdmi_pcm_name(int idx) 1132 { 1133 static char names[MAX_HDMI_PINS][8]; 1134 sprintf(&names[idx][0], "HDMI %d", idx); 1135 return &names[idx][0]; 1136 } 1137 1138 /* 1139 * HDMI callbacks 1140 */ 1141 1142 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo, 1143 struct hda_codec *codec, 1144 unsigned int stream_tag, 1145 unsigned int format, 1146 struct snd_pcm_substream *substream) 1147 { 1148 hda_nid_t cvt_nid = hinfo->nid; 1149 struct hdmi_spec *spec = codec->spec; 1150 int pin_idx = hinfo_to_pin_index(spec, hinfo); 1151 hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid; 1152 int pinctl; 1153 1154 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels); 1155 1156 hdmi_setup_audio_infoframe(codec, pin_idx, substream); 1157 1158 pinctl = snd_hda_codec_read(codec, pin_nid, 0, 1159 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 1160 snd_hda_codec_write(codec, pin_nid, 0, 1161 AC_VERB_SET_PIN_WIDGET_CONTROL, pinctl | PIN_OUT); 1162 1163 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format); 1164 } 1165 1166 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo, 1167 struct hda_codec *codec, 1168 struct snd_pcm_substream *substream) 1169 { 1170 struct hdmi_spec *spec = codec->spec; 1171 int cvt_idx, pin_idx; 1172 struct hdmi_spec_per_cvt *per_cvt; 1173 struct hdmi_spec_per_pin *per_pin; 1174 int pinctl; 1175 1176 if (hinfo->nid) { 1177 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid); 1178 if (snd_BUG_ON(cvt_idx < 0)) 1179 return -EINVAL; 1180 per_cvt = &spec->cvts[cvt_idx]; 1181 1182 snd_BUG_ON(!per_cvt->assigned); 1183 per_cvt->assigned = 0; 1184 hinfo->nid = 0; 1185 1186 pin_idx = hinfo_to_pin_index(spec, hinfo); 1187 if (snd_BUG_ON(pin_idx < 0)) 1188 return -EINVAL; 1189 per_pin = &spec->pins[pin_idx]; 1190 1191 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0, 1192 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 1193 snd_hda_codec_write(codec, per_pin->pin_nid, 0, 1194 AC_VERB_SET_PIN_WIDGET_CONTROL, 1195 pinctl & ~PIN_OUT); 1196 snd_hda_spdif_ctls_unassign(codec, pin_idx); 1197 } 1198 return 0; 1199 } 1200 1201 static const struct hda_pcm_ops generic_ops = { 1202 .open = hdmi_pcm_open, 1203 .close = hdmi_pcm_close, 1204 .prepare = generic_hdmi_playback_pcm_prepare, 1205 }; 1206 1207 static int generic_hdmi_build_pcms(struct hda_codec *codec) 1208 { 1209 struct hdmi_spec *spec = codec->spec; 1210 int pin_idx; 1211 1212 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1213 struct hda_pcm *info; 1214 struct hda_pcm_stream *pstr; 1215 1216 info = &spec->pcm_rec[pin_idx]; 1217 info->name = get_hdmi_pcm_name(pin_idx); 1218 info->pcm_type = HDA_PCM_TYPE_HDMI; 1219 1220 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK]; 1221 pstr->substreams = 1; 1222 pstr->ops = generic_ops; 1223 pstr->nid = 1; /* FIXME: just for avoiding a debug WARNING */ 1224 /* other pstr fields are set in open */ 1225 } 1226 1227 codec->num_pcms = spec->num_pins; 1228 codec->pcm_info = spec->pcm_rec; 1229 1230 return 0; 1231 } 1232 1233 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx) 1234 { 1235 char hdmi_str[32] = "HDMI/DP"; 1236 struct hdmi_spec *spec = codec->spec; 1237 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1238 int pcmdev = spec->pcm_rec[pin_idx].device; 1239 1240 if (pcmdev > 0) 1241 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev); 1242 1243 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0); 1244 } 1245 1246 static int generic_hdmi_build_controls(struct hda_codec *codec) 1247 { 1248 struct hdmi_spec *spec = codec->spec; 1249 int err; 1250 int pin_idx; 1251 1252 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1253 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1254 1255 err = generic_hdmi_build_jack(codec, pin_idx); 1256 if (err < 0) 1257 return err; 1258 1259 err = snd_hda_create_spdif_out_ctls(codec, 1260 per_pin->pin_nid, 1261 per_pin->mux_nids[0]); 1262 if (err < 0) 1263 return err; 1264 snd_hda_spdif_ctls_unassign(codec, pin_idx); 1265 1266 /* add control for ELD Bytes */ 1267 err = hdmi_create_eld_ctl(codec, 1268 pin_idx, 1269 spec->pcm_rec[pin_idx].device); 1270 1271 if (err < 0) 1272 return err; 1273 1274 hdmi_present_sense(per_pin, 0); 1275 } 1276 1277 return 0; 1278 } 1279 1280 static int generic_hdmi_init_per_pins(struct hda_codec *codec) 1281 { 1282 struct hdmi_spec *spec = codec->spec; 1283 int pin_idx; 1284 1285 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1286 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1287 struct hdmi_eld *eld = &per_pin->sink_eld; 1288 1289 per_pin->codec = codec; 1290 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld); 1291 snd_hda_eld_proc_new(codec, eld, pin_idx); 1292 } 1293 return 0; 1294 } 1295 1296 static int generic_hdmi_init(struct hda_codec *codec) 1297 { 1298 struct hdmi_spec *spec = codec->spec; 1299 int pin_idx; 1300 1301 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1302 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1303 hda_nid_t pin_nid = per_pin->pin_nid; 1304 1305 hdmi_init_pin(codec, pin_nid); 1306 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid); 1307 } 1308 snd_hda_jack_report_sync(codec); 1309 return 0; 1310 } 1311 1312 static void generic_hdmi_free(struct hda_codec *codec) 1313 { 1314 struct hdmi_spec *spec = codec->spec; 1315 int pin_idx; 1316 1317 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1318 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1319 struct hdmi_eld *eld = &per_pin->sink_eld; 1320 1321 cancel_delayed_work(&per_pin->work); 1322 snd_hda_eld_proc_free(codec, eld); 1323 } 1324 1325 flush_workqueue(codec->bus->workq); 1326 kfree(spec); 1327 } 1328 1329 static const struct hda_codec_ops generic_hdmi_patch_ops = { 1330 .init = generic_hdmi_init, 1331 .free = generic_hdmi_free, 1332 .build_pcms = generic_hdmi_build_pcms, 1333 .build_controls = generic_hdmi_build_controls, 1334 .unsol_event = hdmi_unsol_event, 1335 }; 1336 1337 static int patch_generic_hdmi(struct hda_codec *codec) 1338 { 1339 struct hdmi_spec *spec; 1340 1341 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 1342 if (spec == NULL) 1343 return -ENOMEM; 1344 1345 codec->spec = spec; 1346 if (hdmi_parse_codec(codec) < 0) { 1347 codec->spec = NULL; 1348 kfree(spec); 1349 return -EINVAL; 1350 } 1351 codec->patch_ops = generic_hdmi_patch_ops; 1352 generic_hdmi_init_per_pins(codec); 1353 1354 init_channel_allocations(); 1355 1356 return 0; 1357 } 1358 1359 /* 1360 * Shared non-generic implementations 1361 */ 1362 1363 static int simple_playback_build_pcms(struct hda_codec *codec) 1364 { 1365 struct hdmi_spec *spec = codec->spec; 1366 struct hda_pcm *info = spec->pcm_rec; 1367 unsigned int chans; 1368 struct hda_pcm_stream *pstr; 1369 1370 codec->num_pcms = 1; 1371 codec->pcm_info = info; 1372 1373 chans = get_wcaps(codec, spec->cvts[0].cvt_nid); 1374 chans = get_wcaps_channels(chans); 1375 1376 info->name = get_hdmi_pcm_name(0); 1377 info->pcm_type = HDA_PCM_TYPE_HDMI; 1378 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK]; 1379 *pstr = spec->pcm_playback; 1380 pstr->nid = spec->cvts[0].cvt_nid; 1381 if (pstr->channels_max <= 2 && chans && chans <= 16) 1382 pstr->channels_max = chans; 1383 1384 return 0; 1385 } 1386 1387 /* unsolicited event for jack sensing */ 1388 static void simple_hdmi_unsol_event(struct hda_codec *codec, 1389 unsigned int res) 1390 { 1391 snd_hda_jack_set_dirty_all(codec); 1392 snd_hda_jack_report_sync(codec); 1393 } 1394 1395 /* generic_hdmi_build_jack can be used for simple_hdmi, too, 1396 * as long as spec->pins[] is set correctly 1397 */ 1398 #define simple_hdmi_build_jack generic_hdmi_build_jack 1399 1400 static int simple_playback_build_controls(struct hda_codec *codec) 1401 { 1402 struct hdmi_spec *spec = codec->spec; 1403 int err; 1404 1405 err = snd_hda_create_spdif_out_ctls(codec, 1406 spec->cvts[0].cvt_nid, 1407 spec->cvts[0].cvt_nid); 1408 if (err < 0) 1409 return err; 1410 return simple_hdmi_build_jack(codec, 0); 1411 } 1412 1413 static int simple_playback_init(struct hda_codec *codec) 1414 { 1415 struct hdmi_spec *spec = codec->spec; 1416 hda_nid_t pin = spec->pins[0].pin_nid; 1417 1418 snd_hda_codec_write(codec, pin, 0, 1419 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT); 1420 /* some codecs require to unmute the pin */ 1421 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP) 1422 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE, 1423 AMP_OUT_UNMUTE); 1424 snd_hda_jack_detect_enable(codec, pin, pin); 1425 snd_hda_jack_report_sync(codec); 1426 return 0; 1427 } 1428 1429 static void simple_playback_free(struct hda_codec *codec) 1430 { 1431 struct hdmi_spec *spec = codec->spec; 1432 1433 kfree(spec); 1434 } 1435 1436 /* 1437 * Nvidia specific implementations 1438 */ 1439 1440 #define Nv_VERB_SET_Channel_Allocation 0xF79 1441 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A 1442 #define Nv_VERB_SET_Audio_Protection_On 0xF98 1443 #define Nv_VERB_SET_Audio_Protection_Off 0xF99 1444 1445 #define nvhdmi_master_con_nid_7x 0x04 1446 #define nvhdmi_master_pin_nid_7x 0x05 1447 1448 static const hda_nid_t nvhdmi_con_nids_7x[4] = { 1449 /*front, rear, clfe, rear_surr */ 1450 0x6, 0x8, 0xa, 0xc, 1451 }; 1452 1453 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = { 1454 /* set audio protect on */ 1455 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1}, 1456 /* enable digital output on pin widget */ 1457 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1458 {} /* terminator */ 1459 }; 1460 1461 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = { 1462 /* set audio protect on */ 1463 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1}, 1464 /* enable digital output on pin widget */ 1465 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1466 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1467 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1468 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1469 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1470 {} /* terminator */ 1471 }; 1472 1473 #ifdef LIMITED_RATE_FMT_SUPPORT 1474 /* support only the safe format and rate */ 1475 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000 1476 #define SUPPORTED_MAXBPS 16 1477 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE 1478 #else 1479 /* support all rates and formats */ 1480 #define SUPPORTED_RATES \ 1481 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\ 1482 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\ 1483 SNDRV_PCM_RATE_192000) 1484 #define SUPPORTED_MAXBPS 24 1485 #define SUPPORTED_FORMATS \ 1486 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE) 1487 #endif 1488 1489 static int nvhdmi_7x_init_2ch(struct hda_codec *codec) 1490 { 1491 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch); 1492 return 0; 1493 } 1494 1495 static int nvhdmi_7x_init_8ch(struct hda_codec *codec) 1496 { 1497 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch); 1498 return 0; 1499 } 1500 1501 static unsigned int channels_2_6_8[] = { 1502 2, 6, 8 1503 }; 1504 1505 static unsigned int channels_2_8[] = { 1506 2, 8 1507 }; 1508 1509 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = { 1510 .count = ARRAY_SIZE(channels_2_6_8), 1511 .list = channels_2_6_8, 1512 .mask = 0, 1513 }; 1514 1515 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = { 1516 .count = ARRAY_SIZE(channels_2_8), 1517 .list = channels_2_8, 1518 .mask = 0, 1519 }; 1520 1521 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo, 1522 struct hda_codec *codec, 1523 struct snd_pcm_substream *substream) 1524 { 1525 struct hdmi_spec *spec = codec->spec; 1526 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL; 1527 1528 switch (codec->preset->id) { 1529 case 0x10de0002: 1530 case 0x10de0003: 1531 case 0x10de0005: 1532 case 0x10de0006: 1533 hw_constraints_channels = &hw_constraints_2_8_channels; 1534 break; 1535 case 0x10de0007: 1536 hw_constraints_channels = &hw_constraints_2_6_8_channels; 1537 break; 1538 default: 1539 break; 1540 } 1541 1542 if (hw_constraints_channels != NULL) { 1543 snd_pcm_hw_constraint_list(substream->runtime, 0, 1544 SNDRV_PCM_HW_PARAM_CHANNELS, 1545 hw_constraints_channels); 1546 } else { 1547 snd_pcm_hw_constraint_step(substream->runtime, 0, 1548 SNDRV_PCM_HW_PARAM_CHANNELS, 2); 1549 } 1550 1551 return snd_hda_multi_out_dig_open(codec, &spec->multiout); 1552 } 1553 1554 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo, 1555 struct hda_codec *codec, 1556 struct snd_pcm_substream *substream) 1557 { 1558 struct hdmi_spec *spec = codec->spec; 1559 return snd_hda_multi_out_dig_close(codec, &spec->multiout); 1560 } 1561 1562 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo, 1563 struct hda_codec *codec, 1564 unsigned int stream_tag, 1565 unsigned int format, 1566 struct snd_pcm_substream *substream) 1567 { 1568 struct hdmi_spec *spec = codec->spec; 1569 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, 1570 stream_tag, format, substream); 1571 } 1572 1573 static const struct hda_pcm_stream simple_pcm_playback = { 1574 .substreams = 1, 1575 .channels_min = 2, 1576 .channels_max = 2, 1577 .ops = { 1578 .open = simple_playback_pcm_open, 1579 .close = simple_playback_pcm_close, 1580 .prepare = simple_playback_pcm_prepare 1581 }, 1582 }; 1583 1584 static const struct hda_codec_ops simple_hdmi_patch_ops = { 1585 .build_controls = simple_playback_build_controls, 1586 .build_pcms = simple_playback_build_pcms, 1587 .init = simple_playback_init, 1588 .free = simple_playback_free, 1589 .unsol_event = simple_hdmi_unsol_event, 1590 }; 1591 1592 static int patch_simple_hdmi(struct hda_codec *codec, 1593 hda_nid_t cvt_nid, hda_nid_t pin_nid) 1594 { 1595 struct hdmi_spec *spec; 1596 1597 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 1598 if (!spec) 1599 return -ENOMEM; 1600 1601 codec->spec = spec; 1602 1603 spec->multiout.num_dacs = 0; /* no analog */ 1604 spec->multiout.max_channels = 2; 1605 spec->multiout.dig_out_nid = cvt_nid; 1606 spec->num_cvts = 1; 1607 spec->num_pins = 1; 1608 spec->cvts[0].cvt_nid = cvt_nid; 1609 spec->pins[0].pin_nid = pin_nid; 1610 spec->pcm_playback = simple_pcm_playback; 1611 1612 codec->patch_ops = simple_hdmi_patch_ops; 1613 1614 return 0; 1615 } 1616 1617 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec, 1618 int channels) 1619 { 1620 unsigned int chanmask; 1621 int chan = channels ? (channels - 1) : 1; 1622 1623 switch (channels) { 1624 default: 1625 case 0: 1626 case 2: 1627 chanmask = 0x00; 1628 break; 1629 case 4: 1630 chanmask = 0x08; 1631 break; 1632 case 6: 1633 chanmask = 0x0b; 1634 break; 1635 case 8: 1636 chanmask = 0x13; 1637 break; 1638 } 1639 1640 /* Set the audio infoframe channel allocation and checksum fields. The 1641 * channel count is computed implicitly by the hardware. */ 1642 snd_hda_codec_write(codec, 0x1, 0, 1643 Nv_VERB_SET_Channel_Allocation, chanmask); 1644 1645 snd_hda_codec_write(codec, 0x1, 0, 1646 Nv_VERB_SET_Info_Frame_Checksum, 1647 (0x71 - chan - chanmask)); 1648 } 1649 1650 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo, 1651 struct hda_codec *codec, 1652 struct snd_pcm_substream *substream) 1653 { 1654 struct hdmi_spec *spec = codec->spec; 1655 int i; 1656 1657 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 1658 0, AC_VERB_SET_CHANNEL_STREAMID, 0); 1659 for (i = 0; i < 4; i++) { 1660 /* set the stream id */ 1661 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0, 1662 AC_VERB_SET_CHANNEL_STREAMID, 0); 1663 /* set the stream format */ 1664 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0, 1665 AC_VERB_SET_STREAM_FORMAT, 0); 1666 } 1667 1668 /* The audio hardware sends a channel count of 0x7 (8ch) when all the 1669 * streams are disabled. */ 1670 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8); 1671 1672 return snd_hda_multi_out_dig_close(codec, &spec->multiout); 1673 } 1674 1675 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo, 1676 struct hda_codec *codec, 1677 unsigned int stream_tag, 1678 unsigned int format, 1679 struct snd_pcm_substream *substream) 1680 { 1681 int chs; 1682 unsigned int dataDCC2, channel_id; 1683 int i; 1684 struct hdmi_spec *spec = codec->spec; 1685 struct hda_spdif_out *spdif; 1686 1687 mutex_lock(&codec->spdif_mutex); 1688 spdif = snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid); 1689 1690 chs = substream->runtime->channels; 1691 1692 dataDCC2 = 0x2; 1693 1694 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */ 1695 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) 1696 snd_hda_codec_write(codec, 1697 nvhdmi_master_con_nid_7x, 1698 0, 1699 AC_VERB_SET_DIGI_CONVERT_1, 1700 spdif->ctls & ~AC_DIG1_ENABLE & 0xff); 1701 1702 /* set the stream id */ 1703 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0, 1704 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0); 1705 1706 /* set the stream format */ 1707 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0, 1708 AC_VERB_SET_STREAM_FORMAT, format); 1709 1710 /* turn on again (if needed) */ 1711 /* enable and set the channel status audio/data flag */ 1712 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) { 1713 snd_hda_codec_write(codec, 1714 nvhdmi_master_con_nid_7x, 1715 0, 1716 AC_VERB_SET_DIGI_CONVERT_1, 1717 spdif->ctls & 0xff); 1718 snd_hda_codec_write(codec, 1719 nvhdmi_master_con_nid_7x, 1720 0, 1721 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2); 1722 } 1723 1724 for (i = 0; i < 4; i++) { 1725 if (chs == 2) 1726 channel_id = 0; 1727 else 1728 channel_id = i * 2; 1729 1730 /* turn off SPDIF once; 1731 *otherwise the IEC958 bits won't be updated 1732 */ 1733 if (codec->spdif_status_reset && 1734 (spdif->ctls & AC_DIG1_ENABLE)) 1735 snd_hda_codec_write(codec, 1736 nvhdmi_con_nids_7x[i], 1737 0, 1738 AC_VERB_SET_DIGI_CONVERT_1, 1739 spdif->ctls & ~AC_DIG1_ENABLE & 0xff); 1740 /* set the stream id */ 1741 snd_hda_codec_write(codec, 1742 nvhdmi_con_nids_7x[i], 1743 0, 1744 AC_VERB_SET_CHANNEL_STREAMID, 1745 (stream_tag << 4) | channel_id); 1746 /* set the stream format */ 1747 snd_hda_codec_write(codec, 1748 nvhdmi_con_nids_7x[i], 1749 0, 1750 AC_VERB_SET_STREAM_FORMAT, 1751 format); 1752 /* turn on again (if needed) */ 1753 /* enable and set the channel status audio/data flag */ 1754 if (codec->spdif_status_reset && 1755 (spdif->ctls & AC_DIG1_ENABLE)) { 1756 snd_hda_codec_write(codec, 1757 nvhdmi_con_nids_7x[i], 1758 0, 1759 AC_VERB_SET_DIGI_CONVERT_1, 1760 spdif->ctls & 0xff); 1761 snd_hda_codec_write(codec, 1762 nvhdmi_con_nids_7x[i], 1763 0, 1764 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2); 1765 } 1766 } 1767 1768 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs); 1769 1770 mutex_unlock(&codec->spdif_mutex); 1771 return 0; 1772 } 1773 1774 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = { 1775 .substreams = 1, 1776 .channels_min = 2, 1777 .channels_max = 8, 1778 .nid = nvhdmi_master_con_nid_7x, 1779 .rates = SUPPORTED_RATES, 1780 .maxbps = SUPPORTED_MAXBPS, 1781 .formats = SUPPORTED_FORMATS, 1782 .ops = { 1783 .open = simple_playback_pcm_open, 1784 .close = nvhdmi_8ch_7x_pcm_close, 1785 .prepare = nvhdmi_8ch_7x_pcm_prepare 1786 }, 1787 }; 1788 1789 static int patch_nvhdmi_2ch(struct hda_codec *codec) 1790 { 1791 struct hdmi_spec *spec; 1792 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x, 1793 nvhdmi_master_pin_nid_7x); 1794 if (err < 0) 1795 return err; 1796 1797 codec->patch_ops.init = nvhdmi_7x_init_2ch; 1798 /* override the PCM rates, etc, as the codec doesn't give full list */ 1799 spec = codec->spec; 1800 spec->pcm_playback.rates = SUPPORTED_RATES; 1801 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS; 1802 spec->pcm_playback.formats = SUPPORTED_FORMATS; 1803 return 0; 1804 } 1805 1806 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec) 1807 { 1808 struct hdmi_spec *spec; 1809 int err = patch_nvhdmi_2ch(codec); 1810 if (err < 0) 1811 return err; 1812 spec = codec->spec; 1813 spec->multiout.max_channels = 8; 1814 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x; 1815 codec->patch_ops.init = nvhdmi_7x_init_8ch; 1816 1817 /* Initialize the audio infoframe channel mask and checksum to something 1818 * valid */ 1819 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8); 1820 1821 return 0; 1822 } 1823 1824 /* 1825 * ATI-specific implementations 1826 * 1827 * FIXME: we may omit the whole this and use the generic code once after 1828 * it's confirmed to work. 1829 */ 1830 1831 #define ATIHDMI_CVT_NID 0x02 /* audio converter */ 1832 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */ 1833 1834 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo, 1835 struct hda_codec *codec, 1836 unsigned int stream_tag, 1837 unsigned int format, 1838 struct snd_pcm_substream *substream) 1839 { 1840 struct hdmi_spec *spec = codec->spec; 1841 int chans = substream->runtime->channels; 1842 int i, err; 1843 1844 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format, 1845 substream); 1846 if (err < 0) 1847 return err; 1848 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0, 1849 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1); 1850 /* FIXME: XXX */ 1851 for (i = 0; i < chans; i++) { 1852 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0, 1853 AC_VERB_SET_HDMI_CHAN_SLOT, 1854 (i << 4) | i); 1855 } 1856 return 0; 1857 } 1858 1859 static int patch_atihdmi(struct hda_codec *codec) 1860 { 1861 struct hdmi_spec *spec; 1862 int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID); 1863 if (err < 0) 1864 return err; 1865 spec = codec->spec; 1866 spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare; 1867 return 0; 1868 } 1869 1870 /* VIA HDMI Implementation */ 1871 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */ 1872 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */ 1873 1874 static int patch_via_hdmi(struct hda_codec *codec) 1875 { 1876 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID); 1877 } 1878 1879 /* 1880 * patch entries 1881 */ 1882 static const struct hda_codec_preset snd_hda_preset_hdmi[] = { 1883 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi }, 1884 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi }, 1885 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi }, 1886 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi }, 1887 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi }, 1888 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi }, 1889 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi }, 1890 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 1891 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 1892 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 1893 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 1894 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x }, 1895 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi }, 1896 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi }, 1897 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi }, 1898 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi }, 1899 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi }, 1900 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi }, 1901 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi }, 1902 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi }, 1903 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi }, 1904 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi }, 1905 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi }, 1906 /* 17 is known to be absent */ 1907 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi }, 1908 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi }, 1909 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi }, 1910 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi }, 1911 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi }, 1912 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi }, 1913 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi }, 1914 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi }, 1915 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi }, 1916 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi }, 1917 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi }, 1918 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch }, 1919 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch }, 1920 { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi }, 1921 { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi }, 1922 { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi }, 1923 { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi }, 1924 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi }, 1925 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi }, 1926 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi }, 1927 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi }, 1928 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi }, 1929 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi }, 1930 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi }, 1931 { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi }, 1932 { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi }, 1933 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi }, 1934 {} /* terminator */ 1935 }; 1936 1937 MODULE_ALIAS("snd-hda-codec-id:1002793c"); 1938 MODULE_ALIAS("snd-hda-codec-id:10027919"); 1939 MODULE_ALIAS("snd-hda-codec-id:1002791a"); 1940 MODULE_ALIAS("snd-hda-codec-id:1002aa01"); 1941 MODULE_ALIAS("snd-hda-codec-id:10951390"); 1942 MODULE_ALIAS("snd-hda-codec-id:10951392"); 1943 MODULE_ALIAS("snd-hda-codec-id:10de0002"); 1944 MODULE_ALIAS("snd-hda-codec-id:10de0003"); 1945 MODULE_ALIAS("snd-hda-codec-id:10de0005"); 1946 MODULE_ALIAS("snd-hda-codec-id:10de0006"); 1947 MODULE_ALIAS("snd-hda-codec-id:10de0007"); 1948 MODULE_ALIAS("snd-hda-codec-id:10de000a"); 1949 MODULE_ALIAS("snd-hda-codec-id:10de000b"); 1950 MODULE_ALIAS("snd-hda-codec-id:10de000c"); 1951 MODULE_ALIAS("snd-hda-codec-id:10de000d"); 1952 MODULE_ALIAS("snd-hda-codec-id:10de0010"); 1953 MODULE_ALIAS("snd-hda-codec-id:10de0011"); 1954 MODULE_ALIAS("snd-hda-codec-id:10de0012"); 1955 MODULE_ALIAS("snd-hda-codec-id:10de0013"); 1956 MODULE_ALIAS("snd-hda-codec-id:10de0014"); 1957 MODULE_ALIAS("snd-hda-codec-id:10de0015"); 1958 MODULE_ALIAS("snd-hda-codec-id:10de0016"); 1959 MODULE_ALIAS("snd-hda-codec-id:10de0018"); 1960 MODULE_ALIAS("snd-hda-codec-id:10de0019"); 1961 MODULE_ALIAS("snd-hda-codec-id:10de001a"); 1962 MODULE_ALIAS("snd-hda-codec-id:10de001b"); 1963 MODULE_ALIAS("snd-hda-codec-id:10de001c"); 1964 MODULE_ALIAS("snd-hda-codec-id:10de0040"); 1965 MODULE_ALIAS("snd-hda-codec-id:10de0041"); 1966 MODULE_ALIAS("snd-hda-codec-id:10de0042"); 1967 MODULE_ALIAS("snd-hda-codec-id:10de0043"); 1968 MODULE_ALIAS("snd-hda-codec-id:10de0044"); 1969 MODULE_ALIAS("snd-hda-codec-id:10de0051"); 1970 MODULE_ALIAS("snd-hda-codec-id:10de0067"); 1971 MODULE_ALIAS("snd-hda-codec-id:10de8001"); 1972 MODULE_ALIAS("snd-hda-codec-id:11069f80"); 1973 MODULE_ALIAS("snd-hda-codec-id:11069f81"); 1974 MODULE_ALIAS("snd-hda-codec-id:11069f84"); 1975 MODULE_ALIAS("snd-hda-codec-id:11069f85"); 1976 MODULE_ALIAS("snd-hda-codec-id:17e80047"); 1977 MODULE_ALIAS("snd-hda-codec-id:80860054"); 1978 MODULE_ALIAS("snd-hda-codec-id:80862801"); 1979 MODULE_ALIAS("snd-hda-codec-id:80862802"); 1980 MODULE_ALIAS("snd-hda-codec-id:80862803"); 1981 MODULE_ALIAS("snd-hda-codec-id:80862804"); 1982 MODULE_ALIAS("snd-hda-codec-id:80862805"); 1983 MODULE_ALIAS("snd-hda-codec-id:80862806"); 1984 MODULE_ALIAS("snd-hda-codec-id:80862807"); 1985 MODULE_ALIAS("snd-hda-codec-id:80862880"); 1986 MODULE_ALIAS("snd-hda-codec-id:808629fb"); 1987 1988 MODULE_LICENSE("GPL"); 1989 MODULE_DESCRIPTION("HDMI HD-audio codec"); 1990 MODULE_ALIAS("snd-hda-codec-intelhdmi"); 1991 MODULE_ALIAS("snd-hda-codec-nvhdmi"); 1992 MODULE_ALIAS("snd-hda-codec-atihdmi"); 1993 1994 static struct hda_codec_preset_list intel_list = { 1995 .preset = snd_hda_preset_hdmi, 1996 .owner = THIS_MODULE, 1997 }; 1998 1999 static int __init patch_hdmi_init(void) 2000 { 2001 return snd_hda_add_codec_preset(&intel_list); 2002 } 2003 2004 static void __exit patch_hdmi_exit(void) 2005 { 2006 snd_hda_delete_codec_preset(&intel_list); 2007 } 2008 2009 module_init(patch_hdmi_init) 2010 module_exit(patch_hdmi_exit) 2011