19e7647b5SLucas Tanure // SPDX-License-Identifier: GPL-2.0-only 29e7647b5SLucas Tanure /* 39e7647b5SLucas Tanure * patch_cs8409-tables.c -- HD audio interface patch for Cirrus Logic CS8409 HDA bridge chip 49e7647b5SLucas Tanure * 59e7647b5SLucas Tanure * Copyright (C) 2021 Cirrus Logic, Inc. and 69e7647b5SLucas Tanure * Cirrus Logic International Semiconductor Ltd. 79e7647b5SLucas Tanure * 89e7647b5SLucas Tanure * Author: Lucas Tanure <tanureal@opensource.cirrus.com> 99e7647b5SLucas Tanure */ 109e7647b5SLucas Tanure 119e7647b5SLucas Tanure #include "patch_cs8409.h" 129e7647b5SLucas Tanure 13*b2a88774SLucas Tanure /****************************************************************************** 14*b2a88774SLucas Tanure * CS42L42 Specific Data 15*b2a88774SLucas Tanure * 16*b2a88774SLucas Tanure ******************************************************************************/ 17*b2a88774SLucas Tanure 18*b2a88774SLucas Tanure static const DECLARE_TLV_DB_SCALE(cs42l42_dac_db_scale, 19*b2a88774SLucas Tanure CS8409_CS42L42_HP_VOL_REAL_MIN * 100, 100, 1); 20*b2a88774SLucas Tanure 21*b2a88774SLucas Tanure static const DECLARE_TLV_DB_SCALE(cs42l42_adc_db_scale, 22*b2a88774SLucas Tanure CS8409_CS42L42_AMIC_VOL_REAL_MIN * 100, 100, 1); 23*b2a88774SLucas Tanure 24*b2a88774SLucas Tanure const struct snd_kcontrol_new cs42l42_dac_volume_mixer = { 25*b2a88774SLucas Tanure .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 26*b2a88774SLucas Tanure .index = 0, 27*b2a88774SLucas Tanure .subdevice = (HDA_SUBDEV_AMP_FLAG | HDA_SUBDEV_NID_FLAG), 28*b2a88774SLucas Tanure .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ), 29*b2a88774SLucas Tanure .info = cs8409_cs42l42_volume_info, 30*b2a88774SLucas Tanure .get = cs8409_cs42l42_volume_get, 31*b2a88774SLucas Tanure .put = cs8409_cs42l42_volume_put, 32*b2a88774SLucas Tanure .tlv = { .p = cs42l42_dac_db_scale }, 33*b2a88774SLucas Tanure .private_value = HDA_COMPOSE_AMP_VAL_OFS(CS8409_PIN_ASP1_TRANSMITTER_A, 3, 0, 34*b2a88774SLucas Tanure HDA_OUTPUT, CS42L42_VOL_DAC) | HDA_AMP_VAL_MIN_MUTE 35*b2a88774SLucas Tanure }; 36*b2a88774SLucas Tanure 37*b2a88774SLucas Tanure const struct snd_kcontrol_new cs42l42_adc_volume_mixer = { 38*b2a88774SLucas Tanure .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 39*b2a88774SLucas Tanure .index = 0, 40*b2a88774SLucas Tanure .subdevice = (HDA_SUBDEV_AMP_FLAG | HDA_SUBDEV_NID_FLAG), 41*b2a88774SLucas Tanure .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ), 42*b2a88774SLucas Tanure .info = cs8409_cs42l42_volume_info, 43*b2a88774SLucas Tanure .get = cs8409_cs42l42_volume_get, 44*b2a88774SLucas Tanure .put = cs8409_cs42l42_volume_put, 45*b2a88774SLucas Tanure .tlv = { .p = cs42l42_adc_db_scale }, 46*b2a88774SLucas Tanure .private_value = HDA_COMPOSE_AMP_VAL_OFS(CS8409_PIN_ASP1_RECEIVER_A, 1, 0, 47*b2a88774SLucas Tanure HDA_INPUT, CS42L42_VOL_ADC) | HDA_AMP_VAL_MIN_MUTE 48*b2a88774SLucas Tanure }; 49*b2a88774SLucas Tanure 509e7647b5SLucas Tanure /* Dell Inspiron platforms 519e7647b5SLucas Tanure * with cs8409 bridge and cs42l42 codec 529e7647b5SLucas Tanure */ 539e7647b5SLucas Tanure const struct snd_pci_quirk cs8409_fixup_tbl[] = { 549e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A11, "Bullseye", CS8409_BULLSEYE), 559e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A12, "Bullseye", CS8409_BULLSEYE), 569e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A23, "Bullseye", CS8409_BULLSEYE), 579e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A24, "Bullseye", CS8409_BULLSEYE), 589e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A25, "Bullseye", CS8409_BULLSEYE), 599e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A29, "Bullseye", CS8409_BULLSEYE), 609e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A2A, "Bullseye", CS8409_BULLSEYE), 619e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A2B, "Bullseye", CS8409_BULLSEYE), 629e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AB0, "Warlock", CS8409_WARLOCK), 639e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AB2, "Warlock", CS8409_WARLOCK), 649e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AB1, "Warlock", CS8409_WARLOCK), 659e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AB3, "Warlock", CS8409_WARLOCK), 669e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AB4, "Warlock", CS8409_WARLOCK), 679e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AB5, "Warlock", CS8409_WARLOCK), 689e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AD9, "Warlock", CS8409_WARLOCK), 699e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0ADA, "Warlock", CS8409_WARLOCK), 709e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0ADB, "Warlock", CS8409_WARLOCK), 719e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0ADC, "Warlock", CS8409_WARLOCK), 729e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AF4, "Warlock", CS8409_WARLOCK), 739e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AF5, "Warlock", CS8409_WARLOCK), 749e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A77, "Cyborg", CS8409_CYBORG), 759e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A78, "Cyborg", CS8409_CYBORG), 769e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A79, "Cyborg", CS8409_CYBORG), 779e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A7A, "Cyborg", CS8409_CYBORG), 789e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A7D, "Cyborg", CS8409_CYBORG), 799e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A7E, "Cyborg", CS8409_CYBORG), 809e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A7F, "Cyborg", CS8409_CYBORG), 819e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A80, "Cyborg", CS8409_CYBORG), 829e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0ADF, "Cyborg", CS8409_CYBORG), 839e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AE0, "Cyborg", CS8409_CYBORG), 849e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AE1, "Cyborg", CS8409_CYBORG), 859e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AE2, "Cyborg", CS8409_CYBORG), 869e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AE9, "Cyborg", CS8409_CYBORG), 879e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AEA, "Cyborg", CS8409_CYBORG), 889e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AEB, "Cyborg", CS8409_CYBORG), 899e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AEC, "Cyborg", CS8409_CYBORG), 909e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AED, "Cyborg", CS8409_CYBORG), 919e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AEE, "Cyborg", CS8409_CYBORG), 929e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AEF, "Cyborg", CS8409_CYBORG), 939e7647b5SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AF0, "Cyborg", CS8409_CYBORG), 949e7647b5SLucas Tanure {} /* terminator */ 959e7647b5SLucas Tanure }; 969e7647b5SLucas Tanure 979e7647b5SLucas Tanure /* Dell Inspiron models with cs8409/cs42l42 */ 989e7647b5SLucas Tanure const struct hda_model_fixup cs8409_models[] = { 999e7647b5SLucas Tanure { .id = CS8409_BULLSEYE, .name = "bullseye" }, 1009e7647b5SLucas Tanure { .id = CS8409_WARLOCK, .name = "warlock" }, 1019e7647b5SLucas Tanure { .id = CS8409_CYBORG, .name = "cyborg" }, 1029e7647b5SLucas Tanure {} 1039e7647b5SLucas Tanure }; 1049e7647b5SLucas Tanure 1059e7647b5SLucas Tanure const struct hda_fixup cs8409_fixups[] = { 1069e7647b5SLucas Tanure [CS8409_BULLSEYE] = { 1079e7647b5SLucas Tanure .type = HDA_FIXUP_PINS, 1089e7647b5SLucas Tanure .v.pins = cs8409_cs42l42_pincfgs, 1099e7647b5SLucas Tanure .chained = true, 1109e7647b5SLucas Tanure .chain_id = CS8409_FIXUPS, 1119e7647b5SLucas Tanure }, 1129e7647b5SLucas Tanure [CS8409_WARLOCK] = { 1139e7647b5SLucas Tanure .type = HDA_FIXUP_PINS, 1149e7647b5SLucas Tanure .v.pins = cs8409_cs42l42_pincfgs, 1159e7647b5SLucas Tanure .chained = true, 1169e7647b5SLucas Tanure .chain_id = CS8409_FIXUPS, 1179e7647b5SLucas Tanure }, 1189e7647b5SLucas Tanure [CS8409_CYBORG] = { 1199e7647b5SLucas Tanure .type = HDA_FIXUP_PINS, 1209e7647b5SLucas Tanure .v.pins = cs8409_cs42l42_pincfgs, 1219e7647b5SLucas Tanure .chained = true, 1229e7647b5SLucas Tanure .chain_id = CS8409_FIXUPS, 1239e7647b5SLucas Tanure }, 1249e7647b5SLucas Tanure [CS8409_FIXUPS] = { 1259e7647b5SLucas Tanure .type = HDA_FIXUP_FUNC, 1269e7647b5SLucas Tanure .v.func = cs8409_cs42l42_fixups, 1279e7647b5SLucas Tanure }, 1289e7647b5SLucas Tanure }; 1299e7647b5SLucas Tanure 1309e7647b5SLucas Tanure const struct hda_verb cs8409_cs42l42_init_verbs[] = { 131ccff0064SStefan Binding { CS8409_PIN_AFG, AC_VERB_SET_GPIO_WAKE_MASK, 0x0018 }, /* WAKE from GPIO 3,4 */ 132ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_STATE, 0x0001 }, /* Enable VPW processing */ 133ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_COEF_INDEX, 0x0002 }, /* Configure GPIO 6,7 */ 134ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_COEF, 0x0080 }, /* I2C mode */ 135ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_COEF_INDEX, 0x005b }, /* Set I2C bus speed */ 136ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_COEF, 0x0200 }, /* 100kHz I2C_STO = 2 */ 1379e7647b5SLucas Tanure {} /* terminator */ 1389e7647b5SLucas Tanure }; 1399e7647b5SLucas Tanure 1409e7647b5SLucas Tanure const struct hda_pintbl cs8409_cs42l42_pincfgs[] = { 141ccff0064SStefan Binding { CS8409_PIN_ASP1_TRANSMITTER_A, 0x042120f0 }, /* ASP-1-TX */ 142ccff0064SStefan Binding { CS8409_PIN_ASP1_RECEIVER_A, 0x04a12050 }, /* ASP-1-RX */ 143ccff0064SStefan Binding { CS8409_PIN_ASP2_TRANSMITTER_A, 0x901000f0 }, /* ASP-2-TX */ 144ccff0064SStefan Binding { CS8409_PIN_DMIC1_IN, 0x90a00090 }, /* DMIC-1 */ 1459e7647b5SLucas Tanure {} /* terminator */ 1469e7647b5SLucas Tanure }; 1479e7647b5SLucas Tanure 1489e7647b5SLucas Tanure /* Vendor specific HW configuration for CS42L42 */ 1499e7647b5SLucas Tanure const struct cs8409_i2c_param cs42l42_init_reg_seq[] = { 1509e7647b5SLucas Tanure { 0x1010, 0xB0 }, 1519e7647b5SLucas Tanure { 0x1D01, 0x00 }, 1529e7647b5SLucas Tanure { 0x1D02, 0x06 }, 1539e7647b5SLucas Tanure { 0x1D03, 0x00 }, 1549e7647b5SLucas Tanure { 0x1107, 0x01 }, 1559e7647b5SLucas Tanure { 0x1009, 0x02 }, 1569e7647b5SLucas Tanure { 0x1007, 0x03 }, 1579e7647b5SLucas Tanure { 0x1201, 0x00 }, 1589e7647b5SLucas Tanure { 0x1208, 0x13 }, 1599e7647b5SLucas Tanure { 0x1205, 0xFF }, 1609e7647b5SLucas Tanure { 0x1206, 0x00 }, 1619e7647b5SLucas Tanure { 0x1207, 0x20 }, 1629e7647b5SLucas Tanure { 0x1202, 0x0D }, 1639e7647b5SLucas Tanure { 0x2A02, 0x02 }, 1649e7647b5SLucas Tanure { 0x2A03, 0x00 }, 1659e7647b5SLucas Tanure { 0x2A04, 0x00 }, 1669e7647b5SLucas Tanure { 0x2A05, 0x02 }, 1679e7647b5SLucas Tanure { 0x2A06, 0x00 }, 1689e7647b5SLucas Tanure { 0x2A07, 0x20 }, 1699e7647b5SLucas Tanure { 0x2A08, 0x02 }, 1709e7647b5SLucas Tanure { 0x2A09, 0x00 }, 1719e7647b5SLucas Tanure { 0x2A0A, 0x80 }, 1729e7647b5SLucas Tanure { 0x2A0B, 0x02 }, 1739e7647b5SLucas Tanure { 0x2A0C, 0x00 }, 1749e7647b5SLucas Tanure { 0x2A0D, 0xA0 }, 1759e7647b5SLucas Tanure { 0x2A01, 0x0C }, 1769e7647b5SLucas Tanure { 0x2902, 0x01 }, 1779e7647b5SLucas Tanure { 0x2903, 0x02 }, 1789e7647b5SLucas Tanure { 0x2904, 0x00 }, 1799e7647b5SLucas Tanure { 0x2905, 0x00 }, 1809e7647b5SLucas Tanure { 0x2901, 0x01 }, 1819e7647b5SLucas Tanure { 0x1101, 0x0A }, 1829e7647b5SLucas Tanure { 0x1102, 0x84 }, 1839e7647b5SLucas Tanure { 0x2301, 0x00 }, 1849e7647b5SLucas Tanure { 0x2303, 0x00 }, 1859e7647b5SLucas Tanure { 0x2302, 0x3f }, 1869e7647b5SLucas Tanure { 0x2001, 0x03 }, 1879e7647b5SLucas Tanure { 0x1B75, 0xB6 }, 1889e7647b5SLucas Tanure { 0x1B73, 0xC2 }, 1899e7647b5SLucas Tanure { 0x1129, 0x01 }, 1909e7647b5SLucas Tanure { 0x1121, 0xF3 }, 1919e7647b5SLucas Tanure { 0x1103, 0x20 }, 1929e7647b5SLucas Tanure { 0x1105, 0x00 }, 1931f03db68SStefan Binding { 0x1112, 0x00 }, 1949e7647b5SLucas Tanure { 0x1113, 0x80 }, 1959e7647b5SLucas Tanure { 0x1C03, 0xC0 }, 1969e7647b5SLucas Tanure { 0x1101, 0x02 }, 197cab82a22SStefan Binding { 0x1316, 0xff }, 198cab82a22SStefan Binding { 0x1317, 0xff }, 199cab82a22SStefan Binding { 0x1318, 0xff }, 200cab82a22SStefan Binding { 0x1319, 0xff }, 201cab82a22SStefan Binding { 0x131a, 0xff }, 202cab82a22SStefan Binding { 0x131b, 0xff }, 203cab82a22SStefan Binding { 0x131c, 0xff }, 204cab82a22SStefan Binding { 0x131e, 0xff }, 205cab82a22SStefan Binding { 0x131f, 0xff }, 206cab82a22SStefan Binding { 0x1320, 0xff }, 207cab82a22SStefan Binding { 0x1b79, 0xff }, 208cab82a22SStefan Binding { 0x1b7a, 0xff }, 2099e7647b5SLucas Tanure {} /* Terminator */ 2109e7647b5SLucas Tanure }; 2119e7647b5SLucas Tanure 2129e7647b5SLucas Tanure /* Vendor specific hw configuration for CS8409 */ 2139e7647b5SLucas Tanure const struct cs8409_cir_param cs8409_cs42l42_hw_cfg[] = { 214ccff0064SStefan Binding /* +PLL1/2_EN, +I2C_EN */ 215ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG1, 0xb008 }, 216ccff0064SStefan Binding /* ASP1/2_EN=0, ASP1_STP=1 */ 217ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG2, 0x0002 }, 218ccff0064SStefan Binding /* ASP1/2_BUS_IDLE=10, +GPIO_I2C */ 219ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG3, 0x0a80 }, 220ccff0064SStefan Binding /* ASP1.A: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=0 */ 221ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, ASP1_A_TX_CTRL1, 0x0800 }, 222ccff0064SStefan Binding /* ASP1.A: TX.RAP=0, TX.RSZ=24 bits, TX.RCS=32 */ 223ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, ASP1_A_TX_CTRL2, 0x0820 }, 224ccff0064SStefan Binding /* ASP2.A: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=0 */ 225ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, ASP2_A_TX_CTRL1, 0x0800 }, 226ccff0064SStefan Binding /* ASP2.A: TX.RAP=1, TX.RSZ=24 bits, TX.RCS=0 */ 227ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, ASP2_A_TX_CTRL2, 0x2800 }, 228ccff0064SStefan Binding /* ASP1.A: RX.LAP=0, RX.LSZ=24 bits, RX.LCS=0 */ 229ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, ASP1_A_RX_CTRL1, 0x0800 }, 230ccff0064SStefan Binding /* ASP1.A: RX.RAP=0, RX.RSZ=24 bits, RX.RCS=0 */ 231ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, ASP1_A_RX_CTRL2, 0x0800 }, 232ccff0064SStefan Binding /* ASP1: LCHI = 00h */ 233ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL1, 0x8000 }, 234ccff0064SStefan Binding /* ASP1: MC/SC_SRCSEL=PLL1, LCPR=FFh */ 235ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL2, 0x28ff }, 236ccff0064SStefan Binding /* ASP1: MCEN=0, FSD=011, SCPOL_IN/OUT=0, SCDIV=1:4 */ 237ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL3, 0x0062 }, 238ccff0064SStefan Binding /* ASP2: LCHI=1Fh */ 239ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP2_CLK_CTRL1, 0x801f }, 240ccff0064SStefan Binding /* ASP2: MC/SC_SRCSEL=PLL1, LCPR=3Fh */ 241ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP2_CLK_CTRL2, 0x283f }, 242ccff0064SStefan Binding /* ASP2: 5050=1, MCEN=0, FSD=010, SCPOL_IN/OUT=1, SCDIV=1:16 */ 243ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP2_CLK_CTRL3, 0x805c }, 244ccff0064SStefan Binding /* DMIC1_MO=10b, DMIC1/2_SR=1 */ 245ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_DMIC_CFG, 0x0023 }, 246ccff0064SStefan Binding /* ASP1/2_BEEP=0 */ 247ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_BEEP_CFG, 0x0000 }, 248ccff0064SStefan Binding /* ASP1/2_EN=1, ASP1_STP=1 */ 249ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG2, 0x0062 }, 250ccff0064SStefan Binding /* -PLL2_EN */ 251ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG1, 0x9008 }, 252ccff0064SStefan Binding /* TX2.A: pre-scale att.=0 dB */ 253ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PRE_SCALE_ATTN2, 0x0000 }, 254ccff0064SStefan Binding /* ASP1/2_xxx_EN=1, ASP1/2_MCLK_EN=0, DMIC1_SCL_EN=1 */ 255ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PAD_CFG_SLW_RATE_CTRL, 0xfc03 }, 256ccff0064SStefan Binding /* test mode on */ 257ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, 0xc0, 0x9999 }, 258ccff0064SStefan Binding /* GPIO hysteresis = 30 us */ 259ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, 0xc5, 0x0000 }, 260ccff0064SStefan Binding /* test mode off */ 261ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, 0xc0, 0x0000 }, 2629e7647b5SLucas Tanure {} /* Terminator */ 2639e7647b5SLucas Tanure }; 2649e7647b5SLucas Tanure 2659e7647b5SLucas Tanure const struct cs8409_cir_param cs8409_cs42l42_bullseye_atn[] = { 266ccff0064SStefan Binding /* EQ_SEL=1, EQ1/2_EN=0 */ 267ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_CTRL1, 0x4000 }, 268ccff0064SStefan Binding /* +EQ_ACC */ 269ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0x4000 }, 270ccff0064SStefan Binding /* +EQ2_EN */ 271ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_CTRL1, 0x4010 }, 272ccff0064SStefan Binding /* EQ_DATA_HI=0x0647 */ 273ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x0647 }, 274ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=0, EQ_DATA_LO=0x67 */ 275ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc0c7 }, 276ccff0064SStefan Binding /* EQ_DATA_HI=0x0647 */ 277ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x0647 }, 278ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=1, EQ_DATA_LO=0x67 */ 279ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc1c7 }, 280ccff0064SStefan Binding /* EQ_DATA_HI=0xf370 */ 281ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0xf370 }, 282ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=2, EQ_DATA_LO=0x71 */ 283ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc271 }, 284ccff0064SStefan Binding /* EQ_DATA_HI=0x1ef8 */ 285ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x1ef8 }, 286ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=3, EQ_DATA_LO=0x48 */ 287ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc348 }, 288ccff0064SStefan Binding /* EQ_DATA_HI=0xc110 */ 289ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0xc110 }, 290ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=4, EQ_DATA_LO=0x5a */ 291ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc45a }, 292ccff0064SStefan Binding /* EQ_DATA_HI=0x1f29 */ 293ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x1f29 }, 294ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=5, EQ_DATA_LO=0x74 */ 295ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc574 }, 296ccff0064SStefan Binding /* EQ_DATA_HI=0x1d7a */ 297ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x1d7a }, 298ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=6, EQ_DATA_LO=0x53 */ 299ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc653 }, 300ccff0064SStefan Binding /* EQ_DATA_HI=0xc38c */ 301ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0xc38c }, 302ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=7, EQ_DATA_LO=0x14 */ 303ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc714 }, 304ccff0064SStefan Binding /* EQ_DATA_HI=0x1ca3 */ 305ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x1ca3 }, 306ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=8, EQ_DATA_LO=0xc7 */ 307ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc8c7 }, 308ccff0064SStefan Binding /* EQ_DATA_HI=0xc38c */ 309ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0xc38c }, 310ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=9, EQ_DATA_LO=0x14 */ 311ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc914 }, 312ccff0064SStefan Binding /* -EQ_ACC, -EQ_WRT */ 313ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0x0000 }, 3149e7647b5SLucas Tanure {} /* Terminator */ 3159e7647b5SLucas Tanure }; 316