1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // CS35l41 ALSA HDA audio driver 4 // 5 // Copyright 2021 Cirrus Logic, Inc. 6 // 7 // Author: Lucas Tanure <tanureal@opensource.cirrus.com> 8 9 #include <linux/acpi.h> 10 #include <linux/module.h> 11 #include <linux/moduleparam.h> 12 #include <sound/hda_codec.h> 13 #include <sound/soc.h> 14 #include <linux/pm_runtime.h> 15 #include "hda_local.h" 16 #include "hda_auto_parser.h" 17 #include "hda_jack.h" 18 #include "hda_generic.h" 19 #include "hda_component.h" 20 #include "cs35l41_hda.h" 21 #include "hda_cs_dsp_ctl.h" 22 23 #define CS35L41_FIRMWARE_ROOT "cirrus/" 24 #define CS35L41_PART "cs35l41" 25 26 #define HALO_STATE_DSP_CTL_NAME "HALO_STATE" 27 #define HALO_STATE_DSP_CTL_TYPE 5 28 #define HALO_STATE_DSP_CTL_ALG 262308 29 #define CAL_R_DSP_CTL_NAME "CAL_R" 30 #define CAL_STATUS_DSP_CTL_NAME "CAL_STATUS" 31 #define CAL_CHECKSUM_DSP_CTL_NAME "CAL_CHECKSUM" 32 #define CAL_AMBIENT_DSP_CTL_NAME "CAL_AMBIENT" 33 #define CAL_DSP_CTL_TYPE 5 34 #define CAL_DSP_CTL_ALG 205 35 36 static bool firmware_autostart = 1; 37 module_param(firmware_autostart, bool, 0444); 38 MODULE_PARM_DESC(firmware_autostart, "Allow automatic firmware download on boot" 39 "(0=Disable, 1=Enable) (default=1); "); 40 41 static const struct reg_sequence cs35l41_hda_config[] = { 42 { CS35L41_PLL_CLK_CTRL, 0x00000430 }, // 3072000Hz, BCLK Input, PLL_REFCLK_EN = 1 43 { CS35L41_DSP_CLK_CTRL, 0x00000003 }, // DSP CLK EN 44 { CS35L41_GLOBAL_CLK_CTRL, 0x00000003 }, // GLOBAL_FS = 48 kHz 45 { CS35L41_SP_ENABLES, 0x00010000 }, // ASP_RX1_EN = 1 46 { CS35L41_SP_RATE_CTRL, 0x00000021 }, // ASP_BCLK_FREQ = 3.072 MHz 47 { CS35L41_SP_FORMAT, 0x20200200 }, // 32 bits RX/TX slots, I2S, clk consumer 48 { CS35L41_SP_HIZ_CTRL, 0x00000002 }, // Hi-Z unused 49 { CS35L41_SP_TX_WL, 0x00000018 }, // 24 cycles/slot 50 { CS35L41_SP_RX_WL, 0x00000018 }, // 24 cycles/slot 51 { CS35L41_DAC_PCM1_SRC, 0x00000008 }, // DACPCM1_SRC = ASPRX1 52 { CS35L41_ASP_TX1_SRC, 0x00000018 }, // ASPTX1 SRC = VMON 53 { CS35L41_ASP_TX2_SRC, 0x00000019 }, // ASPTX2 SRC = IMON 54 { CS35L41_ASP_TX3_SRC, 0x00000032 }, // ASPTX3 SRC = ERRVOL 55 { CS35L41_ASP_TX4_SRC, 0x00000033 }, // ASPTX4 SRC = CLASSH_TGT 56 { CS35L41_DSP1_RX1_SRC, 0x00000008 }, // DSP1RX1 SRC = ASPRX1 57 { CS35L41_DSP1_RX2_SRC, 0x00000009 }, // DSP1RX2 SRC = ASPRX2 58 { CS35L41_DSP1_RX3_SRC, 0x00000018 }, // DSP1RX3 SRC = VMON 59 { CS35L41_DSP1_RX4_SRC, 0x00000019 }, // DSP1RX4 SRC = IMON 60 { CS35L41_DSP1_RX5_SRC, 0x00000020 }, // DSP1RX5 SRC = ERRVOL 61 { CS35L41_AMP_DIG_VOL_CTRL, 0x00008000 }, // AMP_HPF_PCM_EN = 1, AMP_VOL_PCM 0.0 dB 62 { CS35L41_AMP_GAIN_CTRL, 0x00000084 }, // AMP_GAIN_PCM 4.5 dB 63 }; 64 65 static const struct reg_sequence cs35l41_hda_config_dsp[] = { 66 { CS35L41_PLL_CLK_CTRL, 0x00000430 }, // 3072000Hz, BCLK Input, PLL_REFCLK_EN = 1 67 { CS35L41_DSP_CLK_CTRL, 0x00000003 }, // DSP CLK EN 68 { CS35L41_GLOBAL_CLK_CTRL, 0x00000003 }, // GLOBAL_FS = 48 kHz 69 { CS35L41_SP_ENABLES, 0x00010001 }, // ASP_RX1_EN = 1, ASP_TX1_EN = 1 70 { CS35L41_SP_RATE_CTRL, 0x00000021 }, // ASP_BCLK_FREQ = 3.072 MHz 71 { CS35L41_SP_FORMAT, 0x20200200 }, // 32 bits RX/TX slots, I2S, clk consumer 72 { CS35L41_SP_HIZ_CTRL, 0x00000003 }, // Hi-Z unused/disabled 73 { CS35L41_SP_TX_WL, 0x00000018 }, // 24 cycles/slot 74 { CS35L41_SP_RX_WL, 0x00000018 }, // 24 cycles/slot 75 { CS35L41_DAC_PCM1_SRC, 0x00000032 }, // DACPCM1_SRC = ERR_VOL 76 { CS35L41_ASP_TX1_SRC, 0x00000018 }, // ASPTX1 SRC = VMON 77 { CS35L41_ASP_TX2_SRC, 0x00000019 }, // ASPTX2 SRC = IMON 78 { CS35L41_ASP_TX3_SRC, 0x00000028 }, // ASPTX3 SRC = VPMON 79 { CS35L41_ASP_TX4_SRC, 0x00000029 }, // ASPTX4 SRC = VBSTMON 80 { CS35L41_DSP1_RX1_SRC, 0x00000008 }, // DSP1RX1 SRC = ASPRX1 81 { CS35L41_DSP1_RX2_SRC, 0x00000008 }, // DSP1RX2 SRC = ASPRX1 82 { CS35L41_DSP1_RX3_SRC, 0x00000018 }, // DSP1RX3 SRC = VMON 83 { CS35L41_DSP1_RX4_SRC, 0x00000019 }, // DSP1RX4 SRC = IMON 84 { CS35L41_DSP1_RX5_SRC, 0x00000029 }, // DSP1RX5 SRC = VBSTMON 85 { CS35L41_AMP_DIG_VOL_CTRL, 0x00008000 }, // AMP_HPF_PCM_EN = 1, AMP_VOL_PCM 0.0 dB 86 { CS35L41_AMP_GAIN_CTRL, 0x00000233 }, // AMP_GAIN_PCM = 17.5dB AMP_GAIN_PDM = 19.5dB 87 }; 88 89 static const struct reg_sequence cs35l41_hda_mute[] = { 90 { CS35L41_AMP_GAIN_CTRL, 0x00000000 }, // AMP_GAIN_PCM 0.5 dB 91 { CS35L41_AMP_DIG_VOL_CTRL, 0x0000A678 }, // AMP_HPF_PCM_EN = 1, AMP_VOL_PCM Mute 92 }; 93 94 static void cs35l41_add_controls(struct cs35l41_hda *cs35l41) 95 { 96 struct hda_cs_dsp_ctl_info info; 97 98 info.device_name = cs35l41->amp_name; 99 info.fw_type = cs35l41->firmware_type; 100 info.card = cs35l41->codec->card; 101 102 hda_cs_dsp_add_controls(&cs35l41->cs_dsp, &info); 103 } 104 105 static const struct cs_dsp_client_ops client_ops = { 106 .control_remove = hda_cs_dsp_control_remove, 107 }; 108 109 static int cs35l41_request_firmware_file(struct cs35l41_hda *cs35l41, 110 const struct firmware **firmware, char **filename, 111 const char *dir, const char *ssid, const char *amp_name, 112 int spkid, const char *filetype) 113 { 114 const char * const dsp_name = cs35l41->cs_dsp.name; 115 char *s, c; 116 int ret = 0; 117 118 if (spkid > -1 && ssid && amp_name) 119 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s-spkid%d-%s.%s", dir, CS35L41_PART, 120 dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type], 121 ssid, spkid, amp_name, filetype); 122 else if (spkid > -1 && ssid) 123 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s-spkid%d.%s", dir, CS35L41_PART, 124 dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type], 125 ssid, spkid, filetype); 126 else if (ssid && amp_name) 127 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s-%s.%s", dir, CS35L41_PART, 128 dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type], 129 ssid, amp_name, filetype); 130 else if (ssid) 131 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s.%s", dir, CS35L41_PART, 132 dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type], 133 ssid, filetype); 134 else 135 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s.%s", dir, CS35L41_PART, 136 dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type], 137 filetype); 138 139 if (*filename == NULL) 140 return -ENOMEM; 141 142 /* 143 * Make sure that filename is lower-case and any non alpha-numeric 144 * characters except full stop and '/' are replaced with hyphens. 145 */ 146 s = *filename; 147 while (*s) { 148 c = *s; 149 if (isalnum(c)) 150 *s = tolower(c); 151 else if (c != '.' && c != '/') 152 *s = '-'; 153 s++; 154 } 155 156 ret = firmware_request_nowarn(firmware, *filename, cs35l41->dev); 157 if (ret != 0) { 158 dev_dbg(cs35l41->dev, "Failed to request '%s'\n", *filename); 159 kfree(*filename); 160 *filename = NULL; 161 } 162 163 return ret; 164 } 165 166 static int cs35l41_request_firmware_files_spkid(struct cs35l41_hda *cs35l41, 167 const struct firmware **wmfw_firmware, 168 char **wmfw_filename, 169 const struct firmware **coeff_firmware, 170 char **coeff_filename) 171 { 172 int ret; 173 174 /* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.wmfw */ 175 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 176 CS35L41_FIRMWARE_ROOT, 177 cs35l41->acpi_subsystem_id, cs35l41->amp_name, 178 cs35l41->speaker_id, "wmfw"); 179 if (!ret) { 180 /* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */ 181 return cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 182 CS35L41_FIRMWARE_ROOT, 183 cs35l41->acpi_subsystem_id, cs35l41->amp_name, 184 cs35l41->speaker_id, "bin"); 185 } 186 187 /* try cirrus/part-dspN-fwtype-sub<-ampname>.wmfw */ 188 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 189 CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id, 190 cs35l41->amp_name, -1, "wmfw"); 191 if (!ret) { 192 /* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */ 193 return cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 194 CS35L41_FIRMWARE_ROOT, 195 cs35l41->acpi_subsystem_id, cs35l41->amp_name, 196 cs35l41->speaker_id, "bin"); 197 } 198 199 /* try cirrus/part-dspN-fwtype-sub<-spkidN>.wmfw */ 200 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 201 CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id, 202 NULL, cs35l41->speaker_id, "wmfw"); 203 if (!ret) { 204 /* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */ 205 ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 206 CS35L41_FIRMWARE_ROOT, 207 cs35l41->acpi_subsystem_id, 208 cs35l41->amp_name, cs35l41->speaker_id, "bin"); 209 if (ret) 210 /* try cirrus/part-dspN-fwtype-sub<-spkidN>.bin */ 211 return cs35l41_request_firmware_file(cs35l41, coeff_firmware, 212 coeff_filename, CS35L41_FIRMWARE_ROOT, 213 cs35l41->acpi_subsystem_id, NULL, 214 cs35l41->speaker_id, "bin"); 215 } 216 217 /* try cirrus/part-dspN-fwtype-sub.wmfw */ 218 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 219 CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id, 220 NULL, -1, "wmfw"); 221 if (!ret) { 222 /* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */ 223 ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 224 CS35L41_FIRMWARE_ROOT, 225 cs35l41->acpi_subsystem_id, cs35l41->amp_name, 226 cs35l41->speaker_id, "bin"); 227 if (ret) 228 /* try cirrus/part-dspN-fwtype-sub<-spkidN>.bin */ 229 return cs35l41_request_firmware_file(cs35l41, coeff_firmware, 230 coeff_filename, CS35L41_FIRMWARE_ROOT, 231 cs35l41->acpi_subsystem_id, NULL, 232 cs35l41->speaker_id, "bin"); 233 } 234 235 return ret; 236 } 237 238 static int cs35l41_request_firmware_files(struct cs35l41_hda *cs35l41, 239 const struct firmware **wmfw_firmware, 240 char **wmfw_filename, 241 const struct firmware **coeff_firmware, 242 char **coeff_filename) 243 { 244 int ret; 245 246 if (cs35l41->speaker_id > -1) { 247 ret = cs35l41_request_firmware_files_spkid(cs35l41, wmfw_firmware, wmfw_filename, 248 coeff_firmware, coeff_filename); 249 goto out; 250 251 } 252 253 /* try cirrus/part-dspN-fwtype-sub<-ampname>.wmfw */ 254 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 255 CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id, 256 cs35l41->amp_name, -1, "wmfw"); 257 if (!ret) { 258 /* try cirrus/part-dspN-fwtype-sub<-ampname>.bin */ 259 ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 260 CS35L41_FIRMWARE_ROOT, 261 cs35l41->acpi_subsystem_id, cs35l41->amp_name, 262 -1, "bin"); 263 goto out; 264 } 265 266 /* try cirrus/part-dspN-fwtype-sub.wmfw */ 267 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 268 CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id, 269 NULL, -1, "wmfw"); 270 if (!ret) { 271 /* try cirrus/part-dspN-fwtype-sub<-ampname>.bin */ 272 ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 273 CS35L41_FIRMWARE_ROOT, 274 cs35l41->acpi_subsystem_id, 275 cs35l41->amp_name, -1, "bin"); 276 if (ret) 277 /* try cirrus/part-dspN-fwtype-sub.bin */ 278 ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 279 CS35L41_FIRMWARE_ROOT, 280 cs35l41->acpi_subsystem_id, NULL, -1, 281 "bin"); 282 } 283 284 out: 285 if (!ret) 286 return 0; 287 288 /* Handle fallback */ 289 dev_warn(cs35l41->dev, "Falling back to default firmware.\n"); 290 291 release_firmware(*wmfw_firmware); 292 kfree(*wmfw_filename); 293 294 /* fallback try cirrus/part-dspN-fwtype.wmfw */ 295 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 296 CS35L41_FIRMWARE_ROOT, NULL, NULL, -1, "wmfw"); 297 if (!ret) 298 /* fallback try cirrus/part-dspN-fwtype.bin */ 299 ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 300 CS35L41_FIRMWARE_ROOT, NULL, NULL, -1, "bin"); 301 302 if (ret) { 303 release_firmware(*wmfw_firmware); 304 kfree(*wmfw_filename); 305 dev_warn(cs35l41->dev, "Unable to find firmware and tuning\n"); 306 } 307 return ret; 308 } 309 310 #if IS_ENABLED(CONFIG_EFI) 311 static int cs35l41_apply_calibration(struct cs35l41_hda *cs35l41, unsigned int ambient, 312 unsigned int r0, unsigned int status, unsigned int checksum) 313 { 314 int ret; 315 316 ret = hda_cs_dsp_write_ctl(&cs35l41->cs_dsp, CAL_AMBIENT_DSP_CTL_NAME, CAL_DSP_CTL_TYPE, 317 CAL_DSP_CTL_ALG, &ambient, 4); 318 if (ret) { 319 dev_err(cs35l41->dev, "Cannot Write Control: %s - %d\n", CAL_AMBIENT_DSP_CTL_NAME, 320 ret); 321 return ret; 322 } 323 ret = hda_cs_dsp_write_ctl(&cs35l41->cs_dsp, CAL_R_DSP_CTL_NAME, CAL_DSP_CTL_TYPE, 324 CAL_DSP_CTL_ALG, &r0, 4); 325 if (ret) { 326 dev_err(cs35l41->dev, "Cannot Write Control: %s - %d\n", CAL_R_DSP_CTL_NAME, ret); 327 return ret; 328 } 329 ret = hda_cs_dsp_write_ctl(&cs35l41->cs_dsp, CAL_STATUS_DSP_CTL_NAME, CAL_DSP_CTL_TYPE, 330 CAL_DSP_CTL_ALG, &status, 4); 331 if (ret) { 332 dev_err(cs35l41->dev, "Cannot Write Control: %s - %d\n", CAL_STATUS_DSP_CTL_NAME, 333 ret); 334 return ret; 335 } 336 ret = hda_cs_dsp_write_ctl(&cs35l41->cs_dsp, CAL_CHECKSUM_DSP_CTL_NAME, CAL_DSP_CTL_TYPE, 337 CAL_DSP_CTL_ALG, &checksum, 4); 338 if (ret) { 339 dev_err(cs35l41->dev, "Cannot Write Control: %s - %d\n", CAL_CHECKSUM_DSP_CTL_NAME, 340 ret); 341 return ret; 342 } 343 344 return 0; 345 } 346 347 static int cs35l41_save_calibration(struct cs35l41_hda *cs35l41) 348 { 349 static efi_guid_t efi_guid = EFI_GUID(0x02f9af02, 0x7734, 0x4233, 0xb4, 0x3d, 0x93, 0xfe, 350 0x5a, 0xa3, 0x5d, 0xb3); 351 static efi_char16_t efi_name[] = L"CirrusSmartAmpCalibrationData"; 352 const struct cs35l41_amp_efi_data *efi_data; 353 const struct cs35l41_amp_cal_data *cl; 354 unsigned long data_size = 0; 355 efi_status_t status; 356 int ret = 0; 357 u8 *data = NULL; 358 u32 attr; 359 360 /* Get real size of UEFI variable */ 361 status = efi.get_variable(efi_name, &efi_guid, &attr, &data_size, data); 362 if (status == EFI_BUFFER_TOO_SMALL) { 363 ret = -ENODEV; 364 /* Allocate data buffer of data_size bytes */ 365 data = vmalloc(data_size); 366 if (!data) 367 return -ENOMEM; 368 /* Get variable contents into buffer */ 369 status = efi.get_variable(efi_name, &efi_guid, &attr, &data_size, data); 370 if (status == EFI_SUCCESS) { 371 efi_data = (struct cs35l41_amp_efi_data *)data; 372 dev_dbg(cs35l41->dev, "Calibration: Size=%d, Amp Count=%d\n", 373 efi_data->size, efi_data->count); 374 if (efi_data->count > cs35l41->index) { 375 cl = &efi_data->data[cs35l41->index]; 376 dev_dbg(cs35l41->dev, 377 "Calibration: Ambient=%02x, Status=%02x, R0=%d\n", 378 cl->calAmbient, cl->calStatus, cl->calR); 379 380 /* Calibration can only be applied whilst the DSP is not running */ 381 ret = cs35l41_apply_calibration(cs35l41, 382 cpu_to_be32(cl->calAmbient), 383 cpu_to_be32(cl->calR), 384 cpu_to_be32(cl->calStatus), 385 cpu_to_be32(cl->calR + 1)); 386 } 387 } 388 vfree(data); 389 } 390 return ret; 391 } 392 #else 393 static int cs35l41_save_calibration(struct cs35l41_hda *cs35l41) 394 { 395 dev_warn(cs35l41->dev, "Calibration not supported without EFI support.\n"); 396 return 0; 397 } 398 #endif 399 400 static int cs35l41_init_dsp(struct cs35l41_hda *cs35l41) 401 { 402 const struct firmware *coeff_firmware = NULL; 403 const struct firmware *wmfw_firmware = NULL; 404 struct cs_dsp *dsp = &cs35l41->cs_dsp; 405 char *coeff_filename = NULL; 406 char *wmfw_filename = NULL; 407 int ret; 408 409 if (!cs35l41->halo_initialized) { 410 cs35l41_configure_cs_dsp(cs35l41->dev, cs35l41->regmap, dsp); 411 dsp->client_ops = &client_ops; 412 413 ret = cs_dsp_halo_init(&cs35l41->cs_dsp); 414 if (ret) 415 return ret; 416 cs35l41->halo_initialized = true; 417 } 418 419 ret = cs35l41_request_firmware_files(cs35l41, &wmfw_firmware, &wmfw_filename, 420 &coeff_firmware, &coeff_filename); 421 if (ret < 0) 422 return ret; 423 424 dev_dbg(cs35l41->dev, "Loading WMFW Firmware: %s\n", wmfw_filename); 425 if (coeff_filename) 426 dev_dbg(cs35l41->dev, "Loading Coefficient File: %s\n", coeff_filename); 427 else 428 dev_warn(cs35l41->dev, "No Coefficient File available.\n"); 429 430 ret = cs_dsp_power_up(dsp, wmfw_firmware, wmfw_filename, coeff_firmware, coeff_filename, 431 hda_cs_dsp_fw_ids[cs35l41->firmware_type]); 432 if (ret) 433 goto err_release; 434 435 cs35l41_add_controls(cs35l41); 436 437 ret = cs35l41_save_calibration(cs35l41); 438 439 err_release: 440 release_firmware(wmfw_firmware); 441 release_firmware(coeff_firmware); 442 kfree(wmfw_filename); 443 kfree(coeff_filename); 444 445 return ret; 446 } 447 448 static void cs35l41_shutdown_dsp(struct cs35l41_hda *cs35l41) 449 { 450 struct cs_dsp *dsp = &cs35l41->cs_dsp; 451 452 cs_dsp_stop(dsp); 453 cs_dsp_power_down(dsp); 454 cs35l41->firmware_running = false; 455 dev_dbg(cs35l41->dev, "Unloaded Firmware\n"); 456 } 457 458 static void cs35l41_remove_dsp(struct cs35l41_hda *cs35l41) 459 { 460 struct cs_dsp *dsp = &cs35l41->cs_dsp; 461 462 cancel_work_sync(&cs35l41->fw_load_work); 463 464 mutex_lock(&cs35l41->fw_mutex); 465 cs35l41_shutdown_dsp(cs35l41); 466 cs_dsp_remove(dsp); 467 cs35l41->halo_initialized = false; 468 mutex_unlock(&cs35l41->fw_mutex); 469 } 470 471 /* Protection release cycle to get the speaker out of Safe-Mode */ 472 static void cs35l41_error_release(struct device *dev, struct regmap *regmap, unsigned int mask) 473 { 474 regmap_write(regmap, CS35L41_PROTECT_REL_ERR_IGN, 0); 475 regmap_set_bits(regmap, CS35L41_PROTECT_REL_ERR_IGN, mask); 476 regmap_clear_bits(regmap, CS35L41_PROTECT_REL_ERR_IGN, mask); 477 } 478 479 /* Clear all errors to release safe mode. Global Enable must be cleared first. */ 480 static void cs35l41_irq_release(struct cs35l41_hda *cs35l41) 481 { 482 cs35l41_error_release(cs35l41->dev, cs35l41->regmap, cs35l41->irq_errors); 483 cs35l41->irq_errors = 0; 484 } 485 486 static void cs35l41_hda_playback_hook(struct device *dev, int action) 487 { 488 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 489 struct regmap *reg = cs35l41->regmap; 490 int ret = 0; 491 492 switch (action) { 493 case HDA_GEN_PCM_ACT_OPEN: 494 pm_runtime_get_sync(dev); 495 mutex_lock(&cs35l41->fw_mutex); 496 cs35l41->playback_started = true; 497 if (cs35l41->firmware_running) { 498 regmap_multi_reg_write(reg, cs35l41_hda_config_dsp, 499 ARRAY_SIZE(cs35l41_hda_config_dsp)); 500 regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, 501 CS35L41_VMON_EN_MASK | CS35L41_IMON_EN_MASK, 502 1 << CS35L41_VMON_EN_SHIFT | 1 << CS35L41_IMON_EN_SHIFT); 503 cs35l41_set_cspl_mbox_cmd(cs35l41->dev, cs35l41->regmap, 504 CSPL_MBOX_CMD_RESUME); 505 } else { 506 regmap_multi_reg_write(reg, cs35l41_hda_config, 507 ARRAY_SIZE(cs35l41_hda_config)); 508 } 509 ret = regmap_update_bits(reg, CS35L41_PWR_CTRL2, 510 CS35L41_AMP_EN_MASK, 1 << CS35L41_AMP_EN_SHIFT); 511 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) 512 regmap_write(reg, CS35L41_GPIO1_CTRL1, 0x00008001); 513 mutex_unlock(&cs35l41->fw_mutex); 514 break; 515 case HDA_GEN_PCM_ACT_PREPARE: 516 mutex_lock(&cs35l41->fw_mutex); 517 ret = cs35l41_global_enable(reg, cs35l41->hw_cfg.bst_type, 1, NULL); 518 mutex_unlock(&cs35l41->fw_mutex); 519 break; 520 case HDA_GEN_PCM_ACT_CLEANUP: 521 mutex_lock(&cs35l41->fw_mutex); 522 regmap_multi_reg_write(reg, cs35l41_hda_mute, ARRAY_SIZE(cs35l41_hda_mute)); 523 ret = cs35l41_global_enable(reg, cs35l41->hw_cfg.bst_type, 0, NULL); 524 mutex_unlock(&cs35l41->fw_mutex); 525 break; 526 case HDA_GEN_PCM_ACT_CLOSE: 527 mutex_lock(&cs35l41->fw_mutex); 528 ret = regmap_update_bits(reg, CS35L41_PWR_CTRL2, 529 CS35L41_AMP_EN_MASK, 0 << CS35L41_AMP_EN_SHIFT); 530 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) 531 regmap_write(reg, CS35L41_GPIO1_CTRL1, 0x00000001); 532 if (cs35l41->firmware_running) { 533 cs35l41_set_cspl_mbox_cmd(cs35l41->dev, cs35l41->regmap, 534 CSPL_MBOX_CMD_PAUSE); 535 regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, 536 CS35L41_VMON_EN_MASK | CS35L41_IMON_EN_MASK, 537 0 << CS35L41_VMON_EN_SHIFT | 0 << CS35L41_IMON_EN_SHIFT); 538 } 539 cs35l41_irq_release(cs35l41); 540 cs35l41->playback_started = false; 541 mutex_unlock(&cs35l41->fw_mutex); 542 543 pm_runtime_mark_last_busy(dev); 544 pm_runtime_put_autosuspend(dev); 545 break; 546 default: 547 dev_warn(cs35l41->dev, "Playback action not supported: %d\n", action); 548 break; 549 } 550 551 if (ret) 552 dev_err(cs35l41->dev, "Regmap access fail: %d\n", ret); 553 } 554 555 static int cs35l41_hda_channel_map(struct device *dev, unsigned int tx_num, unsigned int *tx_slot, 556 unsigned int rx_num, unsigned int *rx_slot) 557 { 558 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 559 static const char * const channel_name[] = { "L", "R" }; 560 561 if (!cs35l41->amp_name) { 562 if (*rx_slot >= ARRAY_SIZE(channel_name)) 563 return -EINVAL; 564 565 cs35l41->amp_name = devm_kasprintf(cs35l41->dev, GFP_KERNEL, "%s%d", 566 channel_name[*rx_slot], cs35l41->channel_index); 567 if (!cs35l41->amp_name) 568 return -ENOMEM; 569 } 570 571 return cs35l41_set_channels(cs35l41->dev, cs35l41->regmap, tx_num, tx_slot, rx_num, 572 rx_slot); 573 } 574 575 static void cs35l41_ready_for_reset(struct cs35l41_hda *cs35l41) 576 { 577 mutex_lock(&cs35l41->fw_mutex); 578 if (cs35l41->firmware_running) { 579 580 regcache_cache_only(cs35l41->regmap, false); 581 582 cs35l41_exit_hibernate(cs35l41->dev, cs35l41->regmap); 583 cs35l41_shutdown_dsp(cs35l41); 584 cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type); 585 586 regcache_cache_only(cs35l41->regmap, true); 587 regcache_mark_dirty(cs35l41->regmap); 588 } 589 mutex_unlock(&cs35l41->fw_mutex); 590 } 591 592 static int cs35l41_system_suspend(struct device *dev) 593 { 594 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 595 int ret; 596 597 dev_dbg(cs35l41->dev, "System Suspend\n"); 598 599 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) { 600 dev_err_once(cs35l41->dev, "System Suspend not supported\n"); 601 return 0; /* don't block the whole system suspend */ 602 } 603 604 ret = pm_runtime_force_suspend(dev); 605 if (ret) 606 return ret; 607 608 /* Shutdown DSP before system suspend */ 609 cs35l41_ready_for_reset(cs35l41); 610 611 /* 612 * Reset GPIO may be shared, so cannot reset here. 613 * However beyond this point, amps may be powered down. 614 */ 615 return 0; 616 } 617 618 static int cs35l41_system_resume(struct device *dev) 619 { 620 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 621 int ret; 622 623 dev_dbg(cs35l41->dev, "System Resume\n"); 624 625 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) { 626 dev_err_once(cs35l41->dev, "System Resume not supported\n"); 627 return 0; /* don't block the whole system resume */ 628 } 629 630 if (cs35l41->reset_gpio) { 631 usleep_range(2000, 2100); 632 gpiod_set_value_cansleep(cs35l41->reset_gpio, 1); 633 } 634 635 usleep_range(2000, 2100); 636 637 ret = pm_runtime_force_resume(dev); 638 639 mutex_lock(&cs35l41->fw_mutex); 640 if (!ret && cs35l41->request_fw_load && !cs35l41->fw_request_ongoing) { 641 cs35l41->fw_request_ongoing = true; 642 schedule_work(&cs35l41->fw_load_work); 643 } 644 mutex_unlock(&cs35l41->fw_mutex); 645 646 return ret; 647 } 648 649 static int cs35l41_runtime_idle(struct device *dev) 650 { 651 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 652 653 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) 654 return -EBUSY; /* suspend not supported yet on this model */ 655 return 0; 656 } 657 658 static int cs35l41_runtime_suspend(struct device *dev) 659 { 660 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 661 int ret = 0; 662 663 dev_dbg(cs35l41->dev, "Runtime Suspend\n"); 664 665 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) { 666 dev_dbg(cs35l41->dev, "Runtime Suspend not supported\n"); 667 return 0; 668 } 669 670 mutex_lock(&cs35l41->fw_mutex); 671 672 if (cs35l41->playback_started) { 673 regmap_multi_reg_write(cs35l41->regmap, cs35l41_hda_mute, 674 ARRAY_SIZE(cs35l41_hda_mute)); 675 cs35l41_global_enable(cs35l41->regmap, cs35l41->hw_cfg.bst_type, 0, NULL); 676 regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, 677 CS35L41_AMP_EN_MASK, 0 << CS35L41_AMP_EN_SHIFT); 678 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) 679 regmap_write(cs35l41->regmap, CS35L41_GPIO1_CTRL1, 0x00000001); 680 regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, 681 CS35L41_VMON_EN_MASK | CS35L41_IMON_EN_MASK, 682 0 << CS35L41_VMON_EN_SHIFT | 0 << CS35L41_IMON_EN_SHIFT); 683 cs35l41->playback_started = false; 684 } 685 686 if (cs35l41->firmware_running) { 687 ret = cs35l41_enter_hibernate(cs35l41->dev, cs35l41->regmap, 688 cs35l41->hw_cfg.bst_type); 689 if (ret) 690 goto err; 691 } else { 692 cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type); 693 } 694 695 regcache_cache_only(cs35l41->regmap, true); 696 regcache_mark_dirty(cs35l41->regmap); 697 698 err: 699 mutex_unlock(&cs35l41->fw_mutex); 700 701 return ret; 702 } 703 704 static int cs35l41_runtime_resume(struct device *dev) 705 { 706 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 707 int ret = 0; 708 709 dev_dbg(cs35l41->dev, "Runtime Resume\n"); 710 711 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) { 712 dev_dbg(cs35l41->dev, "Runtime Resume not supported\n"); 713 return 0; 714 } 715 716 mutex_lock(&cs35l41->fw_mutex); 717 718 regcache_cache_only(cs35l41->regmap, false); 719 720 if (cs35l41->firmware_running) { 721 ret = cs35l41_exit_hibernate(cs35l41->dev, cs35l41->regmap); 722 if (ret) { 723 dev_warn(cs35l41->dev, "Unable to exit Hibernate."); 724 goto err; 725 } 726 } 727 728 /* Test key needs to be unlocked to allow the OTP settings to re-apply */ 729 cs35l41_test_key_unlock(cs35l41->dev, cs35l41->regmap); 730 ret = regcache_sync(cs35l41->regmap); 731 cs35l41_test_key_lock(cs35l41->dev, cs35l41->regmap); 732 if (ret) { 733 dev_err(cs35l41->dev, "Failed to restore register cache: %d\n", ret); 734 goto err; 735 } 736 737 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) 738 cs35l41_init_boost(cs35l41->dev, cs35l41->regmap, &cs35l41->hw_cfg); 739 740 err: 741 mutex_unlock(&cs35l41->fw_mutex); 742 743 return ret; 744 } 745 746 static int cs35l41_smart_amp(struct cs35l41_hda *cs35l41) 747 { 748 int halo_sts; 749 int ret; 750 751 ret = cs35l41_init_dsp(cs35l41); 752 if (ret) { 753 dev_warn(cs35l41->dev, "Cannot Initialize Firmware. Error: %d\n", ret); 754 goto clean_dsp; 755 } 756 757 ret = cs35l41_write_fs_errata(cs35l41->dev, cs35l41->regmap); 758 if (ret) { 759 dev_err(cs35l41->dev, "Cannot Write FS Errata: %d\n", ret); 760 goto clean_dsp; 761 } 762 763 ret = cs_dsp_run(&cs35l41->cs_dsp); 764 if (ret) { 765 dev_err(cs35l41->dev, "Fail to start dsp: %d\n", ret); 766 goto clean_dsp; 767 } 768 769 ret = read_poll_timeout(hda_cs_dsp_read_ctl, ret, 770 be32_to_cpu(halo_sts) == HALO_STATE_CODE_RUN, 771 1000, 15000, false, &cs35l41->cs_dsp, HALO_STATE_DSP_CTL_NAME, 772 HALO_STATE_DSP_CTL_TYPE, HALO_STATE_DSP_CTL_ALG, 773 &halo_sts, sizeof(halo_sts)); 774 775 if (ret) { 776 dev_err(cs35l41->dev, "Timeout waiting for HALO Core to start. State: %d\n", 777 halo_sts); 778 goto clean_dsp; 779 } 780 781 cs35l41_set_cspl_mbox_cmd(cs35l41->dev, cs35l41->regmap, CSPL_MBOX_CMD_PAUSE); 782 cs35l41->firmware_running = true; 783 784 return 0; 785 786 clean_dsp: 787 cs35l41_shutdown_dsp(cs35l41); 788 return ret; 789 } 790 791 static void cs35l41_load_firmware(struct cs35l41_hda *cs35l41, bool load) 792 { 793 if (cs35l41->firmware_running && !load) { 794 dev_dbg(cs35l41->dev, "Unloading Firmware\n"); 795 cs35l41_shutdown_dsp(cs35l41); 796 } else if (!cs35l41->firmware_running && load) { 797 dev_dbg(cs35l41->dev, "Loading Firmware\n"); 798 cs35l41_smart_amp(cs35l41); 799 } else { 800 dev_dbg(cs35l41->dev, "Unable to Load firmware.\n"); 801 } 802 } 803 804 static int cs35l41_fw_load_ctl_get(struct snd_kcontrol *kcontrol, 805 struct snd_ctl_elem_value *ucontrol) 806 { 807 struct cs35l41_hda *cs35l41 = snd_kcontrol_chip(kcontrol); 808 809 ucontrol->value.integer.value[0] = cs35l41->request_fw_load; 810 return 0; 811 } 812 813 static void cs35l41_fw_load_work(struct work_struct *work) 814 { 815 struct cs35l41_hda *cs35l41 = container_of(work, struct cs35l41_hda, fw_load_work); 816 817 pm_runtime_get_sync(cs35l41->dev); 818 819 mutex_lock(&cs35l41->fw_mutex); 820 821 /* Recheck if playback is ongoing, mutex will block playback during firmware loading */ 822 if (cs35l41->playback_started) 823 dev_err(cs35l41->dev, "Cannot Load/Unload firmware during Playback. Retrying...\n"); 824 else 825 cs35l41_load_firmware(cs35l41, cs35l41->request_fw_load); 826 827 cs35l41->fw_request_ongoing = false; 828 mutex_unlock(&cs35l41->fw_mutex); 829 830 pm_runtime_mark_last_busy(cs35l41->dev); 831 pm_runtime_put_autosuspend(cs35l41->dev); 832 } 833 834 static int cs35l41_fw_load_ctl_put(struct snd_kcontrol *kcontrol, 835 struct snd_ctl_elem_value *ucontrol) 836 { 837 struct cs35l41_hda *cs35l41 = snd_kcontrol_chip(kcontrol); 838 unsigned int ret = 0; 839 840 mutex_lock(&cs35l41->fw_mutex); 841 842 if (cs35l41->request_fw_load == ucontrol->value.integer.value[0]) 843 goto err; 844 845 if (cs35l41->fw_request_ongoing) { 846 dev_dbg(cs35l41->dev, "Existing request not complete\n"); 847 ret = -EBUSY; 848 goto err; 849 } 850 851 /* Check if playback is ongoing when initial request is made */ 852 if (cs35l41->playback_started) { 853 dev_err(cs35l41->dev, "Cannot Load/Unload firmware during Playback\n"); 854 ret = -EBUSY; 855 goto err; 856 } 857 858 cs35l41->fw_request_ongoing = true; 859 cs35l41->request_fw_load = ucontrol->value.integer.value[0]; 860 schedule_work(&cs35l41->fw_load_work); 861 862 err: 863 mutex_unlock(&cs35l41->fw_mutex); 864 865 return ret; 866 } 867 868 static int cs35l41_fw_type_ctl_get(struct snd_kcontrol *kcontrol, 869 struct snd_ctl_elem_value *ucontrol) 870 { 871 struct cs35l41_hda *cs35l41 = snd_kcontrol_chip(kcontrol); 872 873 ucontrol->value.enumerated.item[0] = cs35l41->firmware_type; 874 875 return 0; 876 } 877 878 static int cs35l41_fw_type_ctl_put(struct snd_kcontrol *kcontrol, 879 struct snd_ctl_elem_value *ucontrol) 880 { 881 struct cs35l41_hda *cs35l41 = snd_kcontrol_chip(kcontrol); 882 883 if (ucontrol->value.enumerated.item[0] < HDA_CS_DSP_NUM_FW) { 884 cs35l41->firmware_type = ucontrol->value.enumerated.item[0]; 885 return 0; 886 } 887 888 return -EINVAL; 889 } 890 891 static int cs35l41_fw_type_ctl_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 892 { 893 return snd_ctl_enum_info(uinfo, 1, ARRAY_SIZE(hda_cs_dsp_fw_ids), hda_cs_dsp_fw_ids); 894 } 895 896 static int cs35l41_create_controls(struct cs35l41_hda *cs35l41) 897 { 898 char fw_type_ctl_name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; 899 char fw_load_ctl_name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; 900 struct snd_kcontrol_new fw_type_ctl = { 901 .name = fw_type_ctl_name, 902 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 903 .info = cs35l41_fw_type_ctl_info, 904 .get = cs35l41_fw_type_ctl_get, 905 .put = cs35l41_fw_type_ctl_put, 906 }; 907 struct snd_kcontrol_new fw_load_ctl = { 908 .name = fw_load_ctl_name, 909 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 910 .info = snd_ctl_boolean_mono_info, 911 .get = cs35l41_fw_load_ctl_get, 912 .put = cs35l41_fw_load_ctl_put, 913 }; 914 int ret; 915 916 scnprintf(fw_type_ctl_name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "%s DSP1 Firmware Type", 917 cs35l41->amp_name); 918 scnprintf(fw_load_ctl_name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "%s DSP1 Firmware Load", 919 cs35l41->amp_name); 920 921 ret = snd_ctl_add(cs35l41->codec->card, snd_ctl_new1(&fw_type_ctl, cs35l41)); 922 if (ret) { 923 dev_err(cs35l41->dev, "Failed to add KControl %s = %d\n", fw_type_ctl.name, ret); 924 return ret; 925 } 926 927 dev_dbg(cs35l41->dev, "Added Control %s\n", fw_type_ctl.name); 928 929 ret = snd_ctl_add(cs35l41->codec->card, snd_ctl_new1(&fw_load_ctl, cs35l41)); 930 if (ret) { 931 dev_err(cs35l41->dev, "Failed to add KControl %s = %d\n", fw_load_ctl.name, ret); 932 return ret; 933 } 934 935 dev_dbg(cs35l41->dev, "Added Control %s\n", fw_load_ctl.name); 936 937 return 0; 938 } 939 940 static int cs35l41_hda_bind(struct device *dev, struct device *master, void *master_data) 941 { 942 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 943 struct hda_component *comps = master_data; 944 int ret = 0; 945 946 if (!comps || cs35l41->index < 0 || cs35l41->index >= HDA_MAX_COMPONENTS) 947 return -EINVAL; 948 949 comps = &comps[cs35l41->index]; 950 if (comps->dev) 951 return -EBUSY; 952 953 pm_runtime_get_sync(dev); 954 955 mutex_lock(&cs35l41->fw_mutex); 956 957 comps->dev = dev; 958 if (!cs35l41->acpi_subsystem_id) 959 cs35l41->acpi_subsystem_id = kasprintf(GFP_KERNEL, "%.8x", 960 comps->codec->core.subsystem_id); 961 cs35l41->codec = comps->codec; 962 strscpy(comps->name, dev_name(dev), sizeof(comps->name)); 963 964 cs35l41->firmware_type = HDA_CS_DSP_FW_SPK_PROT; 965 966 if (firmware_autostart) { 967 dev_dbg(cs35l41->dev, "Firmware Autostart.\n"); 968 cs35l41->request_fw_load = true; 969 if (cs35l41_smart_amp(cs35l41) < 0) 970 dev_warn(cs35l41->dev, "Cannot Run Firmware, reverting to dsp bypass...\n"); 971 } else { 972 dev_dbg(cs35l41->dev, "Firmware Autostart is disabled.\n"); 973 } 974 975 ret = cs35l41_create_controls(cs35l41); 976 977 comps->playback_hook = cs35l41_hda_playback_hook; 978 979 mutex_unlock(&cs35l41->fw_mutex); 980 981 pm_runtime_mark_last_busy(dev); 982 pm_runtime_put_autosuspend(dev); 983 984 return ret; 985 } 986 987 static void cs35l41_hda_unbind(struct device *dev, struct device *master, void *master_data) 988 { 989 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 990 struct hda_component *comps = master_data; 991 992 if (comps[cs35l41->index].dev == dev) 993 memset(&comps[cs35l41->index], 0, sizeof(*comps)); 994 } 995 996 static const struct component_ops cs35l41_hda_comp_ops = { 997 .bind = cs35l41_hda_bind, 998 .unbind = cs35l41_hda_unbind, 999 }; 1000 1001 static irqreturn_t cs35l41_bst_short_err(int irq, void *data) 1002 { 1003 struct cs35l41_hda *cs35l41 = data; 1004 1005 dev_crit_ratelimited(cs35l41->dev, "LBST Error\n"); 1006 set_bit(CS35L41_BST_SHORT_ERR_RLS_SHIFT, &cs35l41->irq_errors); 1007 1008 return IRQ_HANDLED; 1009 } 1010 1011 static irqreturn_t cs35l41_bst_dcm_uvp_err(int irq, void *data) 1012 { 1013 struct cs35l41_hda *cs35l41 = data; 1014 1015 dev_crit_ratelimited(cs35l41->dev, "DCM VBST Under Voltage Error\n"); 1016 set_bit(CS35L41_BST_UVP_ERR_RLS_SHIFT, &cs35l41->irq_errors); 1017 1018 return IRQ_HANDLED; 1019 } 1020 1021 static irqreturn_t cs35l41_bst_ovp_err(int irq, void *data) 1022 { 1023 struct cs35l41_hda *cs35l41 = data; 1024 1025 dev_crit_ratelimited(cs35l41->dev, "VBST Over Voltage error\n"); 1026 set_bit(CS35L41_BST_OVP_ERR_RLS_SHIFT, &cs35l41->irq_errors); 1027 1028 return IRQ_HANDLED; 1029 } 1030 1031 static irqreturn_t cs35l41_temp_err(int irq, void *data) 1032 { 1033 struct cs35l41_hda *cs35l41 = data; 1034 1035 dev_crit_ratelimited(cs35l41->dev, "Over temperature error\n"); 1036 set_bit(CS35L41_TEMP_ERR_RLS_SHIFT, &cs35l41->irq_errors); 1037 1038 return IRQ_HANDLED; 1039 } 1040 1041 static irqreturn_t cs35l41_temp_warn(int irq, void *data) 1042 { 1043 struct cs35l41_hda *cs35l41 = data; 1044 1045 dev_crit_ratelimited(cs35l41->dev, "Over temperature warning\n"); 1046 set_bit(CS35L41_TEMP_WARN_ERR_RLS_SHIFT, &cs35l41->irq_errors); 1047 1048 return IRQ_HANDLED; 1049 } 1050 1051 static irqreturn_t cs35l41_amp_short(int irq, void *data) 1052 { 1053 struct cs35l41_hda *cs35l41 = data; 1054 1055 dev_crit_ratelimited(cs35l41->dev, "Amp short error\n"); 1056 set_bit(CS35L41_AMP_SHORT_ERR_RLS_SHIFT, &cs35l41->irq_errors); 1057 1058 return IRQ_HANDLED; 1059 } 1060 1061 static const struct cs35l41_irq cs35l41_irqs[] = { 1062 CS35L41_IRQ(BST_OVP_ERR, "Boost Overvoltage Error", cs35l41_bst_ovp_err), 1063 CS35L41_IRQ(BST_DCM_UVP_ERR, "Boost Undervoltage Error", cs35l41_bst_dcm_uvp_err), 1064 CS35L41_IRQ(BST_SHORT_ERR, "Boost Inductor Short Error", cs35l41_bst_short_err), 1065 CS35L41_IRQ(TEMP_WARN, "Temperature Warning", cs35l41_temp_warn), 1066 CS35L41_IRQ(TEMP_ERR, "Temperature Error", cs35l41_temp_err), 1067 CS35L41_IRQ(AMP_SHORT_ERR, "Amp Short", cs35l41_amp_short), 1068 }; 1069 1070 static const struct regmap_irq cs35l41_reg_irqs[] = { 1071 CS35L41_REG_IRQ(IRQ1_STATUS1, BST_OVP_ERR), 1072 CS35L41_REG_IRQ(IRQ1_STATUS1, BST_DCM_UVP_ERR), 1073 CS35L41_REG_IRQ(IRQ1_STATUS1, BST_SHORT_ERR), 1074 CS35L41_REG_IRQ(IRQ1_STATUS1, TEMP_WARN), 1075 CS35L41_REG_IRQ(IRQ1_STATUS1, TEMP_ERR), 1076 CS35L41_REG_IRQ(IRQ1_STATUS1, AMP_SHORT_ERR), 1077 }; 1078 1079 static struct regmap_irq_chip cs35l41_regmap_irq_chip = { 1080 .name = "cs35l41 IRQ1 Controller", 1081 .status_base = CS35L41_IRQ1_STATUS1, 1082 .mask_base = CS35L41_IRQ1_MASK1, 1083 .ack_base = CS35L41_IRQ1_STATUS1, 1084 .num_regs = 4, 1085 .irqs = cs35l41_reg_irqs, 1086 .num_irqs = ARRAY_SIZE(cs35l41_reg_irqs), 1087 .runtime_pm = true, 1088 }; 1089 1090 static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41) 1091 { 1092 struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg; 1093 bool using_irq = false; 1094 int irq, irq_pol; 1095 int ret; 1096 int i; 1097 1098 if (!cs35l41->hw_cfg.valid) 1099 return -EINVAL; 1100 1101 ret = cs35l41_init_boost(cs35l41->dev, cs35l41->regmap, hw_cfg); 1102 if (ret) 1103 return ret; 1104 1105 if (hw_cfg->gpio1.valid) { 1106 switch (hw_cfg->gpio1.func) { 1107 case CS35L41_NOT_USED: 1108 break; 1109 case CS35l41_VSPK_SWITCH: 1110 hw_cfg->gpio1.func = CS35L41_GPIO1_GPIO; 1111 hw_cfg->gpio1.out_en = true; 1112 break; 1113 case CS35l41_SYNC: 1114 hw_cfg->gpio1.func = CS35L41_GPIO1_MDSYNC; 1115 break; 1116 default: 1117 dev_err(cs35l41->dev, "Invalid function %d for GPIO1\n", 1118 hw_cfg->gpio1.func); 1119 return -EINVAL; 1120 } 1121 } 1122 1123 if (hw_cfg->gpio2.valid) { 1124 switch (hw_cfg->gpio2.func) { 1125 case CS35L41_NOT_USED: 1126 break; 1127 case CS35L41_INTERRUPT: 1128 using_irq = true; 1129 hw_cfg->gpio2.func = CS35L41_GPIO2_INT_OPEN_DRAIN; 1130 break; 1131 default: 1132 dev_err(cs35l41->dev, "Invalid GPIO2 function %d\n", hw_cfg->gpio2.func); 1133 return -EINVAL; 1134 } 1135 } 1136 1137 irq_pol = cs35l41_gpio_config(cs35l41->regmap, hw_cfg); 1138 1139 if (cs35l41->irq && using_irq) { 1140 ret = devm_regmap_add_irq_chip(cs35l41->dev, cs35l41->regmap, cs35l41->irq, 1141 IRQF_ONESHOT | IRQF_SHARED | irq_pol, 1142 0, &cs35l41_regmap_irq_chip, &cs35l41->irq_data); 1143 if (ret) 1144 return ret; 1145 1146 for (i = 0; i < ARRAY_SIZE(cs35l41_irqs); i++) { 1147 irq = regmap_irq_get_virq(cs35l41->irq_data, cs35l41_irqs[i].irq); 1148 if (irq < 0) 1149 return irq; 1150 1151 ret = devm_request_threaded_irq(cs35l41->dev, irq, NULL, 1152 cs35l41_irqs[i].handler, 1153 IRQF_ONESHOT | IRQF_SHARED | irq_pol, 1154 cs35l41_irqs[i].name, cs35l41); 1155 if (ret) 1156 return ret; 1157 } 1158 } 1159 1160 return cs35l41_hda_channel_map(cs35l41->dev, 0, NULL, 1, &hw_cfg->spk_pos); 1161 } 1162 1163 static int cs35l41_get_speaker_id(struct device *dev, int amp_index, 1164 int num_amps, int fixed_gpio_id) 1165 { 1166 struct gpio_desc *speaker_id_desc; 1167 int speaker_id = -ENODEV; 1168 1169 if (fixed_gpio_id >= 0) { 1170 dev_dbg(dev, "Found Fixed Speaker ID GPIO (index = %d)\n", fixed_gpio_id); 1171 speaker_id_desc = gpiod_get_index(dev, NULL, fixed_gpio_id, GPIOD_IN); 1172 if (IS_ERR(speaker_id_desc)) { 1173 speaker_id = PTR_ERR(speaker_id_desc); 1174 return speaker_id; 1175 } 1176 speaker_id = gpiod_get_value_cansleep(speaker_id_desc); 1177 gpiod_put(speaker_id_desc); 1178 dev_dbg(dev, "Speaker ID = %d\n", speaker_id); 1179 } else { 1180 int base_index; 1181 int gpios_per_amp; 1182 int count; 1183 int tmp; 1184 int i; 1185 1186 count = gpiod_count(dev, "spk-id"); 1187 if (count > 0) { 1188 speaker_id = 0; 1189 gpios_per_amp = count / num_amps; 1190 base_index = gpios_per_amp * amp_index; 1191 1192 if (count % num_amps) 1193 return -EINVAL; 1194 1195 dev_dbg(dev, "Found %d Speaker ID GPIOs per Amp\n", gpios_per_amp); 1196 1197 for (i = 0; i < gpios_per_amp; i++) { 1198 speaker_id_desc = gpiod_get_index(dev, "spk-id", i + base_index, 1199 GPIOD_IN); 1200 if (IS_ERR(speaker_id_desc)) { 1201 speaker_id = PTR_ERR(speaker_id_desc); 1202 break; 1203 } 1204 tmp = gpiod_get_value_cansleep(speaker_id_desc); 1205 gpiod_put(speaker_id_desc); 1206 if (tmp < 0) { 1207 speaker_id = tmp; 1208 break; 1209 } 1210 speaker_id |= tmp << i; 1211 } 1212 dev_dbg(dev, "Speaker ID = %d\n", speaker_id); 1213 } 1214 } 1215 return speaker_id; 1216 } 1217 1218 /* 1219 * Device CLSA010(0/1) doesn't have _DSD so a gpiod_get by the label reset won't work. 1220 * And devices created by serial-multi-instantiate don't have their device struct 1221 * pointing to the correct fwnode, so acpi_dev must be used here. 1222 * And devm functions expect that the device requesting the resource has the correct 1223 * fwnode. 1224 */ 1225 static int cs35l41_no_acpi_dsd(struct cs35l41_hda *cs35l41, struct device *physdev, int id, 1226 const char *hid) 1227 { 1228 struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg; 1229 1230 /* check I2C address to assign the index */ 1231 cs35l41->index = id == 0x40 ? 0 : 1; 1232 cs35l41->channel_index = 0; 1233 cs35l41->reset_gpio = gpiod_get_index(physdev, NULL, 0, GPIOD_OUT_HIGH); 1234 cs35l41->speaker_id = cs35l41_get_speaker_id(physdev, 0, 0, 2); 1235 hw_cfg->spk_pos = cs35l41->index; 1236 hw_cfg->gpio2.func = CS35L41_INTERRUPT; 1237 hw_cfg->gpio2.valid = true; 1238 hw_cfg->valid = true; 1239 1240 if (strncmp(hid, "CLSA0100", 8) == 0) { 1241 hw_cfg->bst_type = CS35L41_EXT_BOOST_NO_VSPK_SWITCH; 1242 } else if (strncmp(hid, "CLSA0101", 8) == 0) { 1243 hw_cfg->bst_type = CS35L41_EXT_BOOST; 1244 hw_cfg->gpio1.func = CS35l41_VSPK_SWITCH; 1245 hw_cfg->gpio1.valid = true; 1246 } else { 1247 /* 1248 * Note: CLSA010(0/1) are special cases which use a slightly different design. 1249 * All other HIDs e.g. CSC3551 require valid ACPI _DSD properties to be supported. 1250 */ 1251 dev_err(cs35l41->dev, "Error: ACPI _DSD Properties are missing for HID %s.\n", hid); 1252 hw_cfg->valid = false; 1253 hw_cfg->gpio1.valid = false; 1254 hw_cfg->gpio2.valid = false; 1255 return -EINVAL; 1256 } 1257 1258 return 0; 1259 } 1260 1261 static int cs35l41_hda_read_acpi(struct cs35l41_hda *cs35l41, const char *hid, int id) 1262 { 1263 struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg; 1264 u32 values[HDA_MAX_COMPONENTS]; 1265 struct acpi_device *adev; 1266 struct device *physdev; 1267 const char *sub; 1268 char *property; 1269 size_t nval; 1270 int i, ret; 1271 1272 adev = acpi_dev_get_first_match_dev(hid, NULL, -1); 1273 if (!adev) { 1274 dev_err(cs35l41->dev, "Failed to find an ACPI device for %s\n", hid); 1275 return -ENODEV; 1276 } 1277 1278 physdev = get_device(acpi_get_first_physical_node(adev)); 1279 acpi_dev_put(adev); 1280 1281 sub = acpi_get_subsystem_id(ACPI_HANDLE(physdev)); 1282 if (IS_ERR(sub)) 1283 sub = NULL; 1284 cs35l41->acpi_subsystem_id = sub; 1285 1286 property = "cirrus,dev-index"; 1287 ret = device_property_count_u32(physdev, property); 1288 if (ret <= 0) { 1289 ret = cs35l41_no_acpi_dsd(cs35l41, physdev, id, hid); 1290 goto err_put_physdev; 1291 } 1292 if (ret > ARRAY_SIZE(values)) { 1293 ret = -EINVAL; 1294 goto err; 1295 } 1296 nval = ret; 1297 1298 ret = device_property_read_u32_array(physdev, property, values, nval); 1299 if (ret) 1300 goto err; 1301 1302 cs35l41->index = -1; 1303 for (i = 0; i < nval; i++) { 1304 if (values[i] == id) { 1305 cs35l41->index = i; 1306 break; 1307 } 1308 } 1309 if (cs35l41->index == -1) { 1310 dev_err(cs35l41->dev, "No index found in %s\n", property); 1311 ret = -ENODEV; 1312 goto err; 1313 } 1314 1315 /* To use the same release code for all laptop variants we can't use devm_ version of 1316 * gpiod_get here, as CLSA010* don't have a fully functional bios with an _DSD node 1317 */ 1318 cs35l41->reset_gpio = fwnode_gpiod_get_index(acpi_fwnode_handle(adev), "reset", cs35l41->index, 1319 GPIOD_OUT_LOW, "cs35l41-reset"); 1320 1321 property = "cirrus,speaker-position"; 1322 ret = device_property_read_u32_array(physdev, property, values, nval); 1323 if (ret) 1324 goto err; 1325 hw_cfg->spk_pos = values[cs35l41->index]; 1326 1327 cs35l41->channel_index = 0; 1328 for (i = 0; i < cs35l41->index; i++) 1329 if (values[i] == hw_cfg->spk_pos) 1330 cs35l41->channel_index++; 1331 1332 property = "cirrus,gpio1-func"; 1333 ret = device_property_read_u32_array(physdev, property, values, nval); 1334 if (ret) 1335 goto err; 1336 hw_cfg->gpio1.func = values[cs35l41->index]; 1337 hw_cfg->gpio1.valid = true; 1338 1339 property = "cirrus,gpio2-func"; 1340 ret = device_property_read_u32_array(physdev, property, values, nval); 1341 if (ret) 1342 goto err; 1343 hw_cfg->gpio2.func = values[cs35l41->index]; 1344 hw_cfg->gpio2.valid = true; 1345 1346 property = "cirrus,boost-peak-milliamp"; 1347 ret = device_property_read_u32_array(physdev, property, values, nval); 1348 if (ret == 0) 1349 hw_cfg->bst_ipk = values[cs35l41->index]; 1350 else 1351 hw_cfg->bst_ipk = -1; 1352 1353 property = "cirrus,boost-ind-nanohenry"; 1354 ret = device_property_read_u32_array(physdev, property, values, nval); 1355 if (ret == 0) 1356 hw_cfg->bst_ind = values[cs35l41->index]; 1357 else 1358 hw_cfg->bst_ind = -1; 1359 1360 property = "cirrus,boost-cap-microfarad"; 1361 ret = device_property_read_u32_array(physdev, property, values, nval); 1362 if (ret == 0) 1363 hw_cfg->bst_cap = values[cs35l41->index]; 1364 else 1365 hw_cfg->bst_cap = -1; 1366 1367 cs35l41->speaker_id = cs35l41_get_speaker_id(physdev, cs35l41->index, nval, -1); 1368 1369 if (hw_cfg->bst_ind > 0 || hw_cfg->bst_cap > 0 || hw_cfg->bst_ipk > 0) 1370 hw_cfg->bst_type = CS35L41_INT_BOOST; 1371 else 1372 hw_cfg->bst_type = CS35L41_EXT_BOOST; 1373 1374 hw_cfg->valid = true; 1375 put_device(physdev); 1376 1377 return 0; 1378 1379 err: 1380 dev_err(cs35l41->dev, "Failed property %s: %d\n", property, ret); 1381 err_put_physdev: 1382 put_device(physdev); 1383 1384 return ret; 1385 } 1386 1387 int cs35l41_hda_probe(struct device *dev, const char *device_name, int id, int irq, 1388 struct regmap *regmap) 1389 { 1390 unsigned int int_sts, regid, reg_revid, mtl_revid, chipid, int_status; 1391 struct cs35l41_hda *cs35l41; 1392 int ret; 1393 1394 BUILD_BUG_ON(ARRAY_SIZE(cs35l41_irqs) != ARRAY_SIZE(cs35l41_reg_irqs)); 1395 BUILD_BUG_ON(ARRAY_SIZE(cs35l41_irqs) != CS35L41_NUM_IRQ); 1396 1397 if (IS_ERR(regmap)) 1398 return PTR_ERR(regmap); 1399 1400 cs35l41 = devm_kzalloc(dev, sizeof(*cs35l41), GFP_KERNEL); 1401 if (!cs35l41) 1402 return -ENOMEM; 1403 1404 cs35l41->dev = dev; 1405 cs35l41->irq = irq; 1406 cs35l41->regmap = regmap; 1407 dev_set_drvdata(dev, cs35l41); 1408 1409 ret = cs35l41_hda_read_acpi(cs35l41, device_name, id); 1410 if (ret) 1411 return dev_err_probe(cs35l41->dev, ret, "Platform not supported\n"); 1412 1413 if (IS_ERR(cs35l41->reset_gpio)) { 1414 ret = PTR_ERR(cs35l41->reset_gpio); 1415 cs35l41->reset_gpio = NULL; 1416 if (ret == -EBUSY) { 1417 dev_info(cs35l41->dev, "Reset line busy, assuming shared reset\n"); 1418 } else { 1419 dev_err_probe(cs35l41->dev, ret, "Failed to get reset GPIO\n"); 1420 goto err; 1421 } 1422 } 1423 if (cs35l41->reset_gpio) { 1424 usleep_range(2000, 2100); 1425 gpiod_set_value_cansleep(cs35l41->reset_gpio, 1); 1426 } 1427 1428 usleep_range(2000, 2100); 1429 1430 ret = regmap_read_poll_timeout(cs35l41->regmap, CS35L41_IRQ1_STATUS4, int_status, 1431 int_status & CS35L41_OTP_BOOT_DONE, 1000, 100000); 1432 if (ret) { 1433 dev_err(cs35l41->dev, "Failed waiting for OTP_BOOT_DONE: %d\n", ret); 1434 goto err; 1435 } 1436 1437 ret = regmap_read(cs35l41->regmap, CS35L41_IRQ1_STATUS3, &int_sts); 1438 if (ret || (int_sts & CS35L41_OTP_BOOT_ERR)) { 1439 dev_err(cs35l41->dev, "OTP Boot status %x error: %d\n", 1440 int_sts & CS35L41_OTP_BOOT_ERR, ret); 1441 ret = -EIO; 1442 goto err; 1443 } 1444 1445 ret = regmap_read(cs35l41->regmap, CS35L41_DEVID, ®id); 1446 if (ret) { 1447 dev_err(cs35l41->dev, "Get Device ID failed: %d\n", ret); 1448 goto err; 1449 } 1450 1451 ret = regmap_read(cs35l41->regmap, CS35L41_REVID, ®_revid); 1452 if (ret) { 1453 dev_err(cs35l41->dev, "Get Revision ID failed: %d\n", ret); 1454 goto err; 1455 } 1456 1457 mtl_revid = reg_revid & CS35L41_MTLREVID_MASK; 1458 1459 chipid = (mtl_revid % 2) ? CS35L41R_CHIP_ID : CS35L41_CHIP_ID; 1460 if (regid != chipid) { 1461 dev_err(cs35l41->dev, "CS35L41 Device ID (%X). Expected ID %X\n", regid, chipid); 1462 ret = -ENODEV; 1463 goto err; 1464 } 1465 1466 ret = cs35l41_test_key_unlock(cs35l41->dev, cs35l41->regmap); 1467 if (ret) 1468 goto err; 1469 1470 ret = cs35l41_register_errata_patch(cs35l41->dev, cs35l41->regmap, reg_revid); 1471 if (ret) 1472 goto err; 1473 1474 ret = cs35l41_otp_unpack(cs35l41->dev, cs35l41->regmap); 1475 if (ret) { 1476 dev_err(cs35l41->dev, "OTP Unpack failed: %d\n", ret); 1477 goto err; 1478 } 1479 1480 ret = cs35l41_test_key_lock(cs35l41->dev, cs35l41->regmap); 1481 if (ret) 1482 goto err; 1483 1484 INIT_WORK(&cs35l41->fw_load_work, cs35l41_fw_load_work); 1485 mutex_init(&cs35l41->fw_mutex); 1486 1487 pm_runtime_set_autosuspend_delay(cs35l41->dev, 3000); 1488 pm_runtime_use_autosuspend(cs35l41->dev); 1489 pm_runtime_mark_last_busy(cs35l41->dev); 1490 pm_runtime_set_active(cs35l41->dev); 1491 pm_runtime_get_noresume(cs35l41->dev); 1492 pm_runtime_enable(cs35l41->dev); 1493 1494 ret = cs35l41_hda_apply_properties(cs35l41); 1495 if (ret) 1496 goto err_pm; 1497 1498 pm_runtime_put_autosuspend(cs35l41->dev); 1499 1500 ret = component_add(cs35l41->dev, &cs35l41_hda_comp_ops); 1501 if (ret) { 1502 dev_err(cs35l41->dev, "Register component failed: %d\n", ret); 1503 pm_runtime_disable(cs35l41->dev); 1504 goto err; 1505 } 1506 1507 dev_info(cs35l41->dev, "Cirrus Logic CS35L41 (%x), Revision: %02X\n", regid, reg_revid); 1508 1509 return 0; 1510 1511 err_pm: 1512 pm_runtime_disable(cs35l41->dev); 1513 pm_runtime_put_noidle(cs35l41->dev); 1514 1515 err: 1516 if (cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type)) 1517 gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); 1518 gpiod_put(cs35l41->reset_gpio); 1519 kfree(cs35l41->acpi_subsystem_id); 1520 1521 return ret; 1522 } 1523 EXPORT_SYMBOL_NS_GPL(cs35l41_hda_probe, SND_HDA_SCODEC_CS35L41); 1524 1525 void cs35l41_hda_remove(struct device *dev) 1526 { 1527 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 1528 1529 pm_runtime_get_sync(cs35l41->dev); 1530 pm_runtime_disable(cs35l41->dev); 1531 1532 if (cs35l41->halo_initialized) 1533 cs35l41_remove_dsp(cs35l41); 1534 1535 component_del(cs35l41->dev, &cs35l41_hda_comp_ops); 1536 1537 pm_runtime_put_noidle(cs35l41->dev); 1538 1539 if (cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type)) 1540 gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); 1541 gpiod_put(cs35l41->reset_gpio); 1542 kfree(cs35l41->acpi_subsystem_id); 1543 } 1544 EXPORT_SYMBOL_NS_GPL(cs35l41_hda_remove, SND_HDA_SCODEC_CS35L41); 1545 1546 const struct dev_pm_ops cs35l41_hda_pm_ops = { 1547 RUNTIME_PM_OPS(cs35l41_runtime_suspend, cs35l41_runtime_resume, 1548 cs35l41_runtime_idle) 1549 SYSTEM_SLEEP_PM_OPS(cs35l41_system_suspend, cs35l41_system_resume) 1550 }; 1551 EXPORT_SYMBOL_NS_GPL(cs35l41_hda_pm_ops, SND_HDA_SCODEC_CS35L41); 1552 1553 MODULE_DESCRIPTION("CS35L41 HDA Driver"); 1554 MODULE_IMPORT_NS(SND_HDA_CS_DSP_CONTROLS); 1555 MODULE_AUTHOR("Lucas Tanure, Cirrus Logic Inc, <tanureal@opensource.cirrus.com>"); 1556 MODULE_LICENSE("GPL"); 1557 MODULE_IMPORT_NS(FW_CS_DSP); 1558