1 /* 2 * The driver for the ForteMedia FM801 based soundcards 3 * Copyright (c) by Jaroslav Kysela <perex@suse.cz> 4 * 5 * Support FM only card by Andy Shevchenko <andy@smile.org.ua> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 * 21 */ 22 23 #include <sound/driver.h> 24 #include <linux/delay.h> 25 #include <linux/init.h> 26 #include <linux/interrupt.h> 27 #include <linux/pci.h> 28 #include <linux/slab.h> 29 #include <linux/moduleparam.h> 30 #include <sound/core.h> 31 #include <sound/pcm.h> 32 #include <sound/ac97_codec.h> 33 #include <sound/mpu401.h> 34 #include <sound/opl3.h> 35 #include <sound/initval.h> 36 37 #include <asm/io.h> 38 39 #ifdef CONFIG_SND_FM801_TEA575X_BOOL 40 #include <sound/tea575x-tuner.h> 41 #define TEA575X_RADIO 1 42 #endif 43 44 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>"); 45 MODULE_DESCRIPTION("ForteMedia FM801"); 46 MODULE_LICENSE("GPL"); 47 MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801}," 48 "{Genius,SoundMaker Live 5.1}}"); 49 50 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 51 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 52 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 53 /* 54 * Enable TEA575x tuner 55 * 1 = MediaForte 256-PCS 56 * 2 = MediaForte 256-PCPR 57 * 3 = MediaForte 64-PCR 58 * 16 = setup tuner only (this is additional bit), i.e. SF-64-PCR FM card 59 * High 16-bits are video (radio) device number + 1 60 */ 61 static int tea575x_tuner[SNDRV_CARDS]; 62 63 module_param_array(index, int, NULL, 0444); 64 MODULE_PARM_DESC(index, "Index value for the FM801 soundcard."); 65 module_param_array(id, charp, NULL, 0444); 66 MODULE_PARM_DESC(id, "ID string for the FM801 soundcard."); 67 module_param_array(enable, bool, NULL, 0444); 68 MODULE_PARM_DESC(enable, "Enable FM801 soundcard."); 69 module_param_array(tea575x_tuner, int, NULL, 0444); 70 MODULE_PARM_DESC(tea575x_tuner, "Enable TEA575x tuner."); 71 72 /* 73 * Direct registers 74 */ 75 76 #define FM801_REG(chip, reg) (chip->port + FM801_##reg) 77 78 #define FM801_PCM_VOL 0x00 /* PCM Output Volume */ 79 #define FM801_FM_VOL 0x02 /* FM Output Volume */ 80 #define FM801_I2S_VOL 0x04 /* I2S Volume */ 81 #define FM801_REC_SRC 0x06 /* Record Source */ 82 #define FM801_PLY_CTRL 0x08 /* Playback Control */ 83 #define FM801_PLY_COUNT 0x0a /* Playback Count */ 84 #define FM801_PLY_BUF1 0x0c /* Playback Bufer I */ 85 #define FM801_PLY_BUF2 0x10 /* Playback Buffer II */ 86 #define FM801_CAP_CTRL 0x14 /* Capture Control */ 87 #define FM801_CAP_COUNT 0x16 /* Capture Count */ 88 #define FM801_CAP_BUF1 0x18 /* Capture Buffer I */ 89 #define FM801_CAP_BUF2 0x1c /* Capture Buffer II */ 90 #define FM801_CODEC_CTRL 0x22 /* Codec Control */ 91 #define FM801_I2S_MODE 0x24 /* I2S Mode Control */ 92 #define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */ 93 #define FM801_I2C_CTRL 0x29 /* I2C Control */ 94 #define FM801_AC97_CMD 0x2a /* AC'97 Command */ 95 #define FM801_AC97_DATA 0x2c /* AC'97 Data */ 96 #define FM801_MPU401_DATA 0x30 /* MPU401 Data */ 97 #define FM801_MPU401_CMD 0x31 /* MPU401 Command */ 98 #define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */ 99 #define FM801_GEN_CTRL 0x54 /* General Control */ 100 #define FM801_IRQ_MASK 0x56 /* Interrupt Mask */ 101 #define FM801_IRQ_STATUS 0x5a /* Interrupt Status */ 102 #define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */ 103 #define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */ 104 #define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */ 105 #define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */ 106 #define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */ 107 108 /* codec access */ 109 #define FM801_AC97_READ (1<<7) /* read=1, write=0 */ 110 #define FM801_AC97_VALID (1<<8) /* port valid=1 */ 111 #define FM801_AC97_BUSY (1<<9) /* busy=1 */ 112 #define FM801_AC97_ADDR_SHIFT 10 /* codec id (2bit) */ 113 114 /* playback and record control register bits */ 115 #define FM801_BUF1_LAST (1<<1) 116 #define FM801_BUF2_LAST (1<<2) 117 #define FM801_START (1<<5) 118 #define FM801_PAUSE (1<<6) 119 #define FM801_IMMED_STOP (1<<7) 120 #define FM801_RATE_SHIFT 8 121 #define FM801_RATE_MASK (15 << FM801_RATE_SHIFT) 122 #define FM801_CHANNELS_4 (1<<12) /* playback only */ 123 #define FM801_CHANNELS_6 (2<<12) /* playback only */ 124 #define FM801_CHANNELS_6MS (3<<12) /* playback only */ 125 #define FM801_CHANNELS_MASK (3<<12) 126 #define FM801_16BIT (1<<14) 127 #define FM801_STEREO (1<<15) 128 129 /* IRQ status bits */ 130 #define FM801_IRQ_PLAYBACK (1<<8) 131 #define FM801_IRQ_CAPTURE (1<<9) 132 #define FM801_IRQ_VOLUME (1<<14) 133 #define FM801_IRQ_MPU (1<<15) 134 135 /* GPIO control register */ 136 #define FM801_GPIO_GP0 (1<<0) /* read/write */ 137 #define FM801_GPIO_GP1 (1<<1) 138 #define FM801_GPIO_GP2 (1<<2) 139 #define FM801_GPIO_GP3 (1<<3) 140 #define FM801_GPIO_GP(x) (1<<(0+(x))) 141 #define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/ 142 #define FM801_GPIO_GD1 (1<<9) 143 #define FM801_GPIO_GD2 (1<<10) 144 #define FM801_GPIO_GD3 (1<<11) 145 #define FM801_GPIO_GD(x) (1<<(8+(x))) 146 #define FM801_GPIO_GS0 (1<<12) /* function select: */ 147 #define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */ 148 #define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */ 149 #define FM801_GPIO_GS3 (1<<15) 150 #define FM801_GPIO_GS(x) (1<<(12+(x))) 151 152 /* 153 154 */ 155 156 struct fm801 { 157 int irq; 158 159 unsigned long port; /* I/O port number */ 160 unsigned int multichannel: 1, /* multichannel support */ 161 secondary: 1; /* secondary codec */ 162 unsigned char secondary_addr; /* address of the secondary codec */ 163 unsigned int tea575x_tuner; /* tuner flags */ 164 165 unsigned short ply_ctrl; /* playback control */ 166 unsigned short cap_ctrl; /* capture control */ 167 168 unsigned long ply_buffer; 169 unsigned int ply_buf; 170 unsigned int ply_count; 171 unsigned int ply_size; 172 unsigned int ply_pos; 173 174 unsigned long cap_buffer; 175 unsigned int cap_buf; 176 unsigned int cap_count; 177 unsigned int cap_size; 178 unsigned int cap_pos; 179 180 struct snd_ac97_bus *ac97_bus; 181 struct snd_ac97 *ac97; 182 struct snd_ac97 *ac97_sec; 183 184 struct pci_dev *pci; 185 struct snd_card *card; 186 struct snd_pcm *pcm; 187 struct snd_rawmidi *rmidi; 188 struct snd_pcm_substream *playback_substream; 189 struct snd_pcm_substream *capture_substream; 190 unsigned int p_dma_size; 191 unsigned int c_dma_size; 192 193 spinlock_t reg_lock; 194 struct snd_info_entry *proc_entry; 195 196 #ifdef TEA575X_RADIO 197 struct snd_tea575x tea; 198 #endif 199 200 #ifdef CONFIG_PM 201 u16 saved_regs[0x20]; 202 #endif 203 }; 204 205 static struct pci_device_id snd_fm801_ids[] = { 206 { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */ 207 { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* Gallant Odyssey Sound 4 */ 208 { 0, } 209 }; 210 211 MODULE_DEVICE_TABLE(pci, snd_fm801_ids); 212 213 /* 214 * common I/O routines 215 */ 216 217 static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg, 218 unsigned short mask, unsigned short value) 219 { 220 int change; 221 unsigned long flags; 222 unsigned short old, new; 223 224 spin_lock_irqsave(&chip->reg_lock, flags); 225 old = inw(chip->port + reg); 226 new = (old & ~mask) | value; 227 change = old != new; 228 if (change) 229 outw(new, chip->port + reg); 230 spin_unlock_irqrestore(&chip->reg_lock, flags); 231 return change; 232 } 233 234 static void snd_fm801_codec_write(struct snd_ac97 *ac97, 235 unsigned short reg, 236 unsigned short val) 237 { 238 struct fm801 *chip = ac97->private_data; 239 int idx; 240 241 /* 242 * Wait until the codec interface is not ready.. 243 */ 244 for (idx = 0; idx < 100; idx++) { 245 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY)) 246 goto ok1; 247 udelay(10); 248 } 249 snd_printk(KERN_ERR "AC'97 interface is busy (1)\n"); 250 return; 251 252 ok1: 253 /* write data and address */ 254 outw(val, FM801_REG(chip, AC97_DATA)); 255 outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD)); 256 /* 257 * Wait until the write command is not completed.. 258 */ 259 for (idx = 0; idx < 1000; idx++) { 260 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY)) 261 return; 262 udelay(10); 263 } 264 snd_printk(KERN_ERR "AC'97 interface #%d is busy (2)\n", ac97->num); 265 } 266 267 static unsigned short snd_fm801_codec_read(struct snd_ac97 *ac97, unsigned short reg) 268 { 269 struct fm801 *chip = ac97->private_data; 270 int idx; 271 272 /* 273 * Wait until the codec interface is not ready.. 274 */ 275 for (idx = 0; idx < 100; idx++) { 276 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY)) 277 goto ok1; 278 udelay(10); 279 } 280 snd_printk(KERN_ERR "AC'97 interface is busy (1)\n"); 281 return 0; 282 283 ok1: 284 /* read command */ 285 outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ, 286 FM801_REG(chip, AC97_CMD)); 287 for (idx = 0; idx < 100; idx++) { 288 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY)) 289 goto ok2; 290 udelay(10); 291 } 292 snd_printk(KERN_ERR "AC'97 interface #%d is busy (2)\n", ac97->num); 293 return 0; 294 295 ok2: 296 for (idx = 0; idx < 1000; idx++) { 297 if (inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_VALID) 298 goto ok3; 299 udelay(10); 300 } 301 snd_printk(KERN_ERR "AC'97 interface #%d is not valid (2)\n", ac97->num); 302 return 0; 303 304 ok3: 305 return inw(FM801_REG(chip, AC97_DATA)); 306 } 307 308 static unsigned int rates[] = { 309 5500, 8000, 9600, 11025, 310 16000, 19200, 22050, 32000, 311 38400, 44100, 48000 312 }; 313 314 static struct snd_pcm_hw_constraint_list hw_constraints_rates = { 315 .count = ARRAY_SIZE(rates), 316 .list = rates, 317 .mask = 0, 318 }; 319 320 static unsigned int channels[] = { 321 2, 4, 6 322 }; 323 324 #define CHANNELS sizeof(channels) / sizeof(channels[0]) 325 326 static struct snd_pcm_hw_constraint_list hw_constraints_channels = { 327 .count = CHANNELS, 328 .list = channels, 329 .mask = 0, 330 }; 331 332 /* 333 * Sample rate routines 334 */ 335 336 static unsigned short snd_fm801_rate_bits(unsigned int rate) 337 { 338 unsigned int idx; 339 340 for (idx = 0; idx < ARRAY_SIZE(rates); idx++) 341 if (rates[idx] == rate) 342 return idx; 343 snd_BUG(); 344 return ARRAY_SIZE(rates) - 1; 345 } 346 347 /* 348 * PCM part 349 */ 350 351 static int snd_fm801_playback_trigger(struct snd_pcm_substream *substream, 352 int cmd) 353 { 354 struct fm801 *chip = snd_pcm_substream_chip(substream); 355 356 spin_lock(&chip->reg_lock); 357 switch (cmd) { 358 case SNDRV_PCM_TRIGGER_START: 359 chip->ply_ctrl &= ~(FM801_BUF1_LAST | 360 FM801_BUF2_LAST | 361 FM801_PAUSE); 362 chip->ply_ctrl |= FM801_START | 363 FM801_IMMED_STOP; 364 break; 365 case SNDRV_PCM_TRIGGER_STOP: 366 chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE); 367 break; 368 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 369 case SNDRV_PCM_TRIGGER_SUSPEND: 370 chip->ply_ctrl |= FM801_PAUSE; 371 break; 372 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 373 case SNDRV_PCM_TRIGGER_RESUME: 374 chip->ply_ctrl &= ~FM801_PAUSE; 375 break; 376 default: 377 spin_unlock(&chip->reg_lock); 378 snd_BUG(); 379 return -EINVAL; 380 } 381 outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL)); 382 spin_unlock(&chip->reg_lock); 383 return 0; 384 } 385 386 static int snd_fm801_capture_trigger(struct snd_pcm_substream *substream, 387 int cmd) 388 { 389 struct fm801 *chip = snd_pcm_substream_chip(substream); 390 391 spin_lock(&chip->reg_lock); 392 switch (cmd) { 393 case SNDRV_PCM_TRIGGER_START: 394 chip->cap_ctrl &= ~(FM801_BUF1_LAST | 395 FM801_BUF2_LAST | 396 FM801_PAUSE); 397 chip->cap_ctrl |= FM801_START | 398 FM801_IMMED_STOP; 399 break; 400 case SNDRV_PCM_TRIGGER_STOP: 401 chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE); 402 break; 403 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 404 case SNDRV_PCM_TRIGGER_SUSPEND: 405 chip->cap_ctrl |= FM801_PAUSE; 406 break; 407 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 408 case SNDRV_PCM_TRIGGER_RESUME: 409 chip->cap_ctrl &= ~FM801_PAUSE; 410 break; 411 default: 412 spin_unlock(&chip->reg_lock); 413 snd_BUG(); 414 return -EINVAL; 415 } 416 outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL)); 417 spin_unlock(&chip->reg_lock); 418 return 0; 419 } 420 421 static int snd_fm801_hw_params(struct snd_pcm_substream *substream, 422 struct snd_pcm_hw_params *hw_params) 423 { 424 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 425 } 426 427 static int snd_fm801_hw_free(struct snd_pcm_substream *substream) 428 { 429 return snd_pcm_lib_free_pages(substream); 430 } 431 432 static int snd_fm801_playback_prepare(struct snd_pcm_substream *substream) 433 { 434 struct fm801 *chip = snd_pcm_substream_chip(substream); 435 struct snd_pcm_runtime *runtime = substream->runtime; 436 437 chip->ply_size = snd_pcm_lib_buffer_bytes(substream); 438 chip->ply_count = snd_pcm_lib_period_bytes(substream); 439 spin_lock_irq(&chip->reg_lock); 440 chip->ply_ctrl &= ~(FM801_START | FM801_16BIT | 441 FM801_STEREO | FM801_RATE_MASK | 442 FM801_CHANNELS_MASK); 443 if (snd_pcm_format_width(runtime->format) == 16) 444 chip->ply_ctrl |= FM801_16BIT; 445 if (runtime->channels > 1) { 446 chip->ply_ctrl |= FM801_STEREO; 447 if (runtime->channels == 4) 448 chip->ply_ctrl |= FM801_CHANNELS_4; 449 else if (runtime->channels == 6) 450 chip->ply_ctrl |= FM801_CHANNELS_6; 451 } 452 chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT; 453 chip->ply_buf = 0; 454 outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL)); 455 outw(chip->ply_count - 1, FM801_REG(chip, PLY_COUNT)); 456 chip->ply_buffer = runtime->dma_addr; 457 chip->ply_pos = 0; 458 outl(chip->ply_buffer, FM801_REG(chip, PLY_BUF1)); 459 outl(chip->ply_buffer + (chip->ply_count % chip->ply_size), FM801_REG(chip, PLY_BUF2)); 460 spin_unlock_irq(&chip->reg_lock); 461 return 0; 462 } 463 464 static int snd_fm801_capture_prepare(struct snd_pcm_substream *substream) 465 { 466 struct fm801 *chip = snd_pcm_substream_chip(substream); 467 struct snd_pcm_runtime *runtime = substream->runtime; 468 469 chip->cap_size = snd_pcm_lib_buffer_bytes(substream); 470 chip->cap_count = snd_pcm_lib_period_bytes(substream); 471 spin_lock_irq(&chip->reg_lock); 472 chip->cap_ctrl &= ~(FM801_START | FM801_16BIT | 473 FM801_STEREO | FM801_RATE_MASK); 474 if (snd_pcm_format_width(runtime->format) == 16) 475 chip->cap_ctrl |= FM801_16BIT; 476 if (runtime->channels > 1) 477 chip->cap_ctrl |= FM801_STEREO; 478 chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT; 479 chip->cap_buf = 0; 480 outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL)); 481 outw(chip->cap_count - 1, FM801_REG(chip, CAP_COUNT)); 482 chip->cap_buffer = runtime->dma_addr; 483 chip->cap_pos = 0; 484 outl(chip->cap_buffer, FM801_REG(chip, CAP_BUF1)); 485 outl(chip->cap_buffer + (chip->cap_count % chip->cap_size), FM801_REG(chip, CAP_BUF2)); 486 spin_unlock_irq(&chip->reg_lock); 487 return 0; 488 } 489 490 static snd_pcm_uframes_t snd_fm801_playback_pointer(struct snd_pcm_substream *substream) 491 { 492 struct fm801 *chip = snd_pcm_substream_chip(substream); 493 size_t ptr; 494 495 if (!(chip->ply_ctrl & FM801_START)) 496 return 0; 497 spin_lock(&chip->reg_lock); 498 ptr = chip->ply_pos + (chip->ply_count - 1) - inw(FM801_REG(chip, PLY_COUNT)); 499 if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_PLAYBACK) { 500 ptr += chip->ply_count; 501 ptr %= chip->ply_size; 502 } 503 spin_unlock(&chip->reg_lock); 504 return bytes_to_frames(substream->runtime, ptr); 505 } 506 507 static snd_pcm_uframes_t snd_fm801_capture_pointer(struct snd_pcm_substream *substream) 508 { 509 struct fm801 *chip = snd_pcm_substream_chip(substream); 510 size_t ptr; 511 512 if (!(chip->cap_ctrl & FM801_START)) 513 return 0; 514 spin_lock(&chip->reg_lock); 515 ptr = chip->cap_pos + (chip->cap_count - 1) - inw(FM801_REG(chip, CAP_COUNT)); 516 if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_CAPTURE) { 517 ptr += chip->cap_count; 518 ptr %= chip->cap_size; 519 } 520 spin_unlock(&chip->reg_lock); 521 return bytes_to_frames(substream->runtime, ptr); 522 } 523 524 static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id, struct pt_regs *regs) 525 { 526 struct fm801 *chip = dev_id; 527 unsigned short status; 528 unsigned int tmp; 529 530 status = inw(FM801_REG(chip, IRQ_STATUS)); 531 status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME; 532 if (! status) 533 return IRQ_NONE; 534 /* ack first */ 535 outw(status, FM801_REG(chip, IRQ_STATUS)); 536 if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) { 537 spin_lock(&chip->reg_lock); 538 chip->ply_buf++; 539 chip->ply_pos += chip->ply_count; 540 chip->ply_pos %= chip->ply_size; 541 tmp = chip->ply_pos + chip->ply_count; 542 tmp %= chip->ply_size; 543 outl(chip->ply_buffer + tmp, 544 (chip->ply_buf & 1) ? 545 FM801_REG(chip, PLY_BUF1) : 546 FM801_REG(chip, PLY_BUF2)); 547 spin_unlock(&chip->reg_lock); 548 snd_pcm_period_elapsed(chip->playback_substream); 549 } 550 if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) { 551 spin_lock(&chip->reg_lock); 552 chip->cap_buf++; 553 chip->cap_pos += chip->cap_count; 554 chip->cap_pos %= chip->cap_size; 555 tmp = chip->cap_pos + chip->cap_count; 556 tmp %= chip->cap_size; 557 outl(chip->cap_buffer + tmp, 558 (chip->cap_buf & 1) ? 559 FM801_REG(chip, CAP_BUF1) : 560 FM801_REG(chip, CAP_BUF2)); 561 spin_unlock(&chip->reg_lock); 562 snd_pcm_period_elapsed(chip->capture_substream); 563 } 564 if (chip->rmidi && (status & FM801_IRQ_MPU)) 565 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs); 566 if (status & FM801_IRQ_VOLUME) 567 ;/* TODO */ 568 569 return IRQ_HANDLED; 570 } 571 572 static struct snd_pcm_hardware snd_fm801_playback = 573 { 574 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 575 SNDRV_PCM_INFO_BLOCK_TRANSFER | 576 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME | 577 SNDRV_PCM_INFO_MMAP_VALID), 578 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 579 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000, 580 .rate_min = 5500, 581 .rate_max = 48000, 582 .channels_min = 1, 583 .channels_max = 2, 584 .buffer_bytes_max = (128*1024), 585 .period_bytes_min = 64, 586 .period_bytes_max = (128*1024), 587 .periods_min = 1, 588 .periods_max = 1024, 589 .fifo_size = 0, 590 }; 591 592 static struct snd_pcm_hardware snd_fm801_capture = 593 { 594 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 595 SNDRV_PCM_INFO_BLOCK_TRANSFER | 596 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME | 597 SNDRV_PCM_INFO_MMAP_VALID), 598 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 599 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000, 600 .rate_min = 5500, 601 .rate_max = 48000, 602 .channels_min = 1, 603 .channels_max = 2, 604 .buffer_bytes_max = (128*1024), 605 .period_bytes_min = 64, 606 .period_bytes_max = (128*1024), 607 .periods_min = 1, 608 .periods_max = 1024, 609 .fifo_size = 0, 610 }; 611 612 static int snd_fm801_playback_open(struct snd_pcm_substream *substream) 613 { 614 struct fm801 *chip = snd_pcm_substream_chip(substream); 615 struct snd_pcm_runtime *runtime = substream->runtime; 616 int err; 617 618 chip->playback_substream = substream; 619 runtime->hw = snd_fm801_playback; 620 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 621 &hw_constraints_rates); 622 if (chip->multichannel) { 623 runtime->hw.channels_max = 6; 624 snd_pcm_hw_constraint_list(runtime, 0, 625 SNDRV_PCM_HW_PARAM_CHANNELS, 626 &hw_constraints_channels); 627 } 628 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) 629 return err; 630 return 0; 631 } 632 633 static int snd_fm801_capture_open(struct snd_pcm_substream *substream) 634 { 635 struct fm801 *chip = snd_pcm_substream_chip(substream); 636 struct snd_pcm_runtime *runtime = substream->runtime; 637 int err; 638 639 chip->capture_substream = substream; 640 runtime->hw = snd_fm801_capture; 641 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 642 &hw_constraints_rates); 643 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) 644 return err; 645 return 0; 646 } 647 648 static int snd_fm801_playback_close(struct snd_pcm_substream *substream) 649 { 650 struct fm801 *chip = snd_pcm_substream_chip(substream); 651 652 chip->playback_substream = NULL; 653 return 0; 654 } 655 656 static int snd_fm801_capture_close(struct snd_pcm_substream *substream) 657 { 658 struct fm801 *chip = snd_pcm_substream_chip(substream); 659 660 chip->capture_substream = NULL; 661 return 0; 662 } 663 664 static struct snd_pcm_ops snd_fm801_playback_ops = { 665 .open = snd_fm801_playback_open, 666 .close = snd_fm801_playback_close, 667 .ioctl = snd_pcm_lib_ioctl, 668 .hw_params = snd_fm801_hw_params, 669 .hw_free = snd_fm801_hw_free, 670 .prepare = snd_fm801_playback_prepare, 671 .trigger = snd_fm801_playback_trigger, 672 .pointer = snd_fm801_playback_pointer, 673 }; 674 675 static struct snd_pcm_ops snd_fm801_capture_ops = { 676 .open = snd_fm801_capture_open, 677 .close = snd_fm801_capture_close, 678 .ioctl = snd_pcm_lib_ioctl, 679 .hw_params = snd_fm801_hw_params, 680 .hw_free = snd_fm801_hw_free, 681 .prepare = snd_fm801_capture_prepare, 682 .trigger = snd_fm801_capture_trigger, 683 .pointer = snd_fm801_capture_pointer, 684 }; 685 686 static int __devinit snd_fm801_pcm(struct fm801 *chip, int device, struct snd_pcm ** rpcm) 687 { 688 struct snd_pcm *pcm; 689 int err; 690 691 if (rpcm) 692 *rpcm = NULL; 693 if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0) 694 return err; 695 696 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops); 697 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops); 698 699 pcm->private_data = chip; 700 pcm->info_flags = 0; 701 strcpy(pcm->name, "FM801"); 702 chip->pcm = pcm; 703 704 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 705 snd_dma_pci_data(chip->pci), 706 chip->multichannel ? 128*1024 : 64*1024, 128*1024); 707 708 if (rpcm) 709 *rpcm = pcm; 710 return 0; 711 } 712 713 /* 714 * TEA5757 radio 715 */ 716 717 #ifdef TEA575X_RADIO 718 719 /* 256PCS GPIO numbers */ 720 #define TEA_256PCS_DATA 1 721 #define TEA_256PCS_WRITE_ENABLE 2 /* inverted */ 722 #define TEA_256PCS_BUS_CLOCK 3 723 724 static void snd_fm801_tea575x_256pcs_write(struct snd_tea575x *tea, unsigned int val) 725 { 726 struct fm801 *chip = tea->private_data; 727 unsigned short reg; 728 int i = 25; 729 730 spin_lock_irq(&chip->reg_lock); 731 reg = inw(FM801_REG(chip, GPIO_CTRL)); 732 /* use GPIO lines and set write enable bit */ 733 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) | 734 FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) | 735 FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK); 736 /* all of lines are in the write direction */ 737 /* clear data and clock lines */ 738 reg &= ~(FM801_GPIO_GD(TEA_256PCS_DATA) | 739 FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) | 740 FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) | 741 FM801_GPIO_GP(TEA_256PCS_DATA) | 742 FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK) | 743 FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE)); 744 outw(reg, FM801_REG(chip, GPIO_CTRL)); 745 udelay(1); 746 747 while (i--) { 748 if (val & (1 << i)) 749 reg |= FM801_GPIO_GP(TEA_256PCS_DATA); 750 else 751 reg &= ~FM801_GPIO_GP(TEA_256PCS_DATA); 752 outw(reg, FM801_REG(chip, GPIO_CTRL)); 753 udelay(1); 754 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); 755 outw(reg, FM801_REG(chip, GPIO_CTRL)); 756 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); 757 outw(reg, FM801_REG(chip, GPIO_CTRL)); 758 udelay(1); 759 } 760 761 /* and reset the write enable bit */ 762 reg |= FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE) | 763 FM801_GPIO_GP(TEA_256PCS_DATA); 764 outw(reg, FM801_REG(chip, GPIO_CTRL)); 765 spin_unlock_irq(&chip->reg_lock); 766 } 767 768 static unsigned int snd_fm801_tea575x_256pcs_read(struct snd_tea575x *tea) 769 { 770 struct fm801 *chip = tea->private_data; 771 unsigned short reg; 772 unsigned int val = 0; 773 int i; 774 775 spin_lock_irq(&chip->reg_lock); 776 reg = inw(FM801_REG(chip, GPIO_CTRL)); 777 /* use GPIO lines, set data direction to input */ 778 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) | 779 FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) | 780 FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK) | 781 FM801_GPIO_GD(TEA_256PCS_DATA) | 782 FM801_GPIO_GP(TEA_256PCS_DATA) | 783 FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE); 784 /* all of lines are in the write direction, except data */ 785 /* clear data, write enable and clock lines */ 786 reg &= ~(FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) | 787 FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) | 788 FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK)); 789 790 for (i = 0; i < 24; i++) { 791 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); 792 outw(reg, FM801_REG(chip, GPIO_CTRL)); 793 udelay(1); 794 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); 795 outw(reg, FM801_REG(chip, GPIO_CTRL)); 796 udelay(1); 797 val <<= 1; 798 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCS_DATA)) 799 val |= 1; 800 } 801 802 spin_unlock_irq(&chip->reg_lock); 803 804 return val; 805 } 806 807 /* 256PCPR GPIO numbers */ 808 #define TEA_256PCPR_BUS_CLOCK 0 809 #define TEA_256PCPR_DATA 1 810 #define TEA_256PCPR_WRITE_ENABLE 2 /* inverted */ 811 812 static void snd_fm801_tea575x_256pcpr_write(struct snd_tea575x *tea, unsigned int val) 813 { 814 struct fm801 *chip = tea->private_data; 815 unsigned short reg; 816 int i = 25; 817 818 spin_lock_irq(&chip->reg_lock); 819 reg = inw(FM801_REG(chip, GPIO_CTRL)); 820 /* use GPIO lines and set write enable bit */ 821 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) | 822 FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) | 823 FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK); 824 /* all of lines are in the write direction */ 825 /* clear data and clock lines */ 826 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_DATA) | 827 FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) | 828 FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) | 829 FM801_GPIO_GP(TEA_256PCPR_DATA) | 830 FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK) | 831 FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE)); 832 outw(reg, FM801_REG(chip, GPIO_CTRL)); 833 udelay(1); 834 835 while (i--) { 836 if (val & (1 << i)) 837 reg |= FM801_GPIO_GP(TEA_256PCPR_DATA); 838 else 839 reg &= ~FM801_GPIO_GP(TEA_256PCPR_DATA); 840 outw(reg, FM801_REG(chip, GPIO_CTRL)); 841 udelay(1); 842 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); 843 outw(reg, FM801_REG(chip, GPIO_CTRL)); 844 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); 845 outw(reg, FM801_REG(chip, GPIO_CTRL)); 846 udelay(1); 847 } 848 849 /* and reset the write enable bit */ 850 reg |= FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE) | 851 FM801_GPIO_GP(TEA_256PCPR_DATA); 852 outw(reg, FM801_REG(chip, GPIO_CTRL)); 853 spin_unlock_irq(&chip->reg_lock); 854 } 855 856 static unsigned int snd_fm801_tea575x_256pcpr_read(struct snd_tea575x *tea) 857 { 858 struct fm801 *chip = tea->private_data; 859 unsigned short reg; 860 unsigned int val = 0; 861 int i; 862 863 spin_lock_irq(&chip->reg_lock); 864 reg = inw(FM801_REG(chip, GPIO_CTRL)); 865 /* use GPIO lines, set data direction to input */ 866 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) | 867 FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) | 868 FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK) | 869 FM801_GPIO_GD(TEA_256PCPR_DATA) | 870 FM801_GPIO_GP(TEA_256PCPR_DATA) | 871 FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE); 872 /* all of lines are in the write direction, except data */ 873 /* clear data, write enable and clock lines */ 874 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) | 875 FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) | 876 FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK)); 877 878 for (i = 0; i < 24; i++) { 879 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); 880 outw(reg, FM801_REG(chip, GPIO_CTRL)); 881 udelay(1); 882 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); 883 outw(reg, FM801_REG(chip, GPIO_CTRL)); 884 udelay(1); 885 val <<= 1; 886 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCPR_DATA)) 887 val |= 1; 888 } 889 890 spin_unlock_irq(&chip->reg_lock); 891 892 return val; 893 } 894 895 /* 64PCR GPIO numbers */ 896 #define TEA_64PCR_BUS_CLOCK 0 897 #define TEA_64PCR_WRITE_ENABLE 1 /* inverted */ 898 #define TEA_64PCR_DATA 2 899 900 static void snd_fm801_tea575x_64pcr_write(struct snd_tea575x *tea, unsigned int val) 901 { 902 struct fm801 *chip = tea->private_data; 903 unsigned short reg; 904 int i = 25; 905 906 spin_lock_irq(&chip->reg_lock); 907 reg = inw(FM801_REG(chip, GPIO_CTRL)); 908 /* use GPIO lines and set write enable bit */ 909 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) | 910 FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) | 911 FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK); 912 /* all of lines are in the write direction */ 913 /* clear data and clock lines */ 914 reg &= ~(FM801_GPIO_GD(TEA_64PCR_DATA) | 915 FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) | 916 FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) | 917 FM801_GPIO_GP(TEA_64PCR_DATA) | 918 FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK) | 919 FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE)); 920 outw(reg, FM801_REG(chip, GPIO_CTRL)); 921 udelay(1); 922 923 while (i--) { 924 if (val & (1 << i)) 925 reg |= FM801_GPIO_GP(TEA_64PCR_DATA); 926 else 927 reg &= ~FM801_GPIO_GP(TEA_64PCR_DATA); 928 outw(reg, FM801_REG(chip, GPIO_CTRL)); 929 udelay(1); 930 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); 931 outw(reg, FM801_REG(chip, GPIO_CTRL)); 932 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); 933 outw(reg, FM801_REG(chip, GPIO_CTRL)); 934 udelay(1); 935 } 936 937 /* and reset the write enable bit */ 938 reg |= FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE) | 939 FM801_GPIO_GP(TEA_64PCR_DATA); 940 outw(reg, FM801_REG(chip, GPIO_CTRL)); 941 spin_unlock_irq(&chip->reg_lock); 942 } 943 944 static unsigned int snd_fm801_tea575x_64pcr_read(struct snd_tea575x *tea) 945 { 946 struct fm801 *chip = tea->private_data; 947 unsigned short reg; 948 unsigned int val = 0; 949 int i; 950 951 spin_lock_irq(&chip->reg_lock); 952 reg = inw(FM801_REG(chip, GPIO_CTRL)); 953 /* use GPIO lines, set data direction to input */ 954 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) | 955 FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) | 956 FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK) | 957 FM801_GPIO_GD(TEA_64PCR_DATA) | 958 FM801_GPIO_GP(TEA_64PCR_DATA) | 959 FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE); 960 /* all of lines are in the write direction, except data */ 961 /* clear data, write enable and clock lines */ 962 reg &= ~(FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) | 963 FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) | 964 FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK)); 965 966 for (i = 0; i < 24; i++) { 967 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); 968 outw(reg, FM801_REG(chip, GPIO_CTRL)); 969 udelay(1); 970 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); 971 outw(reg, FM801_REG(chip, GPIO_CTRL)); 972 udelay(1); 973 val <<= 1; 974 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_64PCR_DATA)) 975 val |= 1; 976 } 977 978 spin_unlock_irq(&chip->reg_lock); 979 980 return val; 981 } 982 983 static struct snd_tea575x_ops snd_fm801_tea_ops[3] = { 984 { 985 /* 1 = MediaForte 256-PCS */ 986 .write = snd_fm801_tea575x_256pcs_write, 987 .read = snd_fm801_tea575x_256pcs_read, 988 }, 989 { 990 /* 2 = MediaForte 256-PCPR */ 991 .write = snd_fm801_tea575x_256pcpr_write, 992 .read = snd_fm801_tea575x_256pcpr_read, 993 }, 994 { 995 /* 3 = MediaForte 64-PCR */ 996 .write = snd_fm801_tea575x_64pcr_write, 997 .read = snd_fm801_tea575x_64pcr_read, 998 } 999 }; 1000 #endif 1001 1002 /* 1003 * Mixer routines 1004 */ 1005 1006 #define FM801_SINGLE(xname, reg, shift, mask, invert) \ 1007 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \ 1008 .get = snd_fm801_get_single, .put = snd_fm801_put_single, \ 1009 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } 1010 1011 static int snd_fm801_info_single(struct snd_kcontrol *kcontrol, 1012 struct snd_ctl_elem_info *uinfo) 1013 { 1014 int mask = (kcontrol->private_value >> 16) & 0xff; 1015 1016 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 1017 uinfo->count = 1; 1018 uinfo->value.integer.min = 0; 1019 uinfo->value.integer.max = mask; 1020 return 0; 1021 } 1022 1023 static int snd_fm801_get_single(struct snd_kcontrol *kcontrol, 1024 struct snd_ctl_elem_value *ucontrol) 1025 { 1026 struct fm801 *chip = snd_kcontrol_chip(kcontrol); 1027 int reg = kcontrol->private_value & 0xff; 1028 int shift = (kcontrol->private_value >> 8) & 0xff; 1029 int mask = (kcontrol->private_value >> 16) & 0xff; 1030 int invert = (kcontrol->private_value >> 24) & 0xff; 1031 1032 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift) & mask; 1033 if (invert) 1034 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; 1035 return 0; 1036 } 1037 1038 static int snd_fm801_put_single(struct snd_kcontrol *kcontrol, 1039 struct snd_ctl_elem_value *ucontrol) 1040 { 1041 struct fm801 *chip = snd_kcontrol_chip(kcontrol); 1042 int reg = kcontrol->private_value & 0xff; 1043 int shift = (kcontrol->private_value >> 8) & 0xff; 1044 int mask = (kcontrol->private_value >> 16) & 0xff; 1045 int invert = (kcontrol->private_value >> 24) & 0xff; 1046 unsigned short val; 1047 1048 val = (ucontrol->value.integer.value[0] & mask); 1049 if (invert) 1050 val = mask - val; 1051 return snd_fm801_update_bits(chip, reg, mask << shift, val << shift); 1052 } 1053 1054 #define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \ 1055 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \ 1056 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \ 1057 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) } 1058 1059 static int snd_fm801_info_double(struct snd_kcontrol *kcontrol, 1060 struct snd_ctl_elem_info *uinfo) 1061 { 1062 int mask = (kcontrol->private_value >> 16) & 0xff; 1063 1064 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 1065 uinfo->count = 2; 1066 uinfo->value.integer.min = 0; 1067 uinfo->value.integer.max = mask; 1068 return 0; 1069 } 1070 1071 static int snd_fm801_get_double(struct snd_kcontrol *kcontrol, 1072 struct snd_ctl_elem_value *ucontrol) 1073 { 1074 struct fm801 *chip = snd_kcontrol_chip(kcontrol); 1075 int reg = kcontrol->private_value & 0xff; 1076 int shift_left = (kcontrol->private_value >> 8) & 0x0f; 1077 int shift_right = (kcontrol->private_value >> 12) & 0x0f; 1078 int mask = (kcontrol->private_value >> 16) & 0xff; 1079 int invert = (kcontrol->private_value >> 24) & 0xff; 1080 1081 spin_lock_irq(&chip->reg_lock); 1082 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift_left) & mask; 1083 ucontrol->value.integer.value[1] = (inw(chip->port + reg) >> shift_right) & mask; 1084 spin_unlock_irq(&chip->reg_lock); 1085 if (invert) { 1086 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; 1087 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1]; 1088 } 1089 return 0; 1090 } 1091 1092 static int snd_fm801_put_double(struct snd_kcontrol *kcontrol, 1093 struct snd_ctl_elem_value *ucontrol) 1094 { 1095 struct fm801 *chip = snd_kcontrol_chip(kcontrol); 1096 int reg = kcontrol->private_value & 0xff; 1097 int shift_left = (kcontrol->private_value >> 8) & 0x0f; 1098 int shift_right = (kcontrol->private_value >> 12) & 0x0f; 1099 int mask = (kcontrol->private_value >> 16) & 0xff; 1100 int invert = (kcontrol->private_value >> 24) & 0xff; 1101 unsigned short val1, val2; 1102 1103 val1 = ucontrol->value.integer.value[0] & mask; 1104 val2 = ucontrol->value.integer.value[1] & mask; 1105 if (invert) { 1106 val1 = mask - val1; 1107 val2 = mask - val2; 1108 } 1109 return snd_fm801_update_bits(chip, reg, 1110 (mask << shift_left) | (mask << shift_right), 1111 (val1 << shift_left ) | (val2 << shift_right)); 1112 } 1113 1114 static int snd_fm801_info_mux(struct snd_kcontrol *kcontrol, 1115 struct snd_ctl_elem_info *uinfo) 1116 { 1117 static char *texts[5] = { 1118 "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary" 1119 }; 1120 1121 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1122 uinfo->count = 1; 1123 uinfo->value.enumerated.items = 5; 1124 if (uinfo->value.enumerated.item > 4) 1125 uinfo->value.enumerated.item = 4; 1126 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1127 return 0; 1128 } 1129 1130 static int snd_fm801_get_mux(struct snd_kcontrol *kcontrol, 1131 struct snd_ctl_elem_value *ucontrol) 1132 { 1133 struct fm801 *chip = snd_kcontrol_chip(kcontrol); 1134 unsigned short val; 1135 1136 val = inw(FM801_REG(chip, REC_SRC)) & 7; 1137 if (val > 4) 1138 val = 4; 1139 ucontrol->value.enumerated.item[0] = val; 1140 return 0; 1141 } 1142 1143 static int snd_fm801_put_mux(struct snd_kcontrol *kcontrol, 1144 struct snd_ctl_elem_value *ucontrol) 1145 { 1146 struct fm801 *chip = snd_kcontrol_chip(kcontrol); 1147 unsigned short val; 1148 1149 if ((val = ucontrol->value.enumerated.item[0]) > 4) 1150 return -EINVAL; 1151 return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val); 1152 } 1153 1154 #define FM801_CONTROLS ARRAY_SIZE(snd_fm801_controls) 1155 1156 static struct snd_kcontrol_new snd_fm801_controls[] __devinitdata = { 1157 FM801_DOUBLE("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1), 1158 FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1), 1159 FM801_DOUBLE("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1), 1160 FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1), 1161 FM801_DOUBLE("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1), 1162 FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1), 1163 { 1164 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1165 .name = "Digital Capture Source", 1166 .info = snd_fm801_info_mux, 1167 .get = snd_fm801_get_mux, 1168 .put = snd_fm801_put_mux, 1169 } 1170 }; 1171 1172 #define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_fm801_controls_multi) 1173 1174 static struct snd_kcontrol_new snd_fm801_controls_multi[] __devinitdata = { 1175 FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0), 1176 FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0), 1177 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0), 1178 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0), 1179 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0), 1180 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0), 1181 }; 1182 1183 static void snd_fm801_mixer_free_ac97_bus(struct snd_ac97_bus *bus) 1184 { 1185 struct fm801 *chip = bus->private_data; 1186 chip->ac97_bus = NULL; 1187 } 1188 1189 static void snd_fm801_mixer_free_ac97(struct snd_ac97 *ac97) 1190 { 1191 struct fm801 *chip = ac97->private_data; 1192 if (ac97->num == 0) { 1193 chip->ac97 = NULL; 1194 } else { 1195 chip->ac97_sec = NULL; 1196 } 1197 } 1198 1199 static int __devinit snd_fm801_mixer(struct fm801 *chip) 1200 { 1201 struct snd_ac97_template ac97; 1202 unsigned int i; 1203 int err; 1204 static struct snd_ac97_bus_ops ops = { 1205 .write = snd_fm801_codec_write, 1206 .read = snd_fm801_codec_read, 1207 }; 1208 1209 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) 1210 return err; 1211 chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus; 1212 1213 memset(&ac97, 0, sizeof(ac97)); 1214 ac97.private_data = chip; 1215 ac97.private_free = snd_fm801_mixer_free_ac97; 1216 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) 1217 return err; 1218 if (chip->secondary) { 1219 ac97.num = 1; 1220 ac97.addr = chip->secondary_addr; 1221 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0) 1222 return err; 1223 } 1224 for (i = 0; i < FM801_CONTROLS; i++) 1225 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip)); 1226 if (chip->multichannel) { 1227 for (i = 0; i < FM801_CONTROLS_MULTI; i++) 1228 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip)); 1229 } 1230 return 0; 1231 } 1232 1233 /* 1234 * initialization routines 1235 */ 1236 1237 static int wait_for_codec(struct fm801 *chip, unsigned int codec_id, 1238 unsigned short reg, unsigned long waits) 1239 { 1240 unsigned long timeout = jiffies + waits; 1241 1242 outw(FM801_AC97_READ | (codec_id << FM801_AC97_ADDR_SHIFT) | reg, 1243 FM801_REG(chip, AC97_CMD)); 1244 udelay(5); 1245 do { 1246 if ((inw(FM801_REG(chip, AC97_CMD)) & (FM801_AC97_VALID|FM801_AC97_BUSY)) 1247 == FM801_AC97_VALID) 1248 return 0; 1249 schedule_timeout_uninterruptible(1); 1250 } while (time_after(timeout, jiffies)); 1251 return -EIO; 1252 } 1253 1254 static int snd_fm801_chip_init(struct fm801 *chip, int resume) 1255 { 1256 int id; 1257 unsigned short cmdw; 1258 1259 if (chip->tea575x_tuner & 0x0010) 1260 goto __ac97_ok; 1261 1262 /* codec cold reset + AC'97 warm reset */ 1263 outw((1<<5) | (1<<6), FM801_REG(chip, CODEC_CTRL)); 1264 inw(FM801_REG(chip, CODEC_CTRL)); /* flush posting data */ 1265 udelay(100); 1266 outw(0, FM801_REG(chip, CODEC_CTRL)); 1267 1268 if (wait_for_codec(chip, 0, AC97_RESET, msecs_to_jiffies(750)) < 0) { 1269 snd_printk(KERN_ERR "Primary AC'97 codec not found\n"); 1270 if (! resume) 1271 return -EIO; 1272 } 1273 1274 if (chip->multichannel) { 1275 if (chip->secondary_addr) { 1276 wait_for_codec(chip, chip->secondary_addr, 1277 AC97_VENDOR_ID1, msecs_to_jiffies(50)); 1278 } else { 1279 /* my card has the secondary codec */ 1280 /* at address #3, so the loop is inverted */ 1281 for (id = 3; id > 0; id--) { 1282 if (! wait_for_codec(chip, id, AC97_VENDOR_ID1, 1283 msecs_to_jiffies(50))) { 1284 cmdw = inw(FM801_REG(chip, AC97_DATA)); 1285 if (cmdw != 0xffff && cmdw != 0) { 1286 chip->secondary = 1; 1287 chip->secondary_addr = id; 1288 break; 1289 } 1290 } 1291 } 1292 } 1293 1294 /* the recovery phase, it seems that probing for non-existing codec might */ 1295 /* cause timeout problems */ 1296 wait_for_codec(chip, 0, AC97_VENDOR_ID1, msecs_to_jiffies(750)); 1297 } 1298 1299 __ac97_ok: 1300 1301 /* init volume */ 1302 outw(0x0808, FM801_REG(chip, PCM_VOL)); 1303 outw(0x9f1f, FM801_REG(chip, FM_VOL)); 1304 outw(0x8808, FM801_REG(chip, I2S_VOL)); 1305 1306 /* I2S control - I2S mode */ 1307 outw(0x0003, FM801_REG(chip, I2S_MODE)); 1308 1309 /* interrupt setup */ 1310 cmdw = inw(FM801_REG(chip, IRQ_MASK)); 1311 if (chip->irq < 0) 1312 cmdw |= 0x00c3; /* mask everything, no PCM nor MPU */ 1313 else 1314 cmdw &= ~0x0083; /* unmask MPU, PLAYBACK & CAPTURE */ 1315 outw(cmdw, FM801_REG(chip, IRQ_MASK)); 1316 1317 /* interrupt clear */ 1318 outw(FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU, FM801_REG(chip, IRQ_STATUS)); 1319 1320 return 0; 1321 } 1322 1323 1324 static int snd_fm801_free(struct fm801 *chip) 1325 { 1326 unsigned short cmdw; 1327 1328 if (chip->irq < 0) 1329 goto __end_hw; 1330 1331 /* interrupt setup - mask everything */ 1332 cmdw = inw(FM801_REG(chip, IRQ_MASK)); 1333 cmdw |= 0x00c3; 1334 outw(cmdw, FM801_REG(chip, IRQ_MASK)); 1335 1336 __end_hw: 1337 #ifdef TEA575X_RADIO 1338 snd_tea575x_exit(&chip->tea); 1339 #endif 1340 if (chip->irq >= 0) 1341 free_irq(chip->irq, chip); 1342 pci_release_regions(chip->pci); 1343 pci_disable_device(chip->pci); 1344 1345 kfree(chip); 1346 return 0; 1347 } 1348 1349 static int snd_fm801_dev_free(struct snd_device *device) 1350 { 1351 struct fm801 *chip = device->device_data; 1352 return snd_fm801_free(chip); 1353 } 1354 1355 static int __devinit snd_fm801_create(struct snd_card *card, 1356 struct pci_dev * pci, 1357 int tea575x_tuner, 1358 struct fm801 ** rchip) 1359 { 1360 struct fm801 *chip; 1361 unsigned char rev; 1362 int err; 1363 static struct snd_device_ops ops = { 1364 .dev_free = snd_fm801_dev_free, 1365 }; 1366 1367 *rchip = NULL; 1368 if ((err = pci_enable_device(pci)) < 0) 1369 return err; 1370 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 1371 if (chip == NULL) { 1372 pci_disable_device(pci); 1373 return -ENOMEM; 1374 } 1375 spin_lock_init(&chip->reg_lock); 1376 chip->card = card; 1377 chip->pci = pci; 1378 chip->irq = -1; 1379 chip->tea575x_tuner = tea575x_tuner; 1380 if ((err = pci_request_regions(pci, "FM801")) < 0) { 1381 kfree(chip); 1382 pci_disable_device(pci); 1383 return err; 1384 } 1385 chip->port = pci_resource_start(pci, 0); 1386 if ((tea575x_tuner & 0x0010) == 0) { 1387 if (request_irq(pci->irq, snd_fm801_interrupt, IRQF_DISABLED|IRQF_SHARED, 1388 "FM801", chip)) { 1389 snd_printk(KERN_ERR "unable to grab IRQ %d\n", chip->irq); 1390 snd_fm801_free(chip); 1391 return -EBUSY; 1392 } 1393 chip->irq = pci->irq; 1394 pci_set_master(pci); 1395 } 1396 1397 pci_read_config_byte(pci, PCI_REVISION_ID, &rev); 1398 if (rev >= 0xb1) /* FM801-AU */ 1399 chip->multichannel = 1; 1400 1401 snd_fm801_chip_init(chip, 0); 1402 1403 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 1404 snd_fm801_free(chip); 1405 return err; 1406 } 1407 1408 snd_card_set_dev(card, &pci->dev); 1409 1410 #ifdef TEA575X_RADIO 1411 if (tea575x_tuner > 0 && (tea575x_tuner & 0x000f) < 4) { 1412 chip->tea.dev_nr = tea575x_tuner >> 16; 1413 chip->tea.card = card; 1414 chip->tea.freq_fixup = 10700; 1415 chip->tea.private_data = chip; 1416 chip->tea.ops = &snd_fm801_tea_ops[(tea575x_tuner & 0x000f) - 1]; 1417 snd_tea575x_init(&chip->tea); 1418 } 1419 #endif 1420 1421 *rchip = chip; 1422 return 0; 1423 } 1424 1425 static int __devinit snd_card_fm801_probe(struct pci_dev *pci, 1426 const struct pci_device_id *pci_id) 1427 { 1428 static int dev; 1429 struct snd_card *card; 1430 struct fm801 *chip; 1431 struct snd_opl3 *opl3; 1432 int err; 1433 1434 if (dev >= SNDRV_CARDS) 1435 return -ENODEV; 1436 if (!enable[dev]) { 1437 dev++; 1438 return -ENOENT; 1439 } 1440 1441 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); 1442 if (card == NULL) 1443 return -ENOMEM; 1444 if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], &chip)) < 0) { 1445 snd_card_free(card); 1446 return err; 1447 } 1448 card->private_data = chip; 1449 1450 strcpy(card->driver, "FM801"); 1451 strcpy(card->shortname, "ForteMedia FM801-"); 1452 strcat(card->shortname, chip->multichannel ? "AU" : "AS"); 1453 sprintf(card->longname, "%s at 0x%lx, irq %i", 1454 card->shortname, chip->port, chip->irq); 1455 1456 if (tea575x_tuner[dev] & 0x0010) 1457 goto __fm801_tuner_only; 1458 1459 if ((err = snd_fm801_pcm(chip, 0, NULL)) < 0) { 1460 snd_card_free(card); 1461 return err; 1462 } 1463 if ((err = snd_fm801_mixer(chip)) < 0) { 1464 snd_card_free(card); 1465 return err; 1466 } 1467 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801, 1468 FM801_REG(chip, MPU401_DATA), 1469 MPU401_INFO_INTEGRATED, 1470 chip->irq, 0, &chip->rmidi)) < 0) { 1471 snd_card_free(card); 1472 return err; 1473 } 1474 if ((err = snd_opl3_create(card, FM801_REG(chip, OPL3_BANK0), 1475 FM801_REG(chip, OPL3_BANK1), 1476 OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) { 1477 snd_card_free(card); 1478 return err; 1479 } 1480 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) { 1481 snd_card_free(card); 1482 return err; 1483 } 1484 1485 __fm801_tuner_only: 1486 if ((err = snd_card_register(card)) < 0) { 1487 snd_card_free(card); 1488 return err; 1489 } 1490 pci_set_drvdata(pci, card); 1491 dev++; 1492 return 0; 1493 } 1494 1495 static void __devexit snd_card_fm801_remove(struct pci_dev *pci) 1496 { 1497 snd_card_free(pci_get_drvdata(pci)); 1498 pci_set_drvdata(pci, NULL); 1499 } 1500 1501 #ifdef CONFIG_PM 1502 static unsigned char saved_regs[] = { 1503 FM801_PCM_VOL, FM801_I2S_VOL, FM801_FM_VOL, FM801_REC_SRC, 1504 FM801_PLY_CTRL, FM801_PLY_COUNT, FM801_PLY_BUF1, FM801_PLY_BUF2, 1505 FM801_CAP_CTRL, FM801_CAP_COUNT, FM801_CAP_BUF1, FM801_CAP_BUF2, 1506 FM801_CODEC_CTRL, FM801_I2S_MODE, FM801_VOLUME, FM801_GEN_CTRL, 1507 }; 1508 1509 static int snd_fm801_suspend(struct pci_dev *pci, pm_message_t state) 1510 { 1511 struct snd_card *card = pci_get_drvdata(pci); 1512 struct fm801 *chip = card->private_data; 1513 int i; 1514 1515 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 1516 snd_pcm_suspend_all(chip->pcm); 1517 snd_ac97_suspend(chip->ac97); 1518 snd_ac97_suspend(chip->ac97_sec); 1519 for (i = 0; i < ARRAY_SIZE(saved_regs); i++) 1520 chip->saved_regs[i] = inw(chip->port + saved_regs[i]); 1521 /* FIXME: tea575x suspend */ 1522 1523 pci_set_power_state(pci, PCI_D3hot); 1524 pci_disable_device(pci); 1525 pci_save_state(pci); 1526 return 0; 1527 } 1528 1529 static int snd_fm801_resume(struct pci_dev *pci) 1530 { 1531 struct snd_card *card = pci_get_drvdata(pci); 1532 struct fm801 *chip = card->private_data; 1533 int i; 1534 1535 pci_restore_state(pci); 1536 pci_enable_device(pci); 1537 pci_set_power_state(pci, PCI_D0); 1538 pci_set_master(pci); 1539 1540 snd_fm801_chip_init(chip, 1); 1541 snd_ac97_resume(chip->ac97); 1542 snd_ac97_resume(chip->ac97_sec); 1543 for (i = 0; i < ARRAY_SIZE(saved_regs); i++) 1544 outw(chip->saved_regs[i], chip->port + saved_regs[i]); 1545 1546 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 1547 return 0; 1548 } 1549 #endif 1550 1551 static struct pci_driver driver = { 1552 .name = "FM801", 1553 .id_table = snd_fm801_ids, 1554 .probe = snd_card_fm801_probe, 1555 .remove = __devexit_p(snd_card_fm801_remove), 1556 #ifdef CONFIG_PM 1557 .suspend = snd_fm801_suspend, 1558 .resume = snd_fm801_resume, 1559 #endif 1560 }; 1561 1562 static int __init alsa_card_fm801_init(void) 1563 { 1564 return pci_register_driver(&driver); 1565 } 1566 1567 static void __exit alsa_card_fm801_exit(void) 1568 { 1569 pci_unregister_driver(&driver); 1570 } 1571 1572 module_init(alsa_card_fm801_init) 1573 module_exit(alsa_card_fm801_exit) 1574