1 /* 2 * The driver for the ForteMedia FM801 based soundcards 3 * Copyright (c) by Jaroslav Kysela <perex@suse.cz> 4 * 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * 20 */ 21 22 #include <sound/driver.h> 23 #include <linux/delay.h> 24 #include <linux/init.h> 25 #include <linux/interrupt.h> 26 #include <linux/pci.h> 27 #include <linux/slab.h> 28 #include <linux/moduleparam.h> 29 #include <sound/core.h> 30 #include <sound/pcm.h> 31 #include <sound/ac97_codec.h> 32 #include <sound/mpu401.h> 33 #include <sound/opl3.h> 34 #include <sound/initval.h> 35 36 #include <asm/io.h> 37 38 #ifdef CONFIG_SND_FM801_TEA575X_BOOL 39 #include <sound/tea575x-tuner.h> 40 #define TEA575X_RADIO 1 41 #endif 42 43 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>"); 44 MODULE_DESCRIPTION("ForteMedia FM801"); 45 MODULE_LICENSE("GPL"); 46 MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801}," 47 "{Genius,SoundMaker Live 5.1}}"); 48 49 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 50 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 51 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 52 /* 53 * Enable TEA575x tuner 54 * 1 = MediaForte 256-PCS 55 * 2 = MediaForte 256-PCPR 56 * 3 = MediaForte 64-PCR 57 * High 16-bits are video (radio) device number + 1 58 */ 59 static int tea575x_tuner[SNDRV_CARDS]; 60 61 module_param_array(index, int, NULL, 0444); 62 MODULE_PARM_DESC(index, "Index value for the FM801 soundcard."); 63 module_param_array(id, charp, NULL, 0444); 64 MODULE_PARM_DESC(id, "ID string for the FM801 soundcard."); 65 module_param_array(enable, bool, NULL, 0444); 66 MODULE_PARM_DESC(enable, "Enable FM801 soundcard."); 67 module_param_array(tea575x_tuner, int, NULL, 0444); 68 MODULE_PARM_DESC(tea575x_tuner, "Enable TEA575x tuner."); 69 70 /* 71 * Direct registers 72 */ 73 74 #define FM801_REG(chip, reg) (chip->port + FM801_##reg) 75 76 #define FM801_PCM_VOL 0x00 /* PCM Output Volume */ 77 #define FM801_FM_VOL 0x02 /* FM Output Volume */ 78 #define FM801_I2S_VOL 0x04 /* I2S Volume */ 79 #define FM801_REC_SRC 0x06 /* Record Source */ 80 #define FM801_PLY_CTRL 0x08 /* Playback Control */ 81 #define FM801_PLY_COUNT 0x0a /* Playback Count */ 82 #define FM801_PLY_BUF1 0x0c /* Playback Bufer I */ 83 #define FM801_PLY_BUF2 0x10 /* Playback Buffer II */ 84 #define FM801_CAP_CTRL 0x14 /* Capture Control */ 85 #define FM801_CAP_COUNT 0x16 /* Capture Count */ 86 #define FM801_CAP_BUF1 0x18 /* Capture Buffer I */ 87 #define FM801_CAP_BUF2 0x1c /* Capture Buffer II */ 88 #define FM801_CODEC_CTRL 0x22 /* Codec Control */ 89 #define FM801_I2S_MODE 0x24 /* I2S Mode Control */ 90 #define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */ 91 #define FM801_I2C_CTRL 0x29 /* I2C Control */ 92 #define FM801_AC97_CMD 0x2a /* AC'97 Command */ 93 #define FM801_AC97_DATA 0x2c /* AC'97 Data */ 94 #define FM801_MPU401_DATA 0x30 /* MPU401 Data */ 95 #define FM801_MPU401_CMD 0x31 /* MPU401 Command */ 96 #define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */ 97 #define FM801_GEN_CTRL 0x54 /* General Control */ 98 #define FM801_IRQ_MASK 0x56 /* Interrupt Mask */ 99 #define FM801_IRQ_STATUS 0x5a /* Interrupt Status */ 100 #define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */ 101 #define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */ 102 #define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */ 103 #define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */ 104 #define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */ 105 106 /* codec access */ 107 #define FM801_AC97_READ (1<<7) /* read=1, write=0 */ 108 #define FM801_AC97_VALID (1<<8) /* port valid=1 */ 109 #define FM801_AC97_BUSY (1<<9) /* busy=1 */ 110 #define FM801_AC97_ADDR_SHIFT 10 /* codec id (2bit) */ 111 112 /* playback and record control register bits */ 113 #define FM801_BUF1_LAST (1<<1) 114 #define FM801_BUF2_LAST (1<<2) 115 #define FM801_START (1<<5) 116 #define FM801_PAUSE (1<<6) 117 #define FM801_IMMED_STOP (1<<7) 118 #define FM801_RATE_SHIFT 8 119 #define FM801_RATE_MASK (15 << FM801_RATE_SHIFT) 120 #define FM801_CHANNELS_4 (1<<12) /* playback only */ 121 #define FM801_CHANNELS_6 (2<<12) /* playback only */ 122 #define FM801_CHANNELS_6MS (3<<12) /* playback only */ 123 #define FM801_CHANNELS_MASK (3<<12) 124 #define FM801_16BIT (1<<14) 125 #define FM801_STEREO (1<<15) 126 127 /* IRQ status bits */ 128 #define FM801_IRQ_PLAYBACK (1<<8) 129 #define FM801_IRQ_CAPTURE (1<<9) 130 #define FM801_IRQ_VOLUME (1<<14) 131 #define FM801_IRQ_MPU (1<<15) 132 133 /* GPIO control register */ 134 #define FM801_GPIO_GP0 (1<<0) /* read/write */ 135 #define FM801_GPIO_GP1 (1<<1) 136 #define FM801_GPIO_GP2 (1<<2) 137 #define FM801_GPIO_GP3 (1<<3) 138 #define FM801_GPIO_GP(x) (1<<(0+(x))) 139 #define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/ 140 #define FM801_GPIO_GD1 (1<<9) 141 #define FM801_GPIO_GD2 (1<<10) 142 #define FM801_GPIO_GD3 (1<<11) 143 #define FM801_GPIO_GD(x) (1<<(8+(x))) 144 #define FM801_GPIO_GS0 (1<<12) /* function select: */ 145 #define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */ 146 #define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */ 147 #define FM801_GPIO_GS3 (1<<15) 148 #define FM801_GPIO_GS(x) (1<<(12+(x))) 149 150 /* 151 152 */ 153 154 struct fm801 { 155 int irq; 156 157 unsigned long port; /* I/O port number */ 158 unsigned int multichannel: 1, /* multichannel support */ 159 secondary: 1; /* secondary codec */ 160 unsigned char secondary_addr; /* address of the secondary codec */ 161 162 unsigned short ply_ctrl; /* playback control */ 163 unsigned short cap_ctrl; /* capture control */ 164 165 unsigned long ply_buffer; 166 unsigned int ply_buf; 167 unsigned int ply_count; 168 unsigned int ply_size; 169 unsigned int ply_pos; 170 171 unsigned long cap_buffer; 172 unsigned int cap_buf; 173 unsigned int cap_count; 174 unsigned int cap_size; 175 unsigned int cap_pos; 176 177 struct snd_ac97_bus *ac97_bus; 178 struct snd_ac97 *ac97; 179 struct snd_ac97 *ac97_sec; 180 181 struct pci_dev *pci; 182 struct snd_card *card; 183 struct snd_pcm *pcm; 184 struct snd_rawmidi *rmidi; 185 struct snd_pcm_substream *playback_substream; 186 struct snd_pcm_substream *capture_substream; 187 unsigned int p_dma_size; 188 unsigned int c_dma_size; 189 190 spinlock_t reg_lock; 191 struct snd_info_entry *proc_entry; 192 193 #ifdef TEA575X_RADIO 194 struct snd_tea575x tea; 195 #endif 196 197 #ifdef CONFIG_PM 198 u16 saved_regs[0x20]; 199 #endif 200 }; 201 202 static struct pci_device_id snd_fm801_ids[] = { 203 { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */ 204 { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* Gallant Odyssey Sound 4 */ 205 { 0, } 206 }; 207 208 MODULE_DEVICE_TABLE(pci, snd_fm801_ids); 209 210 /* 211 * common I/O routines 212 */ 213 214 static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg, 215 unsigned short mask, unsigned short value) 216 { 217 int change; 218 unsigned long flags; 219 unsigned short old, new; 220 221 spin_lock_irqsave(&chip->reg_lock, flags); 222 old = inw(chip->port + reg); 223 new = (old & ~mask) | value; 224 change = old != new; 225 if (change) 226 outw(new, chip->port + reg); 227 spin_unlock_irqrestore(&chip->reg_lock, flags); 228 return change; 229 } 230 231 static void snd_fm801_codec_write(struct snd_ac97 *ac97, 232 unsigned short reg, 233 unsigned short val) 234 { 235 struct fm801 *chip = ac97->private_data; 236 int idx; 237 238 /* 239 * Wait until the codec interface is not ready.. 240 */ 241 for (idx = 0; idx < 100; idx++) { 242 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY)) 243 goto ok1; 244 udelay(10); 245 } 246 snd_printk(KERN_ERR "AC'97 interface is busy (1)\n"); 247 return; 248 249 ok1: 250 /* write data and address */ 251 outw(val, FM801_REG(chip, AC97_DATA)); 252 outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD)); 253 /* 254 * Wait until the write command is not completed.. 255 */ 256 for (idx = 0; idx < 1000; idx++) { 257 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY)) 258 return; 259 udelay(10); 260 } 261 snd_printk(KERN_ERR "AC'97 interface #%d is busy (2)\n", ac97->num); 262 } 263 264 static unsigned short snd_fm801_codec_read(struct snd_ac97 *ac97, unsigned short reg) 265 { 266 struct fm801 *chip = ac97->private_data; 267 int idx; 268 269 /* 270 * Wait until the codec interface is not ready.. 271 */ 272 for (idx = 0; idx < 100; idx++) { 273 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY)) 274 goto ok1; 275 udelay(10); 276 } 277 snd_printk(KERN_ERR "AC'97 interface is busy (1)\n"); 278 return 0; 279 280 ok1: 281 /* read command */ 282 outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ, 283 FM801_REG(chip, AC97_CMD)); 284 for (idx = 0; idx < 100; idx++) { 285 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY)) 286 goto ok2; 287 udelay(10); 288 } 289 snd_printk(KERN_ERR "AC'97 interface #%d is busy (2)\n", ac97->num); 290 return 0; 291 292 ok2: 293 for (idx = 0; idx < 1000; idx++) { 294 if (inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_VALID) 295 goto ok3; 296 udelay(10); 297 } 298 snd_printk(KERN_ERR "AC'97 interface #%d is not valid (2)\n", ac97->num); 299 return 0; 300 301 ok3: 302 return inw(FM801_REG(chip, AC97_DATA)); 303 } 304 305 static unsigned int rates[] = { 306 5500, 8000, 9600, 11025, 307 16000, 19200, 22050, 32000, 308 38400, 44100, 48000 309 }; 310 311 static struct snd_pcm_hw_constraint_list hw_constraints_rates = { 312 .count = ARRAY_SIZE(rates), 313 .list = rates, 314 .mask = 0, 315 }; 316 317 static unsigned int channels[] = { 318 2, 4, 6 319 }; 320 321 #define CHANNELS sizeof(channels) / sizeof(channels[0]) 322 323 static struct snd_pcm_hw_constraint_list hw_constraints_channels = { 324 .count = CHANNELS, 325 .list = channels, 326 .mask = 0, 327 }; 328 329 /* 330 * Sample rate routines 331 */ 332 333 static unsigned short snd_fm801_rate_bits(unsigned int rate) 334 { 335 unsigned int idx; 336 337 for (idx = 0; idx < ARRAY_SIZE(rates); idx++) 338 if (rates[idx] == rate) 339 return idx; 340 snd_BUG(); 341 return ARRAY_SIZE(rates) - 1; 342 } 343 344 /* 345 * PCM part 346 */ 347 348 static int snd_fm801_playback_trigger(struct snd_pcm_substream *substream, 349 int cmd) 350 { 351 struct fm801 *chip = snd_pcm_substream_chip(substream); 352 353 spin_lock(&chip->reg_lock); 354 switch (cmd) { 355 case SNDRV_PCM_TRIGGER_START: 356 chip->ply_ctrl &= ~(FM801_BUF1_LAST | 357 FM801_BUF2_LAST | 358 FM801_PAUSE); 359 chip->ply_ctrl |= FM801_START | 360 FM801_IMMED_STOP; 361 break; 362 case SNDRV_PCM_TRIGGER_STOP: 363 chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE); 364 break; 365 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 366 case SNDRV_PCM_TRIGGER_SUSPEND: 367 chip->ply_ctrl |= FM801_PAUSE; 368 break; 369 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 370 case SNDRV_PCM_TRIGGER_RESUME: 371 chip->ply_ctrl &= ~FM801_PAUSE; 372 break; 373 default: 374 spin_unlock(&chip->reg_lock); 375 snd_BUG(); 376 return -EINVAL; 377 } 378 outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL)); 379 spin_unlock(&chip->reg_lock); 380 return 0; 381 } 382 383 static int snd_fm801_capture_trigger(struct snd_pcm_substream *substream, 384 int cmd) 385 { 386 struct fm801 *chip = snd_pcm_substream_chip(substream); 387 388 spin_lock(&chip->reg_lock); 389 switch (cmd) { 390 case SNDRV_PCM_TRIGGER_START: 391 chip->cap_ctrl &= ~(FM801_BUF1_LAST | 392 FM801_BUF2_LAST | 393 FM801_PAUSE); 394 chip->cap_ctrl |= FM801_START | 395 FM801_IMMED_STOP; 396 break; 397 case SNDRV_PCM_TRIGGER_STOP: 398 chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE); 399 break; 400 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 401 case SNDRV_PCM_TRIGGER_SUSPEND: 402 chip->cap_ctrl |= FM801_PAUSE; 403 break; 404 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 405 case SNDRV_PCM_TRIGGER_RESUME: 406 chip->cap_ctrl &= ~FM801_PAUSE; 407 break; 408 default: 409 spin_unlock(&chip->reg_lock); 410 snd_BUG(); 411 return -EINVAL; 412 } 413 outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL)); 414 spin_unlock(&chip->reg_lock); 415 return 0; 416 } 417 418 static int snd_fm801_hw_params(struct snd_pcm_substream *substream, 419 struct snd_pcm_hw_params *hw_params) 420 { 421 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 422 } 423 424 static int snd_fm801_hw_free(struct snd_pcm_substream *substream) 425 { 426 return snd_pcm_lib_free_pages(substream); 427 } 428 429 static int snd_fm801_playback_prepare(struct snd_pcm_substream *substream) 430 { 431 struct fm801 *chip = snd_pcm_substream_chip(substream); 432 struct snd_pcm_runtime *runtime = substream->runtime; 433 434 chip->ply_size = snd_pcm_lib_buffer_bytes(substream); 435 chip->ply_count = snd_pcm_lib_period_bytes(substream); 436 spin_lock_irq(&chip->reg_lock); 437 chip->ply_ctrl &= ~(FM801_START | FM801_16BIT | 438 FM801_STEREO | FM801_RATE_MASK | 439 FM801_CHANNELS_MASK); 440 if (snd_pcm_format_width(runtime->format) == 16) 441 chip->ply_ctrl |= FM801_16BIT; 442 if (runtime->channels > 1) { 443 chip->ply_ctrl |= FM801_STEREO; 444 if (runtime->channels == 4) 445 chip->ply_ctrl |= FM801_CHANNELS_4; 446 else if (runtime->channels == 6) 447 chip->ply_ctrl |= FM801_CHANNELS_6; 448 } 449 chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT; 450 chip->ply_buf = 0; 451 outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL)); 452 outw(chip->ply_count - 1, FM801_REG(chip, PLY_COUNT)); 453 chip->ply_buffer = runtime->dma_addr; 454 chip->ply_pos = 0; 455 outl(chip->ply_buffer, FM801_REG(chip, PLY_BUF1)); 456 outl(chip->ply_buffer + (chip->ply_count % chip->ply_size), FM801_REG(chip, PLY_BUF2)); 457 spin_unlock_irq(&chip->reg_lock); 458 return 0; 459 } 460 461 static int snd_fm801_capture_prepare(struct snd_pcm_substream *substream) 462 { 463 struct fm801 *chip = snd_pcm_substream_chip(substream); 464 struct snd_pcm_runtime *runtime = substream->runtime; 465 466 chip->cap_size = snd_pcm_lib_buffer_bytes(substream); 467 chip->cap_count = snd_pcm_lib_period_bytes(substream); 468 spin_lock_irq(&chip->reg_lock); 469 chip->cap_ctrl &= ~(FM801_START | FM801_16BIT | 470 FM801_STEREO | FM801_RATE_MASK); 471 if (snd_pcm_format_width(runtime->format) == 16) 472 chip->cap_ctrl |= FM801_16BIT; 473 if (runtime->channels > 1) 474 chip->cap_ctrl |= FM801_STEREO; 475 chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT; 476 chip->cap_buf = 0; 477 outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL)); 478 outw(chip->cap_count - 1, FM801_REG(chip, CAP_COUNT)); 479 chip->cap_buffer = runtime->dma_addr; 480 chip->cap_pos = 0; 481 outl(chip->cap_buffer, FM801_REG(chip, CAP_BUF1)); 482 outl(chip->cap_buffer + (chip->cap_count % chip->cap_size), FM801_REG(chip, CAP_BUF2)); 483 spin_unlock_irq(&chip->reg_lock); 484 return 0; 485 } 486 487 static snd_pcm_uframes_t snd_fm801_playback_pointer(struct snd_pcm_substream *substream) 488 { 489 struct fm801 *chip = snd_pcm_substream_chip(substream); 490 size_t ptr; 491 492 if (!(chip->ply_ctrl & FM801_START)) 493 return 0; 494 spin_lock(&chip->reg_lock); 495 ptr = chip->ply_pos + (chip->ply_count - 1) - inw(FM801_REG(chip, PLY_COUNT)); 496 if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_PLAYBACK) { 497 ptr += chip->ply_count; 498 ptr %= chip->ply_size; 499 } 500 spin_unlock(&chip->reg_lock); 501 return bytes_to_frames(substream->runtime, ptr); 502 } 503 504 static snd_pcm_uframes_t snd_fm801_capture_pointer(struct snd_pcm_substream *substream) 505 { 506 struct fm801 *chip = snd_pcm_substream_chip(substream); 507 size_t ptr; 508 509 if (!(chip->cap_ctrl & FM801_START)) 510 return 0; 511 spin_lock(&chip->reg_lock); 512 ptr = chip->cap_pos + (chip->cap_count - 1) - inw(FM801_REG(chip, CAP_COUNT)); 513 if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_CAPTURE) { 514 ptr += chip->cap_count; 515 ptr %= chip->cap_size; 516 } 517 spin_unlock(&chip->reg_lock); 518 return bytes_to_frames(substream->runtime, ptr); 519 } 520 521 static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id, struct pt_regs *regs) 522 { 523 struct fm801 *chip = dev_id; 524 unsigned short status; 525 unsigned int tmp; 526 527 status = inw(FM801_REG(chip, IRQ_STATUS)); 528 status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME; 529 if (! status) 530 return IRQ_NONE; 531 /* ack first */ 532 outw(status, FM801_REG(chip, IRQ_STATUS)); 533 if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) { 534 spin_lock(&chip->reg_lock); 535 chip->ply_buf++; 536 chip->ply_pos += chip->ply_count; 537 chip->ply_pos %= chip->ply_size; 538 tmp = chip->ply_pos + chip->ply_count; 539 tmp %= chip->ply_size; 540 outl(chip->ply_buffer + tmp, 541 (chip->ply_buf & 1) ? 542 FM801_REG(chip, PLY_BUF1) : 543 FM801_REG(chip, PLY_BUF2)); 544 spin_unlock(&chip->reg_lock); 545 snd_pcm_period_elapsed(chip->playback_substream); 546 } 547 if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) { 548 spin_lock(&chip->reg_lock); 549 chip->cap_buf++; 550 chip->cap_pos += chip->cap_count; 551 chip->cap_pos %= chip->cap_size; 552 tmp = chip->cap_pos + chip->cap_count; 553 tmp %= chip->cap_size; 554 outl(chip->cap_buffer + tmp, 555 (chip->cap_buf & 1) ? 556 FM801_REG(chip, CAP_BUF1) : 557 FM801_REG(chip, CAP_BUF2)); 558 spin_unlock(&chip->reg_lock); 559 snd_pcm_period_elapsed(chip->capture_substream); 560 } 561 if (chip->rmidi && (status & FM801_IRQ_MPU)) 562 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs); 563 if (status & FM801_IRQ_VOLUME) 564 ;/* TODO */ 565 566 return IRQ_HANDLED; 567 } 568 569 static struct snd_pcm_hardware snd_fm801_playback = 570 { 571 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 572 SNDRV_PCM_INFO_BLOCK_TRANSFER | 573 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME | 574 SNDRV_PCM_INFO_MMAP_VALID), 575 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 576 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000, 577 .rate_min = 5500, 578 .rate_max = 48000, 579 .channels_min = 1, 580 .channels_max = 2, 581 .buffer_bytes_max = (128*1024), 582 .period_bytes_min = 64, 583 .period_bytes_max = (128*1024), 584 .periods_min = 1, 585 .periods_max = 1024, 586 .fifo_size = 0, 587 }; 588 589 static struct snd_pcm_hardware snd_fm801_capture = 590 { 591 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 592 SNDRV_PCM_INFO_BLOCK_TRANSFER | 593 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME | 594 SNDRV_PCM_INFO_MMAP_VALID), 595 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 596 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000, 597 .rate_min = 5500, 598 .rate_max = 48000, 599 .channels_min = 1, 600 .channels_max = 2, 601 .buffer_bytes_max = (128*1024), 602 .period_bytes_min = 64, 603 .period_bytes_max = (128*1024), 604 .periods_min = 1, 605 .periods_max = 1024, 606 .fifo_size = 0, 607 }; 608 609 static int snd_fm801_playback_open(struct snd_pcm_substream *substream) 610 { 611 struct fm801 *chip = snd_pcm_substream_chip(substream); 612 struct snd_pcm_runtime *runtime = substream->runtime; 613 int err; 614 615 chip->playback_substream = substream; 616 runtime->hw = snd_fm801_playback; 617 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 618 &hw_constraints_rates); 619 if (chip->multichannel) { 620 runtime->hw.channels_max = 6; 621 snd_pcm_hw_constraint_list(runtime, 0, 622 SNDRV_PCM_HW_PARAM_CHANNELS, 623 &hw_constraints_channels); 624 } 625 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) 626 return err; 627 return 0; 628 } 629 630 static int snd_fm801_capture_open(struct snd_pcm_substream *substream) 631 { 632 struct fm801 *chip = snd_pcm_substream_chip(substream); 633 struct snd_pcm_runtime *runtime = substream->runtime; 634 int err; 635 636 chip->capture_substream = substream; 637 runtime->hw = snd_fm801_capture; 638 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 639 &hw_constraints_rates); 640 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) 641 return err; 642 return 0; 643 } 644 645 static int snd_fm801_playback_close(struct snd_pcm_substream *substream) 646 { 647 struct fm801 *chip = snd_pcm_substream_chip(substream); 648 649 chip->playback_substream = NULL; 650 return 0; 651 } 652 653 static int snd_fm801_capture_close(struct snd_pcm_substream *substream) 654 { 655 struct fm801 *chip = snd_pcm_substream_chip(substream); 656 657 chip->capture_substream = NULL; 658 return 0; 659 } 660 661 static struct snd_pcm_ops snd_fm801_playback_ops = { 662 .open = snd_fm801_playback_open, 663 .close = snd_fm801_playback_close, 664 .ioctl = snd_pcm_lib_ioctl, 665 .hw_params = snd_fm801_hw_params, 666 .hw_free = snd_fm801_hw_free, 667 .prepare = snd_fm801_playback_prepare, 668 .trigger = snd_fm801_playback_trigger, 669 .pointer = snd_fm801_playback_pointer, 670 }; 671 672 static struct snd_pcm_ops snd_fm801_capture_ops = { 673 .open = snd_fm801_capture_open, 674 .close = snd_fm801_capture_close, 675 .ioctl = snd_pcm_lib_ioctl, 676 .hw_params = snd_fm801_hw_params, 677 .hw_free = snd_fm801_hw_free, 678 .prepare = snd_fm801_capture_prepare, 679 .trigger = snd_fm801_capture_trigger, 680 .pointer = snd_fm801_capture_pointer, 681 }; 682 683 static int __devinit snd_fm801_pcm(struct fm801 *chip, int device, struct snd_pcm ** rpcm) 684 { 685 struct snd_pcm *pcm; 686 int err; 687 688 if (rpcm) 689 *rpcm = NULL; 690 if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0) 691 return err; 692 693 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops); 694 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops); 695 696 pcm->private_data = chip; 697 pcm->info_flags = 0; 698 strcpy(pcm->name, "FM801"); 699 chip->pcm = pcm; 700 701 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 702 snd_dma_pci_data(chip->pci), 703 chip->multichannel ? 128*1024 : 64*1024, 128*1024); 704 705 if (rpcm) 706 *rpcm = pcm; 707 return 0; 708 } 709 710 /* 711 * TEA5757 radio 712 */ 713 714 #ifdef TEA575X_RADIO 715 716 /* 256PCS GPIO numbers */ 717 #define TEA_256PCS_DATA 1 718 #define TEA_256PCS_WRITE_ENABLE 2 /* inverted */ 719 #define TEA_256PCS_BUS_CLOCK 3 720 721 static void snd_fm801_tea575x_256pcs_write(struct snd_tea575x *tea, unsigned int val) 722 { 723 struct fm801 *chip = tea->private_data; 724 unsigned short reg; 725 int i = 25; 726 727 spin_lock_irq(&chip->reg_lock); 728 reg = inw(FM801_REG(chip, GPIO_CTRL)); 729 /* use GPIO lines and set write enable bit */ 730 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) | 731 FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) | 732 FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK); 733 /* all of lines are in the write direction */ 734 /* clear data and clock lines */ 735 reg &= ~(FM801_GPIO_GD(TEA_256PCS_DATA) | 736 FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) | 737 FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) | 738 FM801_GPIO_GP(TEA_256PCS_DATA) | 739 FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK) | 740 FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE)); 741 outw(reg, FM801_REG(chip, GPIO_CTRL)); 742 udelay(1); 743 744 while (i--) { 745 if (val & (1 << i)) 746 reg |= FM801_GPIO_GP(TEA_256PCS_DATA); 747 else 748 reg &= ~FM801_GPIO_GP(TEA_256PCS_DATA); 749 outw(reg, FM801_REG(chip, GPIO_CTRL)); 750 udelay(1); 751 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); 752 outw(reg, FM801_REG(chip, GPIO_CTRL)); 753 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); 754 outw(reg, FM801_REG(chip, GPIO_CTRL)); 755 udelay(1); 756 } 757 758 /* and reset the write enable bit */ 759 reg |= FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE) | 760 FM801_GPIO_GP(TEA_256PCS_DATA); 761 outw(reg, FM801_REG(chip, GPIO_CTRL)); 762 spin_unlock_irq(&chip->reg_lock); 763 } 764 765 static unsigned int snd_fm801_tea575x_256pcs_read(struct snd_tea575x *tea) 766 { 767 struct fm801 *chip = tea->private_data; 768 unsigned short reg; 769 unsigned int val = 0; 770 int i; 771 772 spin_lock_irq(&chip->reg_lock); 773 reg = inw(FM801_REG(chip, GPIO_CTRL)); 774 /* use GPIO lines, set data direction to input */ 775 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) | 776 FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) | 777 FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK) | 778 FM801_GPIO_GD(TEA_256PCS_DATA) | 779 FM801_GPIO_GP(TEA_256PCS_DATA) | 780 FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE); 781 /* all of lines are in the write direction, except data */ 782 /* clear data, write enable and clock lines */ 783 reg &= ~(FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) | 784 FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) | 785 FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK)); 786 787 for (i = 0; i < 24; i++) { 788 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); 789 outw(reg, FM801_REG(chip, GPIO_CTRL)); 790 udelay(1); 791 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); 792 outw(reg, FM801_REG(chip, GPIO_CTRL)); 793 udelay(1); 794 val <<= 1; 795 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCS_DATA)) 796 val |= 1; 797 } 798 799 spin_unlock_irq(&chip->reg_lock); 800 801 return val; 802 } 803 804 /* 256PCPR GPIO numbers */ 805 #define TEA_256PCPR_BUS_CLOCK 0 806 #define TEA_256PCPR_DATA 1 807 #define TEA_256PCPR_WRITE_ENABLE 2 /* inverted */ 808 809 static void snd_fm801_tea575x_256pcpr_write(struct snd_tea575x *tea, unsigned int val) 810 { 811 struct fm801 *chip = tea->private_data; 812 unsigned short reg; 813 int i = 25; 814 815 spin_lock_irq(&chip->reg_lock); 816 reg = inw(FM801_REG(chip, GPIO_CTRL)); 817 /* use GPIO lines and set write enable bit */ 818 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) | 819 FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) | 820 FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK); 821 /* all of lines are in the write direction */ 822 /* clear data and clock lines */ 823 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_DATA) | 824 FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) | 825 FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) | 826 FM801_GPIO_GP(TEA_256PCPR_DATA) | 827 FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK) | 828 FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE)); 829 outw(reg, FM801_REG(chip, GPIO_CTRL)); 830 udelay(1); 831 832 while (i--) { 833 if (val & (1 << i)) 834 reg |= FM801_GPIO_GP(TEA_256PCPR_DATA); 835 else 836 reg &= ~FM801_GPIO_GP(TEA_256PCPR_DATA); 837 outw(reg, FM801_REG(chip, GPIO_CTRL)); 838 udelay(1); 839 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); 840 outw(reg, FM801_REG(chip, GPIO_CTRL)); 841 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); 842 outw(reg, FM801_REG(chip, GPIO_CTRL)); 843 udelay(1); 844 } 845 846 /* and reset the write enable bit */ 847 reg |= FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE) | 848 FM801_GPIO_GP(TEA_256PCPR_DATA); 849 outw(reg, FM801_REG(chip, GPIO_CTRL)); 850 spin_unlock_irq(&chip->reg_lock); 851 } 852 853 static unsigned int snd_fm801_tea575x_256pcpr_read(struct snd_tea575x *tea) 854 { 855 struct fm801 *chip = tea->private_data; 856 unsigned short reg; 857 unsigned int val = 0; 858 int i; 859 860 spin_lock_irq(&chip->reg_lock); 861 reg = inw(FM801_REG(chip, GPIO_CTRL)); 862 /* use GPIO lines, set data direction to input */ 863 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) | 864 FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) | 865 FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK) | 866 FM801_GPIO_GD(TEA_256PCPR_DATA) | 867 FM801_GPIO_GP(TEA_256PCPR_DATA) | 868 FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE); 869 /* all of lines are in the write direction, except data */ 870 /* clear data, write enable and clock lines */ 871 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) | 872 FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) | 873 FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK)); 874 875 for (i = 0; i < 24; i++) { 876 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); 877 outw(reg, FM801_REG(chip, GPIO_CTRL)); 878 udelay(1); 879 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); 880 outw(reg, FM801_REG(chip, GPIO_CTRL)); 881 udelay(1); 882 val <<= 1; 883 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCPR_DATA)) 884 val |= 1; 885 } 886 887 spin_unlock_irq(&chip->reg_lock); 888 889 return val; 890 } 891 892 /* 64PCR GPIO numbers */ 893 #define TEA_64PCR_BUS_CLOCK 0 894 #define TEA_64PCR_WRITE_ENABLE 1 /* inverted */ 895 #define TEA_64PCR_DATA 2 896 897 static void snd_fm801_tea575x_64pcr_write(struct snd_tea575x *tea, unsigned int val) 898 { 899 struct fm801 *chip = tea->private_data; 900 unsigned short reg; 901 int i = 25; 902 903 spin_lock_irq(&chip->reg_lock); 904 reg = inw(FM801_REG(chip, GPIO_CTRL)); 905 /* use GPIO lines and set write enable bit */ 906 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) | 907 FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) | 908 FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK); 909 /* all of lines are in the write direction */ 910 /* clear data and clock lines */ 911 reg &= ~(FM801_GPIO_GD(TEA_64PCR_DATA) | 912 FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) | 913 FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) | 914 FM801_GPIO_GP(TEA_64PCR_DATA) | 915 FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK) | 916 FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE)); 917 outw(reg, FM801_REG(chip, GPIO_CTRL)); 918 udelay(1); 919 920 while (i--) { 921 if (val & (1 << i)) 922 reg |= FM801_GPIO_GP(TEA_64PCR_DATA); 923 else 924 reg &= ~FM801_GPIO_GP(TEA_64PCR_DATA); 925 outw(reg, FM801_REG(chip, GPIO_CTRL)); 926 udelay(1); 927 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); 928 outw(reg, FM801_REG(chip, GPIO_CTRL)); 929 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); 930 outw(reg, FM801_REG(chip, GPIO_CTRL)); 931 udelay(1); 932 } 933 934 /* and reset the write enable bit */ 935 reg |= FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE) | 936 FM801_GPIO_GP(TEA_64PCR_DATA); 937 outw(reg, FM801_REG(chip, GPIO_CTRL)); 938 spin_unlock_irq(&chip->reg_lock); 939 } 940 941 static unsigned int snd_fm801_tea575x_64pcr_read(struct snd_tea575x *tea) 942 { 943 struct fm801 *chip = tea->private_data; 944 unsigned short reg; 945 unsigned int val = 0; 946 int i; 947 948 spin_lock_irq(&chip->reg_lock); 949 reg = inw(FM801_REG(chip, GPIO_CTRL)); 950 /* use GPIO lines, set data direction to input */ 951 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) | 952 FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) | 953 FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK) | 954 FM801_GPIO_GD(TEA_64PCR_DATA) | 955 FM801_GPIO_GP(TEA_64PCR_DATA) | 956 FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE); 957 /* all of lines are in the write direction, except data */ 958 /* clear data, write enable and clock lines */ 959 reg &= ~(FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) | 960 FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) | 961 FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK)); 962 963 for (i = 0; i < 24; i++) { 964 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); 965 outw(reg, FM801_REG(chip, GPIO_CTRL)); 966 udelay(1); 967 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); 968 outw(reg, FM801_REG(chip, GPIO_CTRL)); 969 udelay(1); 970 val <<= 1; 971 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_64PCR_DATA)) 972 val |= 1; 973 } 974 975 spin_unlock_irq(&chip->reg_lock); 976 977 return val; 978 } 979 980 static struct snd_tea575x_ops snd_fm801_tea_ops[3] = { 981 { 982 /* 1 = MediaForte 256-PCS */ 983 .write = snd_fm801_tea575x_256pcs_write, 984 .read = snd_fm801_tea575x_256pcs_read, 985 }, 986 { 987 /* 2 = MediaForte 256-PCPR */ 988 .write = snd_fm801_tea575x_256pcpr_write, 989 .read = snd_fm801_tea575x_256pcpr_read, 990 }, 991 { 992 /* 3 = MediaForte 64-PCR */ 993 .write = snd_fm801_tea575x_64pcr_write, 994 .read = snd_fm801_tea575x_64pcr_read, 995 } 996 }; 997 #endif 998 999 /* 1000 * Mixer routines 1001 */ 1002 1003 #define FM801_SINGLE(xname, reg, shift, mask, invert) \ 1004 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \ 1005 .get = snd_fm801_get_single, .put = snd_fm801_put_single, \ 1006 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } 1007 1008 static int snd_fm801_info_single(struct snd_kcontrol *kcontrol, 1009 struct snd_ctl_elem_info *uinfo) 1010 { 1011 int mask = (kcontrol->private_value >> 16) & 0xff; 1012 1013 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 1014 uinfo->count = 1; 1015 uinfo->value.integer.min = 0; 1016 uinfo->value.integer.max = mask; 1017 return 0; 1018 } 1019 1020 static int snd_fm801_get_single(struct snd_kcontrol *kcontrol, 1021 struct snd_ctl_elem_value *ucontrol) 1022 { 1023 struct fm801 *chip = snd_kcontrol_chip(kcontrol); 1024 int reg = kcontrol->private_value & 0xff; 1025 int shift = (kcontrol->private_value >> 8) & 0xff; 1026 int mask = (kcontrol->private_value >> 16) & 0xff; 1027 int invert = (kcontrol->private_value >> 24) & 0xff; 1028 1029 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift) & mask; 1030 if (invert) 1031 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; 1032 return 0; 1033 } 1034 1035 static int snd_fm801_put_single(struct snd_kcontrol *kcontrol, 1036 struct snd_ctl_elem_value *ucontrol) 1037 { 1038 struct fm801 *chip = snd_kcontrol_chip(kcontrol); 1039 int reg = kcontrol->private_value & 0xff; 1040 int shift = (kcontrol->private_value >> 8) & 0xff; 1041 int mask = (kcontrol->private_value >> 16) & 0xff; 1042 int invert = (kcontrol->private_value >> 24) & 0xff; 1043 unsigned short val; 1044 1045 val = (ucontrol->value.integer.value[0] & mask); 1046 if (invert) 1047 val = mask - val; 1048 return snd_fm801_update_bits(chip, reg, mask << shift, val << shift); 1049 } 1050 1051 #define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \ 1052 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \ 1053 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \ 1054 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) } 1055 1056 static int snd_fm801_info_double(struct snd_kcontrol *kcontrol, 1057 struct snd_ctl_elem_info *uinfo) 1058 { 1059 int mask = (kcontrol->private_value >> 16) & 0xff; 1060 1061 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 1062 uinfo->count = 2; 1063 uinfo->value.integer.min = 0; 1064 uinfo->value.integer.max = mask; 1065 return 0; 1066 } 1067 1068 static int snd_fm801_get_double(struct snd_kcontrol *kcontrol, 1069 struct snd_ctl_elem_value *ucontrol) 1070 { 1071 struct fm801 *chip = snd_kcontrol_chip(kcontrol); 1072 int reg = kcontrol->private_value & 0xff; 1073 int shift_left = (kcontrol->private_value >> 8) & 0x0f; 1074 int shift_right = (kcontrol->private_value >> 12) & 0x0f; 1075 int mask = (kcontrol->private_value >> 16) & 0xff; 1076 int invert = (kcontrol->private_value >> 24) & 0xff; 1077 1078 spin_lock_irq(&chip->reg_lock); 1079 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift_left) & mask; 1080 ucontrol->value.integer.value[1] = (inw(chip->port + reg) >> shift_right) & mask; 1081 spin_unlock_irq(&chip->reg_lock); 1082 if (invert) { 1083 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; 1084 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1]; 1085 } 1086 return 0; 1087 } 1088 1089 static int snd_fm801_put_double(struct snd_kcontrol *kcontrol, 1090 struct snd_ctl_elem_value *ucontrol) 1091 { 1092 struct fm801 *chip = snd_kcontrol_chip(kcontrol); 1093 int reg = kcontrol->private_value & 0xff; 1094 int shift_left = (kcontrol->private_value >> 8) & 0x0f; 1095 int shift_right = (kcontrol->private_value >> 12) & 0x0f; 1096 int mask = (kcontrol->private_value >> 16) & 0xff; 1097 int invert = (kcontrol->private_value >> 24) & 0xff; 1098 unsigned short val1, val2; 1099 1100 val1 = ucontrol->value.integer.value[0] & mask; 1101 val2 = ucontrol->value.integer.value[1] & mask; 1102 if (invert) { 1103 val1 = mask - val1; 1104 val2 = mask - val2; 1105 } 1106 return snd_fm801_update_bits(chip, reg, 1107 (mask << shift_left) | (mask << shift_right), 1108 (val1 << shift_left ) | (val2 << shift_right)); 1109 } 1110 1111 static int snd_fm801_info_mux(struct snd_kcontrol *kcontrol, 1112 struct snd_ctl_elem_info *uinfo) 1113 { 1114 static char *texts[5] = { 1115 "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary" 1116 }; 1117 1118 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1119 uinfo->count = 1; 1120 uinfo->value.enumerated.items = 5; 1121 if (uinfo->value.enumerated.item > 4) 1122 uinfo->value.enumerated.item = 4; 1123 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1124 return 0; 1125 } 1126 1127 static int snd_fm801_get_mux(struct snd_kcontrol *kcontrol, 1128 struct snd_ctl_elem_value *ucontrol) 1129 { 1130 struct fm801 *chip = snd_kcontrol_chip(kcontrol); 1131 unsigned short val; 1132 1133 val = inw(FM801_REG(chip, REC_SRC)) & 7; 1134 if (val > 4) 1135 val = 4; 1136 ucontrol->value.enumerated.item[0] = val; 1137 return 0; 1138 } 1139 1140 static int snd_fm801_put_mux(struct snd_kcontrol *kcontrol, 1141 struct snd_ctl_elem_value *ucontrol) 1142 { 1143 struct fm801 *chip = snd_kcontrol_chip(kcontrol); 1144 unsigned short val; 1145 1146 if ((val = ucontrol->value.enumerated.item[0]) > 4) 1147 return -EINVAL; 1148 return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val); 1149 } 1150 1151 #define FM801_CONTROLS ARRAY_SIZE(snd_fm801_controls) 1152 1153 static struct snd_kcontrol_new snd_fm801_controls[] __devinitdata = { 1154 FM801_DOUBLE("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1), 1155 FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1), 1156 FM801_DOUBLE("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1), 1157 FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1), 1158 FM801_DOUBLE("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1), 1159 FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1), 1160 { 1161 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1162 .name = "Digital Capture Source", 1163 .info = snd_fm801_info_mux, 1164 .get = snd_fm801_get_mux, 1165 .put = snd_fm801_put_mux, 1166 } 1167 }; 1168 1169 #define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_fm801_controls_multi) 1170 1171 static struct snd_kcontrol_new snd_fm801_controls_multi[] __devinitdata = { 1172 FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0), 1173 FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0), 1174 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0), 1175 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0), 1176 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0), 1177 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0), 1178 }; 1179 1180 static void snd_fm801_mixer_free_ac97_bus(struct snd_ac97_bus *bus) 1181 { 1182 struct fm801 *chip = bus->private_data; 1183 chip->ac97_bus = NULL; 1184 } 1185 1186 static void snd_fm801_mixer_free_ac97(struct snd_ac97 *ac97) 1187 { 1188 struct fm801 *chip = ac97->private_data; 1189 if (ac97->num == 0) { 1190 chip->ac97 = NULL; 1191 } else { 1192 chip->ac97_sec = NULL; 1193 } 1194 } 1195 1196 static int __devinit snd_fm801_mixer(struct fm801 *chip) 1197 { 1198 struct snd_ac97_template ac97; 1199 unsigned int i; 1200 int err; 1201 static struct snd_ac97_bus_ops ops = { 1202 .write = snd_fm801_codec_write, 1203 .read = snd_fm801_codec_read, 1204 }; 1205 1206 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) 1207 return err; 1208 chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus; 1209 1210 memset(&ac97, 0, sizeof(ac97)); 1211 ac97.private_data = chip; 1212 ac97.private_free = snd_fm801_mixer_free_ac97; 1213 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) 1214 return err; 1215 if (chip->secondary) { 1216 ac97.num = 1; 1217 ac97.addr = chip->secondary_addr; 1218 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0) 1219 return err; 1220 } 1221 for (i = 0; i < FM801_CONTROLS; i++) 1222 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip)); 1223 if (chip->multichannel) { 1224 for (i = 0; i < FM801_CONTROLS_MULTI; i++) 1225 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip)); 1226 } 1227 return 0; 1228 } 1229 1230 /* 1231 * initialization routines 1232 */ 1233 1234 static int wait_for_codec(struct fm801 *chip, unsigned int codec_id, 1235 unsigned short reg, unsigned long waits) 1236 { 1237 unsigned long timeout = jiffies + waits; 1238 1239 outw(FM801_AC97_READ | (codec_id << FM801_AC97_ADDR_SHIFT) | reg, 1240 FM801_REG(chip, AC97_CMD)); 1241 udelay(5); 1242 do { 1243 if ((inw(FM801_REG(chip, AC97_CMD)) & (FM801_AC97_VALID|FM801_AC97_BUSY)) 1244 == FM801_AC97_VALID) 1245 return 0; 1246 schedule_timeout_uninterruptible(1); 1247 } while (time_after(timeout, jiffies)); 1248 return -EIO; 1249 } 1250 1251 static int snd_fm801_chip_init(struct fm801 *chip, int resume) 1252 { 1253 int id; 1254 unsigned short cmdw; 1255 1256 /* codec cold reset + AC'97 warm reset */ 1257 outw((1<<5) | (1<<6), FM801_REG(chip, CODEC_CTRL)); 1258 inw(FM801_REG(chip, CODEC_CTRL)); /* flush posting data */ 1259 udelay(100); 1260 outw(0, FM801_REG(chip, CODEC_CTRL)); 1261 1262 if (wait_for_codec(chip, 0, AC97_RESET, msecs_to_jiffies(750)) < 0) { 1263 snd_printk(KERN_ERR "Primary AC'97 codec not found\n"); 1264 if (! resume) 1265 return -EIO; 1266 } 1267 1268 if (chip->multichannel) { 1269 if (chip->secondary_addr) { 1270 wait_for_codec(chip, chip->secondary_addr, 1271 AC97_VENDOR_ID1, msecs_to_jiffies(50)); 1272 } else { 1273 /* my card has the secondary codec */ 1274 /* at address #3, so the loop is inverted */ 1275 for (id = 3; id > 0; id--) { 1276 if (! wait_for_codec(chip, id, AC97_VENDOR_ID1, 1277 msecs_to_jiffies(50))) { 1278 cmdw = inw(FM801_REG(chip, AC97_DATA)); 1279 if (cmdw != 0xffff && cmdw != 0) { 1280 chip->secondary = 1; 1281 chip->secondary_addr = id; 1282 break; 1283 } 1284 } 1285 } 1286 } 1287 1288 /* the recovery phase, it seems that probing for non-existing codec might */ 1289 /* cause timeout problems */ 1290 wait_for_codec(chip, 0, AC97_VENDOR_ID1, msecs_to_jiffies(750)); 1291 } 1292 1293 /* init volume */ 1294 outw(0x0808, FM801_REG(chip, PCM_VOL)); 1295 outw(0x9f1f, FM801_REG(chip, FM_VOL)); 1296 outw(0x8808, FM801_REG(chip, I2S_VOL)); 1297 1298 /* I2S control - I2S mode */ 1299 outw(0x0003, FM801_REG(chip, I2S_MODE)); 1300 1301 /* interrupt setup - unmask MPU, PLAYBACK & CAPTURE */ 1302 cmdw = inw(FM801_REG(chip, IRQ_MASK)); 1303 cmdw &= ~0x0083; 1304 outw(cmdw, FM801_REG(chip, IRQ_MASK)); 1305 1306 /* interrupt clear */ 1307 outw(FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU, FM801_REG(chip, IRQ_STATUS)); 1308 1309 return 0; 1310 } 1311 1312 1313 static int snd_fm801_free(struct fm801 *chip) 1314 { 1315 unsigned short cmdw; 1316 1317 if (chip->irq < 0) 1318 goto __end_hw; 1319 1320 /* interrupt setup - mask everything */ 1321 cmdw = inw(FM801_REG(chip, IRQ_MASK)); 1322 cmdw |= 0x00c3; 1323 outw(cmdw, FM801_REG(chip, IRQ_MASK)); 1324 1325 __end_hw: 1326 #ifdef TEA575X_RADIO 1327 snd_tea575x_exit(&chip->tea); 1328 #endif 1329 if (chip->irq >= 0) 1330 free_irq(chip->irq, chip); 1331 pci_release_regions(chip->pci); 1332 pci_disable_device(chip->pci); 1333 1334 kfree(chip); 1335 return 0; 1336 } 1337 1338 static int snd_fm801_dev_free(struct snd_device *device) 1339 { 1340 struct fm801 *chip = device->device_data; 1341 return snd_fm801_free(chip); 1342 } 1343 1344 static int __devinit snd_fm801_create(struct snd_card *card, 1345 struct pci_dev * pci, 1346 int tea575x_tuner, 1347 struct fm801 ** rchip) 1348 { 1349 struct fm801 *chip; 1350 unsigned char rev; 1351 int err; 1352 static struct snd_device_ops ops = { 1353 .dev_free = snd_fm801_dev_free, 1354 }; 1355 1356 *rchip = NULL; 1357 if ((err = pci_enable_device(pci)) < 0) 1358 return err; 1359 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 1360 if (chip == NULL) { 1361 pci_disable_device(pci); 1362 return -ENOMEM; 1363 } 1364 spin_lock_init(&chip->reg_lock); 1365 chip->card = card; 1366 chip->pci = pci; 1367 chip->irq = -1; 1368 if ((err = pci_request_regions(pci, "FM801")) < 0) { 1369 kfree(chip); 1370 pci_disable_device(pci); 1371 return err; 1372 } 1373 chip->port = pci_resource_start(pci, 0); 1374 if (request_irq(pci->irq, snd_fm801_interrupt, IRQF_DISABLED|IRQF_SHARED, 1375 "FM801", chip)) { 1376 snd_printk(KERN_ERR "unable to grab IRQ %d\n", chip->irq); 1377 snd_fm801_free(chip); 1378 return -EBUSY; 1379 } 1380 chip->irq = pci->irq; 1381 pci_set_master(pci); 1382 1383 pci_read_config_byte(pci, PCI_REVISION_ID, &rev); 1384 if (rev >= 0xb1) /* FM801-AU */ 1385 chip->multichannel = 1; 1386 1387 snd_fm801_chip_init(chip, 0); 1388 1389 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 1390 snd_fm801_free(chip); 1391 return err; 1392 } 1393 1394 snd_card_set_dev(card, &pci->dev); 1395 1396 #ifdef TEA575X_RADIO 1397 if (tea575x_tuner > 0 && (tea575x_tuner & 0xffff) < 4) { 1398 chip->tea.dev_nr = tea575x_tuner >> 16; 1399 chip->tea.card = card; 1400 chip->tea.freq_fixup = 10700; 1401 chip->tea.private_data = chip; 1402 chip->tea.ops = &snd_fm801_tea_ops[(tea575x_tuner & 0xffff) - 1]; 1403 snd_tea575x_init(&chip->tea); 1404 } 1405 #endif 1406 1407 *rchip = chip; 1408 return 0; 1409 } 1410 1411 static int __devinit snd_card_fm801_probe(struct pci_dev *pci, 1412 const struct pci_device_id *pci_id) 1413 { 1414 static int dev; 1415 struct snd_card *card; 1416 struct fm801 *chip; 1417 struct snd_opl3 *opl3; 1418 int err; 1419 1420 if (dev >= SNDRV_CARDS) 1421 return -ENODEV; 1422 if (!enable[dev]) { 1423 dev++; 1424 return -ENOENT; 1425 } 1426 1427 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); 1428 if (card == NULL) 1429 return -ENOMEM; 1430 if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], &chip)) < 0) { 1431 snd_card_free(card); 1432 return err; 1433 } 1434 card->private_data = chip; 1435 1436 strcpy(card->driver, "FM801"); 1437 strcpy(card->shortname, "ForteMedia FM801-"); 1438 strcat(card->shortname, chip->multichannel ? "AU" : "AS"); 1439 sprintf(card->longname, "%s at 0x%lx, irq %i", 1440 card->shortname, chip->port, chip->irq); 1441 1442 if ((err = snd_fm801_pcm(chip, 0, NULL)) < 0) { 1443 snd_card_free(card); 1444 return err; 1445 } 1446 if ((err = snd_fm801_mixer(chip)) < 0) { 1447 snd_card_free(card); 1448 return err; 1449 } 1450 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801, 1451 FM801_REG(chip, MPU401_DATA), 1452 MPU401_INFO_INTEGRATED, 1453 chip->irq, 0, &chip->rmidi)) < 0) { 1454 snd_card_free(card); 1455 return err; 1456 } 1457 if ((err = snd_opl3_create(card, FM801_REG(chip, OPL3_BANK0), 1458 FM801_REG(chip, OPL3_BANK1), 1459 OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) { 1460 snd_card_free(card); 1461 return err; 1462 } 1463 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) { 1464 snd_card_free(card); 1465 return err; 1466 } 1467 1468 if ((err = snd_card_register(card)) < 0) { 1469 snd_card_free(card); 1470 return err; 1471 } 1472 pci_set_drvdata(pci, card); 1473 dev++; 1474 return 0; 1475 } 1476 1477 static void __devexit snd_card_fm801_remove(struct pci_dev *pci) 1478 { 1479 snd_card_free(pci_get_drvdata(pci)); 1480 pci_set_drvdata(pci, NULL); 1481 } 1482 1483 #ifdef CONFIG_PM 1484 static unsigned char saved_regs[] = { 1485 FM801_PCM_VOL, FM801_I2S_VOL, FM801_FM_VOL, FM801_REC_SRC, 1486 FM801_PLY_CTRL, FM801_PLY_COUNT, FM801_PLY_BUF1, FM801_PLY_BUF2, 1487 FM801_CAP_CTRL, FM801_CAP_COUNT, FM801_CAP_BUF1, FM801_CAP_BUF2, 1488 FM801_CODEC_CTRL, FM801_I2S_MODE, FM801_VOLUME, FM801_GEN_CTRL, 1489 }; 1490 1491 static int snd_fm801_suspend(struct pci_dev *pci, pm_message_t state) 1492 { 1493 struct snd_card *card = pci_get_drvdata(pci); 1494 struct fm801 *chip = card->private_data; 1495 int i; 1496 1497 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 1498 snd_pcm_suspend_all(chip->pcm); 1499 snd_ac97_suspend(chip->ac97); 1500 snd_ac97_suspend(chip->ac97_sec); 1501 for (i = 0; i < ARRAY_SIZE(saved_regs); i++) 1502 chip->saved_regs[i] = inw(chip->port + saved_regs[i]); 1503 /* FIXME: tea575x suspend */ 1504 1505 pci_set_power_state(pci, PCI_D3hot); 1506 pci_disable_device(pci); 1507 pci_save_state(pci); 1508 return 0; 1509 } 1510 1511 static int snd_fm801_resume(struct pci_dev *pci) 1512 { 1513 struct snd_card *card = pci_get_drvdata(pci); 1514 struct fm801 *chip = card->private_data; 1515 int i; 1516 1517 pci_restore_state(pci); 1518 pci_enable_device(pci); 1519 pci_set_power_state(pci, PCI_D0); 1520 pci_set_master(pci); 1521 1522 snd_fm801_chip_init(chip, 1); 1523 snd_ac97_resume(chip->ac97); 1524 snd_ac97_resume(chip->ac97_sec); 1525 for (i = 0; i < ARRAY_SIZE(saved_regs); i++) 1526 outw(chip->saved_regs[i], chip->port + saved_regs[i]); 1527 1528 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 1529 return 0; 1530 } 1531 #endif 1532 1533 static struct pci_driver driver = { 1534 .name = "FM801", 1535 .id_table = snd_fm801_ids, 1536 .probe = snd_card_fm801_probe, 1537 .remove = __devexit_p(snd_card_fm801_remove), 1538 #ifdef CONFIG_PM 1539 .suspend = snd_fm801_suspend, 1540 .resume = snd_fm801_resume, 1541 #endif 1542 }; 1543 1544 static int __init alsa_card_fm801_init(void) 1545 { 1546 return pci_register_driver(&driver); 1547 } 1548 1549 static void __exit alsa_card_fm801_exit(void) 1550 { 1551 pci_unregister_driver(&driver); 1552 } 1553 1554 module_init(alsa_card_fm801_init) 1555 module_exit(alsa_card_fm801_exit) 1556