xref: /linux/sound/pci/fm801.c (revision 63307d015b91e626c97bb82e88054af3d0b74643)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *  The driver for the ForteMedia FM801 based soundcards
4  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
5  */
6 
7 #include <linux/delay.h>
8 #include <linux/init.h>
9 #include <linux/interrupt.h>
10 #include <linux/io.h>
11 #include <linux/pci.h>
12 #include <linux/slab.h>
13 #include <linux/module.h>
14 #include <sound/core.h>
15 #include <sound/pcm.h>
16 #include <sound/tlv.h>
17 #include <sound/ac97_codec.h>
18 #include <sound/mpu401.h>
19 #include <sound/opl3.h>
20 #include <sound/initval.h>
21 
22 #ifdef CONFIG_SND_FM801_TEA575X_BOOL
23 #include <media/drv-intf/tea575x.h>
24 #endif
25 
26 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
27 MODULE_DESCRIPTION("ForteMedia FM801");
28 MODULE_LICENSE("GPL");
29 MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801},"
30 		"{Genius,SoundMaker Live 5.1}}");
31 
32 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;	/* Index 0-MAX */
33 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;	/* ID for this card */
34 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;	/* Enable this card */
35 /*
36  *  Enable TEA575x tuner
37  *    1 = MediaForte 256-PCS
38  *    2 = MediaForte 256-PCP
39  *    3 = MediaForte 64-PCR
40  *   16 = setup tuner only (this is additional bit), i.e. SF64-PCR FM card
41  *  High 16-bits are video (radio) device number + 1
42  */
43 static int tea575x_tuner[SNDRV_CARDS];
44 static int radio_nr[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};
45 
46 module_param_array(index, int, NULL, 0444);
47 MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
48 module_param_array(id, charp, NULL, 0444);
49 MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
50 module_param_array(enable, bool, NULL, 0444);
51 MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
52 module_param_array(tea575x_tuner, int, NULL, 0444);
53 MODULE_PARM_DESC(tea575x_tuner, "TEA575x tuner access method (0 = auto, 1 = SF256-PCS, 2=SF256-PCP, 3=SF64-PCR, 8=disable, +16=tuner-only).");
54 module_param_array(radio_nr, int, NULL, 0444);
55 MODULE_PARM_DESC(radio_nr, "Radio device numbers");
56 
57 
58 #define TUNER_DISABLED		(1<<3)
59 #define TUNER_ONLY		(1<<4)
60 #define TUNER_TYPE_MASK		(~TUNER_ONLY & 0xFFFF)
61 
62 /*
63  *  Direct registers
64  */
65 
66 #define fm801_writew(chip,reg,value)	outw((value), chip->port + FM801_##reg)
67 #define fm801_readw(chip,reg)		inw(chip->port + FM801_##reg)
68 
69 #define fm801_writel(chip,reg,value)	outl((value), chip->port + FM801_##reg)
70 
71 #define FM801_PCM_VOL		0x00	/* PCM Output Volume */
72 #define FM801_FM_VOL		0x02	/* FM Output Volume */
73 #define FM801_I2S_VOL		0x04	/* I2S Volume */
74 #define FM801_REC_SRC		0x06	/* Record Source */
75 #define FM801_PLY_CTRL		0x08	/* Playback Control */
76 #define FM801_PLY_COUNT		0x0a	/* Playback Count */
77 #define FM801_PLY_BUF1		0x0c	/* Playback Bufer I */
78 #define FM801_PLY_BUF2		0x10	/* Playback Buffer II */
79 #define FM801_CAP_CTRL		0x14	/* Capture Control */
80 #define FM801_CAP_COUNT		0x16	/* Capture Count */
81 #define FM801_CAP_BUF1		0x18	/* Capture Buffer I */
82 #define FM801_CAP_BUF2		0x1c	/* Capture Buffer II */
83 #define FM801_CODEC_CTRL	0x22	/* Codec Control */
84 #define FM801_I2S_MODE		0x24	/* I2S Mode Control */
85 #define FM801_VOLUME		0x26	/* Volume Up/Down/Mute Status */
86 #define FM801_I2C_CTRL		0x29	/* I2C Control */
87 #define FM801_AC97_CMD		0x2a	/* AC'97 Command */
88 #define FM801_AC97_DATA		0x2c	/* AC'97 Data */
89 #define FM801_MPU401_DATA	0x30	/* MPU401 Data */
90 #define FM801_MPU401_CMD	0x31	/* MPU401 Command */
91 #define FM801_GPIO_CTRL		0x52	/* General Purpose I/O Control */
92 #define FM801_GEN_CTRL		0x54	/* General Control */
93 #define FM801_IRQ_MASK		0x56	/* Interrupt Mask */
94 #define FM801_IRQ_STATUS	0x5a	/* Interrupt Status */
95 #define FM801_OPL3_BANK0	0x68	/* OPL3 Status Read / Bank 0 Write */
96 #define FM801_OPL3_DATA0	0x69	/* OPL3 Data 0 Write */
97 #define FM801_OPL3_BANK1	0x6a	/* OPL3 Bank 1 Write */
98 #define FM801_OPL3_DATA1	0x6b	/* OPL3 Bank 1 Write */
99 #define FM801_POWERDOWN		0x70	/* Blocks Power Down Control */
100 
101 /* codec access */
102 #define FM801_AC97_READ		(1<<7)	/* read=1, write=0 */
103 #define FM801_AC97_VALID	(1<<8)	/* port valid=1 */
104 #define FM801_AC97_BUSY		(1<<9)	/* busy=1 */
105 #define FM801_AC97_ADDR_SHIFT	10	/* codec id (2bit) */
106 
107 /* playback and record control register bits */
108 #define FM801_BUF1_LAST		(1<<1)
109 #define FM801_BUF2_LAST		(1<<2)
110 #define FM801_START		(1<<5)
111 #define FM801_PAUSE		(1<<6)
112 #define FM801_IMMED_STOP	(1<<7)
113 #define FM801_RATE_SHIFT	8
114 #define FM801_RATE_MASK		(15 << FM801_RATE_SHIFT)
115 #define FM801_CHANNELS_4	(1<<12)	/* playback only */
116 #define FM801_CHANNELS_6	(2<<12)	/* playback only */
117 #define FM801_CHANNELS_6MS	(3<<12)	/* playback only */
118 #define FM801_CHANNELS_MASK	(3<<12)
119 #define FM801_16BIT		(1<<14)
120 #define FM801_STEREO		(1<<15)
121 
122 /* IRQ status bits */
123 #define FM801_IRQ_PLAYBACK	(1<<8)
124 #define FM801_IRQ_CAPTURE	(1<<9)
125 #define FM801_IRQ_VOLUME	(1<<14)
126 #define FM801_IRQ_MPU		(1<<15)
127 
128 /* GPIO control register */
129 #define FM801_GPIO_GP0		(1<<0)	/* read/write */
130 #define FM801_GPIO_GP1		(1<<1)
131 #define FM801_GPIO_GP2		(1<<2)
132 #define FM801_GPIO_GP3		(1<<3)
133 #define FM801_GPIO_GP(x)	(1<<(0+(x)))
134 #define FM801_GPIO_GD0		(1<<8)	/* directions: 1 = input, 0 = output*/
135 #define FM801_GPIO_GD1		(1<<9)
136 #define FM801_GPIO_GD2		(1<<10)
137 #define FM801_GPIO_GD3		(1<<11)
138 #define FM801_GPIO_GD(x)	(1<<(8+(x)))
139 #define FM801_GPIO_GS0		(1<<12)	/* function select: */
140 #define FM801_GPIO_GS1		(1<<13)	/*    1 = GPIO */
141 #define FM801_GPIO_GS2		(1<<14)	/*    0 = other (S/PDIF, VOL) */
142 #define FM801_GPIO_GS3		(1<<15)
143 #define FM801_GPIO_GS(x)	(1<<(12+(x)))
144 
145 /**
146  * struct fm801 - describes FM801 chip
147  * @port:		I/O port number
148  * @multichannel:	multichannel support
149  * @secondary:		secondary codec
150  * @secondary_addr:	address of the secondary codec
151  * @tea575x_tuner:	tuner access method & flags
152  * @ply_ctrl:		playback control
153  * @cap_ctrl:		capture control
154  */
155 struct fm801 {
156 	struct device *dev;
157 	int irq;
158 
159 	unsigned long port;
160 	unsigned int multichannel: 1,
161 		     secondary: 1;
162 	unsigned char secondary_addr;
163 	unsigned int tea575x_tuner;
164 
165 	unsigned short ply_ctrl;
166 	unsigned short cap_ctrl;
167 
168 	unsigned long ply_buffer;
169 	unsigned int ply_buf;
170 	unsigned int ply_count;
171 	unsigned int ply_size;
172 	unsigned int ply_pos;
173 
174 	unsigned long cap_buffer;
175 	unsigned int cap_buf;
176 	unsigned int cap_count;
177 	unsigned int cap_size;
178 	unsigned int cap_pos;
179 
180 	struct snd_ac97_bus *ac97_bus;
181 	struct snd_ac97 *ac97;
182 	struct snd_ac97 *ac97_sec;
183 
184 	struct snd_card *card;
185 	struct snd_pcm *pcm;
186 	struct snd_rawmidi *rmidi;
187 	struct snd_pcm_substream *playback_substream;
188 	struct snd_pcm_substream *capture_substream;
189 	unsigned int p_dma_size;
190 	unsigned int c_dma_size;
191 
192 	spinlock_t reg_lock;
193 	struct snd_info_entry *proc_entry;
194 
195 #ifdef CONFIG_SND_FM801_TEA575X_BOOL
196 	struct v4l2_device v4l2_dev;
197 	struct snd_tea575x tea;
198 #endif
199 
200 #ifdef CONFIG_PM_SLEEP
201 	u16 saved_regs[0x20];
202 #endif
203 };
204 
205 /*
206  * IO accessors
207  */
208 
209 static inline void fm801_iowrite16(struct fm801 *chip, unsigned short offset, u16 value)
210 {
211 	outw(value, chip->port + offset);
212 }
213 
214 static inline u16 fm801_ioread16(struct fm801 *chip, unsigned short offset)
215 {
216 	return inw(chip->port + offset);
217 }
218 
219 static const struct pci_device_id snd_fm801_ids[] = {
220 	{ 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, },   /* FM801 */
221 	{ 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, },   /* Gallant Odyssey Sound 4 */
222 	{ 0, }
223 };
224 
225 MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
226 
227 /*
228  *  common I/O routines
229  */
230 
231 static bool fm801_ac97_is_ready(struct fm801 *chip, unsigned int iterations)
232 {
233 	unsigned int idx;
234 
235 	for (idx = 0; idx < iterations; idx++) {
236 		if (!(fm801_readw(chip, AC97_CMD) & FM801_AC97_BUSY))
237 			return true;
238 		udelay(10);
239 	}
240 	return false;
241 }
242 
243 static bool fm801_ac97_is_valid(struct fm801 *chip, unsigned int iterations)
244 {
245 	unsigned int idx;
246 
247 	for (idx = 0; idx < iterations; idx++) {
248 		if (fm801_readw(chip, AC97_CMD) & FM801_AC97_VALID)
249 			return true;
250 		udelay(10);
251 	}
252 	return false;
253 }
254 
255 static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg,
256 				 unsigned short mask, unsigned short value)
257 {
258 	int change;
259 	unsigned long flags;
260 	unsigned short old, new;
261 
262 	spin_lock_irqsave(&chip->reg_lock, flags);
263 	old = fm801_ioread16(chip, reg);
264 	new = (old & ~mask) | value;
265 	change = old != new;
266 	if (change)
267 		fm801_iowrite16(chip, reg, new);
268 	spin_unlock_irqrestore(&chip->reg_lock, flags);
269 	return change;
270 }
271 
272 static void snd_fm801_codec_write(struct snd_ac97 *ac97,
273 				  unsigned short reg,
274 				  unsigned short val)
275 {
276 	struct fm801 *chip = ac97->private_data;
277 
278 	/*
279 	 *  Wait until the codec interface is not ready..
280 	 */
281 	if (!fm801_ac97_is_ready(chip, 100)) {
282 		dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
283 		return;
284 	}
285 
286 	/* write data and address */
287 	fm801_writew(chip, AC97_DATA, val);
288 	fm801_writew(chip, AC97_CMD, reg | (ac97->addr << FM801_AC97_ADDR_SHIFT));
289 	/*
290 	 *  Wait until the write command is not completed..
291 	 */
292 	if (!fm801_ac97_is_ready(chip, 1000))
293 		dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",
294 		ac97->num);
295 }
296 
297 static unsigned short snd_fm801_codec_read(struct snd_ac97 *ac97, unsigned short reg)
298 {
299 	struct fm801 *chip = ac97->private_data;
300 
301 	/*
302 	 *  Wait until the codec interface is not ready..
303 	 */
304 	if (!fm801_ac97_is_ready(chip, 100)) {
305 		dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
306 		return 0;
307 	}
308 
309 	/* read command */
310 	fm801_writew(chip, AC97_CMD,
311 		     reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
312 	if (!fm801_ac97_is_ready(chip, 100)) {
313 		dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",
314 			ac97->num);
315 		return 0;
316 	}
317 
318 	if (!fm801_ac97_is_valid(chip, 1000)) {
319 		dev_err(chip->card->dev,
320 			"AC'97 interface #%d is not valid (2)\n", ac97->num);
321 		return 0;
322 	}
323 
324 	return fm801_readw(chip, AC97_DATA);
325 }
326 
327 static const unsigned int rates[] = {
328   5500,  8000,  9600, 11025,
329   16000, 19200, 22050, 32000,
330   38400, 44100, 48000
331 };
332 
333 static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {
334 	.count = ARRAY_SIZE(rates),
335 	.list = rates,
336 	.mask = 0,
337 };
338 
339 static const unsigned int channels[] = {
340   2, 4, 6
341 };
342 
343 static const struct snd_pcm_hw_constraint_list hw_constraints_channels = {
344 	.count = ARRAY_SIZE(channels),
345 	.list = channels,
346 	.mask = 0,
347 };
348 
349 /*
350  *  Sample rate routines
351  */
352 
353 static unsigned short snd_fm801_rate_bits(unsigned int rate)
354 {
355 	unsigned int idx;
356 
357 	for (idx = 0; idx < ARRAY_SIZE(rates); idx++)
358 		if (rates[idx] == rate)
359 			return idx;
360 	snd_BUG();
361 	return ARRAY_SIZE(rates) - 1;
362 }
363 
364 /*
365  *  PCM part
366  */
367 
368 static int snd_fm801_playback_trigger(struct snd_pcm_substream *substream,
369 				      int cmd)
370 {
371 	struct fm801 *chip = snd_pcm_substream_chip(substream);
372 
373 	spin_lock(&chip->reg_lock);
374 	switch (cmd) {
375 	case SNDRV_PCM_TRIGGER_START:
376 		chip->ply_ctrl &= ~(FM801_BUF1_LAST |
377 				     FM801_BUF2_LAST |
378 				     FM801_PAUSE);
379 		chip->ply_ctrl |= FM801_START |
380 				   FM801_IMMED_STOP;
381 		break;
382 	case SNDRV_PCM_TRIGGER_STOP:
383 		chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
384 		break;
385 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
386 	case SNDRV_PCM_TRIGGER_SUSPEND:
387 		chip->ply_ctrl |= FM801_PAUSE;
388 		break;
389 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
390 	case SNDRV_PCM_TRIGGER_RESUME:
391 		chip->ply_ctrl &= ~FM801_PAUSE;
392 		break;
393 	default:
394 		spin_unlock(&chip->reg_lock);
395 		snd_BUG();
396 		return -EINVAL;
397 	}
398 	fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
399 	spin_unlock(&chip->reg_lock);
400 	return 0;
401 }
402 
403 static int snd_fm801_capture_trigger(struct snd_pcm_substream *substream,
404 				     int cmd)
405 {
406 	struct fm801 *chip = snd_pcm_substream_chip(substream);
407 
408 	spin_lock(&chip->reg_lock);
409 	switch (cmd) {
410 	case SNDRV_PCM_TRIGGER_START:
411 		chip->cap_ctrl &= ~(FM801_BUF1_LAST |
412 				     FM801_BUF2_LAST |
413 				     FM801_PAUSE);
414 		chip->cap_ctrl |= FM801_START |
415 				   FM801_IMMED_STOP;
416 		break;
417 	case SNDRV_PCM_TRIGGER_STOP:
418 		chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
419 		break;
420 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
421 	case SNDRV_PCM_TRIGGER_SUSPEND:
422 		chip->cap_ctrl |= FM801_PAUSE;
423 		break;
424 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
425 	case SNDRV_PCM_TRIGGER_RESUME:
426 		chip->cap_ctrl &= ~FM801_PAUSE;
427 		break;
428 	default:
429 		spin_unlock(&chip->reg_lock);
430 		snd_BUG();
431 		return -EINVAL;
432 	}
433 	fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
434 	spin_unlock(&chip->reg_lock);
435 	return 0;
436 }
437 
438 static int snd_fm801_hw_params(struct snd_pcm_substream *substream,
439 			       struct snd_pcm_hw_params *hw_params)
440 {
441 	return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
442 }
443 
444 static int snd_fm801_hw_free(struct snd_pcm_substream *substream)
445 {
446 	return snd_pcm_lib_free_pages(substream);
447 }
448 
449 static int snd_fm801_playback_prepare(struct snd_pcm_substream *substream)
450 {
451 	struct fm801 *chip = snd_pcm_substream_chip(substream);
452 	struct snd_pcm_runtime *runtime = substream->runtime;
453 
454 	chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
455 	chip->ply_count = snd_pcm_lib_period_bytes(substream);
456 	spin_lock_irq(&chip->reg_lock);
457 	chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
458 			     FM801_STEREO | FM801_RATE_MASK |
459 			     FM801_CHANNELS_MASK);
460 	if (snd_pcm_format_width(runtime->format) == 16)
461 		chip->ply_ctrl |= FM801_16BIT;
462 	if (runtime->channels > 1) {
463 		chip->ply_ctrl |= FM801_STEREO;
464 		if (runtime->channels == 4)
465 			chip->ply_ctrl |= FM801_CHANNELS_4;
466 		else if (runtime->channels == 6)
467 			chip->ply_ctrl |= FM801_CHANNELS_6;
468 	}
469 	chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
470 	chip->ply_buf = 0;
471 	fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
472 	fm801_writew(chip, PLY_COUNT, chip->ply_count - 1);
473 	chip->ply_buffer = runtime->dma_addr;
474 	chip->ply_pos = 0;
475 	fm801_writel(chip, PLY_BUF1, chip->ply_buffer);
476 	fm801_writel(chip, PLY_BUF2,
477 		     chip->ply_buffer + (chip->ply_count % chip->ply_size));
478 	spin_unlock_irq(&chip->reg_lock);
479 	return 0;
480 }
481 
482 static int snd_fm801_capture_prepare(struct snd_pcm_substream *substream)
483 {
484 	struct fm801 *chip = snd_pcm_substream_chip(substream);
485 	struct snd_pcm_runtime *runtime = substream->runtime;
486 
487 	chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
488 	chip->cap_count = snd_pcm_lib_period_bytes(substream);
489 	spin_lock_irq(&chip->reg_lock);
490 	chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
491 			     FM801_STEREO | FM801_RATE_MASK);
492 	if (snd_pcm_format_width(runtime->format) == 16)
493 		chip->cap_ctrl |= FM801_16BIT;
494 	if (runtime->channels > 1)
495 		chip->cap_ctrl |= FM801_STEREO;
496 	chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
497 	chip->cap_buf = 0;
498 	fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
499 	fm801_writew(chip, CAP_COUNT, chip->cap_count - 1);
500 	chip->cap_buffer = runtime->dma_addr;
501 	chip->cap_pos = 0;
502 	fm801_writel(chip, CAP_BUF1, chip->cap_buffer);
503 	fm801_writel(chip, CAP_BUF2,
504 		     chip->cap_buffer + (chip->cap_count % chip->cap_size));
505 	spin_unlock_irq(&chip->reg_lock);
506 	return 0;
507 }
508 
509 static snd_pcm_uframes_t snd_fm801_playback_pointer(struct snd_pcm_substream *substream)
510 {
511 	struct fm801 *chip = snd_pcm_substream_chip(substream);
512 	size_t ptr;
513 
514 	if (!(chip->ply_ctrl & FM801_START))
515 		return 0;
516 	spin_lock(&chip->reg_lock);
517 	ptr = chip->ply_pos + (chip->ply_count - 1) - fm801_readw(chip, PLY_COUNT);
518 	if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_PLAYBACK) {
519 		ptr += chip->ply_count;
520 		ptr %= chip->ply_size;
521 	}
522 	spin_unlock(&chip->reg_lock);
523 	return bytes_to_frames(substream->runtime, ptr);
524 }
525 
526 static snd_pcm_uframes_t snd_fm801_capture_pointer(struct snd_pcm_substream *substream)
527 {
528 	struct fm801 *chip = snd_pcm_substream_chip(substream);
529 	size_t ptr;
530 
531 	if (!(chip->cap_ctrl & FM801_START))
532 		return 0;
533 	spin_lock(&chip->reg_lock);
534 	ptr = chip->cap_pos + (chip->cap_count - 1) - fm801_readw(chip, CAP_COUNT);
535 	if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_CAPTURE) {
536 		ptr += chip->cap_count;
537 		ptr %= chip->cap_size;
538 	}
539 	spin_unlock(&chip->reg_lock);
540 	return bytes_to_frames(substream->runtime, ptr);
541 }
542 
543 static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id)
544 {
545 	struct fm801 *chip = dev_id;
546 	unsigned short status;
547 	unsigned int tmp;
548 
549 	status = fm801_readw(chip, IRQ_STATUS);
550 	status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
551 	if (! status)
552 		return IRQ_NONE;
553 	/* ack first */
554 	fm801_writew(chip, IRQ_STATUS, status);
555 	if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
556 		spin_lock(&chip->reg_lock);
557 		chip->ply_buf++;
558 		chip->ply_pos += chip->ply_count;
559 		chip->ply_pos %= chip->ply_size;
560 		tmp = chip->ply_pos + chip->ply_count;
561 		tmp %= chip->ply_size;
562 		if (chip->ply_buf & 1)
563 			fm801_writel(chip, PLY_BUF1, chip->ply_buffer + tmp);
564 		else
565 			fm801_writel(chip, PLY_BUF2, chip->ply_buffer + tmp);
566 		spin_unlock(&chip->reg_lock);
567 		snd_pcm_period_elapsed(chip->playback_substream);
568 	}
569 	if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
570 		spin_lock(&chip->reg_lock);
571 		chip->cap_buf++;
572 		chip->cap_pos += chip->cap_count;
573 		chip->cap_pos %= chip->cap_size;
574 		tmp = chip->cap_pos + chip->cap_count;
575 		tmp %= chip->cap_size;
576 		if (chip->cap_buf & 1)
577 			fm801_writel(chip, CAP_BUF1, chip->cap_buffer + tmp);
578 		else
579 			fm801_writel(chip, CAP_BUF2, chip->cap_buffer + tmp);
580 		spin_unlock(&chip->reg_lock);
581 		snd_pcm_period_elapsed(chip->capture_substream);
582 	}
583 	if (chip->rmidi && (status & FM801_IRQ_MPU))
584 		snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
585 	if (status & FM801_IRQ_VOLUME) {
586 		/* TODO */
587 	}
588 
589 	return IRQ_HANDLED;
590 }
591 
592 static const struct snd_pcm_hardware snd_fm801_playback =
593 {
594 	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
595 				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
596 				 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
597 				 SNDRV_PCM_INFO_MMAP_VALID),
598 	.formats =		SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
599 	.rates =		SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
600 	.rate_min =		5500,
601 	.rate_max =		48000,
602 	.channels_min =		1,
603 	.channels_max =		2,
604 	.buffer_bytes_max =	(128*1024),
605 	.period_bytes_min =	64,
606 	.period_bytes_max =	(128*1024),
607 	.periods_min =		1,
608 	.periods_max =		1024,
609 	.fifo_size =		0,
610 };
611 
612 static const struct snd_pcm_hardware snd_fm801_capture =
613 {
614 	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
615 				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
616 				 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
617 				 SNDRV_PCM_INFO_MMAP_VALID),
618 	.formats =		SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
619 	.rates =		SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
620 	.rate_min =		5500,
621 	.rate_max =		48000,
622 	.channels_min =		1,
623 	.channels_max =		2,
624 	.buffer_bytes_max =	(128*1024),
625 	.period_bytes_min =	64,
626 	.period_bytes_max =	(128*1024),
627 	.periods_min =		1,
628 	.periods_max =		1024,
629 	.fifo_size =		0,
630 };
631 
632 static int snd_fm801_playback_open(struct snd_pcm_substream *substream)
633 {
634 	struct fm801 *chip = snd_pcm_substream_chip(substream);
635 	struct snd_pcm_runtime *runtime = substream->runtime;
636 	int err;
637 
638 	chip->playback_substream = substream;
639 	runtime->hw = snd_fm801_playback;
640 	snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
641 				   &hw_constraints_rates);
642 	if (chip->multichannel) {
643 		runtime->hw.channels_max = 6;
644 		snd_pcm_hw_constraint_list(runtime, 0,
645 					   SNDRV_PCM_HW_PARAM_CHANNELS,
646 					   &hw_constraints_channels);
647 	}
648 	if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
649 		return err;
650 	return 0;
651 }
652 
653 static int snd_fm801_capture_open(struct snd_pcm_substream *substream)
654 {
655 	struct fm801 *chip = snd_pcm_substream_chip(substream);
656 	struct snd_pcm_runtime *runtime = substream->runtime;
657 	int err;
658 
659 	chip->capture_substream = substream;
660 	runtime->hw = snd_fm801_capture;
661 	snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
662 				   &hw_constraints_rates);
663 	if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
664 		return err;
665 	return 0;
666 }
667 
668 static int snd_fm801_playback_close(struct snd_pcm_substream *substream)
669 {
670 	struct fm801 *chip = snd_pcm_substream_chip(substream);
671 
672 	chip->playback_substream = NULL;
673 	return 0;
674 }
675 
676 static int snd_fm801_capture_close(struct snd_pcm_substream *substream)
677 {
678 	struct fm801 *chip = snd_pcm_substream_chip(substream);
679 
680 	chip->capture_substream = NULL;
681 	return 0;
682 }
683 
684 static const struct snd_pcm_ops snd_fm801_playback_ops = {
685 	.open =		snd_fm801_playback_open,
686 	.close =	snd_fm801_playback_close,
687 	.ioctl =	snd_pcm_lib_ioctl,
688 	.hw_params =	snd_fm801_hw_params,
689 	.hw_free =	snd_fm801_hw_free,
690 	.prepare =	snd_fm801_playback_prepare,
691 	.trigger =	snd_fm801_playback_trigger,
692 	.pointer =	snd_fm801_playback_pointer,
693 };
694 
695 static const struct snd_pcm_ops snd_fm801_capture_ops = {
696 	.open =		snd_fm801_capture_open,
697 	.close =	snd_fm801_capture_close,
698 	.ioctl =	snd_pcm_lib_ioctl,
699 	.hw_params =	snd_fm801_hw_params,
700 	.hw_free =	snd_fm801_hw_free,
701 	.prepare =	snd_fm801_capture_prepare,
702 	.trigger =	snd_fm801_capture_trigger,
703 	.pointer =	snd_fm801_capture_pointer,
704 };
705 
706 static int snd_fm801_pcm(struct fm801 *chip, int device)
707 {
708 	struct pci_dev *pdev = to_pci_dev(chip->dev);
709 	struct snd_pcm *pcm;
710 	int err;
711 
712 	if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0)
713 		return err;
714 
715 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
716 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
717 
718 	pcm->private_data = chip;
719 	pcm->info_flags = 0;
720 	strcpy(pcm->name, "FM801");
721 	chip->pcm = pcm;
722 
723 	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
724 					      snd_dma_pci_data(pdev),
725 					      chip->multichannel ? 128*1024 : 64*1024, 128*1024);
726 
727 	return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
728 				     snd_pcm_alt_chmaps,
729 				     chip->multichannel ? 6 : 2, 0,
730 				     NULL);
731 }
732 
733 /*
734  *  TEA5757 radio
735  */
736 
737 #ifdef CONFIG_SND_FM801_TEA575X_BOOL
738 
739 /* GPIO to TEA575x maps */
740 struct snd_fm801_tea575x_gpio {
741 	u8 data, clk, wren, most;
742 	char *name;
743 };
744 
745 static struct snd_fm801_tea575x_gpio snd_fm801_tea575x_gpios[] = {
746 	{ .data = 1, .clk = 3, .wren = 2, .most = 0, .name = "SF256-PCS" },
747 	{ .data = 1, .clk = 0, .wren = 2, .most = 3, .name = "SF256-PCP" },
748 	{ .data = 2, .clk = 0, .wren = 1, .most = 3, .name = "SF64-PCR" },
749 };
750 
751 #define get_tea575x_gpio(chip) \
752 	(&snd_fm801_tea575x_gpios[((chip)->tea575x_tuner & TUNER_TYPE_MASK) - 1])
753 
754 static void snd_fm801_tea575x_set_pins(struct snd_tea575x *tea, u8 pins)
755 {
756 	struct fm801 *chip = tea->private_data;
757 	unsigned short reg = fm801_readw(chip, GPIO_CTRL);
758 	struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
759 
760 	reg &= ~(FM801_GPIO_GP(gpio.data) |
761 		 FM801_GPIO_GP(gpio.clk) |
762 		 FM801_GPIO_GP(gpio.wren));
763 
764 	reg |= (pins & TEA575X_DATA) ? FM801_GPIO_GP(gpio.data) : 0;
765 	reg |= (pins & TEA575X_CLK)  ? FM801_GPIO_GP(gpio.clk) : 0;
766 	/* WRITE_ENABLE is inverted */
767 	reg |= (pins & TEA575X_WREN) ? 0 : FM801_GPIO_GP(gpio.wren);
768 
769 	fm801_writew(chip, GPIO_CTRL, reg);
770 }
771 
772 static u8 snd_fm801_tea575x_get_pins(struct snd_tea575x *tea)
773 {
774 	struct fm801 *chip = tea->private_data;
775 	unsigned short reg = fm801_readw(chip, GPIO_CTRL);
776 	struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
777 	u8 ret;
778 
779 	ret = 0;
780 	if (reg & FM801_GPIO_GP(gpio.data))
781 		ret |= TEA575X_DATA;
782 	if (reg & FM801_GPIO_GP(gpio.most))
783 		ret |= TEA575X_MOST;
784 	return ret;
785 }
786 
787 static void snd_fm801_tea575x_set_direction(struct snd_tea575x *tea, bool output)
788 {
789 	struct fm801 *chip = tea->private_data;
790 	unsigned short reg = fm801_readw(chip, GPIO_CTRL);
791 	struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
792 
793 	/* use GPIO lines and set write enable bit */
794 	reg |= FM801_GPIO_GS(gpio.data) |
795 	       FM801_GPIO_GS(gpio.wren) |
796 	       FM801_GPIO_GS(gpio.clk) |
797 	       FM801_GPIO_GS(gpio.most);
798 	if (output) {
799 		/* all of lines are in the write direction */
800 		/* clear data and clock lines */
801 		reg &= ~(FM801_GPIO_GD(gpio.data) |
802 			 FM801_GPIO_GD(gpio.wren) |
803 			 FM801_GPIO_GD(gpio.clk) |
804 			 FM801_GPIO_GP(gpio.data) |
805 			 FM801_GPIO_GP(gpio.clk) |
806 			 FM801_GPIO_GP(gpio.wren));
807 	} else {
808 		/* use GPIO lines, set data direction to input */
809 		reg |= FM801_GPIO_GD(gpio.data) |
810 		       FM801_GPIO_GD(gpio.most) |
811 		       FM801_GPIO_GP(gpio.data) |
812 		       FM801_GPIO_GP(gpio.most) |
813 		       FM801_GPIO_GP(gpio.wren);
814 		/* all of lines are in the write direction, except data */
815 		/* clear data, write enable and clock lines */
816 		reg &= ~(FM801_GPIO_GD(gpio.wren) |
817 			 FM801_GPIO_GD(gpio.clk) |
818 			 FM801_GPIO_GP(gpio.clk));
819 	}
820 
821 	fm801_writew(chip, GPIO_CTRL, reg);
822 }
823 
824 static const struct snd_tea575x_ops snd_fm801_tea_ops = {
825 	.set_pins = snd_fm801_tea575x_set_pins,
826 	.get_pins = snd_fm801_tea575x_get_pins,
827 	.set_direction = snd_fm801_tea575x_set_direction,
828 };
829 #endif
830 
831 /*
832  *  Mixer routines
833  */
834 
835 #define FM801_SINGLE(xname, reg, shift, mask, invert) \
836 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \
837   .get = snd_fm801_get_single, .put = snd_fm801_put_single, \
838   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
839 
840 static int snd_fm801_info_single(struct snd_kcontrol *kcontrol,
841 				 struct snd_ctl_elem_info *uinfo)
842 {
843 	int mask = (kcontrol->private_value >> 16) & 0xff;
844 
845 	uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
846 	uinfo->count = 1;
847 	uinfo->value.integer.min = 0;
848 	uinfo->value.integer.max = mask;
849 	return 0;
850 }
851 
852 static int snd_fm801_get_single(struct snd_kcontrol *kcontrol,
853 				struct snd_ctl_elem_value *ucontrol)
854 {
855 	struct fm801 *chip = snd_kcontrol_chip(kcontrol);
856 	int reg = kcontrol->private_value & 0xff;
857 	int shift = (kcontrol->private_value >> 8) & 0xff;
858 	int mask = (kcontrol->private_value >> 16) & 0xff;
859 	int invert = (kcontrol->private_value >> 24) & 0xff;
860 	long *value = ucontrol->value.integer.value;
861 
862 	value[0] = (fm801_ioread16(chip, reg) >> shift) & mask;
863 	if (invert)
864 		value[0] = mask - value[0];
865 	return 0;
866 }
867 
868 static int snd_fm801_put_single(struct snd_kcontrol *kcontrol,
869 				struct snd_ctl_elem_value *ucontrol)
870 {
871 	struct fm801 *chip = snd_kcontrol_chip(kcontrol);
872 	int reg = kcontrol->private_value & 0xff;
873 	int shift = (kcontrol->private_value >> 8) & 0xff;
874 	int mask = (kcontrol->private_value >> 16) & 0xff;
875 	int invert = (kcontrol->private_value >> 24) & 0xff;
876 	unsigned short val;
877 
878 	val = (ucontrol->value.integer.value[0] & mask);
879 	if (invert)
880 		val = mask - val;
881 	return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
882 }
883 
884 #define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
885 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \
886   .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
887   .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
888 #define FM801_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
889 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
890   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
891   .name = xname, .info = snd_fm801_info_double, \
892   .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
893   .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
894   .tlv = { .p = (xtlv) } }
895 
896 static int snd_fm801_info_double(struct snd_kcontrol *kcontrol,
897 				 struct snd_ctl_elem_info *uinfo)
898 {
899 	int mask = (kcontrol->private_value >> 16) & 0xff;
900 
901 	uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
902 	uinfo->count = 2;
903 	uinfo->value.integer.min = 0;
904 	uinfo->value.integer.max = mask;
905 	return 0;
906 }
907 
908 static int snd_fm801_get_double(struct snd_kcontrol *kcontrol,
909 				struct snd_ctl_elem_value *ucontrol)
910 {
911 	struct fm801 *chip = snd_kcontrol_chip(kcontrol);
912         int reg = kcontrol->private_value & 0xff;
913 	int shift_left = (kcontrol->private_value >> 8) & 0x0f;
914 	int shift_right = (kcontrol->private_value >> 12) & 0x0f;
915 	int mask = (kcontrol->private_value >> 16) & 0xff;
916 	int invert = (kcontrol->private_value >> 24) & 0xff;
917 	long *value = ucontrol->value.integer.value;
918 
919 	spin_lock_irq(&chip->reg_lock);
920 	value[0] = (fm801_ioread16(chip, reg) >> shift_left) & mask;
921 	value[1] = (fm801_ioread16(chip, reg) >> shift_right) & mask;
922 	spin_unlock_irq(&chip->reg_lock);
923 	if (invert) {
924 		value[0] = mask - value[0];
925 		value[1] = mask - value[1];
926 	}
927 	return 0;
928 }
929 
930 static int snd_fm801_put_double(struct snd_kcontrol *kcontrol,
931 				struct snd_ctl_elem_value *ucontrol)
932 {
933 	struct fm801 *chip = snd_kcontrol_chip(kcontrol);
934 	int reg = kcontrol->private_value & 0xff;
935 	int shift_left = (kcontrol->private_value >> 8) & 0x0f;
936 	int shift_right = (kcontrol->private_value >> 12) & 0x0f;
937 	int mask = (kcontrol->private_value >> 16) & 0xff;
938 	int invert = (kcontrol->private_value >> 24) & 0xff;
939 	unsigned short val1, val2;
940 
941 	val1 = ucontrol->value.integer.value[0] & mask;
942 	val2 = ucontrol->value.integer.value[1] & mask;
943 	if (invert) {
944 		val1 = mask - val1;
945 		val2 = mask - val2;
946 	}
947 	return snd_fm801_update_bits(chip, reg,
948 				     (mask << shift_left) | (mask << shift_right),
949 				     (val1 << shift_left ) | (val2 << shift_right));
950 }
951 
952 static int snd_fm801_info_mux(struct snd_kcontrol *kcontrol,
953 			      struct snd_ctl_elem_info *uinfo)
954 {
955 	static const char * const texts[5] = {
956 		"AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
957 	};
958 
959 	return snd_ctl_enum_info(uinfo, 1, 5, texts);
960 }
961 
962 static int snd_fm801_get_mux(struct snd_kcontrol *kcontrol,
963 			     struct snd_ctl_elem_value *ucontrol)
964 {
965 	struct fm801 *chip = snd_kcontrol_chip(kcontrol);
966         unsigned short val;
967 
968 	val = fm801_readw(chip, REC_SRC) & 7;
969 	if (val > 4)
970 		val = 4;
971         ucontrol->value.enumerated.item[0] = val;
972         return 0;
973 }
974 
975 static int snd_fm801_put_mux(struct snd_kcontrol *kcontrol,
976 			     struct snd_ctl_elem_value *ucontrol)
977 {
978 	struct fm801 *chip = snd_kcontrol_chip(kcontrol);
979         unsigned short val;
980 
981         if ((val = ucontrol->value.enumerated.item[0]) > 4)
982                 return -EINVAL;
983 	return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
984 }
985 
986 static const DECLARE_TLV_DB_SCALE(db_scale_dsp, -3450, 150, 0);
987 
988 #define FM801_CONTROLS ARRAY_SIZE(snd_fm801_controls)
989 
990 static struct snd_kcontrol_new snd_fm801_controls[] = {
991 FM801_DOUBLE_TLV("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1,
992 		 db_scale_dsp),
993 FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
994 FM801_DOUBLE_TLV("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1,
995 		 db_scale_dsp),
996 FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
997 FM801_DOUBLE_TLV("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1,
998 		 db_scale_dsp),
999 FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
1000 {
1001 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1002 	.name = "Digital Capture Source",
1003 	.info = snd_fm801_info_mux,
1004 	.get = snd_fm801_get_mux,
1005 	.put = snd_fm801_put_mux,
1006 }
1007 };
1008 
1009 #define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_fm801_controls_multi)
1010 
1011 static struct snd_kcontrol_new snd_fm801_controls_multi[] = {
1012 FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
1013 FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
1014 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0),
1015 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0),
1016 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0),
1017 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0),
1018 };
1019 
1020 static void snd_fm801_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1021 {
1022 	struct fm801 *chip = bus->private_data;
1023 	chip->ac97_bus = NULL;
1024 }
1025 
1026 static void snd_fm801_mixer_free_ac97(struct snd_ac97 *ac97)
1027 {
1028 	struct fm801 *chip = ac97->private_data;
1029 	if (ac97->num == 0) {
1030 		chip->ac97 = NULL;
1031 	} else {
1032 		chip->ac97_sec = NULL;
1033 	}
1034 }
1035 
1036 static int snd_fm801_mixer(struct fm801 *chip)
1037 {
1038 	struct snd_ac97_template ac97;
1039 	unsigned int i;
1040 	int err;
1041 	static struct snd_ac97_bus_ops ops = {
1042 		.write = snd_fm801_codec_write,
1043 		.read = snd_fm801_codec_read,
1044 	};
1045 
1046 	if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1047 		return err;
1048 	chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus;
1049 
1050 	memset(&ac97, 0, sizeof(ac97));
1051 	ac97.private_data = chip;
1052 	ac97.private_free = snd_fm801_mixer_free_ac97;
1053 	if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1054 		return err;
1055 	if (chip->secondary) {
1056 		ac97.num = 1;
1057 		ac97.addr = chip->secondary_addr;
1058 		if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0)
1059 			return err;
1060 	}
1061 	for (i = 0; i < FM801_CONTROLS; i++) {
1062 		err = snd_ctl_add(chip->card,
1063 			snd_ctl_new1(&snd_fm801_controls[i], chip));
1064 		if (err < 0)
1065 			return err;
1066 	}
1067 	if (chip->multichannel) {
1068 		for (i = 0; i < FM801_CONTROLS_MULTI; i++) {
1069 			err = snd_ctl_add(chip->card,
1070 				snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
1071 			if (err < 0)
1072 				return err;
1073 		}
1074 	}
1075 	return 0;
1076 }
1077 
1078 /*
1079  *  initialization routines
1080  */
1081 
1082 static int wait_for_codec(struct fm801 *chip, unsigned int codec_id,
1083 			  unsigned short reg, unsigned long waits)
1084 {
1085 	unsigned long timeout = jiffies + waits;
1086 
1087 	fm801_writew(chip, AC97_CMD,
1088 		     reg | (codec_id << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
1089 	udelay(5);
1090 	do {
1091 		if ((fm801_readw(chip, AC97_CMD) &
1092 		     (FM801_AC97_VALID | FM801_AC97_BUSY)) == FM801_AC97_VALID)
1093 			return 0;
1094 		schedule_timeout_uninterruptible(1);
1095 	} while (time_after(timeout, jiffies));
1096 	return -EIO;
1097 }
1098 
1099 static int reset_codec(struct fm801 *chip)
1100 {
1101 	/* codec cold reset + AC'97 warm reset */
1102 	fm801_writew(chip, CODEC_CTRL, (1 << 5) | (1 << 6));
1103 	fm801_readw(chip, CODEC_CTRL); /* flush posting data */
1104 	udelay(100);
1105 	fm801_writew(chip, CODEC_CTRL, 0);
1106 
1107 	return wait_for_codec(chip, 0, AC97_RESET, msecs_to_jiffies(750));
1108 }
1109 
1110 static void snd_fm801_chip_multichannel_init(struct fm801 *chip)
1111 {
1112 	unsigned short cmdw;
1113 
1114 	if (chip->multichannel) {
1115 		if (chip->secondary_addr) {
1116 			wait_for_codec(chip, chip->secondary_addr,
1117 				       AC97_VENDOR_ID1, msecs_to_jiffies(50));
1118 		} else {
1119 			/* my card has the secondary codec */
1120 			/* at address #3, so the loop is inverted */
1121 			int i;
1122 			for (i = 3; i > 0; i--) {
1123 				if (!wait_for_codec(chip, i, AC97_VENDOR_ID1,
1124 						     msecs_to_jiffies(50))) {
1125 					cmdw = fm801_readw(chip, AC97_DATA);
1126 					if (cmdw != 0xffff && cmdw != 0) {
1127 						chip->secondary = 1;
1128 						chip->secondary_addr = i;
1129 						break;
1130 					}
1131 				}
1132 			}
1133 		}
1134 
1135 		/* the recovery phase, it seems that probing for non-existing codec might */
1136 		/* cause timeout problems */
1137 		wait_for_codec(chip, 0, AC97_VENDOR_ID1, msecs_to_jiffies(750));
1138 	}
1139 }
1140 
1141 static void snd_fm801_chip_init(struct fm801 *chip)
1142 {
1143 	unsigned short cmdw;
1144 
1145 	/* init volume */
1146 	fm801_writew(chip, PCM_VOL, 0x0808);
1147 	fm801_writew(chip, FM_VOL, 0x9f1f);
1148 	fm801_writew(chip, I2S_VOL, 0x8808);
1149 
1150 	/* I2S control - I2S mode */
1151 	fm801_writew(chip, I2S_MODE, 0x0003);
1152 
1153 	/* interrupt setup */
1154 	cmdw = fm801_readw(chip, IRQ_MASK);
1155 	if (chip->irq < 0)
1156 		cmdw |= 0x00c3;		/* mask everything, no PCM nor MPU */
1157 	else
1158 		cmdw &= ~0x0083;	/* unmask MPU, PLAYBACK & CAPTURE */
1159 	fm801_writew(chip, IRQ_MASK, cmdw);
1160 
1161 	/* interrupt clear */
1162 	fm801_writew(chip, IRQ_STATUS,
1163 		     FM801_IRQ_PLAYBACK | FM801_IRQ_CAPTURE | FM801_IRQ_MPU);
1164 }
1165 
1166 static int snd_fm801_free(struct fm801 *chip)
1167 {
1168 	unsigned short cmdw;
1169 
1170 	if (chip->irq < 0)
1171 		goto __end_hw;
1172 
1173 	/* interrupt setup - mask everything */
1174 	cmdw = fm801_readw(chip, IRQ_MASK);
1175 	cmdw |= 0x00c3;
1176 	fm801_writew(chip, IRQ_MASK, cmdw);
1177 
1178 	devm_free_irq(chip->dev, chip->irq, chip);
1179 
1180       __end_hw:
1181 #ifdef CONFIG_SND_FM801_TEA575X_BOOL
1182 	if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
1183 		snd_tea575x_exit(&chip->tea);
1184 		v4l2_device_unregister(&chip->v4l2_dev);
1185 	}
1186 #endif
1187 	return 0;
1188 }
1189 
1190 static int snd_fm801_dev_free(struct snd_device *device)
1191 {
1192 	struct fm801 *chip = device->device_data;
1193 	return snd_fm801_free(chip);
1194 }
1195 
1196 static int snd_fm801_create(struct snd_card *card,
1197 			    struct pci_dev *pci,
1198 			    int tea575x_tuner,
1199 			    int radio_nr,
1200 			    struct fm801 **rchip)
1201 {
1202 	struct fm801 *chip;
1203 	int err;
1204 	static struct snd_device_ops ops = {
1205 		.dev_free =	snd_fm801_dev_free,
1206 	};
1207 
1208 	*rchip = NULL;
1209 	if ((err = pcim_enable_device(pci)) < 0)
1210 		return err;
1211 	chip = devm_kzalloc(&pci->dev, sizeof(*chip), GFP_KERNEL);
1212 	if (chip == NULL)
1213 		return -ENOMEM;
1214 	spin_lock_init(&chip->reg_lock);
1215 	chip->card = card;
1216 	chip->dev = &pci->dev;
1217 	chip->irq = -1;
1218 	chip->tea575x_tuner = tea575x_tuner;
1219 	if ((err = pci_request_regions(pci, "FM801")) < 0)
1220 		return err;
1221 	chip->port = pci_resource_start(pci, 0);
1222 
1223 	if (pci->revision >= 0xb1)	/* FM801-AU */
1224 		chip->multichannel = 1;
1225 
1226 	if (!(chip->tea575x_tuner & TUNER_ONLY)) {
1227 		if (reset_codec(chip) < 0) {
1228 			dev_info(chip->card->dev,
1229 				 "Primary AC'97 codec not found, assume SF64-PCR (tuner-only)\n");
1230 			chip->tea575x_tuner = 3 | TUNER_ONLY;
1231 		} else {
1232 			snd_fm801_chip_multichannel_init(chip);
1233 		}
1234 	}
1235 
1236 	if ((chip->tea575x_tuner & TUNER_ONLY) == 0) {
1237 		if (devm_request_irq(&pci->dev, pci->irq, snd_fm801_interrupt,
1238 				IRQF_SHARED, KBUILD_MODNAME, chip)) {
1239 			dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1240 			snd_fm801_free(chip);
1241 			return -EBUSY;
1242 		}
1243 		chip->irq = pci->irq;
1244 		pci_set_master(pci);
1245 	}
1246 
1247 	snd_fm801_chip_init(chip);
1248 
1249 	if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1250 		snd_fm801_free(chip);
1251 		return err;
1252 	}
1253 
1254 #ifdef CONFIG_SND_FM801_TEA575X_BOOL
1255 	err = v4l2_device_register(&pci->dev, &chip->v4l2_dev);
1256 	if (err < 0) {
1257 		snd_fm801_free(chip);
1258 		return err;
1259 	}
1260 	chip->tea.v4l2_dev = &chip->v4l2_dev;
1261 	chip->tea.radio_nr = radio_nr;
1262 	chip->tea.private_data = chip;
1263 	chip->tea.ops = &snd_fm801_tea_ops;
1264 	sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci));
1265 	if ((chip->tea575x_tuner & TUNER_TYPE_MASK) > 0 &&
1266 	    (chip->tea575x_tuner & TUNER_TYPE_MASK) < 4) {
1267 		if (snd_tea575x_init(&chip->tea, THIS_MODULE)) {
1268 			dev_err(card->dev, "TEA575x radio not found\n");
1269 			snd_fm801_free(chip);
1270 			return -ENODEV;
1271 		}
1272 	} else if ((chip->tea575x_tuner & TUNER_TYPE_MASK) == 0) {
1273 		unsigned int tuner_only = chip->tea575x_tuner & TUNER_ONLY;
1274 
1275 		/* autodetect tuner connection */
1276 		for (tea575x_tuner = 1; tea575x_tuner <= 3; tea575x_tuner++) {
1277 			chip->tea575x_tuner = tea575x_tuner;
1278 			if (!snd_tea575x_init(&chip->tea, THIS_MODULE)) {
1279 				dev_info(card->dev,
1280 					 "detected TEA575x radio type %s\n",
1281 					   get_tea575x_gpio(chip)->name);
1282 				break;
1283 			}
1284 		}
1285 		if (tea575x_tuner == 4) {
1286 			dev_err(card->dev, "TEA575x radio not found\n");
1287 			chip->tea575x_tuner = TUNER_DISABLED;
1288 		}
1289 
1290 		chip->tea575x_tuner |= tuner_only;
1291 	}
1292 	if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
1293 		strlcpy(chip->tea.card, get_tea575x_gpio(chip)->name,
1294 			sizeof(chip->tea.card));
1295 	}
1296 #endif
1297 
1298 	*rchip = chip;
1299 	return 0;
1300 }
1301 
1302 static int snd_card_fm801_probe(struct pci_dev *pci,
1303 				const struct pci_device_id *pci_id)
1304 {
1305 	static int dev;
1306 	struct snd_card *card;
1307 	struct fm801 *chip;
1308 	struct snd_opl3 *opl3;
1309 	int err;
1310 
1311         if (dev >= SNDRV_CARDS)
1312                 return -ENODEV;
1313 	if (!enable[dev]) {
1314 		dev++;
1315 		return -ENOENT;
1316 	}
1317 
1318 	err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1319 			   0, &card);
1320 	if (err < 0)
1321 		return err;
1322 	if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], radio_nr[dev], &chip)) < 0) {
1323 		snd_card_free(card);
1324 		return err;
1325 	}
1326 	card->private_data = chip;
1327 
1328 	strcpy(card->driver, "FM801");
1329 	strcpy(card->shortname, "ForteMedia FM801-");
1330 	strcat(card->shortname, chip->multichannel ? "AU" : "AS");
1331 	sprintf(card->longname, "%s at 0x%lx, irq %i",
1332 		card->shortname, chip->port, chip->irq);
1333 
1334 	if (chip->tea575x_tuner & TUNER_ONLY)
1335 		goto __fm801_tuner_only;
1336 
1337 	if ((err = snd_fm801_pcm(chip, 0)) < 0) {
1338 		snd_card_free(card);
1339 		return err;
1340 	}
1341 	if ((err = snd_fm801_mixer(chip)) < 0) {
1342 		snd_card_free(card);
1343 		return err;
1344 	}
1345 	if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
1346 				       chip->port + FM801_MPU401_DATA,
1347 				       MPU401_INFO_INTEGRATED |
1348 				       MPU401_INFO_IRQ_HOOK,
1349 				       -1, &chip->rmidi)) < 0) {
1350 		snd_card_free(card);
1351 		return err;
1352 	}
1353 	if ((err = snd_opl3_create(card, chip->port + FM801_OPL3_BANK0,
1354 				   chip->port + FM801_OPL3_BANK1,
1355 				   OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) {
1356 		snd_card_free(card);
1357 		return err;
1358 	}
1359 	if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1360 		snd_card_free(card);
1361 		return err;
1362 	}
1363 
1364       __fm801_tuner_only:
1365 	if ((err = snd_card_register(card)) < 0) {
1366 		snd_card_free(card);
1367 		return err;
1368 	}
1369 	pci_set_drvdata(pci, card);
1370 	dev++;
1371 	return 0;
1372 }
1373 
1374 static void snd_card_fm801_remove(struct pci_dev *pci)
1375 {
1376 	snd_card_free(pci_get_drvdata(pci));
1377 }
1378 
1379 #ifdef CONFIG_PM_SLEEP
1380 static unsigned char saved_regs[] = {
1381 	FM801_PCM_VOL, FM801_I2S_VOL, FM801_FM_VOL, FM801_REC_SRC,
1382 	FM801_PLY_CTRL, FM801_PLY_COUNT, FM801_PLY_BUF1, FM801_PLY_BUF2,
1383 	FM801_CAP_CTRL, FM801_CAP_COUNT, FM801_CAP_BUF1, FM801_CAP_BUF2,
1384 	FM801_CODEC_CTRL, FM801_I2S_MODE, FM801_VOLUME, FM801_GEN_CTRL,
1385 };
1386 
1387 static int snd_fm801_suspend(struct device *dev)
1388 {
1389 	struct snd_card *card = dev_get_drvdata(dev);
1390 	struct fm801 *chip = card->private_data;
1391 	int i;
1392 
1393 	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1394 
1395 	for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
1396 		chip->saved_regs[i] = fm801_ioread16(chip, saved_regs[i]);
1397 
1398 	if (chip->tea575x_tuner & TUNER_ONLY) {
1399 		/* FIXME: tea575x suspend */
1400 	} else {
1401 		snd_ac97_suspend(chip->ac97);
1402 		snd_ac97_suspend(chip->ac97_sec);
1403 	}
1404 
1405 	return 0;
1406 }
1407 
1408 static int snd_fm801_resume(struct device *dev)
1409 {
1410 	struct snd_card *card = dev_get_drvdata(dev);
1411 	struct fm801 *chip = card->private_data;
1412 	int i;
1413 
1414 	if (chip->tea575x_tuner & TUNER_ONLY) {
1415 		snd_fm801_chip_init(chip);
1416 	} else {
1417 		reset_codec(chip);
1418 		snd_fm801_chip_multichannel_init(chip);
1419 		snd_fm801_chip_init(chip);
1420 		snd_ac97_resume(chip->ac97);
1421 		snd_ac97_resume(chip->ac97_sec);
1422 	}
1423 
1424 	for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
1425 		fm801_iowrite16(chip, saved_regs[i], chip->saved_regs[i]);
1426 
1427 #ifdef CONFIG_SND_FM801_TEA575X_BOOL
1428 	if (!(chip->tea575x_tuner & TUNER_DISABLED))
1429 		snd_tea575x_set_freq(&chip->tea);
1430 #endif
1431 
1432 	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1433 	return 0;
1434 }
1435 
1436 static SIMPLE_DEV_PM_OPS(snd_fm801_pm, snd_fm801_suspend, snd_fm801_resume);
1437 #define SND_FM801_PM_OPS	&snd_fm801_pm
1438 #else
1439 #define SND_FM801_PM_OPS	NULL
1440 #endif /* CONFIG_PM_SLEEP */
1441 
1442 static struct pci_driver fm801_driver = {
1443 	.name = KBUILD_MODNAME,
1444 	.id_table = snd_fm801_ids,
1445 	.probe = snd_card_fm801_probe,
1446 	.remove = snd_card_fm801_remove,
1447 	.driver = {
1448 		.pm = SND_FM801_PM_OPS,
1449 	},
1450 };
1451 
1452 module_pci_driver(fm801_driver);
1453