xref: /linux/sound/pci/es1938.c (revision c09e28cd1219fd267ed838e1758ff2e7b6ff3ec6)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *  Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
4  *  Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
5  *                   Jaroslav Kysela <perex@perex.cz>,
6  *                   Thomas Sailer <sailer@ife.ee.ethz.ch>,
7  *                   Abramo Bagnara <abramo@alsa-project.org>,
8  *                   Markus Gruber <gruber@eikon.tum.de>
9  *
10  * Rewritten from sonicvibes.c source.
11  *
12  *  TODO:
13  *    Rewrite better spinlocks
14  */
15 
16 /*
17   NOTES:
18   - Capture data is written unaligned starting from dma_base + 1 so I need to
19     disable mmap and to add a copy callback.
20   - After several cycle of the following:
21     while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
22     a "playback write error (DMA or IRQ trouble?)" may happen.
23     This is due to playback interrupts not generated.
24     I suspect a timing issue.
25   - Sometimes the interrupt handler is invoked wrongly during playback.
26     This generates some harmless "Unexpected hw_pointer: wrong interrupt
27     acknowledge".
28     I've seen that using small period sizes.
29     Reproducible with:
30     mpg123 test.mp3 &
31     hdparm -t -T /dev/hda
32 */
33 
34 
35 #include <linux/init.h>
36 #include <linux/interrupt.h>
37 #include <linux/pci.h>
38 #include <linux/slab.h>
39 #include <linux/gameport.h>
40 #include <linux/module.h>
41 #include <linux/delay.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/io.h>
44 #include <sound/core.h>
45 #include <sound/control.h>
46 #include <sound/pcm.h>
47 #include <sound/opl3.h>
48 #include <sound/mpu401.h>
49 #include <sound/initval.h>
50 #include <sound/tlv.h>
51 
52 MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
53 MODULE_DESCRIPTION("ESS Solo-1");
54 MODULE_LICENSE("GPL");
55 MODULE_SUPPORTED_DEVICE("{{ESS,ES1938},"
56                 "{ESS,ES1946},"
57                 "{ESS,ES1969},"
58 		"{TerraTec,128i PCI}}");
59 
60 #if IS_REACHABLE(CONFIG_GAMEPORT)
61 #define SUPPORT_JOYSTICK 1
62 #endif
63 
64 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;	/* Index 0-MAX */
65 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;	/* ID for this card */
66 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;	/* Enable this card */
67 
68 module_param_array(index, int, NULL, 0444);
69 MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
70 module_param_array(id, charp, NULL, 0444);
71 MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
72 module_param_array(enable, bool, NULL, 0444);
73 MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
74 
75 #define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
76 
77 #define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
78 
79 #define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
80 
81 #define SL_PCI_LEGACYCONTROL		0x40
82 #define SL_PCI_CONFIG			0x50
83 #define SL_PCI_DDMACONTROL		0x60
84 
85 #define ESSIO_REG_AUDIO2DMAADDR		0
86 #define ESSIO_REG_AUDIO2DMACOUNT	4
87 #define ESSIO_REG_AUDIO2MODE		6
88 #define ESSIO_REG_IRQCONTROL		7
89 
90 #define ESSDM_REG_DMAADDR		0x00
91 #define ESSDM_REG_DMACOUNT		0x04
92 #define ESSDM_REG_DMACOMMAND		0x08
93 #define ESSDM_REG_DMASTATUS		0x08
94 #define ESSDM_REG_DMAMODE		0x0b
95 #define ESSDM_REG_DMACLEAR		0x0d
96 #define ESSDM_REG_DMAMASK		0x0f
97 
98 #define ESSSB_REG_FMLOWADDR		0x00
99 #define ESSSB_REG_FMHIGHADDR		0x02
100 #define ESSSB_REG_MIXERADDR		0x04
101 #define ESSSB_REG_MIXERDATA		0x05
102 
103 #define ESSSB_IREG_AUDIO1		0x14
104 #define ESSSB_IREG_MICMIX		0x1a
105 #define ESSSB_IREG_RECSRC		0x1c
106 #define ESSSB_IREG_MASTER		0x32
107 #define ESSSB_IREG_FM			0x36
108 #define ESSSB_IREG_AUXACD		0x38
109 #define ESSSB_IREG_AUXB			0x3a
110 #define ESSSB_IREG_PCSPEAKER		0x3c
111 #define ESSSB_IREG_LINE			0x3e
112 #define ESSSB_IREG_SPATCONTROL		0x50
113 #define ESSSB_IREG_SPATLEVEL		0x52
114 #define ESSSB_IREG_MASTER_LEFT		0x60
115 #define ESSSB_IREG_MASTER_RIGHT		0x62
116 #define ESSSB_IREG_MPU401CONTROL	0x64
117 #define ESSSB_IREG_MICMIXRECORD		0x68
118 #define ESSSB_IREG_AUDIO2RECORD		0x69
119 #define ESSSB_IREG_AUXACDRECORD		0x6a
120 #define ESSSB_IREG_FMRECORD		0x6b
121 #define ESSSB_IREG_AUXBRECORD		0x6c
122 #define ESSSB_IREG_MONO			0x6d
123 #define ESSSB_IREG_LINERECORD		0x6e
124 #define ESSSB_IREG_MONORECORD		0x6f
125 #define ESSSB_IREG_AUDIO2SAMPLE		0x70
126 #define ESSSB_IREG_AUDIO2MODE		0x71
127 #define ESSSB_IREG_AUDIO2FILTER		0x72
128 #define ESSSB_IREG_AUDIO2TCOUNTL	0x74
129 #define ESSSB_IREG_AUDIO2TCOUNTH	0x76
130 #define ESSSB_IREG_AUDIO2CONTROL1	0x78
131 #define ESSSB_IREG_AUDIO2CONTROL2	0x7a
132 #define ESSSB_IREG_AUDIO2		0x7c
133 
134 #define ESSSB_REG_RESET			0x06
135 
136 #define ESSSB_REG_READDATA		0x0a
137 #define ESSSB_REG_WRITEDATA		0x0c
138 #define ESSSB_REG_READSTATUS		0x0c
139 
140 #define ESSSB_REG_STATUS		0x0e
141 
142 #define ESS_CMD_EXTSAMPLERATE		0xa1
143 #define ESS_CMD_FILTERDIV		0xa2
144 #define ESS_CMD_DMACNTRELOADL		0xa4
145 #define ESS_CMD_DMACNTRELOADH		0xa5
146 #define ESS_CMD_ANALOGCONTROL		0xa8
147 #define ESS_CMD_IRQCONTROL		0xb1
148 #define ESS_CMD_DRQCONTROL		0xb2
149 #define ESS_CMD_RECLEVEL		0xb4
150 #define ESS_CMD_SETFORMAT		0xb6
151 #define ESS_CMD_SETFORMAT2		0xb7
152 #define ESS_CMD_DMACONTROL		0xb8
153 #define ESS_CMD_DMATYPE			0xb9
154 #define ESS_CMD_OFFSETLEFT		0xba
155 #define ESS_CMD_OFFSETRIGHT		0xbb
156 #define ESS_CMD_READREG			0xc0
157 #define ESS_CMD_ENABLEEXT		0xc6
158 #define ESS_CMD_PAUSEDMA		0xd0
159 #define ESS_CMD_ENABLEAUDIO1		0xd1
160 #define ESS_CMD_STOPAUDIO1		0xd3
161 #define ESS_CMD_AUDIO1STATUS		0xd8
162 #define ESS_CMD_CONTDMA			0xd4
163 #define ESS_CMD_TESTIRQ			0xf2
164 
165 #define ESS_RECSRC_MIC		0
166 #define ESS_RECSRC_AUXACD	2
167 #define ESS_RECSRC_AUXB		5
168 #define ESS_RECSRC_LINE		6
169 #define ESS_RECSRC_NONE		7
170 
171 #define DAC1 0x01
172 #define ADC1 0x02
173 #define DAC2 0x04
174 
175 /*
176 
177  */
178 
179 #define SAVED_REG_SIZE	32 /* max. number of registers to save */
180 
181 struct es1938 {
182 	int irq;
183 
184 	unsigned long io_port;
185 	unsigned long sb_port;
186 	unsigned long vc_port;
187 	unsigned long mpu_port;
188 	unsigned long game_port;
189 	unsigned long ddma_port;
190 
191 	unsigned char irqmask;
192 	unsigned char revision;
193 
194 	struct snd_kcontrol *hw_volume;
195 	struct snd_kcontrol *hw_switch;
196 	struct snd_kcontrol *master_volume;
197 	struct snd_kcontrol *master_switch;
198 
199 	struct pci_dev *pci;
200 	struct snd_card *card;
201 	struct snd_pcm *pcm;
202 	struct snd_pcm_substream *capture_substream;
203 	struct snd_pcm_substream *playback1_substream;
204 	struct snd_pcm_substream *playback2_substream;
205 	struct snd_rawmidi *rmidi;
206 
207 	unsigned int dma1_size;
208 	unsigned int dma2_size;
209 	unsigned int dma1_start;
210 	unsigned int dma2_start;
211 	unsigned int dma1_shift;
212 	unsigned int dma2_shift;
213 	unsigned int last_capture_dmaaddr;
214 	unsigned int active;
215 
216 	spinlock_t reg_lock;
217 	spinlock_t mixer_lock;
218         struct snd_info_entry *proc_entry;
219 
220 #ifdef SUPPORT_JOYSTICK
221 	struct gameport *gameport;
222 #endif
223 #ifdef CONFIG_PM_SLEEP
224 	unsigned char saved_regs[SAVED_REG_SIZE];
225 #endif
226 };
227 
228 static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
229 
230 static const struct pci_device_id snd_es1938_ids[] = {
231 	{ PCI_VDEVICE(ESS, 0x1969), 0, },   /* Solo-1 */
232 	{ 0, }
233 };
234 
235 MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
236 
237 #define RESET_LOOP_TIMEOUT	0x10000
238 #define WRITE_LOOP_TIMEOUT	0x10000
239 #define GET_LOOP_TIMEOUT	0x01000
240 
241 /* -----------------------------------------------------------------
242  * Write to a mixer register
243  * -----------------------------------------------------------------*/
244 static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
245 {
246 	unsigned long flags;
247 	spin_lock_irqsave(&chip->mixer_lock, flags);
248 	outb(reg, SLSB_REG(chip, MIXERADDR));
249 	outb(val, SLSB_REG(chip, MIXERDATA));
250 	spin_unlock_irqrestore(&chip->mixer_lock, flags);
251 	dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val);
252 }
253 
254 /* -----------------------------------------------------------------
255  * Read from a mixer register
256  * -----------------------------------------------------------------*/
257 static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
258 {
259 	int data;
260 	unsigned long flags;
261 	spin_lock_irqsave(&chip->mixer_lock, flags);
262 	outb(reg, SLSB_REG(chip, MIXERADDR));
263 	data = inb(SLSB_REG(chip, MIXERDATA));
264 	spin_unlock_irqrestore(&chip->mixer_lock, flags);
265 	dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data);
266 	return data;
267 }
268 
269 /* -----------------------------------------------------------------
270  * Write to some bits of a mixer register (return old value)
271  * -----------------------------------------------------------------*/
272 static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
273 				 unsigned char mask, unsigned char val)
274 {
275 	unsigned long flags;
276 	unsigned char old, new, oval;
277 	spin_lock_irqsave(&chip->mixer_lock, flags);
278 	outb(reg, SLSB_REG(chip, MIXERADDR));
279 	old = inb(SLSB_REG(chip, MIXERDATA));
280 	oval = old & mask;
281 	if (val != oval) {
282 		new = (old & ~mask) | (val & mask);
283 		outb(new, SLSB_REG(chip, MIXERDATA));
284 		dev_dbg(chip->card->dev,
285 			"Mixer reg %02x was %02x, set to %02x\n",
286 			   reg, old, new);
287 	}
288 	spin_unlock_irqrestore(&chip->mixer_lock, flags);
289 	return oval;
290 }
291 
292 /* -----------------------------------------------------------------
293  * Write command to Controller Registers
294  * -----------------------------------------------------------------*/
295 static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
296 {
297 	int i;
298 	unsigned char v;
299 	for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
300 		if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) {
301 			outb(cmd, SLSB_REG(chip, WRITEDATA));
302 			return;
303 		}
304 	}
305 	dev_err(chip->card->dev,
306 		"snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
307 }
308 
309 /* -----------------------------------------------------------------
310  * Read the Read Data Buffer
311  * -----------------------------------------------------------------*/
312 static int snd_es1938_get_byte(struct es1938 *chip)
313 {
314 	int i;
315 	unsigned char v;
316 	for (i = GET_LOOP_TIMEOUT; i; i--)
317 		if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80)
318 			return inb(SLSB_REG(chip, READDATA));
319 	dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v);
320 	return -ENODEV;
321 }
322 
323 /* -----------------------------------------------------------------
324  * Write value cmd register
325  * -----------------------------------------------------------------*/
326 static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
327 {
328 	unsigned long flags;
329 	spin_lock_irqsave(&chip->reg_lock, flags);
330 	snd_es1938_write_cmd(chip, reg);
331 	snd_es1938_write_cmd(chip, val);
332 	spin_unlock_irqrestore(&chip->reg_lock, flags);
333 	dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val);
334 }
335 
336 /* -----------------------------------------------------------------
337  * Read data from cmd register and return it
338  * -----------------------------------------------------------------*/
339 static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
340 {
341 	unsigned char val;
342 	unsigned long flags;
343 	spin_lock_irqsave(&chip->reg_lock, flags);
344 	snd_es1938_write_cmd(chip, ESS_CMD_READREG);
345 	snd_es1938_write_cmd(chip, reg);
346 	val = snd_es1938_get_byte(chip);
347 	spin_unlock_irqrestore(&chip->reg_lock, flags);
348 	dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val);
349 	return val;
350 }
351 
352 /* -----------------------------------------------------------------
353  * Write data to cmd register and return old value
354  * -----------------------------------------------------------------*/
355 static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
356 			   unsigned char val)
357 {
358 	unsigned long flags;
359 	unsigned char old, new, oval;
360 	spin_lock_irqsave(&chip->reg_lock, flags);
361 	snd_es1938_write_cmd(chip, ESS_CMD_READREG);
362 	snd_es1938_write_cmd(chip, reg);
363 	old = snd_es1938_get_byte(chip);
364 	oval = old & mask;
365 	if (val != oval) {
366 		snd_es1938_write_cmd(chip, reg);
367 		new = (old & ~mask) | (val & mask);
368 		snd_es1938_write_cmd(chip, new);
369 		dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n",
370 			   reg, old, new);
371 	}
372 	spin_unlock_irqrestore(&chip->reg_lock, flags);
373 	return oval;
374 }
375 
376 /* --------------------------------------------------------------------
377  * Reset the chip
378  * --------------------------------------------------------------------*/
379 static void snd_es1938_reset(struct es1938 *chip)
380 {
381 	int i;
382 
383 	outb(3, SLSB_REG(chip, RESET));
384 	inb(SLSB_REG(chip, RESET));
385 	outb(0, SLSB_REG(chip, RESET));
386 	for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
387 		if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
388 			if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
389 				goto __next;
390 		}
391 	}
392 	dev_err(chip->card->dev, "ESS Solo-1 reset failed\n");
393 
394      __next:
395 	snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
396 
397 	/* Demand transfer DMA: 4 bytes per DMA request */
398 	snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
399 
400 	/* Change behaviour of register A1
401 	   4x oversampling
402 	   2nd channel DAC asynchronous */
403 	snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
404 	/* enable/select DMA channel and IRQ channel */
405 	snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
406 	snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
407 	snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
408 	/* Set spatializer parameters to recommended values */
409 	snd_es1938_mixer_write(chip, 0x54, 0x8f);
410 	snd_es1938_mixer_write(chip, 0x56, 0x95);
411 	snd_es1938_mixer_write(chip, 0x58, 0x94);
412 	snd_es1938_mixer_write(chip, 0x5a, 0x80);
413 }
414 
415 /* --------------------------------------------------------------------
416  * Reset the FIFOs
417  * --------------------------------------------------------------------*/
418 static void snd_es1938_reset_fifo(struct es1938 *chip)
419 {
420 	outb(2, SLSB_REG(chip, RESET));
421 	outb(0, SLSB_REG(chip, RESET));
422 }
423 
424 static const struct snd_ratnum clocks[2] = {
425 	{
426 		.num = 793800,
427 		.den_min = 1,
428 		.den_max = 128,
429 		.den_step = 1,
430 	},
431 	{
432 		.num = 768000,
433 		.den_min = 1,
434 		.den_max = 128,
435 		.den_step = 1,
436 	}
437 };
438 
439 static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
440 	.nrats = 2,
441 	.rats = clocks,
442 };
443 
444 
445 static void snd_es1938_rate_set(struct es1938 *chip,
446 				struct snd_pcm_substream *substream,
447 				int mode)
448 {
449 	unsigned int bits, div0;
450 	struct snd_pcm_runtime *runtime = substream->runtime;
451 	if (runtime->rate_num == clocks[0].num)
452 		bits = 128 - runtime->rate_den;
453 	else
454 		bits = 256 - runtime->rate_den;
455 
456 	/* set filter register */
457 	div0 = 256 - 7160000*20/(8*82*runtime->rate);
458 
459 	if (mode == DAC2) {
460 		snd_es1938_mixer_write(chip, 0x70, bits);
461 		snd_es1938_mixer_write(chip, 0x72, div0);
462 	} else {
463 		snd_es1938_write(chip, 0xA1, bits);
464 		snd_es1938_write(chip, 0xA2, div0);
465 	}
466 }
467 
468 /* --------------------------------------------------------------------
469  * Configure Solo1 builtin DMA Controller
470  * --------------------------------------------------------------------*/
471 
472 static void snd_es1938_playback1_setdma(struct es1938 *chip)
473 {
474 	outb(0x00, SLIO_REG(chip, AUDIO2MODE));
475 	outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
476 	outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
477 	outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
478 }
479 
480 static void snd_es1938_playback2_setdma(struct es1938 *chip)
481 {
482 	/* Enable DMA controller */
483 	outb(0xc4, SLDM_REG(chip, DMACOMMAND));
484 	/* 1. Master reset */
485 	outb(0, SLDM_REG(chip, DMACLEAR));
486 	/* 2. Mask DMA */
487 	outb(1, SLDM_REG(chip, DMAMASK));
488 	outb(0x18, SLDM_REG(chip, DMAMODE));
489 	outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
490 	outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
491 	/* 3. Unmask DMA */
492 	outb(0, SLDM_REG(chip, DMAMASK));
493 }
494 
495 static void snd_es1938_capture_setdma(struct es1938 *chip)
496 {
497 	/* Enable DMA controller */
498 	outb(0xc4, SLDM_REG(chip, DMACOMMAND));
499 	/* 1. Master reset */
500 	outb(0, SLDM_REG(chip, DMACLEAR));
501 	/* 2. Mask DMA */
502 	outb(1, SLDM_REG(chip, DMAMASK));
503 	outb(0x14, SLDM_REG(chip, DMAMODE));
504 	outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
505 	chip->last_capture_dmaaddr = chip->dma1_start;
506 	outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
507 	/* 3. Unmask DMA */
508 	outb(0, SLDM_REG(chip, DMAMASK));
509 }
510 
511 /* ----------------------------------------------------------------------
512  *
513  *                           *** PCM part ***
514  */
515 
516 static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
517 				      int cmd)
518 {
519 	struct es1938 *chip = snd_pcm_substream_chip(substream);
520 	int val;
521 	switch (cmd) {
522 	case SNDRV_PCM_TRIGGER_START:
523 	case SNDRV_PCM_TRIGGER_RESUME:
524 		val = 0x0f;
525 		chip->active |= ADC1;
526 		break;
527 	case SNDRV_PCM_TRIGGER_STOP:
528 	case SNDRV_PCM_TRIGGER_SUSPEND:
529 		val = 0x00;
530 		chip->active &= ~ADC1;
531 		break;
532 	default:
533 		return -EINVAL;
534 	}
535 	snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
536 	return 0;
537 }
538 
539 static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
540 					int cmd)
541 {
542 	struct es1938 *chip = snd_pcm_substream_chip(substream);
543 	switch (cmd) {
544 	case SNDRV_PCM_TRIGGER_START:
545 	case SNDRV_PCM_TRIGGER_RESUME:
546 		/* According to the documentation this should be:
547 		   0x13 but that value may randomly swap stereo channels */
548                 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
549                 udelay(10);
550 		snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
551                 /* This two stage init gives the FIFO -> DAC connection time to
552                  * settle before first data from DMA flows in.  This should ensure
553                  * no swapping of stereo channels.  Report a bug if otherwise :-) */
554 		outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
555 		chip->active |= DAC2;
556 		break;
557 	case SNDRV_PCM_TRIGGER_STOP:
558 	case SNDRV_PCM_TRIGGER_SUSPEND:
559 		outb(0, SLIO_REG(chip, AUDIO2MODE));
560 		snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
561 		chip->active &= ~DAC2;
562 		break;
563 	default:
564 		return -EINVAL;
565 	}
566 	return 0;
567 }
568 
569 static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
570 					int cmd)
571 {
572 	struct es1938 *chip = snd_pcm_substream_chip(substream);
573 	int val;
574 	switch (cmd) {
575 	case SNDRV_PCM_TRIGGER_START:
576 	case SNDRV_PCM_TRIGGER_RESUME:
577 		val = 5;
578 		chip->active |= DAC1;
579 		break;
580 	case SNDRV_PCM_TRIGGER_STOP:
581 	case SNDRV_PCM_TRIGGER_SUSPEND:
582 		val = 0;
583 		chip->active &= ~DAC1;
584 		break;
585 	default:
586 		return -EINVAL;
587 	}
588 	snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
589 	return 0;
590 }
591 
592 static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
593 				       int cmd)
594 {
595 	switch (substream->number) {
596 	case 0:
597 		return snd_es1938_playback1_trigger(substream, cmd);
598 	case 1:
599 		return snd_es1938_playback2_trigger(substream, cmd);
600 	}
601 	snd_BUG();
602 	return -EINVAL;
603 }
604 
605 /* --------------------------------------------------------------------
606  * First channel for Extended Mode Audio 1 ADC Operation
607  * --------------------------------------------------------------------*/
608 static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
609 {
610 	struct es1938 *chip = snd_pcm_substream_chip(substream);
611 	struct snd_pcm_runtime *runtime = substream->runtime;
612 	int u, is8, mono;
613 	unsigned int size = snd_pcm_lib_buffer_bytes(substream);
614 	unsigned int count = snd_pcm_lib_period_bytes(substream);
615 
616 	chip->dma1_size = size;
617 	chip->dma1_start = runtime->dma_addr;
618 
619 	mono = (runtime->channels > 1) ? 0 : 1;
620 	is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
621 	u = snd_pcm_format_unsigned(runtime->format);
622 
623 	chip->dma1_shift = 2 - mono - is8;
624 
625 	snd_es1938_reset_fifo(chip);
626 
627 	/* program type */
628 	snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
629 
630 	/* set clock and counters */
631         snd_es1938_rate_set(chip, substream, ADC1);
632 
633 	count = 0x10000 - count;
634 	snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
635 	snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
636 
637 	/* initialize and configure ADC */
638 	snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
639 	snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
640 		       (u ? 0x00 : 0x20) |
641 		       (is8 ? 0x00 : 0x04) |
642 		       (mono ? 0x40 : 0x08));
643 
644 	//	snd_es1938_reset_fifo(chip);
645 
646 	/* 11. configure system interrupt controller and DMA controller */
647 	snd_es1938_capture_setdma(chip);
648 
649 	return 0;
650 }
651 
652 
653 /* ------------------------------------------------------------------------------
654  * Second Audio channel DAC Operation
655  * ------------------------------------------------------------------------------*/
656 static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
657 {
658 	struct es1938 *chip = snd_pcm_substream_chip(substream);
659 	struct snd_pcm_runtime *runtime = substream->runtime;
660 	int u, is8, mono;
661 	unsigned int size = snd_pcm_lib_buffer_bytes(substream);
662 	unsigned int count = snd_pcm_lib_period_bytes(substream);
663 
664 	chip->dma2_size = size;
665 	chip->dma2_start = runtime->dma_addr;
666 
667 	mono = (runtime->channels > 1) ? 0 : 1;
668 	is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
669 	u = snd_pcm_format_unsigned(runtime->format);
670 
671 	chip->dma2_shift = 2 - mono - is8;
672 
673         snd_es1938_reset_fifo(chip);
674 
675 	/* set clock and counters */
676         snd_es1938_rate_set(chip, substream, DAC2);
677 
678 	count >>= 1;
679 	count = 0x10000 - count;
680 	snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
681 	snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
682 
683 	/* initialize and configure Audio 2 DAC */
684 	snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
685 			       (mono ? 0 : 2) | (is8 ? 0 : 1));
686 
687 	/* program DMA */
688 	snd_es1938_playback1_setdma(chip);
689 
690 	return 0;
691 }
692 
693 static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
694 {
695 	struct es1938 *chip = snd_pcm_substream_chip(substream);
696 	struct snd_pcm_runtime *runtime = substream->runtime;
697 	int u, is8, mono;
698 	unsigned int size = snd_pcm_lib_buffer_bytes(substream);
699 	unsigned int count = snd_pcm_lib_period_bytes(substream);
700 
701 	chip->dma1_size = size;
702 	chip->dma1_start = runtime->dma_addr;
703 
704 	mono = (runtime->channels > 1) ? 0 : 1;
705 	is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
706 	u = snd_pcm_format_unsigned(runtime->format);
707 
708 	chip->dma1_shift = 2 - mono - is8;
709 
710 	count = 0x10000 - count;
711 
712 	/* reset */
713 	snd_es1938_reset_fifo(chip);
714 
715 	snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
716 
717 	/* set clock and counters */
718         snd_es1938_rate_set(chip, substream, DAC1);
719 	snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
720 	snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
721 
722 	/* initialized and configure DAC */
723         snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
724         snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
725         snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
726 			 0x90 | (mono ? 0x40 : 0x08) |
727 			 (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
728 
729 	/* program DMA */
730 	snd_es1938_playback2_setdma(chip);
731 
732 	return 0;
733 }
734 
735 static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
736 {
737 	switch (substream->number) {
738 	case 0:
739 		return snd_es1938_playback1_prepare(substream);
740 	case 1:
741 		return snd_es1938_playback2_prepare(substream);
742 	}
743 	snd_BUG();
744 	return -EINVAL;
745 }
746 
747 /* during the incrementing of dma counters the DMA register reads sometimes
748    returns garbage. To ensure a valid hw pointer, the following checks which
749    should be very unlikely to fail are used:
750    - is the current DMA address in the valid DMA range ?
751    - is the sum of DMA address and DMA counter pointing to the last DMA byte ?
752    One can argue this could differ by one byte depending on which register is
753    updated first, so the implementation below allows for that.
754 */
755 static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
756 {
757 	struct es1938 *chip = snd_pcm_substream_chip(substream);
758 	size_t ptr;
759 #if 0
760 	size_t old, new;
761 	/* This stuff is *needed*, don't ask why - AB */
762 	old = inw(SLDM_REG(chip, DMACOUNT));
763 	while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
764 		old = new;
765 	ptr = chip->dma1_size - 1 - new;
766 #else
767 	size_t count;
768 	unsigned int diff;
769 
770 	ptr = inl(SLDM_REG(chip, DMAADDR));
771 	count = inw(SLDM_REG(chip, DMACOUNT));
772 	diff = chip->dma1_start + chip->dma1_size - ptr - count;
773 
774 	if (diff > 3 || ptr < chip->dma1_start
775 	      || ptr >= chip->dma1_start+chip->dma1_size)
776 	  ptr = chip->last_capture_dmaaddr;            /* bad, use last saved */
777 	else
778 	  chip->last_capture_dmaaddr = ptr;            /* good, remember it */
779 
780 	ptr -= chip->dma1_start;
781 #endif
782 	return ptr >> chip->dma1_shift;
783 }
784 
785 static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
786 {
787 	struct es1938 *chip = snd_pcm_substream_chip(substream);
788 	size_t ptr;
789 #if 1
790 	ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
791 #else
792 	ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
793 #endif
794 	return ptr >> chip->dma2_shift;
795 }
796 
797 static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
798 {
799 	struct es1938 *chip = snd_pcm_substream_chip(substream);
800 	size_t ptr;
801 	size_t old, new;
802 #if 1
803 	/* This stuff is *needed*, don't ask why - AB */
804 	old = inw(SLDM_REG(chip, DMACOUNT));
805 	while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
806 		old = new;
807 	ptr = chip->dma1_size - 1 - new;
808 #else
809 	ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
810 #endif
811 	return ptr >> chip->dma1_shift;
812 }
813 
814 static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
815 {
816 	switch (substream->number) {
817 	case 0:
818 		return snd_es1938_playback1_pointer(substream);
819 	case 1:
820 		return snd_es1938_playback2_pointer(substream);
821 	}
822 	snd_BUG();
823 	return -EINVAL;
824 }
825 
826 static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
827 				   int channel, unsigned long pos,
828 				   void __user *dst, unsigned long count)
829 {
830 	struct snd_pcm_runtime *runtime = substream->runtime;
831 	struct es1938 *chip = snd_pcm_substream_chip(substream);
832 
833 	if (snd_BUG_ON(pos + count > chip->dma1_size))
834 		return -EINVAL;
835 	if (pos + count < chip->dma1_size) {
836 		if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
837 			return -EFAULT;
838 	} else {
839 		if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
840 			return -EFAULT;
841 		if (put_user(runtime->dma_area[0],
842 			     ((unsigned char __user *)dst) + count - 1))
843 			return -EFAULT;
844 	}
845 	return 0;
846 }
847 
848 static int snd_es1938_capture_copy_kernel(struct snd_pcm_substream *substream,
849 					  int channel, unsigned long pos,
850 					  void *dst, unsigned long count)
851 {
852 	struct snd_pcm_runtime *runtime = substream->runtime;
853 	struct es1938 *chip = snd_pcm_substream_chip(substream);
854 
855 	if (snd_BUG_ON(pos + count > chip->dma1_size))
856 		return -EINVAL;
857 	if (pos + count < chip->dma1_size) {
858 		memcpy(dst, runtime->dma_area + pos + 1, count);
859 	} else {
860 		memcpy(dst, runtime->dma_area + pos + 1, count - 1);
861 		runtime->dma_area[0] = *((unsigned char *)dst + count - 1);
862 	}
863 	return 0;
864 }
865 
866 /* ----------------------------------------------------------------------
867  * Audio1 Capture (ADC)
868  * ----------------------------------------------------------------------*/
869 static const struct snd_pcm_hardware snd_es1938_capture =
870 {
871 	.info =			(SNDRV_PCM_INFO_INTERLEAVED |
872 				SNDRV_PCM_INFO_BLOCK_TRANSFER),
873 	.formats =		(SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
874 				 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
875 	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
876 	.rate_min =		6000,
877 	.rate_max =		48000,
878 	.channels_min =		1,
879 	.channels_max =		2,
880         .buffer_bytes_max =	0x8000,       /* DMA controller screws on higher values */
881 	.period_bytes_min =	64,
882 	.period_bytes_max =	0x8000,
883 	.periods_min =		1,
884 	.periods_max =		1024,
885 	.fifo_size =		256,
886 };
887 
888 /* -----------------------------------------------------------------------
889  * Audio2 Playback (DAC)
890  * -----------------------------------------------------------------------*/
891 static const struct snd_pcm_hardware snd_es1938_playback =
892 {
893 	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
894 				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
895 				 SNDRV_PCM_INFO_MMAP_VALID),
896 	.formats =		(SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
897 				 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
898 	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
899 	.rate_min =		6000,
900 	.rate_max =		48000,
901 	.channels_min =		1,
902 	.channels_max =		2,
903         .buffer_bytes_max =	0x8000,       /* DMA controller screws on higher values */
904 	.period_bytes_min =	64,
905 	.period_bytes_max =	0x8000,
906 	.periods_min =		1,
907 	.periods_max =		1024,
908 	.fifo_size =		256,
909 };
910 
911 static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
912 {
913 	struct es1938 *chip = snd_pcm_substream_chip(substream);
914 	struct snd_pcm_runtime *runtime = substream->runtime;
915 
916 	if (chip->playback2_substream)
917 		return -EAGAIN;
918 	chip->capture_substream = substream;
919 	runtime->hw = snd_es1938_capture;
920 	snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
921 				      &hw_constraints_clocks);
922 	snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
923 	return 0;
924 }
925 
926 static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
927 {
928 	struct es1938 *chip = snd_pcm_substream_chip(substream);
929 	struct snd_pcm_runtime *runtime = substream->runtime;
930 
931 	switch (substream->number) {
932 	case 0:
933 		chip->playback1_substream = substream;
934 		break;
935 	case 1:
936 		if (chip->capture_substream)
937 			return -EAGAIN;
938 		chip->playback2_substream = substream;
939 		break;
940 	default:
941 		snd_BUG();
942 		return -EINVAL;
943 	}
944 	runtime->hw = snd_es1938_playback;
945 	snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
946 				      &hw_constraints_clocks);
947 	snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
948 	return 0;
949 }
950 
951 static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
952 {
953 	struct es1938 *chip = snd_pcm_substream_chip(substream);
954 
955 	chip->capture_substream = NULL;
956 	return 0;
957 }
958 
959 static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
960 {
961 	struct es1938 *chip = snd_pcm_substream_chip(substream);
962 
963 	switch (substream->number) {
964 	case 0:
965 		chip->playback1_substream = NULL;
966 		break;
967 	case 1:
968 		chip->playback2_substream = NULL;
969 		break;
970 	default:
971 		snd_BUG();
972 		return -EINVAL;
973 	}
974 	return 0;
975 }
976 
977 static const struct snd_pcm_ops snd_es1938_playback_ops = {
978 	.open =		snd_es1938_playback_open,
979 	.close =	snd_es1938_playback_close,
980 	.prepare =	snd_es1938_playback_prepare,
981 	.trigger =	snd_es1938_playback_trigger,
982 	.pointer =	snd_es1938_playback_pointer,
983 };
984 
985 static const struct snd_pcm_ops snd_es1938_capture_ops = {
986 	.open =		snd_es1938_capture_open,
987 	.close =	snd_es1938_capture_close,
988 	.prepare =	snd_es1938_capture_prepare,
989 	.trigger =	snd_es1938_capture_trigger,
990 	.pointer =	snd_es1938_capture_pointer,
991 	.copy_user =	snd_es1938_capture_copy,
992 	.copy_kernel =	snd_es1938_capture_copy_kernel,
993 };
994 
995 static int snd_es1938_new_pcm(struct es1938 *chip, int device)
996 {
997 	struct snd_pcm *pcm;
998 	int err;
999 
1000 	if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0)
1001 		return err;
1002 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
1003 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
1004 
1005 	pcm->private_data = chip;
1006 	pcm->info_flags = 0;
1007 	strcpy(pcm->name, "ESS Solo-1");
1008 
1009 	snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1010 				       &chip->pci->dev, 64*1024, 64*1024);
1011 
1012 	chip->pcm = pcm;
1013 	return 0;
1014 }
1015 
1016 /* -------------------------------------------------------------------
1017  *
1018  *                       *** Mixer part ***
1019  */
1020 
1021 static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
1022 			       struct snd_ctl_elem_info *uinfo)
1023 {
1024 	static const char * const texts[8] = {
1025 		"Mic", "Mic Master", "CD", "AOUT",
1026 		"Mic1", "Mix", "Line", "Master"
1027 	};
1028 
1029 	return snd_ctl_enum_info(uinfo, 1, 8, texts);
1030 }
1031 
1032 static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
1033 			      struct snd_ctl_elem_value *ucontrol)
1034 {
1035 	struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1036 	ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
1037 	return 0;
1038 }
1039 
1040 static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
1041 			      struct snd_ctl_elem_value *ucontrol)
1042 {
1043 	struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1044 	unsigned char val = ucontrol->value.enumerated.item[0];
1045 
1046 	if (val > 7)
1047 		return -EINVAL;
1048 	return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
1049 }
1050 
1051 #define snd_es1938_info_spatializer_enable	snd_ctl_boolean_mono_info
1052 
1053 static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
1054 					     struct snd_ctl_elem_value *ucontrol)
1055 {
1056 	struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1057 	unsigned char val = snd_es1938_mixer_read(chip, 0x50);
1058 	ucontrol->value.integer.value[0] = !!(val & 8);
1059 	return 0;
1060 }
1061 
1062 static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
1063 					     struct snd_ctl_elem_value *ucontrol)
1064 {
1065 	struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1066 	unsigned char oval, nval;
1067 	int change;
1068 	nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
1069 	oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
1070 	change = nval != oval;
1071 	if (change) {
1072 		snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
1073 		snd_es1938_mixer_write(chip, 0x50, nval);
1074 	}
1075 	return change;
1076 }
1077 
1078 static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
1079 				     struct snd_ctl_elem_info *uinfo)
1080 {
1081 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1082 	uinfo->count = 2;
1083 	uinfo->value.integer.min = 0;
1084 	uinfo->value.integer.max = 63;
1085 	return 0;
1086 }
1087 
1088 static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
1089 				    struct snd_ctl_elem_value *ucontrol)
1090 {
1091 	struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1092 	ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
1093 	ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
1094 	return 0;
1095 }
1096 
1097 #define snd_es1938_info_hw_switch		snd_ctl_boolean_stereo_info
1098 
1099 static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
1100 				    struct snd_ctl_elem_value *ucontrol)
1101 {
1102 	struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1103 	ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
1104 	ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
1105 	return 0;
1106 }
1107 
1108 static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
1109 {
1110 	struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1111 	chip->master_volume = NULL;
1112 	chip->master_switch = NULL;
1113 	chip->hw_volume = NULL;
1114 	chip->hw_switch = NULL;
1115 }
1116 
1117 static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
1118 			       unsigned char mask, unsigned char val)
1119 {
1120 	if (reg < 0xa0)
1121 		return snd_es1938_mixer_bits(chip, reg, mask, val);
1122 	else
1123 		return snd_es1938_bits(chip, reg, mask, val);
1124 }
1125 
1126 static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
1127 {
1128 	if (reg < 0xa0)
1129 		return snd_es1938_mixer_read(chip, reg);
1130 	else
1131 		return snd_es1938_read(chip, reg);
1132 }
1133 
1134 #define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv)    \
1135 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1136   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1137   .name = xname, .index = xindex, \
1138   .info = snd_es1938_info_single, \
1139   .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1140   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
1141   .tlv = { .p = xtlv } }
1142 #define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
1143 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1144   .info = snd_es1938_info_single, \
1145   .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1146   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1147 
1148 static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
1149 				  struct snd_ctl_elem_info *uinfo)
1150 {
1151 	int mask = (kcontrol->private_value >> 16) & 0xff;
1152 
1153 	uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1154 	uinfo->count = 1;
1155 	uinfo->value.integer.min = 0;
1156 	uinfo->value.integer.max = mask;
1157 	return 0;
1158 }
1159 
1160 static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
1161 				 struct snd_ctl_elem_value *ucontrol)
1162 {
1163 	struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1164 	int reg = kcontrol->private_value & 0xff;
1165 	int shift = (kcontrol->private_value >> 8) & 0xff;
1166 	int mask = (kcontrol->private_value >> 16) & 0xff;
1167 	int invert = (kcontrol->private_value >> 24) & 0xff;
1168 	int val;
1169 
1170 	val = snd_es1938_reg_read(chip, reg);
1171 	ucontrol->value.integer.value[0] = (val >> shift) & mask;
1172 	if (invert)
1173 		ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1174 	return 0;
1175 }
1176 
1177 static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
1178 				 struct snd_ctl_elem_value *ucontrol)
1179 {
1180 	struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1181 	int reg = kcontrol->private_value & 0xff;
1182 	int shift = (kcontrol->private_value >> 8) & 0xff;
1183 	int mask = (kcontrol->private_value >> 16) & 0xff;
1184 	int invert = (kcontrol->private_value >> 24) & 0xff;
1185 	unsigned char val;
1186 
1187 	val = (ucontrol->value.integer.value[0] & mask);
1188 	if (invert)
1189 		val = mask - val;
1190 	mask <<= shift;
1191 	val <<= shift;
1192 	return snd_es1938_reg_bits(chip, reg, mask, val) != val;
1193 }
1194 
1195 #define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1196 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1197   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1198   .name = xname, .index = xindex, \
1199   .info = snd_es1938_info_double, \
1200   .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1201   .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
1202   .tlv = { .p = xtlv } }
1203 #define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1204 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1205   .info = snd_es1938_info_double, \
1206   .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1207   .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1208 
1209 static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
1210 				  struct snd_ctl_elem_info *uinfo)
1211 {
1212 	int mask = (kcontrol->private_value >> 24) & 0xff;
1213 
1214 	uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1215 	uinfo->count = 2;
1216 	uinfo->value.integer.min = 0;
1217 	uinfo->value.integer.max = mask;
1218 	return 0;
1219 }
1220 
1221 static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
1222 				 struct snd_ctl_elem_value *ucontrol)
1223 {
1224 	struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1225 	int left_reg = kcontrol->private_value & 0xff;
1226 	int right_reg = (kcontrol->private_value >> 8) & 0xff;
1227 	int shift_left = (kcontrol->private_value >> 16) & 0x07;
1228 	int shift_right = (kcontrol->private_value >> 19) & 0x07;
1229 	int mask = (kcontrol->private_value >> 24) & 0xff;
1230 	int invert = (kcontrol->private_value >> 22) & 1;
1231 	unsigned char left, right;
1232 
1233 	left = snd_es1938_reg_read(chip, left_reg);
1234 	if (left_reg != right_reg)
1235 		right = snd_es1938_reg_read(chip, right_reg);
1236 	else
1237 		right = left;
1238 	ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
1239 	ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
1240 	if (invert) {
1241 		ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1242 		ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1243 	}
1244 	return 0;
1245 }
1246 
1247 static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
1248 				 struct snd_ctl_elem_value *ucontrol)
1249 {
1250 	struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1251 	int left_reg = kcontrol->private_value & 0xff;
1252 	int right_reg = (kcontrol->private_value >> 8) & 0xff;
1253 	int shift_left = (kcontrol->private_value >> 16) & 0x07;
1254 	int shift_right = (kcontrol->private_value >> 19) & 0x07;
1255 	int mask = (kcontrol->private_value >> 24) & 0xff;
1256 	int invert = (kcontrol->private_value >> 22) & 1;
1257 	int change;
1258 	unsigned char val1, val2, mask1, mask2;
1259 
1260 	val1 = ucontrol->value.integer.value[0] & mask;
1261 	val2 = ucontrol->value.integer.value[1] & mask;
1262 	if (invert) {
1263 		val1 = mask - val1;
1264 		val2 = mask - val2;
1265 	}
1266 	val1 <<= shift_left;
1267 	val2 <<= shift_right;
1268 	mask1 = mask << shift_left;
1269 	mask2 = mask << shift_right;
1270 	if (left_reg != right_reg) {
1271 		change = 0;
1272 		if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
1273 			change = 1;
1274 		if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
1275 			change = 1;
1276 	} else {
1277 		change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
1278 					      val1 | val2) != (val1 | val2));
1279 	}
1280 	return change;
1281 }
1282 
1283 static const DECLARE_TLV_DB_RANGE(db_scale_master,
1284 	0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1285 	54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
1286 );
1287 
1288 static const DECLARE_TLV_DB_RANGE(db_scale_audio1,
1289 	0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1290 	8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
1291 );
1292 
1293 static const DECLARE_TLV_DB_RANGE(db_scale_audio2,
1294 	0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1295 	8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
1296 );
1297 
1298 static const DECLARE_TLV_DB_RANGE(db_scale_mic,
1299 	0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1300 	8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
1301 );
1302 
1303 static const DECLARE_TLV_DB_RANGE(db_scale_line,
1304 	0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1305 	8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
1306 );
1307 
1308 static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
1309 
1310 static const struct snd_kcontrol_new snd_es1938_controls[] = {
1311 ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
1312 		  db_scale_master),
1313 ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
1314 {
1315 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1316 	.name = "Hardware Master Playback Volume",
1317 	.access = SNDRV_CTL_ELEM_ACCESS_READ,
1318 	.info = snd_es1938_info_hw_volume,
1319 	.get = snd_es1938_get_hw_volume,
1320 },
1321 {
1322 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1323 	.access = (SNDRV_CTL_ELEM_ACCESS_READ |
1324 		   SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1325 	.name = "Hardware Master Playback Switch",
1326 	.info = snd_es1938_info_hw_switch,
1327 	.get = snd_es1938_get_hw_switch,
1328 	.tlv = { .p = db_scale_master },
1329 },
1330 ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
1331 ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
1332 		  db_scale_line),
1333 ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
1334 ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
1335 		  db_scale_mic),
1336 ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1337 		  db_scale_line),
1338 ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
1339 		  db_scale_mic),
1340 ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
1341 		  db_scale_line),
1342 ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
1343 		  db_scale_capture),
1344 ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0),
1345 ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
1346 ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
1347 {
1348 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1349 	.name = "Capture Source",
1350 	.info = snd_es1938_info_mux,
1351 	.get = snd_es1938_get_mux,
1352 	.put = snd_es1938_put_mux,
1353 },
1354 ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1355 		  db_scale_line),
1356 ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
1357 		  db_scale_audio2),
1358 ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
1359 		  db_scale_mic),
1360 ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
1361 		  db_scale_line),
1362 ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
1363 		  db_scale_mic),
1364 ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
1365 		  db_scale_line),
1366 ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
1367 		  db_scale_line),
1368 ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
1369 		  db_scale_line),
1370 ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
1371 		  db_scale_audio2),
1372 ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
1373 		  db_scale_audio1),
1374 ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
1375 {
1376 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1377 	.name = "3D Control - Switch",
1378 	.info = snd_es1938_info_spatializer_enable,
1379 	.get = snd_es1938_get_spatializer_enable,
1380 	.put = snd_es1938_put_spatializer_enable,
1381 },
1382 ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
1383 };
1384 
1385 
1386 /* ---------------------------------------------------------------------------- */
1387 /* ---------------------------------------------------------------------------- */
1388 
1389 /*
1390  * initialize the chip - used by resume callback, too
1391  */
1392 static void snd_es1938_chip_init(struct es1938 *chip)
1393 {
1394 	/* reset chip */
1395 	snd_es1938_reset(chip);
1396 
1397 	/* configure native mode */
1398 
1399 	/* enable bus master */
1400 	pci_set_master(chip->pci);
1401 
1402 	/* disable legacy audio */
1403 	pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
1404 
1405 	/* set DDMA base */
1406 	pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
1407 
1408 	/* set DMA/IRQ policy */
1409 	pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
1410 
1411 	/* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
1412 	outb(0xf0, SLIO_REG(chip, IRQCONTROL));
1413 
1414 	/* reset DMA */
1415 	outb(0, SLDM_REG(chip, DMACLEAR));
1416 }
1417 
1418 #ifdef CONFIG_PM_SLEEP
1419 /*
1420  * PM support
1421  */
1422 
1423 static const unsigned char saved_regs[SAVED_REG_SIZE+1] = {
1424 	0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
1425 	0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
1426 	0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
1427 	0xa8, 0xb4,
1428 };
1429 
1430 
1431 static int es1938_suspend(struct device *dev)
1432 {
1433 	struct snd_card *card = dev_get_drvdata(dev);
1434 	struct es1938 *chip = card->private_data;
1435 	const unsigned char *s;
1436 	unsigned char *d;
1437 
1438 	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1439 
1440 	/* save mixer-related registers */
1441 	for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
1442 		*d = snd_es1938_reg_read(chip, *s);
1443 
1444 	outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
1445 	if (chip->irq >= 0) {
1446 		free_irq(chip->irq, chip);
1447 		chip->irq = -1;
1448 		card->sync_irq = -1;
1449 	}
1450 	return 0;
1451 }
1452 
1453 static int es1938_resume(struct device *dev)
1454 {
1455 	struct pci_dev *pci = to_pci_dev(dev);
1456 	struct snd_card *card = dev_get_drvdata(dev);
1457 	struct es1938 *chip = card->private_data;
1458 	const unsigned char *s;
1459 	unsigned char *d;
1460 
1461 	if (request_irq(pci->irq, snd_es1938_interrupt,
1462 			IRQF_SHARED, KBUILD_MODNAME, chip)) {
1463 		dev_err(dev, "unable to grab IRQ %d, disabling device\n",
1464 			pci->irq);
1465 		snd_card_disconnect(card);
1466 		return -EIO;
1467 	}
1468 	chip->irq = pci->irq;
1469 	card->sync_irq = chip->irq;
1470 	snd_es1938_chip_init(chip);
1471 
1472 	/* restore mixer-related registers */
1473 	for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
1474 		if (*s < 0xa0)
1475 			snd_es1938_mixer_write(chip, *s, *d);
1476 		else
1477 			snd_es1938_write(chip, *s, *d);
1478 	}
1479 
1480 	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1481 	return 0;
1482 }
1483 
1484 static SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume);
1485 #define ES1938_PM_OPS	&es1938_pm
1486 #else
1487 #define ES1938_PM_OPS	NULL
1488 #endif /* CONFIG_PM_SLEEP */
1489 
1490 #ifdef SUPPORT_JOYSTICK
1491 static int snd_es1938_create_gameport(struct es1938 *chip)
1492 {
1493 	struct gameport *gp;
1494 
1495 	chip->gameport = gp = gameport_allocate_port();
1496 	if (!gp) {
1497 		dev_err(chip->card->dev,
1498 			"cannot allocate memory for gameport\n");
1499 		return -ENOMEM;
1500 	}
1501 
1502 	gameport_set_name(gp, "ES1938");
1503 	gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1504 	gameport_set_dev_parent(gp, &chip->pci->dev);
1505 	gp->io = chip->game_port;
1506 
1507 	gameport_register_port(gp);
1508 
1509 	return 0;
1510 }
1511 
1512 static void snd_es1938_free_gameport(struct es1938 *chip)
1513 {
1514 	if (chip->gameport) {
1515 		gameport_unregister_port(chip->gameport);
1516 		chip->gameport = NULL;
1517 	}
1518 }
1519 #else
1520 static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
1521 static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
1522 #endif /* SUPPORT_JOYSTICK */
1523 
1524 static int snd_es1938_free(struct es1938 *chip)
1525 {
1526 	/* disable irqs */
1527 	outb(0x00, SLIO_REG(chip, IRQCONTROL));
1528 	if (chip->rmidi)
1529 		snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
1530 
1531 	snd_es1938_free_gameport(chip);
1532 
1533 	if (chip->irq >= 0)
1534 		free_irq(chip->irq, chip);
1535 	pci_release_regions(chip->pci);
1536 	pci_disable_device(chip->pci);
1537 	kfree(chip);
1538 	return 0;
1539 }
1540 
1541 static int snd_es1938_dev_free(struct snd_device *device)
1542 {
1543 	struct es1938 *chip = device->device_data;
1544 	return snd_es1938_free(chip);
1545 }
1546 
1547 static int snd_es1938_create(struct snd_card *card,
1548 			     struct pci_dev *pci,
1549 			     struct es1938 **rchip)
1550 {
1551 	struct es1938 *chip;
1552 	int err;
1553 	static const struct snd_device_ops ops = {
1554 		.dev_free =	snd_es1938_dev_free,
1555 	};
1556 
1557 	*rchip = NULL;
1558 
1559 	/* enable PCI device */
1560 	if ((err = pci_enable_device(pci)) < 0)
1561 		return err;
1562         /* check, if we can restrict PCI DMA transfers to 24 bits */
1563 	if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(24))) {
1564 		dev_err(card->dev,
1565 			"architecture does not support 24bit PCI busmaster DMA\n");
1566 		pci_disable_device(pci);
1567                 return -ENXIO;
1568         }
1569 
1570 	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1571 	if (chip == NULL) {
1572 		pci_disable_device(pci);
1573 		return -ENOMEM;
1574 	}
1575 	spin_lock_init(&chip->reg_lock);
1576 	spin_lock_init(&chip->mixer_lock);
1577 	chip->card = card;
1578 	chip->pci = pci;
1579 	chip->irq = -1;
1580 	if ((err = pci_request_regions(pci, "ESS Solo-1")) < 0) {
1581 		kfree(chip);
1582 		pci_disable_device(pci);
1583 		return err;
1584 	}
1585 	chip->io_port = pci_resource_start(pci, 0);
1586 	chip->sb_port = pci_resource_start(pci, 1);
1587 	chip->vc_port = pci_resource_start(pci, 2);
1588 	chip->mpu_port = pci_resource_start(pci, 3);
1589 	chip->game_port = pci_resource_start(pci, 4);
1590 	if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
1591 			KBUILD_MODNAME, chip)) {
1592 		dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1593 		snd_es1938_free(chip);
1594 		return -EBUSY;
1595 	}
1596 	chip->irq = pci->irq;
1597 	card->sync_irq = chip->irq;
1598 	dev_dbg(card->dev,
1599 		"create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
1600 		   chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
1601 
1602 	chip->ddma_port = chip->vc_port + 0x00;		/* fix from Thomas Sailer */
1603 
1604 	snd_es1938_chip_init(chip);
1605 
1606 	if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1607 		snd_es1938_free(chip);
1608 		return err;
1609 	}
1610 
1611 	*rchip = chip;
1612 	return 0;
1613 }
1614 
1615 /* --------------------------------------------------------------------
1616  * Interrupt handler
1617  * -------------------------------------------------------------------- */
1618 static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
1619 {
1620 	struct es1938 *chip = dev_id;
1621 	unsigned char status;
1622 	__always_unused unsigned char audiostatus;
1623 	int handled = 0;
1624 
1625 	status = inb(SLIO_REG(chip, IRQCONTROL));
1626 #if 0
1627 	dev_dbg(chip->card->dev,
1628 		"Es1938debug - interrupt status: =0x%x\n", status);
1629 #endif
1630 
1631 	/* AUDIO 1 */
1632 	if (status & 0x10) {
1633 #if 0
1634 		dev_dbg(chip->card->dev,
1635 		       "Es1938debug - AUDIO channel 1 interrupt\n");
1636 		dev_dbg(chip->card->dev,
1637 		       "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
1638 		       inw(SLDM_REG(chip, DMACOUNT)));
1639 		dev_dbg(chip->card->dev,
1640 		       "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
1641 		       inl(SLDM_REG(chip, DMAADDR)));
1642 		dev_dbg(chip->card->dev,
1643 		       "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
1644 		       inl(SLDM_REG(chip, DMASTATUS)));
1645 #endif
1646 		/* clear irq */
1647 		handled = 1;
1648 		audiostatus = inb(SLSB_REG(chip, STATUS));
1649 		if (chip->active & ADC1)
1650 			snd_pcm_period_elapsed(chip->capture_substream);
1651 		else if (chip->active & DAC1)
1652 			snd_pcm_period_elapsed(chip->playback2_substream);
1653 	}
1654 
1655 	/* AUDIO 2 */
1656 	if (status & 0x20) {
1657 #if 0
1658 		dev_dbg(chip->card->dev,
1659 		       "Es1938debug - AUDIO channel 2 interrupt\n");
1660 		dev_dbg(chip->card->dev,
1661 		       "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
1662 		       inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
1663 		dev_dbg(chip->card->dev,
1664 		       "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
1665 		       inl(SLIO_REG(chip, AUDIO2DMAADDR)));
1666 
1667 #endif
1668 		/* clear irq */
1669 		handled = 1;
1670 		snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
1671 		if (chip->active & DAC2)
1672 			snd_pcm_period_elapsed(chip->playback1_substream);
1673 	}
1674 
1675 	/* Hardware volume */
1676 	if (status & 0x40) {
1677 		int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
1678 		handled = 1;
1679 		snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
1680 		snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
1681 		if (!split) {
1682 			snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1683 				       &chip->master_switch->id);
1684 			snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1685 				       &chip->master_volume->id);
1686 		}
1687 		/* ack interrupt */
1688 		snd_es1938_mixer_write(chip, 0x66, 0x00);
1689 	}
1690 
1691 	/* MPU401 */
1692 	if (status & 0x80) {
1693 		// the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
1694 		// replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
1695 		// andreas@flying-snail.de
1696 		// snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
1697 		if (chip->rmidi) {
1698 			handled = 1;
1699 			snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1700 		}
1701 	}
1702 	return IRQ_RETVAL(handled);
1703 }
1704 
1705 #define ES1938_DMA_SIZE 64
1706 
1707 static int snd_es1938_mixer(struct es1938 *chip)
1708 {
1709 	struct snd_card *card;
1710 	unsigned int idx;
1711 	int err;
1712 
1713 	card = chip->card;
1714 
1715 	strcpy(card->mixername, "ESS Solo-1");
1716 
1717 	for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
1718 		struct snd_kcontrol *kctl;
1719 		kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
1720 		switch (idx) {
1721 			case 0:
1722 				chip->master_volume = kctl;
1723 				kctl->private_free = snd_es1938_hwv_free;
1724 				break;
1725 			case 1:
1726 				chip->master_switch = kctl;
1727 				kctl->private_free = snd_es1938_hwv_free;
1728 				break;
1729 			case 2:
1730 				chip->hw_volume = kctl;
1731 				kctl->private_free = snd_es1938_hwv_free;
1732 				break;
1733 			case 3:
1734 				chip->hw_switch = kctl;
1735 				kctl->private_free = snd_es1938_hwv_free;
1736 				break;
1737 			}
1738 		if ((err = snd_ctl_add(card, kctl)) < 0)
1739 			return err;
1740 	}
1741 	return 0;
1742 }
1743 
1744 
1745 static int snd_es1938_probe(struct pci_dev *pci,
1746 			    const struct pci_device_id *pci_id)
1747 {
1748 	static int dev;
1749 	struct snd_card *card;
1750 	struct es1938 *chip;
1751 	struct snd_opl3 *opl3;
1752 	int idx, err;
1753 
1754 	if (dev >= SNDRV_CARDS)
1755 		return -ENODEV;
1756 	if (!enable[dev]) {
1757 		dev++;
1758 		return -ENOENT;
1759 	}
1760 
1761 	err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1762 			   0, &card);
1763 	if (err < 0)
1764 		return err;
1765 	for (idx = 0; idx < 5; idx++) {
1766 		if (pci_resource_start(pci, idx) == 0 ||
1767 		    !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) {
1768 		    	snd_card_free(card);
1769 		    	return -ENODEV;
1770 		}
1771 	}
1772 	if ((err = snd_es1938_create(card, pci, &chip)) < 0) {
1773 		snd_card_free(card);
1774 		return err;
1775 	}
1776 	card->private_data = chip;
1777 
1778 	strcpy(card->driver, "ES1938");
1779 	strcpy(card->shortname, "ESS ES1938 (Solo-1)");
1780 	sprintf(card->longname, "%s rev %i, irq %i",
1781 		card->shortname,
1782 		chip->revision,
1783 		chip->irq);
1784 
1785 	if ((err = snd_es1938_new_pcm(chip, 0)) < 0) {
1786 		snd_card_free(card);
1787 		return err;
1788 	}
1789 	if ((err = snd_es1938_mixer(chip)) < 0) {
1790 		snd_card_free(card);
1791 		return err;
1792 	}
1793 	if (snd_opl3_create(card,
1794 			    SLSB_REG(chip, FMLOWADDR),
1795 			    SLSB_REG(chip, FMHIGHADDR),
1796 			    OPL3_HW_OPL3, 1, &opl3) < 0) {
1797 		dev_err(card->dev, "OPL3 not detected at 0x%lx\n",
1798 			   SLSB_REG(chip, FMLOWADDR));
1799 	} else {
1800 	        if ((err = snd_opl3_timer_new(opl3, 0, 1)) < 0) {
1801 	                snd_card_free(card);
1802 	                return err;
1803 		}
1804 	        if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1805 	                snd_card_free(card);
1806 	                return err;
1807 		}
1808 	}
1809 	if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
1810 				chip->mpu_port,
1811 				MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
1812 				-1, &chip->rmidi) < 0) {
1813 		dev_err(card->dev, "unable to initialize MPU-401\n");
1814 	} else {
1815 		// this line is vital for MIDI interrupt handling on ess-solo1
1816 		// andreas@flying-snail.de
1817 		snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
1818 	}
1819 
1820 	snd_es1938_create_gameport(chip);
1821 
1822 	if ((err = snd_card_register(card)) < 0) {
1823 		snd_card_free(card);
1824 		return err;
1825 	}
1826 
1827 	pci_set_drvdata(pci, card);
1828 	dev++;
1829 	return 0;
1830 }
1831 
1832 static void snd_es1938_remove(struct pci_dev *pci)
1833 {
1834 	snd_card_free(pci_get_drvdata(pci));
1835 }
1836 
1837 static struct pci_driver es1938_driver = {
1838 	.name = KBUILD_MODNAME,
1839 	.id_table = snd_es1938_ids,
1840 	.probe = snd_es1938_probe,
1841 	.remove = snd_es1938_remove,
1842 	.driver = {
1843 		.pm = ES1938_PM_OPS,
1844 	},
1845 };
1846 
1847 module_pci_driver(es1938_driver);
1848