1 /* 2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz> 3 * Creative Labs, Inc. 4 * Routines for effect processor FX8010 5 * 6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk> 7 * Added EMU 1010 support. 8 * 9 * BUGS: 10 * -- 11 * 12 * TODO: 13 * -- 14 * 15 * This program is free software; you can redistribute it and/or modify 16 * it under the terms of the GNU General Public License as published by 17 * the Free Software Foundation; either version 2 of the License, or 18 * (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; if not, write to the Free Software 27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 28 * 29 */ 30 31 #include <sound/driver.h> 32 #include <linux/pci.h> 33 #include <linux/capability.h> 34 #include <linux/delay.h> 35 #include <linux/slab.h> 36 #include <linux/vmalloc.h> 37 #include <linux/init.h> 38 #include <linux/mutex.h> 39 40 #include <sound/core.h> 41 #include <sound/tlv.h> 42 #include <sound/emu10k1.h> 43 44 #if 0 /* for testing purposes - digital out -> capture */ 45 #define EMU10K1_CAPTURE_DIGITAL_OUT 46 #endif 47 #if 0 /* for testing purposes - set S/PDIF to AC3 output */ 48 #define EMU10K1_SET_AC3_IEC958 49 #endif 50 #if 0 /* for testing purposes - feed the front signal to Center/LFE outputs */ 51 #define EMU10K1_CENTER_LFE_FROM_FRONT 52 #endif 53 54 /* 55 * Tables 56 */ 57 58 static char *fxbuses[16] = { 59 /* 0x00 */ "PCM Left", 60 /* 0x01 */ "PCM Right", 61 /* 0x02 */ "PCM Surround Left", 62 /* 0x03 */ "PCM Surround Right", 63 /* 0x04 */ "MIDI Left", 64 /* 0x05 */ "MIDI Right", 65 /* 0x06 */ "Center", 66 /* 0x07 */ "LFE", 67 /* 0x08 */ NULL, 68 /* 0x09 */ NULL, 69 /* 0x0a */ NULL, 70 /* 0x0b */ NULL, 71 /* 0x0c */ "MIDI Reverb", 72 /* 0x0d */ "MIDI Chorus", 73 /* 0x0e */ NULL, 74 /* 0x0f */ NULL 75 }; 76 77 static char *creative_ins[16] = { 78 /* 0x00 */ "AC97 Left", 79 /* 0x01 */ "AC97 Right", 80 /* 0x02 */ "TTL IEC958 Left", 81 /* 0x03 */ "TTL IEC958 Right", 82 /* 0x04 */ "Zoom Video Left", 83 /* 0x05 */ "Zoom Video Right", 84 /* 0x06 */ "Optical IEC958 Left", 85 /* 0x07 */ "Optical IEC958 Right", 86 /* 0x08 */ "Line/Mic 1 Left", 87 /* 0x09 */ "Line/Mic 1 Right", 88 /* 0x0a */ "Coaxial IEC958 Left", 89 /* 0x0b */ "Coaxial IEC958 Right", 90 /* 0x0c */ "Line/Mic 2 Left", 91 /* 0x0d */ "Line/Mic 2 Right", 92 /* 0x0e */ NULL, 93 /* 0x0f */ NULL 94 }; 95 96 static char *audigy_ins[16] = { 97 /* 0x00 */ "AC97 Left", 98 /* 0x01 */ "AC97 Right", 99 /* 0x02 */ "Audigy CD Left", 100 /* 0x03 */ "Audigy CD Right", 101 /* 0x04 */ "Optical IEC958 Left", 102 /* 0x05 */ "Optical IEC958 Right", 103 /* 0x06 */ NULL, 104 /* 0x07 */ NULL, 105 /* 0x08 */ "Line/Mic 2 Left", 106 /* 0x09 */ "Line/Mic 2 Right", 107 /* 0x0a */ "SPDIF Left", 108 /* 0x0b */ "SPDIF Right", 109 /* 0x0c */ "Aux2 Left", 110 /* 0x0d */ "Aux2 Right", 111 /* 0x0e */ NULL, 112 /* 0x0f */ NULL 113 }; 114 115 static char *creative_outs[32] = { 116 /* 0x00 */ "AC97 Left", 117 /* 0x01 */ "AC97 Right", 118 /* 0x02 */ "Optical IEC958 Left", 119 /* 0x03 */ "Optical IEC958 Right", 120 /* 0x04 */ "Center", 121 /* 0x05 */ "LFE", 122 /* 0x06 */ "Headphone Left", 123 /* 0x07 */ "Headphone Right", 124 /* 0x08 */ "Surround Left", 125 /* 0x09 */ "Surround Right", 126 /* 0x0a */ "PCM Capture Left", 127 /* 0x0b */ "PCM Capture Right", 128 /* 0x0c */ "MIC Capture", 129 /* 0x0d */ "AC97 Surround Left", 130 /* 0x0e */ "AC97 Surround Right", 131 /* 0x0f */ NULL, 132 /* 0x10 */ NULL, 133 /* 0x11 */ "Analog Center", 134 /* 0x12 */ "Analog LFE", 135 /* 0x13 */ NULL, 136 /* 0x14 */ NULL, 137 /* 0x15 */ NULL, 138 /* 0x16 */ NULL, 139 /* 0x17 */ NULL, 140 /* 0x18 */ NULL, 141 /* 0x19 */ NULL, 142 /* 0x1a */ NULL, 143 /* 0x1b */ NULL, 144 /* 0x1c */ NULL, 145 /* 0x1d */ NULL, 146 /* 0x1e */ NULL, 147 /* 0x1f */ NULL, 148 }; 149 150 static char *audigy_outs[32] = { 151 /* 0x00 */ "Digital Front Left", 152 /* 0x01 */ "Digital Front Right", 153 /* 0x02 */ "Digital Center", 154 /* 0x03 */ "Digital LEF", 155 /* 0x04 */ "Headphone Left", 156 /* 0x05 */ "Headphone Right", 157 /* 0x06 */ "Digital Rear Left", 158 /* 0x07 */ "Digital Rear Right", 159 /* 0x08 */ "Front Left", 160 /* 0x09 */ "Front Right", 161 /* 0x0a */ "Center", 162 /* 0x0b */ "LFE", 163 /* 0x0c */ NULL, 164 /* 0x0d */ NULL, 165 /* 0x0e */ "Rear Left", 166 /* 0x0f */ "Rear Right", 167 /* 0x10 */ "AC97 Front Left", 168 /* 0x11 */ "AC97 Front Right", 169 /* 0x12 */ "ADC Caputre Left", 170 /* 0x13 */ "ADC Capture Right", 171 /* 0x14 */ NULL, 172 /* 0x15 */ NULL, 173 /* 0x16 */ NULL, 174 /* 0x17 */ NULL, 175 /* 0x18 */ NULL, 176 /* 0x19 */ NULL, 177 /* 0x1a */ NULL, 178 /* 0x1b */ NULL, 179 /* 0x1c */ NULL, 180 /* 0x1d */ NULL, 181 /* 0x1e */ NULL, 182 /* 0x1f */ NULL, 183 }; 184 185 static const u32 bass_table[41][5] = { 186 { 0x3e4f844f, 0x84ed4cc3, 0x3cc69927, 0x7b03553a, 0xc4da8486 }, 187 { 0x3e69a17a, 0x84c280fb, 0x3cd77cd4, 0x7b2f2a6f, 0xc4b08d1d }, 188 { 0x3e82ff42, 0x849991d5, 0x3ce7466b, 0x7b5917c6, 0xc48863ee }, 189 { 0x3e9bab3c, 0x847267f0, 0x3cf5ffe8, 0x7b813560, 0xc461f22c }, 190 { 0x3eb3b275, 0x844ced29, 0x3d03b295, 0x7ba79a1c, 0xc43d223b }, 191 { 0x3ecb2174, 0x84290c8b, 0x3d106714, 0x7bcc5ba3, 0xc419dfa5 }, 192 { 0x3ee2044b, 0x8406b244, 0x3d1c2561, 0x7bef8e77, 0xc3f8170f }, 193 { 0x3ef86698, 0x83e5cb96, 0x3d26f4d8, 0x7c114600, 0xc3d7b625 }, 194 { 0x3f0e5390, 0x83c646c9, 0x3d30dc39, 0x7c319498, 0xc3b8ab97 }, 195 { 0x3f23d60b, 0x83a81321, 0x3d39e1af, 0x7c508b9c, 0xc39ae704 }, 196 { 0x3f38f884, 0x838b20d2, 0x3d420ad2, 0x7c6e3b75, 0xc37e58f1 }, 197 { 0x3f4dc52c, 0x836f60ef, 0x3d495cab, 0x7c8ab3a6, 0xc362f2be }, 198 { 0x3f6245e8, 0x8354c565, 0x3d4fdbb8, 0x7ca602d6, 0xc348a69b }, 199 { 0x3f76845f, 0x833b40ec, 0x3d558bf0, 0x7cc036df, 0xc32f677c }, 200 { 0x3f8a8a03, 0x8322c6fb, 0x3d5a70c4, 0x7cd95cd7, 0xc317290b }, 201 { 0x3f9e6014, 0x830b4bc3, 0x3d5e8d25, 0x7cf1811a, 0xc2ffdfa5 }, 202 { 0x3fb20fae, 0x82f4c420, 0x3d61e37f, 0x7d08af56, 0xc2e9804a }, 203 { 0x3fc5a1cc, 0x82df2592, 0x3d6475c3, 0x7d1ef294, 0xc2d40096 }, 204 { 0x3fd91f55, 0x82ca6632, 0x3d664564, 0x7d345541, 0xc2bf56b9 }, 205 { 0x3fec9120, 0x82b67cac, 0x3d675356, 0x7d48e138, 0xc2ab796e }, 206 { 0x40000000, 0x82a36037, 0x3d67a012, 0x7d5c9fc9, 0xc2985fee }, 207 { 0x401374c7, 0x8291088a, 0x3d672b93, 0x7d6f99c3, 0xc28601f2 }, 208 { 0x4026f857, 0x827f6dd7, 0x3d65f559, 0x7d81d77c, 0xc27457a3 }, 209 { 0x403a939f, 0x826e88c5, 0x3d63fc63, 0x7d9360d4, 0xc2635996 }, 210 { 0x404e4faf, 0x825e5266, 0x3d613f32, 0x7da43d42, 0xc25300c6 }, 211 { 0x406235ba, 0x824ec434, 0x3d5dbbc3, 0x7db473d7, 0xc243468e }, 212 { 0x40764f1f, 0x823fd80c, 0x3d596f8f, 0x7dc40b44, 0xc23424a2 }, 213 { 0x408aa576, 0x82318824, 0x3d545787, 0x7dd309e2, 0xc2259509 }, 214 { 0x409f4296, 0x8223cf0b, 0x3d4e7012, 0x7de175b5, 0xc2179218 }, 215 { 0x40b430a0, 0x8216a7a1, 0x3d47b505, 0x7def5475, 0xc20a1670 }, 216 { 0x40c97a0a, 0x820a0d12, 0x3d4021a1, 0x7dfcab8d, 0xc1fd1cf5 }, 217 { 0x40df29a6, 0x81fdfad6, 0x3d37b08d, 0x7e098028, 0xc1f0a0ca }, 218 { 0x40f54ab1, 0x81f26ca9, 0x3d2e5bd1, 0x7e15d72b, 0xc1e49d52 }, 219 { 0x410be8da, 0x81e75e89, 0x3d241cce, 0x7e21b544, 0xc1d90e24 }, 220 { 0x41231051, 0x81dcccb3, 0x3d18ec37, 0x7e2d1ee6, 0xc1cdef10 }, 221 { 0x413acdd0, 0x81d2b39e, 0x3d0cc20a, 0x7e38184e, 0xc1c33c13 }, 222 { 0x41532ea7, 0x81c90ffb, 0x3cff9585, 0x7e42a58b, 0xc1b8f15a }, 223 { 0x416c40cd, 0x81bfdeb2, 0x3cf15d21, 0x7e4cca7c, 0xc1af0b3f }, 224 { 0x418612ea, 0x81b71cdc, 0x3ce20e85, 0x7e568ad3, 0xc1a58640 }, 225 { 0x41a0b465, 0x81aec7c5, 0x3cd19e7c, 0x7e5fea1e, 0xc19c5f03 }, 226 { 0x41bc3573, 0x81a6dcea, 0x3cc000e9, 0x7e68ebc2, 0xc1939250 } 227 }; 228 229 static const u32 treble_table[41][5] = { 230 { 0x0125cba9, 0xfed5debd, 0x00599b6c, 0x0d2506da, 0xfa85b354 }, 231 { 0x0142f67e, 0xfeb03163, 0x0066cd0f, 0x0d14c69d, 0xfa914473 }, 232 { 0x016328bd, 0xfe860158, 0x0075b7f2, 0x0d03eb27, 0xfa9d32d2 }, 233 { 0x0186b438, 0xfe56c982, 0x00869234, 0x0cf27048, 0xfaa97fca }, 234 { 0x01adf358, 0xfe21f5fe, 0x00999842, 0x0ce051c2, 0xfab62ca5 }, 235 { 0x01d949fa, 0xfde6e287, 0x00af0d8d, 0x0ccd8b4a, 0xfac33aa7 }, 236 { 0x02092669, 0xfda4d8bf, 0x00c73d4c, 0x0cba1884, 0xfad0ab07 }, 237 { 0x023e0268, 0xfd5b0e4a, 0x00e27b54, 0x0ca5f509, 0xfade7ef2 }, 238 { 0x0278645c, 0xfd08a2b0, 0x01012509, 0x0c911c63, 0xfaecb788 }, 239 { 0x02b8e091, 0xfcac9d1a, 0x0123a262, 0x0c7b8a14, 0xfafb55df }, 240 { 0x03001a9a, 0xfc45e9ce, 0x014a6709, 0x0c65398f, 0xfb0a5aff }, 241 { 0x034ec6d7, 0xfbd3576b, 0x0175f397, 0x0c4e2643, 0xfb19c7e4 }, 242 { 0x03a5ac15, 0xfb5393ee, 0x01a6d6ed, 0x0c364b94, 0xfb299d7c }, 243 { 0x0405a562, 0xfac52968, 0x01ddafae, 0x0c1da4e2, 0xfb39dca5 }, 244 { 0x046fa3fe, 0xfa267a66, 0x021b2ddd, 0x0c042d8d, 0xfb4a8631 }, 245 { 0x04e4b17f, 0xf975be0f, 0x0260149f, 0x0be9e0f2, 0xfb5b9ae0 }, 246 { 0x0565f220, 0xf8b0fbe5, 0x02ad3c29, 0x0bceba73, 0xfb6d1b60 }, 247 { 0x05f4a745, 0xf7d60722, 0x030393d4, 0x0bb2b578, 0xfb7f084d }, 248 { 0x06923236, 0xf6e279bd, 0x03642465, 0x0b95cd75, 0xfb916233 }, 249 { 0x07401713, 0xf5d3aef9, 0x03d01283, 0x0b77fded, 0xfba42984 }, 250 { 0x08000000, 0xf4a6bd88, 0x0448a161, 0x0b594278, 0xfbb75e9f }, 251 { 0x08d3c097, 0xf3587131, 0x04cf35a4, 0x0b3996c9, 0xfbcb01cb }, 252 { 0x09bd59a2, 0xf1e543f9, 0x05655880, 0x0b18f6b2, 0xfbdf1333 }, 253 { 0x0abefd0f, 0xf04956ca, 0x060cbb12, 0x0af75e2c, 0xfbf392e8 }, 254 { 0x0bdb123e, 0xee806984, 0x06c739fe, 0x0ad4c962, 0xfc0880dd }, 255 { 0x0d143a94, 0xec85d287, 0x0796e150, 0x0ab134b0, 0xfc1ddce5 }, 256 { 0x0e6d5664, 0xea547598, 0x087df0a0, 0x0a8c9cb6, 0xfc33a6ad }, 257 { 0x0fe98a2a, 0xe7e6ba35, 0x097edf83, 0x0a66fe5b, 0xfc49ddc2 }, 258 { 0x118c4421, 0xe536813a, 0x0a9c6248, 0x0a4056d7, 0xfc608185 }, 259 { 0x1359422e, 0xe23d19eb, 0x0bd96efb, 0x0a18a3bf, 0xfc77912c }, 260 { 0x1554982b, 0xdef33645, 0x0d3942bd, 0x09efe312, 0xfc8f0bc1 }, 261 { 0x1782b68a, 0xdb50deb1, 0x0ebf676d, 0x09c6133f, 0xfca6f019 }, 262 { 0x19e8715d, 0xd74d64fd, 0x106fb999, 0x099b3337, 0xfcbf3cd6 }, 263 { 0x1c8b07b8, 0xd2df56ab, 0x124e6ec8, 0x096f4274, 0xfcd7f060 }, 264 { 0x1f702b6d, 0xcdfc6e92, 0x14601c10, 0x0942410b, 0xfcf108e5 }, 265 { 0x229e0933, 0xc89985cd, 0x16a9bcfa, 0x09142fb5, 0xfd0a8451 }, 266 { 0x261b5118, 0xc2aa8409, 0x1930bab6, 0x08e50fdc, 0xfd24604d }, 267 { 0x29ef3f5d, 0xbc224f28, 0x1bfaf396, 0x08b4e3aa, 0xfd3e9a3b }, 268 { 0x2e21a59b, 0xb4f2ba46, 0x1f0ec2d6, 0x0883ae15, 0xfd592f33 }, 269 { 0x32baf44b, 0xad0c7429, 0x227308a3, 0x085172eb, 0xfd741bfd }, 270 { 0x37c4448b, 0xa45ef51d, 0x262f3267, 0x081e36dc, 0xfd8f5d14 } 271 }; 272 273 /* dB gain = (float) 20 * log10( float(db_table_value) / 0x8000000 ) */ 274 static const u32 db_table[101] = { 275 0x00000000, 0x01571f82, 0x01674b41, 0x01783a1b, 0x0189f540, 276 0x019c8651, 0x01aff763, 0x01c45306, 0x01d9a446, 0x01eff6b8, 277 0x0207567a, 0x021fd03d, 0x0239714c, 0x02544792, 0x027061a1, 278 0x028dcebb, 0x02ac9edc, 0x02cce2bf, 0x02eeabe8, 0x03120cb0, 279 0x0337184e, 0x035de2df, 0x03868173, 0x03b10a18, 0x03dd93e9, 280 0x040c3713, 0x043d0cea, 0x04702ff3, 0x04a5bbf2, 0x04ddcdfb, 281 0x0518847f, 0x0555ff62, 0x05966005, 0x05d9c95d, 0x06206005, 282 0x066a4a52, 0x06b7b067, 0x0708bc4c, 0x075d9a01, 0x07b6779d, 283 0x08138561, 0x0874f5d5, 0x08dafde1, 0x0945d4ed, 0x09b5b4fd, 284 0x0a2adad1, 0x0aa58605, 0x0b25f936, 0x0bac7a24, 0x0c3951d8, 285 0x0ccccccc, 0x0d673b17, 0x0e08f093, 0x0eb24510, 0x0f639481, 286 0x101d3f2d, 0x10dfa9e6, 0x11ab3e3f, 0x12806ac3, 0x135fa333, 287 0x144960c5, 0x153e2266, 0x163e6cfe, 0x174acbb7, 0x1863d04d, 288 0x198a1357, 0x1abe349f, 0x1c00db77, 0x1d52b712, 0x1eb47ee6, 289 0x2026f30f, 0x21aadcb6, 0x23410e7e, 0x24ea64f9, 0x26a7c71d, 290 0x287a26c4, 0x2a62812c, 0x2c61df84, 0x2e795779, 0x30aa0bcf, 291 0x32f52cfe, 0x355bf9d8, 0x37dfc033, 0x3a81dda4, 0x3d43c038, 292 0x4026e73c, 0x432ce40f, 0x46575af8, 0x49a8040f, 0x4d20ac2a, 293 0x50c335d3, 0x54919a57, 0x588dead1, 0x5cba514a, 0x611911ea, 294 0x65ac8c2f, 0x6a773c39, 0x6f7bbc23, 0x74bcc56c, 0x7a3d3272, 295 0x7fffffff, 296 }; 297 298 /* EMU10k1/EMU10k2 DSP control db gain */ 299 static const DECLARE_TLV_DB_SCALE(snd_emu10k1_db_scale1, -4000, 40, 1); 300 301 static const u32 onoff_table[2] = { 302 0x00000000, 0x00000001 303 }; 304 305 /* 306 */ 307 308 static inline mm_segment_t snd_enter_user(void) 309 { 310 mm_segment_t fs = get_fs(); 311 set_fs(get_ds()); 312 return fs; 313 } 314 315 static inline void snd_leave_user(mm_segment_t fs) 316 { 317 set_fs(fs); 318 } 319 320 /* 321 * controls 322 */ 323 324 static int snd_emu10k1_gpr_ctl_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 325 { 326 struct snd_emu10k1_fx8010_ctl *ctl = 327 (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value; 328 329 if (ctl->min == 0 && ctl->max == 1) 330 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 331 else 332 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 333 uinfo->count = ctl->vcount; 334 uinfo->value.integer.min = ctl->min; 335 uinfo->value.integer.max = ctl->max; 336 return 0; 337 } 338 339 static int snd_emu10k1_gpr_ctl_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 340 { 341 struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol); 342 struct snd_emu10k1_fx8010_ctl *ctl = 343 (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value; 344 unsigned long flags; 345 unsigned int i; 346 347 spin_lock_irqsave(&emu->reg_lock, flags); 348 for (i = 0; i < ctl->vcount; i++) 349 ucontrol->value.integer.value[i] = ctl->value[i]; 350 spin_unlock_irqrestore(&emu->reg_lock, flags); 351 return 0; 352 } 353 354 static int snd_emu10k1_gpr_ctl_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 355 { 356 struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol); 357 struct snd_emu10k1_fx8010_ctl *ctl = 358 (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value; 359 unsigned long flags; 360 unsigned int nval, val; 361 unsigned int i, j; 362 int change = 0; 363 364 spin_lock_irqsave(&emu->reg_lock, flags); 365 for (i = 0; i < ctl->vcount; i++) { 366 nval = ucontrol->value.integer.value[i]; 367 if (nval < ctl->min) 368 nval = ctl->min; 369 if (nval > ctl->max) 370 nval = ctl->max; 371 if (nval != ctl->value[i]) 372 change = 1; 373 val = ctl->value[i] = nval; 374 switch (ctl->translation) { 375 case EMU10K1_GPR_TRANSLATION_NONE: 376 snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, val); 377 break; 378 case EMU10K1_GPR_TRANSLATION_TABLE100: 379 snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, db_table[val]); 380 break; 381 case EMU10K1_GPR_TRANSLATION_BASS: 382 if ((ctl->count % 5) != 0 || (ctl->count / 5) != ctl->vcount) { 383 change = -EIO; 384 goto __error; 385 } 386 for (j = 0; j < 5; j++) 387 snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[j * ctl->vcount + i], 0, bass_table[val][j]); 388 break; 389 case EMU10K1_GPR_TRANSLATION_TREBLE: 390 if ((ctl->count % 5) != 0 || (ctl->count / 5) != ctl->vcount) { 391 change = -EIO; 392 goto __error; 393 } 394 for (j = 0; j < 5; j++) 395 snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[j * ctl->vcount + i], 0, treble_table[val][j]); 396 break; 397 case EMU10K1_GPR_TRANSLATION_ONOFF: 398 snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, onoff_table[val]); 399 break; 400 } 401 } 402 __error: 403 spin_unlock_irqrestore(&emu->reg_lock, flags); 404 return change; 405 } 406 407 /* 408 * Interrupt handler 409 */ 410 411 static void snd_emu10k1_fx8010_interrupt(struct snd_emu10k1 *emu) 412 { 413 struct snd_emu10k1_fx8010_irq *irq, *nirq; 414 415 irq = emu->fx8010.irq_handlers; 416 while (irq) { 417 nirq = irq->next; /* irq ptr can be removed from list */ 418 if (snd_emu10k1_ptr_read(emu, emu->gpr_base + irq->gpr_running, 0) & 0xffff0000) { 419 if (irq->handler) 420 irq->handler(emu, irq->private_data); 421 snd_emu10k1_ptr_write(emu, emu->gpr_base + irq->gpr_running, 0, 1); 422 } 423 irq = nirq; 424 } 425 } 426 427 int snd_emu10k1_fx8010_register_irq_handler(struct snd_emu10k1 *emu, 428 snd_fx8010_irq_handler_t *handler, 429 unsigned char gpr_running, 430 void *private_data, 431 struct snd_emu10k1_fx8010_irq **r_irq) 432 { 433 struct snd_emu10k1_fx8010_irq *irq; 434 unsigned long flags; 435 436 irq = kmalloc(sizeof(*irq), GFP_ATOMIC); 437 if (irq == NULL) 438 return -ENOMEM; 439 irq->handler = handler; 440 irq->gpr_running = gpr_running; 441 irq->private_data = private_data; 442 irq->next = NULL; 443 spin_lock_irqsave(&emu->fx8010.irq_lock, flags); 444 if (emu->fx8010.irq_handlers == NULL) { 445 emu->fx8010.irq_handlers = irq; 446 emu->dsp_interrupt = snd_emu10k1_fx8010_interrupt; 447 snd_emu10k1_intr_enable(emu, INTE_FXDSPENABLE); 448 } else { 449 irq->next = emu->fx8010.irq_handlers; 450 emu->fx8010.irq_handlers = irq; 451 } 452 spin_unlock_irqrestore(&emu->fx8010.irq_lock, flags); 453 if (r_irq) 454 *r_irq = irq; 455 return 0; 456 } 457 458 int snd_emu10k1_fx8010_unregister_irq_handler(struct snd_emu10k1 *emu, 459 struct snd_emu10k1_fx8010_irq *irq) 460 { 461 struct snd_emu10k1_fx8010_irq *tmp; 462 unsigned long flags; 463 464 spin_lock_irqsave(&emu->fx8010.irq_lock, flags); 465 if ((tmp = emu->fx8010.irq_handlers) == irq) { 466 emu->fx8010.irq_handlers = tmp->next; 467 if (emu->fx8010.irq_handlers == NULL) { 468 snd_emu10k1_intr_disable(emu, INTE_FXDSPENABLE); 469 emu->dsp_interrupt = NULL; 470 } 471 } else { 472 while (tmp && tmp->next != irq) 473 tmp = tmp->next; 474 if (tmp) 475 tmp->next = tmp->next->next; 476 } 477 spin_unlock_irqrestore(&emu->fx8010.irq_lock, flags); 478 kfree(irq); 479 return 0; 480 } 481 482 /************************************************************************* 483 * EMU10K1 effect manager 484 *************************************************************************/ 485 486 static void snd_emu10k1_write_op(struct snd_emu10k1_fx8010_code *icode, 487 unsigned int *ptr, 488 u32 op, u32 r, u32 a, u32 x, u32 y) 489 { 490 u_int32_t *code; 491 snd_assert(*ptr < 512, return); 492 code = (u_int32_t __force *)icode->code + (*ptr) * 2; 493 set_bit(*ptr, icode->code_valid); 494 code[0] = ((x & 0x3ff) << 10) | (y & 0x3ff); 495 code[1] = ((op & 0x0f) << 20) | ((r & 0x3ff) << 10) | (a & 0x3ff); 496 (*ptr)++; 497 } 498 499 #define OP(icode, ptr, op, r, a, x, y) \ 500 snd_emu10k1_write_op(icode, ptr, op, r, a, x, y) 501 502 static void snd_emu10k1_audigy_write_op(struct snd_emu10k1_fx8010_code *icode, 503 unsigned int *ptr, 504 u32 op, u32 r, u32 a, u32 x, u32 y) 505 { 506 u_int32_t *code; 507 snd_assert(*ptr < 1024, return); 508 code = (u_int32_t __force *)icode->code + (*ptr) * 2; 509 set_bit(*ptr, icode->code_valid); 510 code[0] = ((x & 0x7ff) << 12) | (y & 0x7ff); 511 code[1] = ((op & 0x0f) << 24) | ((r & 0x7ff) << 12) | (a & 0x7ff); 512 (*ptr)++; 513 } 514 515 #define A_OP(icode, ptr, op, r, a, x, y) \ 516 snd_emu10k1_audigy_write_op(icode, ptr, op, r, a, x, y) 517 518 static void snd_emu10k1_efx_write(struct snd_emu10k1 *emu, unsigned int pc, unsigned int data) 519 { 520 pc += emu->audigy ? A_MICROCODEBASE : MICROCODEBASE; 521 snd_emu10k1_ptr_write(emu, pc, 0, data); 522 } 523 524 unsigned int snd_emu10k1_efx_read(struct snd_emu10k1 *emu, unsigned int pc) 525 { 526 pc += emu->audigy ? A_MICROCODEBASE : MICROCODEBASE; 527 return snd_emu10k1_ptr_read(emu, pc, 0); 528 } 529 530 static int snd_emu10k1_gpr_poke(struct snd_emu10k1 *emu, 531 struct snd_emu10k1_fx8010_code *icode) 532 { 533 int gpr; 534 u32 val; 535 536 for (gpr = 0; gpr < (emu->audigy ? 0x200 : 0x100); gpr++) { 537 if (!test_bit(gpr, icode->gpr_valid)) 538 continue; 539 if (get_user(val, &icode->gpr_map[gpr])) 540 return -EFAULT; 541 snd_emu10k1_ptr_write(emu, emu->gpr_base + gpr, 0, val); 542 } 543 return 0; 544 } 545 546 static int snd_emu10k1_gpr_peek(struct snd_emu10k1 *emu, 547 struct snd_emu10k1_fx8010_code *icode) 548 { 549 int gpr; 550 u32 val; 551 552 for (gpr = 0; gpr < (emu->audigy ? 0x200 : 0x100); gpr++) { 553 set_bit(gpr, icode->gpr_valid); 554 val = snd_emu10k1_ptr_read(emu, emu->gpr_base + gpr, 0); 555 if (put_user(val, &icode->gpr_map[gpr])) 556 return -EFAULT; 557 } 558 return 0; 559 } 560 561 static int snd_emu10k1_tram_poke(struct snd_emu10k1 *emu, 562 struct snd_emu10k1_fx8010_code *icode) 563 { 564 int tram; 565 u32 addr, val; 566 567 for (tram = 0; tram < (emu->audigy ? 0x100 : 0xa0); tram++) { 568 if (!test_bit(tram, icode->tram_valid)) 569 continue; 570 if (get_user(val, &icode->tram_data_map[tram]) || 571 get_user(addr, &icode->tram_addr_map[tram])) 572 return -EFAULT; 573 snd_emu10k1_ptr_write(emu, TANKMEMDATAREGBASE + tram, 0, val); 574 if (!emu->audigy) { 575 snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + tram, 0, addr); 576 } else { 577 snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + tram, 0, addr << 12); 578 snd_emu10k1_ptr_write(emu, A_TANKMEMCTLREGBASE + tram, 0, addr >> 20); 579 } 580 } 581 return 0; 582 } 583 584 static int snd_emu10k1_tram_peek(struct snd_emu10k1 *emu, 585 struct snd_emu10k1_fx8010_code *icode) 586 { 587 int tram; 588 u32 val, addr; 589 590 memset(icode->tram_valid, 0, sizeof(icode->tram_valid)); 591 for (tram = 0; tram < (emu->audigy ? 0x100 : 0xa0); tram++) { 592 set_bit(tram, icode->tram_valid); 593 val = snd_emu10k1_ptr_read(emu, TANKMEMDATAREGBASE + tram, 0); 594 if (!emu->audigy) { 595 addr = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + tram, 0); 596 } else { 597 addr = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + tram, 0) >> 12; 598 addr |= snd_emu10k1_ptr_read(emu, A_TANKMEMCTLREGBASE + tram, 0) << 20; 599 } 600 if (put_user(val, &icode->tram_data_map[tram]) || 601 put_user(addr, &icode->tram_addr_map[tram])) 602 return -EFAULT; 603 } 604 return 0; 605 } 606 607 static int snd_emu10k1_code_poke(struct snd_emu10k1 *emu, 608 struct snd_emu10k1_fx8010_code *icode) 609 { 610 u32 pc, lo, hi; 611 612 for (pc = 0; pc < (emu->audigy ? 2*1024 : 2*512); pc += 2) { 613 if (!test_bit(pc / 2, icode->code_valid)) 614 continue; 615 if (get_user(lo, &icode->code[pc + 0]) || 616 get_user(hi, &icode->code[pc + 1])) 617 return -EFAULT; 618 snd_emu10k1_efx_write(emu, pc + 0, lo); 619 snd_emu10k1_efx_write(emu, pc + 1, hi); 620 } 621 return 0; 622 } 623 624 static int snd_emu10k1_code_peek(struct snd_emu10k1 *emu, 625 struct snd_emu10k1_fx8010_code *icode) 626 { 627 u32 pc; 628 629 memset(icode->code_valid, 0, sizeof(icode->code_valid)); 630 for (pc = 0; pc < (emu->audigy ? 2*1024 : 2*512); pc += 2) { 631 set_bit(pc / 2, icode->code_valid); 632 if (put_user(snd_emu10k1_efx_read(emu, pc + 0), &icode->code[pc + 0])) 633 return -EFAULT; 634 if (put_user(snd_emu10k1_efx_read(emu, pc + 1), &icode->code[pc + 1])) 635 return -EFAULT; 636 } 637 return 0; 638 } 639 640 static struct snd_emu10k1_fx8010_ctl * 641 snd_emu10k1_look_for_ctl(struct snd_emu10k1 *emu, struct snd_ctl_elem_id *id) 642 { 643 struct snd_emu10k1_fx8010_ctl *ctl; 644 struct snd_kcontrol *kcontrol; 645 struct list_head *list; 646 647 list_for_each(list, &emu->fx8010.gpr_ctl) { 648 ctl = emu10k1_gpr_ctl(list); 649 kcontrol = ctl->kcontrol; 650 if (kcontrol->id.iface == id->iface && 651 !strcmp(kcontrol->id.name, id->name) && 652 kcontrol->id.index == id->index) 653 return ctl; 654 } 655 return NULL; 656 } 657 658 #define MAX_TLV_SIZE 256 659 660 static unsigned int *copy_tlv(const unsigned int __user *_tlv) 661 { 662 unsigned int data[2]; 663 unsigned int *tlv; 664 665 if (!_tlv) 666 return NULL; 667 if (copy_from_user(data, _tlv, sizeof(data))) 668 return NULL; 669 if (data[1] >= MAX_TLV_SIZE) 670 return NULL; 671 tlv = kmalloc(data[1] * 4 + sizeof(data), GFP_KERNEL); 672 if (!tlv) 673 return NULL; 674 memcpy(tlv, data, sizeof(data)); 675 if (copy_from_user(tlv + 2, _tlv + 2, data[1])) { 676 kfree(tlv); 677 return NULL; 678 } 679 return tlv; 680 } 681 682 static int copy_gctl(struct snd_emu10k1 *emu, 683 struct snd_emu10k1_fx8010_control_gpr *gctl, 684 struct snd_emu10k1_fx8010_control_gpr __user *_gctl, 685 int idx) 686 { 687 struct snd_emu10k1_fx8010_control_old_gpr __user *octl; 688 689 if (emu->support_tlv) 690 return copy_from_user(gctl, &_gctl[idx], sizeof(*gctl)); 691 octl = (struct snd_emu10k1_fx8010_control_old_gpr __user *)_gctl; 692 if (copy_from_user(gctl, &octl[idx], sizeof(*octl))) 693 return -EFAULT; 694 gctl->tlv = NULL; 695 return 0; 696 } 697 698 static int copy_gctl_to_user(struct snd_emu10k1 *emu, 699 struct snd_emu10k1_fx8010_control_gpr __user *_gctl, 700 struct snd_emu10k1_fx8010_control_gpr *gctl, 701 int idx) 702 { 703 struct snd_emu10k1_fx8010_control_old_gpr __user *octl; 704 705 if (emu->support_tlv) 706 return copy_to_user(&_gctl[idx], gctl, sizeof(*gctl)); 707 708 octl = (struct snd_emu10k1_fx8010_control_old_gpr __user *)_gctl; 709 return copy_to_user(&octl[idx], gctl, sizeof(*octl)); 710 } 711 712 static int snd_emu10k1_verify_controls(struct snd_emu10k1 *emu, 713 struct snd_emu10k1_fx8010_code *icode) 714 { 715 unsigned int i; 716 struct snd_ctl_elem_id __user *_id; 717 struct snd_ctl_elem_id id; 718 struct snd_emu10k1_fx8010_control_gpr *gctl; 719 int err; 720 721 for (i = 0, _id = icode->gpr_del_controls; 722 i < icode->gpr_del_control_count; i++, _id++) { 723 if (copy_from_user(&id, _id, sizeof(id))) 724 return -EFAULT; 725 if (snd_emu10k1_look_for_ctl(emu, &id) == NULL) 726 return -ENOENT; 727 } 728 gctl = kmalloc(sizeof(*gctl), GFP_KERNEL); 729 if (! gctl) 730 return -ENOMEM; 731 err = 0; 732 for (i = 0; i < icode->gpr_add_control_count; i++) { 733 if (copy_gctl(emu, gctl, icode->gpr_add_controls, i)) { 734 err = -EFAULT; 735 goto __error; 736 } 737 if (snd_emu10k1_look_for_ctl(emu, &gctl->id)) 738 continue; 739 down_read(&emu->card->controls_rwsem); 740 if (snd_ctl_find_id(emu->card, &gctl->id) != NULL) { 741 up_read(&emu->card->controls_rwsem); 742 err = -EEXIST; 743 goto __error; 744 } 745 up_read(&emu->card->controls_rwsem); 746 if (gctl->id.iface != SNDRV_CTL_ELEM_IFACE_MIXER && 747 gctl->id.iface != SNDRV_CTL_ELEM_IFACE_PCM) { 748 err = -EINVAL; 749 goto __error; 750 } 751 } 752 for (i = 0; i < icode->gpr_list_control_count; i++) { 753 /* FIXME: we need to check the WRITE access */ 754 if (copy_gctl(emu, gctl, icode->gpr_list_controls, i)) { 755 err = -EFAULT; 756 goto __error; 757 } 758 } 759 __error: 760 kfree(gctl); 761 return err; 762 } 763 764 static void snd_emu10k1_ctl_private_free(struct snd_kcontrol *kctl) 765 { 766 struct snd_emu10k1_fx8010_ctl *ctl; 767 768 ctl = (struct snd_emu10k1_fx8010_ctl *) kctl->private_value; 769 kctl->private_value = 0; 770 list_del(&ctl->list); 771 kfree(ctl); 772 if (kctl->tlv.p) 773 kfree(kctl->tlv.p); 774 } 775 776 static int snd_emu10k1_add_controls(struct snd_emu10k1 *emu, 777 struct snd_emu10k1_fx8010_code *icode) 778 { 779 unsigned int i, j; 780 struct snd_emu10k1_fx8010_control_gpr *gctl; 781 struct snd_emu10k1_fx8010_ctl *ctl, *nctl; 782 struct snd_kcontrol_new knew; 783 struct snd_kcontrol *kctl; 784 struct snd_ctl_elem_value *val; 785 int err = 0; 786 787 val = kmalloc(sizeof(*val), GFP_KERNEL); 788 gctl = kmalloc(sizeof(*gctl), GFP_KERNEL); 789 nctl = kmalloc(sizeof(*nctl), GFP_KERNEL); 790 if (!val || !gctl || !nctl) { 791 err = -ENOMEM; 792 goto __error; 793 } 794 795 for (i = 0; i < icode->gpr_add_control_count; i++) { 796 if (copy_gctl(emu, gctl, icode->gpr_add_controls, i)) { 797 err = -EFAULT; 798 goto __error; 799 } 800 if (gctl->id.iface != SNDRV_CTL_ELEM_IFACE_MIXER && 801 gctl->id.iface != SNDRV_CTL_ELEM_IFACE_PCM) { 802 err = -EINVAL; 803 goto __error; 804 } 805 if (! gctl->id.name[0]) { 806 err = -EINVAL; 807 goto __error; 808 } 809 ctl = snd_emu10k1_look_for_ctl(emu, &gctl->id); 810 memset(&knew, 0, sizeof(knew)); 811 knew.iface = gctl->id.iface; 812 knew.name = gctl->id.name; 813 knew.index = gctl->id.index; 814 knew.device = gctl->id.device; 815 knew.subdevice = gctl->id.subdevice; 816 knew.info = snd_emu10k1_gpr_ctl_info; 817 knew.tlv.p = copy_tlv(gctl->tlv); 818 if (knew.tlv.p) 819 knew.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 820 SNDRV_CTL_ELEM_ACCESS_TLV_READ; 821 knew.get = snd_emu10k1_gpr_ctl_get; 822 knew.put = snd_emu10k1_gpr_ctl_put; 823 memset(nctl, 0, sizeof(*nctl)); 824 nctl->vcount = gctl->vcount; 825 nctl->count = gctl->count; 826 for (j = 0; j < 32; j++) { 827 nctl->gpr[j] = gctl->gpr[j]; 828 nctl->value[j] = ~gctl->value[j]; /* inverted, we want to write new value in gpr_ctl_put() */ 829 val->value.integer.value[j] = gctl->value[j]; 830 } 831 nctl->min = gctl->min; 832 nctl->max = gctl->max; 833 nctl->translation = gctl->translation; 834 if (ctl == NULL) { 835 ctl = kmalloc(sizeof(*ctl), GFP_KERNEL); 836 if (ctl == NULL) { 837 err = -ENOMEM; 838 kfree(knew.tlv.p); 839 goto __error; 840 } 841 knew.private_value = (unsigned long)ctl; 842 *ctl = *nctl; 843 if ((err = snd_ctl_add(emu->card, kctl = snd_ctl_new1(&knew, emu))) < 0) { 844 kfree(ctl); 845 kfree(knew.tlv.p); 846 goto __error; 847 } 848 kctl->private_free = snd_emu10k1_ctl_private_free; 849 ctl->kcontrol = kctl; 850 list_add_tail(&ctl->list, &emu->fx8010.gpr_ctl); 851 } else { 852 /* overwrite */ 853 nctl->list = ctl->list; 854 nctl->kcontrol = ctl->kcontrol; 855 *ctl = *nctl; 856 snd_ctl_notify(emu->card, SNDRV_CTL_EVENT_MASK_VALUE | 857 SNDRV_CTL_EVENT_MASK_INFO, &ctl->kcontrol->id); 858 } 859 snd_emu10k1_gpr_ctl_put(ctl->kcontrol, val); 860 } 861 __error: 862 kfree(nctl); 863 kfree(gctl); 864 kfree(val); 865 return err; 866 } 867 868 static int snd_emu10k1_del_controls(struct snd_emu10k1 *emu, 869 struct snd_emu10k1_fx8010_code *icode) 870 { 871 unsigned int i; 872 struct snd_ctl_elem_id id; 873 struct snd_ctl_elem_id __user *_id; 874 struct snd_emu10k1_fx8010_ctl *ctl; 875 struct snd_card *card = emu->card; 876 877 for (i = 0, _id = icode->gpr_del_controls; 878 i < icode->gpr_del_control_count; i++, _id++) { 879 if (copy_from_user(&id, _id, sizeof(id))) 880 return -EFAULT; 881 down_write(&card->controls_rwsem); 882 ctl = snd_emu10k1_look_for_ctl(emu, &id); 883 if (ctl) 884 snd_ctl_remove(card, ctl->kcontrol); 885 up_write(&card->controls_rwsem); 886 } 887 return 0; 888 } 889 890 static int snd_emu10k1_list_controls(struct snd_emu10k1 *emu, 891 struct snd_emu10k1_fx8010_code *icode) 892 { 893 unsigned int i = 0, j; 894 unsigned int total = 0; 895 struct snd_emu10k1_fx8010_control_gpr *gctl; 896 struct snd_emu10k1_fx8010_ctl *ctl; 897 struct snd_ctl_elem_id *id; 898 struct list_head *list; 899 900 gctl = kmalloc(sizeof(*gctl), GFP_KERNEL); 901 if (! gctl) 902 return -ENOMEM; 903 904 list_for_each(list, &emu->fx8010.gpr_ctl) { 905 ctl = emu10k1_gpr_ctl(list); 906 total++; 907 if (icode->gpr_list_controls && 908 i < icode->gpr_list_control_count) { 909 memset(gctl, 0, sizeof(*gctl)); 910 id = &ctl->kcontrol->id; 911 gctl->id.iface = id->iface; 912 strlcpy(gctl->id.name, id->name, sizeof(gctl->id.name)); 913 gctl->id.index = id->index; 914 gctl->id.device = id->device; 915 gctl->id.subdevice = id->subdevice; 916 gctl->vcount = ctl->vcount; 917 gctl->count = ctl->count; 918 for (j = 0; j < 32; j++) { 919 gctl->gpr[j] = ctl->gpr[j]; 920 gctl->value[j] = ctl->value[j]; 921 } 922 gctl->min = ctl->min; 923 gctl->max = ctl->max; 924 gctl->translation = ctl->translation; 925 if (copy_gctl_to_user(emu, icode->gpr_list_controls, 926 gctl, i)) { 927 kfree(gctl); 928 return -EFAULT; 929 } 930 i++; 931 } 932 } 933 icode->gpr_list_control_total = total; 934 kfree(gctl); 935 return 0; 936 } 937 938 static int snd_emu10k1_icode_poke(struct snd_emu10k1 *emu, 939 struct snd_emu10k1_fx8010_code *icode) 940 { 941 int err = 0; 942 943 mutex_lock(&emu->fx8010.lock); 944 if ((err = snd_emu10k1_verify_controls(emu, icode)) < 0) 945 goto __error; 946 strlcpy(emu->fx8010.name, icode->name, sizeof(emu->fx8010.name)); 947 /* stop FX processor - this may be dangerous, but it's better to miss 948 some samples than generate wrong ones - [jk] */ 949 if (emu->audigy) 950 snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_SINGLE_STEP); 951 else 952 snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_SINGLE_STEP); 953 /* ok, do the main job */ 954 if ((err = snd_emu10k1_del_controls(emu, icode)) < 0 || 955 (err = snd_emu10k1_gpr_poke(emu, icode)) < 0 || 956 (err = snd_emu10k1_tram_poke(emu, icode)) < 0 || 957 (err = snd_emu10k1_code_poke(emu, icode)) < 0 || 958 (err = snd_emu10k1_add_controls(emu, icode)) < 0) 959 goto __error; 960 /* start FX processor when the DSP code is updated */ 961 if (emu->audigy) 962 snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg); 963 else 964 snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg); 965 __error: 966 mutex_unlock(&emu->fx8010.lock); 967 return err; 968 } 969 970 static int snd_emu10k1_icode_peek(struct snd_emu10k1 *emu, 971 struct snd_emu10k1_fx8010_code *icode) 972 { 973 int err; 974 975 mutex_lock(&emu->fx8010.lock); 976 strlcpy(icode->name, emu->fx8010.name, sizeof(icode->name)); 977 /* ok, do the main job */ 978 err = snd_emu10k1_gpr_peek(emu, icode); 979 if (err >= 0) 980 err = snd_emu10k1_tram_peek(emu, icode); 981 if (err >= 0) 982 err = snd_emu10k1_code_peek(emu, icode); 983 if (err >= 0) 984 err = snd_emu10k1_list_controls(emu, icode); 985 mutex_unlock(&emu->fx8010.lock); 986 return err; 987 } 988 989 static int snd_emu10k1_ipcm_poke(struct snd_emu10k1 *emu, 990 struct snd_emu10k1_fx8010_pcm_rec *ipcm) 991 { 992 unsigned int i; 993 int err = 0; 994 struct snd_emu10k1_fx8010_pcm *pcm; 995 996 if (ipcm->substream >= EMU10K1_FX8010_PCM_COUNT) 997 return -EINVAL; 998 if (ipcm->channels > 32) 999 return -EINVAL; 1000 pcm = &emu->fx8010.pcm[ipcm->substream]; 1001 mutex_lock(&emu->fx8010.lock); 1002 spin_lock_irq(&emu->reg_lock); 1003 if (pcm->opened) { 1004 err = -EBUSY; 1005 goto __error; 1006 } 1007 if (ipcm->channels == 0) { /* remove */ 1008 pcm->valid = 0; 1009 } else { 1010 /* FIXME: we need to add universal code to the PCM transfer routine */ 1011 if (ipcm->channels != 2) { 1012 err = -EINVAL; 1013 goto __error; 1014 } 1015 pcm->valid = 1; 1016 pcm->opened = 0; 1017 pcm->channels = ipcm->channels; 1018 pcm->tram_start = ipcm->tram_start; 1019 pcm->buffer_size = ipcm->buffer_size; 1020 pcm->gpr_size = ipcm->gpr_size; 1021 pcm->gpr_count = ipcm->gpr_count; 1022 pcm->gpr_tmpcount = ipcm->gpr_tmpcount; 1023 pcm->gpr_ptr = ipcm->gpr_ptr; 1024 pcm->gpr_trigger = ipcm->gpr_trigger; 1025 pcm->gpr_running = ipcm->gpr_running; 1026 for (i = 0; i < pcm->channels; i++) 1027 pcm->etram[i] = ipcm->etram[i]; 1028 } 1029 __error: 1030 spin_unlock_irq(&emu->reg_lock); 1031 mutex_unlock(&emu->fx8010.lock); 1032 return err; 1033 } 1034 1035 static int snd_emu10k1_ipcm_peek(struct snd_emu10k1 *emu, 1036 struct snd_emu10k1_fx8010_pcm_rec *ipcm) 1037 { 1038 unsigned int i; 1039 int err = 0; 1040 struct snd_emu10k1_fx8010_pcm *pcm; 1041 1042 if (ipcm->substream >= EMU10K1_FX8010_PCM_COUNT) 1043 return -EINVAL; 1044 pcm = &emu->fx8010.pcm[ipcm->substream]; 1045 mutex_lock(&emu->fx8010.lock); 1046 spin_lock_irq(&emu->reg_lock); 1047 ipcm->channels = pcm->channels; 1048 ipcm->tram_start = pcm->tram_start; 1049 ipcm->buffer_size = pcm->buffer_size; 1050 ipcm->gpr_size = pcm->gpr_size; 1051 ipcm->gpr_ptr = pcm->gpr_ptr; 1052 ipcm->gpr_count = pcm->gpr_count; 1053 ipcm->gpr_tmpcount = pcm->gpr_tmpcount; 1054 ipcm->gpr_trigger = pcm->gpr_trigger; 1055 ipcm->gpr_running = pcm->gpr_running; 1056 for (i = 0; i < pcm->channels; i++) 1057 ipcm->etram[i] = pcm->etram[i]; 1058 ipcm->res1 = ipcm->res2 = 0; 1059 ipcm->pad = 0; 1060 spin_unlock_irq(&emu->reg_lock); 1061 mutex_unlock(&emu->fx8010.lock); 1062 return err; 1063 } 1064 1065 #define SND_EMU10K1_GPR_CONTROLS 44 1066 #define SND_EMU10K1_INPUTS 12 1067 #define SND_EMU10K1_PLAYBACK_CHANNELS 8 1068 #define SND_EMU10K1_CAPTURE_CHANNELS 4 1069 1070 static void __devinit 1071 snd_emu10k1_init_mono_control(struct snd_emu10k1_fx8010_control_gpr *ctl, 1072 const char *name, int gpr, int defval) 1073 { 1074 ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; 1075 strcpy(ctl->id.name, name); 1076 ctl->vcount = ctl->count = 1; 1077 ctl->gpr[0] = gpr + 0; ctl->value[0] = defval; 1078 ctl->min = 0; 1079 ctl->max = 100; 1080 ctl->tlv = snd_emu10k1_db_scale1; 1081 ctl->translation = EMU10K1_GPR_TRANSLATION_TABLE100; 1082 } 1083 1084 static void __devinit 1085 snd_emu10k1_init_stereo_control(struct snd_emu10k1_fx8010_control_gpr *ctl, 1086 const char *name, int gpr, int defval) 1087 { 1088 ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; 1089 strcpy(ctl->id.name, name); 1090 ctl->vcount = ctl->count = 2; 1091 ctl->gpr[0] = gpr + 0; ctl->value[0] = defval; 1092 ctl->gpr[1] = gpr + 1; ctl->value[1] = defval; 1093 ctl->min = 0; 1094 ctl->max = 100; 1095 ctl->tlv = snd_emu10k1_db_scale1; 1096 ctl->translation = EMU10K1_GPR_TRANSLATION_TABLE100; 1097 } 1098 1099 static void __devinit 1100 snd_emu10k1_init_mono_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl, 1101 const char *name, int gpr, int defval) 1102 { 1103 ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; 1104 strcpy(ctl->id.name, name); 1105 ctl->vcount = ctl->count = 1; 1106 ctl->gpr[0] = gpr + 0; ctl->value[0] = defval; 1107 ctl->min = 0; 1108 ctl->max = 1; 1109 ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF; 1110 } 1111 1112 static void __devinit 1113 snd_emu10k1_init_stereo_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl, 1114 const char *name, int gpr, int defval) 1115 { 1116 ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; 1117 strcpy(ctl->id.name, name); 1118 ctl->vcount = ctl->count = 2; 1119 ctl->gpr[0] = gpr + 0; ctl->value[0] = defval; 1120 ctl->gpr[1] = gpr + 1; ctl->value[1] = defval; 1121 ctl->min = 0; 1122 ctl->max = 1; 1123 ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF; 1124 } 1125 1126 /* 1127 * Used for emu1010 - conversion from 32-bit capture inputs from HANA 1128 * to 2 x 16-bit registers in audigy - their values are read via DMA. 1129 * Conversion is performed by Audigy DSP instructions of FX8010. 1130 */ 1131 static int snd_emu10k1_audigy_dsp_convert_32_to_2x16( 1132 struct snd_emu10k1_fx8010_code *icode, 1133 u32 *ptr, int tmp, int bit_shifter16, 1134 int reg_in, int reg_out) 1135 { 1136 A_OP(icode, ptr, iACC3, A_GPR(tmp + 1), reg_in, A_C_00000000, A_C_00000000); 1137 A_OP(icode, ptr, iANDXOR, A_GPR(tmp), A_GPR(tmp + 1), A_GPR(bit_shifter16 - 1), A_C_00000000); 1138 A_OP(icode, ptr, iTSTNEG, A_GPR(tmp + 2), A_GPR(tmp), A_C_80000000, A_GPR(bit_shifter16 - 2)); 1139 A_OP(icode, ptr, iANDXOR, A_GPR(tmp + 2), A_GPR(tmp + 2), A_C_80000000, A_C_00000000); 1140 A_OP(icode, ptr, iANDXOR, A_GPR(tmp), A_GPR(tmp), A_GPR(bit_shifter16 - 3), A_C_00000000); 1141 A_OP(icode, ptr, iMACINT0, A_GPR(tmp), A_C_00000000, A_GPR(tmp), A_C_00010000); 1142 A_OP(icode, ptr, iANDXOR, reg_out, A_GPR(tmp), A_C_ffffffff, A_GPR(tmp + 2)); 1143 A_OP(icode, ptr, iACC3, reg_out + 1, A_GPR(tmp + 1), A_C_00000000, A_C_00000000); 1144 return 1; 1145 } 1146 1147 /* 1148 * initial DSP configuration for Audigy 1149 */ 1150 1151 static int __devinit _snd_emu10k1_audigy_init_efx(struct snd_emu10k1 *emu) 1152 { 1153 int err, i, z, gpr, nctl; 1154 int bit_shifter16; 1155 const int playback = 10; 1156 const int capture = playback + (SND_EMU10K1_PLAYBACK_CHANNELS * 2); /* we reserve 10 voices */ 1157 const int stereo_mix = capture + 2; 1158 const int tmp = 0x88; 1159 u32 ptr; 1160 struct snd_emu10k1_fx8010_code *icode = NULL; 1161 struct snd_emu10k1_fx8010_control_gpr *controls = NULL, *ctl; 1162 u32 *gpr_map; 1163 mm_segment_t seg; 1164 1165 if ((icode = kzalloc(sizeof(*icode), GFP_KERNEL)) == NULL || 1166 (icode->gpr_map = (u_int32_t __user *) 1167 kcalloc(512 + 256 + 256 + 2 * 1024, sizeof(u_int32_t), 1168 GFP_KERNEL)) == NULL || 1169 (controls = kcalloc(SND_EMU10K1_GPR_CONTROLS, 1170 sizeof(*controls), GFP_KERNEL)) == NULL) { 1171 err = -ENOMEM; 1172 goto __err; 1173 } 1174 gpr_map = (u32 __force *)icode->gpr_map; 1175 1176 icode->tram_data_map = icode->gpr_map + 512; 1177 icode->tram_addr_map = icode->tram_data_map + 256; 1178 icode->code = icode->tram_addr_map + 256; 1179 1180 /* clear free GPRs */ 1181 for (i = 0; i < 512; i++) 1182 set_bit(i, icode->gpr_valid); 1183 1184 /* clear TRAM data & address lines */ 1185 for (i = 0; i < 256; i++) 1186 set_bit(i, icode->tram_valid); 1187 1188 strcpy(icode->name, "Audigy DSP code for ALSA"); 1189 ptr = 0; 1190 nctl = 0; 1191 gpr = stereo_mix + 10; 1192 gpr_map[gpr++] = 0x00007fff; 1193 gpr_map[gpr++] = 0x00008000; 1194 gpr_map[gpr++] = 0x0000ffff; 1195 bit_shifter16 = gpr; 1196 1197 /* stop FX processor */ 1198 snd_emu10k1_ptr_write(emu, A_DBG, 0, (emu->fx8010.dbg = 0) | A_DBG_SINGLE_STEP); 1199 1200 #if 1 1201 /* PCM front Playback Volume (independent from stereo mix) 1202 * playback = 0 + ( gpr * FXBUS_PCM_LEFT_FRONT >> 31) 1203 * where gpr contains attenuation from corresponding mixer control 1204 * (snd_emu10k1_init_stereo_control) 1205 */ 1206 A_OP(icode, &ptr, iMAC0, A_GPR(playback), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_FRONT)); 1207 A_OP(icode, &ptr, iMAC0, A_GPR(playback+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_FRONT)); 1208 snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Front Playback Volume", gpr, 100); 1209 gpr += 2; 1210 1211 /* PCM Surround Playback (independent from stereo mix) */ 1212 A_OP(icode, &ptr, iMAC0, A_GPR(playback+2), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_REAR)); 1213 A_OP(icode, &ptr, iMAC0, A_GPR(playback+3), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_REAR)); 1214 snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Surround Playback Volume", gpr, 100); 1215 gpr += 2; 1216 1217 /* PCM Side Playback (independent from stereo mix) */ 1218 if (emu->card_capabilities->spk71) { 1219 A_OP(icode, &ptr, iMAC0, A_GPR(playback+6), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_SIDE)); 1220 A_OP(icode, &ptr, iMAC0, A_GPR(playback+7), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_SIDE)); 1221 snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Side Playback Volume", gpr, 100); 1222 gpr += 2; 1223 } 1224 1225 /* PCM Center Playback (independent from stereo mix) */ 1226 A_OP(icode, &ptr, iMAC0, A_GPR(playback+4), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_CENTER)); 1227 snd_emu10k1_init_mono_control(&controls[nctl++], "PCM Center Playback Volume", gpr, 100); 1228 gpr++; 1229 1230 /* PCM LFE Playback (independent from stereo mix) */ 1231 A_OP(icode, &ptr, iMAC0, A_GPR(playback+5), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LFE)); 1232 snd_emu10k1_init_mono_control(&controls[nctl++], "PCM LFE Playback Volume", gpr, 100); 1233 gpr++; 1234 1235 /* 1236 * Stereo Mix 1237 */ 1238 /* Wave (PCM) Playback Volume (will be renamed later) */ 1239 A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT)); 1240 A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT)); 1241 snd_emu10k1_init_stereo_control(&controls[nctl++], "Wave Playback Volume", gpr, 100); 1242 gpr += 2; 1243 1244 /* Synth Playback */ 1245 A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+0), A_GPR(stereo_mix+0), A_GPR(gpr), A_FXBUS(FXBUS_MIDI_LEFT)); 1246 A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+1), A_GPR(stereo_mix+1), A_GPR(gpr+1), A_FXBUS(FXBUS_MIDI_RIGHT)); 1247 snd_emu10k1_init_stereo_control(&controls[nctl++], "Synth Playback Volume", gpr, 100); 1248 gpr += 2; 1249 1250 /* Wave (PCM) Capture */ 1251 A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT)); 1252 A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT)); 1253 snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Capture Volume", gpr, 0); 1254 gpr += 2; 1255 1256 /* Synth Capture */ 1257 A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_GPR(capture+0), A_GPR(gpr), A_FXBUS(FXBUS_MIDI_LEFT)); 1258 A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_GPR(capture+1), A_GPR(gpr+1), A_FXBUS(FXBUS_MIDI_RIGHT)); 1259 snd_emu10k1_init_stereo_control(&controls[nctl++], "Synth Capture Volume", gpr, 0); 1260 gpr += 2; 1261 1262 /* 1263 * inputs 1264 */ 1265 #define A_ADD_VOLUME_IN(var,vol,input) \ 1266 A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input)) 1267 1268 /* emu1212 DSP 0 and DSP 1 Capture */ 1269 if (emu->card_capabilities->emu1010) { 1270 A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_GPR(capture+0), A_GPR(gpr), A_P16VIN(0x0)); 1271 A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_GPR(capture+1), A_GPR(gpr+1), A_P16VIN(0x1)); 1272 snd_emu10k1_init_stereo_control(&controls[nctl++], "EMU Capture Volume", gpr, 0); 1273 gpr += 2; 1274 } 1275 /* AC'97 Playback Volume - used only for mic (renamed later) */ 1276 A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_AC97_L); 1277 A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_AC97_R); 1278 snd_emu10k1_init_stereo_control(&controls[nctl++], "AMic Playback Volume", gpr, 0); 1279 gpr += 2; 1280 /* AC'97 Capture Volume - used only for mic */ 1281 A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_AC97_L); 1282 A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_AC97_R); 1283 snd_emu10k1_init_stereo_control(&controls[nctl++], "Mic Capture Volume", gpr, 0); 1284 gpr += 2; 1285 1286 /* mic capture buffer */ 1287 A_OP(icode, &ptr, iINTERP, A_EXTOUT(A_EXTOUT_MIC_CAP), A_EXTIN(A_EXTIN_AC97_L), 0xcd, A_EXTIN(A_EXTIN_AC97_R)); 1288 1289 /* Audigy CD Playback Volume */ 1290 A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_SPDIF_CD_L); 1291 A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_SPDIF_CD_R); 1292 snd_emu10k1_init_stereo_control(&controls[nctl++], 1293 emu->card_capabilities->ac97_chip ? "Audigy CD Playback Volume" : "CD Playback Volume", 1294 gpr, 0); 1295 gpr += 2; 1296 /* Audigy CD Capture Volume */ 1297 A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_SPDIF_CD_L); 1298 A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_SPDIF_CD_R); 1299 snd_emu10k1_init_stereo_control(&controls[nctl++], 1300 emu->card_capabilities->ac97_chip ? "Audigy CD Capture Volume" : "CD Capture Volume", 1301 gpr, 0); 1302 gpr += 2; 1303 1304 /* Optical SPDIF Playback Volume */ 1305 A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_OPT_SPDIF_L); 1306 A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_OPT_SPDIF_R); 1307 snd_emu10k1_init_stereo_control(&controls[nctl++], SNDRV_CTL_NAME_IEC958("Optical ",PLAYBACK,VOLUME), gpr, 0); 1308 gpr += 2; 1309 /* Optical SPDIF Capture Volume */ 1310 A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_OPT_SPDIF_L); 1311 A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_OPT_SPDIF_R); 1312 snd_emu10k1_init_stereo_control(&controls[nctl++], SNDRV_CTL_NAME_IEC958("Optical ",CAPTURE,VOLUME), gpr, 0); 1313 gpr += 2; 1314 1315 /* Line2 Playback Volume */ 1316 A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_LINE2_L); 1317 A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_LINE2_R); 1318 snd_emu10k1_init_stereo_control(&controls[nctl++], 1319 emu->card_capabilities->ac97_chip ? "Line2 Playback Volume" : "Line Playback Volume", 1320 gpr, 0); 1321 gpr += 2; 1322 /* Line2 Capture Volume */ 1323 A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_LINE2_L); 1324 A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_LINE2_R); 1325 snd_emu10k1_init_stereo_control(&controls[nctl++], 1326 emu->card_capabilities->ac97_chip ? "Line2 Capture Volume" : "Line Capture Volume", 1327 gpr, 0); 1328 gpr += 2; 1329 1330 /* Philips ADC Playback Volume */ 1331 A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_ADC_L); 1332 A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_ADC_R); 1333 snd_emu10k1_init_stereo_control(&controls[nctl++], "Analog Mix Playback Volume", gpr, 0); 1334 gpr += 2; 1335 /* Philips ADC Capture Volume */ 1336 A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_ADC_L); 1337 A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_ADC_R); 1338 snd_emu10k1_init_stereo_control(&controls[nctl++], "Analog Mix Capture Volume", gpr, 0); 1339 gpr += 2; 1340 1341 /* Aux2 Playback Volume */ 1342 A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_AUX2_L); 1343 A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_AUX2_R); 1344 snd_emu10k1_init_stereo_control(&controls[nctl++], 1345 emu->card_capabilities->ac97_chip ? "Aux2 Playback Volume" : "Aux Playback Volume", 1346 gpr, 0); 1347 gpr += 2; 1348 /* Aux2 Capture Volume */ 1349 A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_AUX2_L); 1350 A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_AUX2_R); 1351 snd_emu10k1_init_stereo_control(&controls[nctl++], 1352 emu->card_capabilities->ac97_chip ? "Aux2 Capture Volume" : "Aux Capture Volume", 1353 gpr, 0); 1354 gpr += 2; 1355 1356 /* Stereo Mix Front Playback Volume */ 1357 A_OP(icode, &ptr, iMAC0, A_GPR(playback), A_GPR(playback), A_GPR(gpr), A_GPR(stereo_mix)); 1358 A_OP(icode, &ptr, iMAC0, A_GPR(playback+1), A_GPR(playback+1), A_GPR(gpr+1), A_GPR(stereo_mix+1)); 1359 snd_emu10k1_init_stereo_control(&controls[nctl++], "Front Playback Volume", gpr, 100); 1360 gpr += 2; 1361 1362 /* Stereo Mix Surround Playback */ 1363 A_OP(icode, &ptr, iMAC0, A_GPR(playback+2), A_GPR(playback+2), A_GPR(gpr), A_GPR(stereo_mix)); 1364 A_OP(icode, &ptr, iMAC0, A_GPR(playback+3), A_GPR(playback+3), A_GPR(gpr+1), A_GPR(stereo_mix+1)); 1365 snd_emu10k1_init_stereo_control(&controls[nctl++], "Surround Playback Volume", gpr, 0); 1366 gpr += 2; 1367 1368 /* Stereo Mix Center Playback */ 1369 /* Center = sub = Left/2 + Right/2 */ 1370 A_OP(icode, &ptr, iINTERP, A_GPR(tmp), A_GPR(stereo_mix), 0xcd, A_GPR(stereo_mix+1)); 1371 A_OP(icode, &ptr, iMAC0, A_GPR(playback+4), A_GPR(playback+4), A_GPR(gpr), A_GPR(tmp)); 1372 snd_emu10k1_init_mono_control(&controls[nctl++], "Center Playback Volume", gpr, 0); 1373 gpr++; 1374 1375 /* Stereo Mix LFE Playback */ 1376 A_OP(icode, &ptr, iMAC0, A_GPR(playback+5), A_GPR(playback+5), A_GPR(gpr), A_GPR(tmp)); 1377 snd_emu10k1_init_mono_control(&controls[nctl++], "LFE Playback Volume", gpr, 0); 1378 gpr++; 1379 1380 if (emu->card_capabilities->spk71) { 1381 /* Stereo Mix Side Playback */ 1382 A_OP(icode, &ptr, iMAC0, A_GPR(playback+6), A_GPR(playback+6), A_GPR(gpr), A_GPR(stereo_mix)); 1383 A_OP(icode, &ptr, iMAC0, A_GPR(playback+7), A_GPR(playback+7), A_GPR(gpr+1), A_GPR(stereo_mix+1)); 1384 snd_emu10k1_init_stereo_control(&controls[nctl++], "Side Playback Volume", gpr, 0); 1385 gpr += 2; 1386 } 1387 1388 /* 1389 * outputs 1390 */ 1391 #define A_PUT_OUTPUT(out,src) A_OP(icode, &ptr, iACC3, A_EXTOUT(out), A_C_00000000, A_C_00000000, A_GPR(src)) 1392 #define A_PUT_STEREO_OUTPUT(out1,out2,src) \ 1393 {A_PUT_OUTPUT(out1,src); A_PUT_OUTPUT(out2,src+1);} 1394 1395 #define _A_SWITCH(icode, ptr, dst, src, sw) \ 1396 A_OP((icode), ptr, iMACINT0, dst, A_C_00000000, src, sw); 1397 #define A_SWITCH(icode, ptr, dst, src, sw) \ 1398 _A_SWITCH(icode, ptr, A_GPR(dst), A_GPR(src), A_GPR(sw)) 1399 #define _A_SWITCH_NEG(icode, ptr, dst, src) \ 1400 A_OP((icode), ptr, iANDXOR, dst, src, A_C_00000001, A_C_00000001); 1401 #define A_SWITCH_NEG(icode, ptr, dst, src) \ 1402 _A_SWITCH_NEG(icode, ptr, A_GPR(dst), A_GPR(src)) 1403 1404 1405 /* 1406 * Process tone control 1407 */ 1408 A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), A_GPR(playback + 0), A_C_00000000, A_C_00000000); /* left */ 1409 A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), A_GPR(playback + 1), A_C_00000000, A_C_00000000); /* right */ 1410 A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2), A_GPR(playback + 2), A_C_00000000, A_C_00000000); /* rear left */ 1411 A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 3), A_GPR(playback + 3), A_C_00000000, A_C_00000000); /* rear right */ 1412 A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), A_GPR(playback + 4), A_C_00000000, A_C_00000000); /* center */ 1413 A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), A_GPR(playback + 5), A_C_00000000, A_C_00000000); /* LFE */ 1414 if (emu->card_capabilities->spk71) { 1415 A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 6), A_GPR(playback + 6), A_C_00000000, A_C_00000000); /* side left */ 1416 A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 7), A_GPR(playback + 7), A_C_00000000, A_C_00000000); /* side right */ 1417 } 1418 1419 1420 ctl = &controls[nctl + 0]; 1421 ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; 1422 strcpy(ctl->id.name, "Tone Control - Bass"); 1423 ctl->vcount = 2; 1424 ctl->count = 10; 1425 ctl->min = 0; 1426 ctl->max = 40; 1427 ctl->value[0] = ctl->value[1] = 20; 1428 ctl->translation = EMU10K1_GPR_TRANSLATION_BASS; 1429 ctl = &controls[nctl + 1]; 1430 ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; 1431 strcpy(ctl->id.name, "Tone Control - Treble"); 1432 ctl->vcount = 2; 1433 ctl->count = 10; 1434 ctl->min = 0; 1435 ctl->max = 40; 1436 ctl->value[0] = ctl->value[1] = 20; 1437 ctl->translation = EMU10K1_GPR_TRANSLATION_TREBLE; 1438 1439 #define BASS_GPR 0x8c 1440 #define TREBLE_GPR 0x96 1441 1442 for (z = 0; z < 5; z++) { 1443 int j; 1444 for (j = 0; j < 2; j++) { 1445 controls[nctl + 0].gpr[z * 2 + j] = BASS_GPR + z * 2 + j; 1446 controls[nctl + 1].gpr[z * 2 + j] = TREBLE_GPR + z * 2 + j; 1447 } 1448 } 1449 for (z = 0; z < 4; z++) { /* front/rear/center-lfe/side */ 1450 int j, k, l, d; 1451 for (j = 0; j < 2; j++) { /* left/right */ 1452 k = 0xb0 + (z * 8) + (j * 4); 1453 l = 0xe0 + (z * 8) + (j * 4); 1454 d = playback + SND_EMU10K1_PLAYBACK_CHANNELS + z * 2 + j; 1455 1456 A_OP(icode, &ptr, iMAC0, A_C_00000000, A_C_00000000, A_GPR(d), A_GPR(BASS_GPR + 0 + j)); 1457 A_OP(icode, &ptr, iMACMV, A_GPR(k+1), A_GPR(k), A_GPR(k+1), A_GPR(BASS_GPR + 4 + j)); 1458 A_OP(icode, &ptr, iMACMV, A_GPR(k), A_GPR(d), A_GPR(k), A_GPR(BASS_GPR + 2 + j)); 1459 A_OP(icode, &ptr, iMACMV, A_GPR(k+3), A_GPR(k+2), A_GPR(k+3), A_GPR(BASS_GPR + 8 + j)); 1460 A_OP(icode, &ptr, iMAC0, A_GPR(k+2), A_GPR_ACCU, A_GPR(k+2), A_GPR(BASS_GPR + 6 + j)); 1461 A_OP(icode, &ptr, iACC3, A_GPR(k+2), A_GPR(k+2), A_GPR(k+2), A_C_00000000); 1462 1463 A_OP(icode, &ptr, iMAC0, A_C_00000000, A_C_00000000, A_GPR(k+2), A_GPR(TREBLE_GPR + 0 + j)); 1464 A_OP(icode, &ptr, iMACMV, A_GPR(l+1), A_GPR(l), A_GPR(l+1), A_GPR(TREBLE_GPR + 4 + j)); 1465 A_OP(icode, &ptr, iMACMV, A_GPR(l), A_GPR(k+2), A_GPR(l), A_GPR(TREBLE_GPR + 2 + j)); 1466 A_OP(icode, &ptr, iMACMV, A_GPR(l+3), A_GPR(l+2), A_GPR(l+3), A_GPR(TREBLE_GPR + 8 + j)); 1467 A_OP(icode, &ptr, iMAC0, A_GPR(l+2), A_GPR_ACCU, A_GPR(l+2), A_GPR(TREBLE_GPR + 6 + j)); 1468 A_OP(icode, &ptr, iMACINT0, A_GPR(l+2), A_C_00000000, A_GPR(l+2), A_C_00000010); 1469 1470 A_OP(icode, &ptr, iACC3, A_GPR(d), A_GPR(l+2), A_C_00000000, A_C_00000000); 1471 1472 if (z == 2) /* center */ 1473 break; 1474 } 1475 } 1476 nctl += 2; 1477 1478 #undef BASS_GPR 1479 #undef TREBLE_GPR 1480 1481 for (z = 0; z < 8; z++) { 1482 A_SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, gpr + 0); 1483 A_SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 0); 1484 A_SWITCH(icode, &ptr, tmp + 1, playback + z, tmp + 1); 1485 A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000); 1486 } 1487 snd_emu10k1_init_stereo_onoff_control(controls + nctl++, "Tone Control - Switch", gpr, 0); 1488 gpr += 2; 1489 1490 /* Master volume (will be renamed later) */ 1491 A_OP(icode, &ptr, iMAC0, A_GPR(playback+0+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+0+SND_EMU10K1_PLAYBACK_CHANNELS)); 1492 A_OP(icode, &ptr, iMAC0, A_GPR(playback+1+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+1+SND_EMU10K1_PLAYBACK_CHANNELS)); 1493 A_OP(icode, &ptr, iMAC0, A_GPR(playback+2+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+2+SND_EMU10K1_PLAYBACK_CHANNELS)); 1494 A_OP(icode, &ptr, iMAC0, A_GPR(playback+3+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+3+SND_EMU10K1_PLAYBACK_CHANNELS)); 1495 A_OP(icode, &ptr, iMAC0, A_GPR(playback+4+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+4+SND_EMU10K1_PLAYBACK_CHANNELS)); 1496 A_OP(icode, &ptr, iMAC0, A_GPR(playback+5+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+5+SND_EMU10K1_PLAYBACK_CHANNELS)); 1497 A_OP(icode, &ptr, iMAC0, A_GPR(playback+6+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+6+SND_EMU10K1_PLAYBACK_CHANNELS)); 1498 A_OP(icode, &ptr, iMAC0, A_GPR(playback+7+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+7+SND_EMU10K1_PLAYBACK_CHANNELS)); 1499 snd_emu10k1_init_mono_control(&controls[nctl++], "Wave Master Playback Volume", gpr, 0); 1500 gpr += 2; 1501 1502 /* analog speakers */ 1503 A_PUT_STEREO_OUTPUT(A_EXTOUT_AFRONT_L, A_EXTOUT_AFRONT_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS); 1504 A_PUT_STEREO_OUTPUT(A_EXTOUT_AREAR_L, A_EXTOUT_AREAR_R, playback+2 + SND_EMU10K1_PLAYBACK_CHANNELS); 1505 A_PUT_OUTPUT(A_EXTOUT_ACENTER, playback+4 + SND_EMU10K1_PLAYBACK_CHANNELS); 1506 A_PUT_OUTPUT(A_EXTOUT_ALFE, playback+5 + SND_EMU10K1_PLAYBACK_CHANNELS); 1507 if (emu->card_capabilities->spk71) 1508 A_PUT_STEREO_OUTPUT(A_EXTOUT_ASIDE_L, A_EXTOUT_ASIDE_R, playback+6 + SND_EMU10K1_PLAYBACK_CHANNELS); 1509 1510 /* headphone */ 1511 A_PUT_STEREO_OUTPUT(A_EXTOUT_HEADPHONE_L, A_EXTOUT_HEADPHONE_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS); 1512 1513 /* digital outputs */ 1514 /* A_PUT_STEREO_OUTPUT(A_EXTOUT_FRONT_L, A_EXTOUT_FRONT_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS); */ 1515 if (emu->card_capabilities->emu1010) { 1516 /* EMU1010 Outputs from PCM Front, Rear, Center, LFE, Side */ 1517 snd_printk("EMU outputs on\n"); 1518 for (z = 0; z < 8; z++) { 1519 A_OP(icode, &ptr, iACC3, A_EMU32OUTL(z), A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), A_C_00000000, A_C_00000000); 1520 } 1521 } 1522 1523 /* IEC958 Optical Raw Playback Switch */ 1524 gpr_map[gpr++] = 0; 1525 gpr_map[gpr++] = 0x1008; 1526 gpr_map[gpr++] = 0xffff0000; 1527 for (z = 0; z < 2; z++) { 1528 A_OP(icode, &ptr, iMAC0, A_GPR(tmp + 2), A_FXBUS(FXBUS_PT_LEFT + z), A_C_00000000, A_C_00000000); 1529 A_OP(icode, &ptr, iSKIP, A_GPR_COND, A_GPR_COND, A_GPR(gpr - 2), A_C_00000001); 1530 A_OP(icode, &ptr, iACC3, A_GPR(tmp + 2), A_C_00000000, A_C_00010000, A_GPR(tmp + 2)); 1531 A_OP(icode, &ptr, iANDXOR, A_GPR(tmp + 2), A_GPR(tmp + 2), A_GPR(gpr - 1), A_C_00000000); 1532 A_SWITCH(icode, &ptr, tmp + 0, tmp + 2, gpr + z); 1533 A_SWITCH_NEG(icode, &ptr, tmp + 1, gpr + z); 1534 A_SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1); 1535 if ((z==1) && (emu->card_capabilities->spdif_bug)) { 1536 /* Due to a SPDIF output bug on some Audigy cards, this code delays the Right channel by 1 sample */ 1537 snd_printk(KERN_INFO "Installing spdif_bug patch: %s\n", emu->card_capabilities->name); 1538 A_OP(icode, &ptr, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L + z), A_GPR(gpr - 3), A_C_00000000, A_C_00000000); 1539 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 3), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000); 1540 } else { 1541 A_OP(icode, &ptr, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L + z), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000); 1542 } 1543 } 1544 snd_emu10k1_init_stereo_onoff_control(controls + nctl++, SNDRV_CTL_NAME_IEC958("Optical Raw ",PLAYBACK,SWITCH), gpr, 0); 1545 gpr += 2; 1546 1547 A_PUT_STEREO_OUTPUT(A_EXTOUT_REAR_L, A_EXTOUT_REAR_R, playback+2 + SND_EMU10K1_PLAYBACK_CHANNELS); 1548 A_PUT_OUTPUT(A_EXTOUT_CENTER, playback+4 + SND_EMU10K1_PLAYBACK_CHANNELS); 1549 A_PUT_OUTPUT(A_EXTOUT_LFE, playback+5 + SND_EMU10K1_PLAYBACK_CHANNELS); 1550 1551 /* ADC buffer */ 1552 #ifdef EMU10K1_CAPTURE_DIGITAL_OUT 1553 A_PUT_STEREO_OUTPUT(A_EXTOUT_ADC_CAP_L, A_EXTOUT_ADC_CAP_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS); 1554 #else 1555 A_PUT_OUTPUT(A_EXTOUT_ADC_CAP_L, capture); 1556 A_PUT_OUTPUT(A_EXTOUT_ADC_CAP_R, capture+1); 1557 #endif 1558 1559 if (emu->card_capabilities->emu1010) { 1560 snd_printk("EMU inputs on\n"); 1561 /* Capture 16 (originally 8) channels of S32_LE sound */ 1562 1563 /* printk("emufx.c: gpr=0x%x, tmp=0x%x\n",gpr, tmp); */ 1564 /* For the EMU1010: How to get 32bit values from the DSP. High 16bits into L, low 16bits into R. */ 1565 /* A_P16VIN(0) is delayed by one sample, 1566 * so all other A_P16VIN channels will need to also be delayed 1567 */ 1568 /* Left ADC in. 1 of 2 */ 1569 snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_P16VIN(0x0), A_FXBUS2(0) ); 1570 /* Right ADC in 1 of 2 */ 1571 gpr_map[gpr++] = 0x00000000; 1572 /* Delaying by one sample: instead of copying the input 1573 * value A_P16VIN to output A_FXBUS2 as in the first channel, 1574 * we use an auxiliary register, delaying the value by one 1575 * sample 1576 */ 1577 snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(2) ); 1578 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x1), A_C_00000000, A_C_00000000); 1579 gpr_map[gpr++] = 0x00000000; 1580 snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(4) ); 1581 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x2), A_C_00000000, A_C_00000000); 1582 gpr_map[gpr++] = 0x00000000; 1583 snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(6) ); 1584 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x3), A_C_00000000, A_C_00000000); 1585 /* For 96kHz mode */ 1586 /* Left ADC in. 2 of 2 */ 1587 gpr_map[gpr++] = 0x00000000; 1588 snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(0x8) ); 1589 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x4), A_C_00000000, A_C_00000000); 1590 /* Right ADC in 2 of 2 */ 1591 gpr_map[gpr++] = 0x00000000; 1592 snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(0xa) ); 1593 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x5), A_C_00000000, A_C_00000000); 1594 gpr_map[gpr++] = 0x00000000; 1595 snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(0xc) ); 1596 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x6), A_C_00000000, A_C_00000000); 1597 gpr_map[gpr++] = 0x00000000; 1598 snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(0xe) ); 1599 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x7), A_C_00000000, A_C_00000000); 1600 /* Pavel Hofman - we still have voices, A_FXBUS2s, and 1601 * A_P16VINs available - 1602 * let's add 8 more capture channels - total of 16 1603 */ 1604 gpr_map[gpr++] = 0x00000000; 1605 snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp, 1606 bit_shifter16, 1607 A_GPR(gpr - 1), 1608 A_FXBUS2(0x10)); 1609 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x8), 1610 A_C_00000000, A_C_00000000); 1611 gpr_map[gpr++] = 0x00000000; 1612 snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp, 1613 bit_shifter16, 1614 A_GPR(gpr - 1), 1615 A_FXBUS2(0x12)); 1616 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x9), 1617 A_C_00000000, A_C_00000000); 1618 gpr_map[gpr++] = 0x00000000; 1619 snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp, 1620 bit_shifter16, 1621 A_GPR(gpr - 1), 1622 A_FXBUS2(0x14)); 1623 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xa), 1624 A_C_00000000, A_C_00000000); 1625 gpr_map[gpr++] = 0x00000000; 1626 snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp, 1627 bit_shifter16, 1628 A_GPR(gpr - 1), 1629 A_FXBUS2(0x16)); 1630 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xb), 1631 A_C_00000000, A_C_00000000); 1632 gpr_map[gpr++] = 0x00000000; 1633 snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp, 1634 bit_shifter16, 1635 A_GPR(gpr - 1), 1636 A_FXBUS2(0x18)); 1637 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xc), 1638 A_C_00000000, A_C_00000000); 1639 gpr_map[gpr++] = 0x00000000; 1640 snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp, 1641 bit_shifter16, 1642 A_GPR(gpr - 1), 1643 A_FXBUS2(0x1a)); 1644 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xd), 1645 A_C_00000000, A_C_00000000); 1646 gpr_map[gpr++] = 0x00000000; 1647 snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp, 1648 bit_shifter16, 1649 A_GPR(gpr - 1), 1650 A_FXBUS2(0x1c)); 1651 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xe), 1652 A_C_00000000, A_C_00000000); 1653 gpr_map[gpr++] = 0x00000000; 1654 snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp, 1655 bit_shifter16, 1656 A_GPR(gpr - 1), 1657 A_FXBUS2(0x1e)); 1658 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xf), 1659 A_C_00000000, A_C_00000000); 1660 1661 #if 0 1662 for (z = 4; z < 8; z++) { 1663 A_OP(icode, &ptr, iACC3, A_FXBUS2(z), A_C_00000000, A_C_00000000, A_C_00000000); 1664 } 1665 for (z = 0xc; z < 0x10; z++) { 1666 A_OP(icode, &ptr, iACC3, A_FXBUS2(z), A_C_00000000, A_C_00000000, A_C_00000000); 1667 } 1668 #endif 1669 } else { 1670 /* EFX capture - capture the 16 EXTINs */ 1671 /* Capture 16 channels of S16_LE sound */ 1672 for (z = 0; z < 16; z++) { 1673 A_OP(icode, &ptr, iACC3, A_FXBUS2(z), A_C_00000000, A_C_00000000, A_EXTIN(z)); 1674 } 1675 } 1676 1677 #endif /* JCD test */ 1678 /* 1679 * ok, set up done.. 1680 */ 1681 1682 if (gpr > tmp) { 1683 snd_BUG(); 1684 err = -EIO; 1685 goto __err; 1686 } 1687 /* clear remaining instruction memory */ 1688 while (ptr < 0x400) 1689 A_OP(icode, &ptr, 0x0f, 0xc0, 0xc0, 0xcf, 0xc0); 1690 1691 seg = snd_enter_user(); 1692 icode->gpr_add_control_count = nctl; 1693 icode->gpr_add_controls = (struct snd_emu10k1_fx8010_control_gpr __user *)controls; 1694 emu->support_tlv = 1; /* support TLV */ 1695 err = snd_emu10k1_icode_poke(emu, icode); 1696 emu->support_tlv = 0; /* clear again */ 1697 snd_leave_user(seg); 1698 1699 __err: 1700 kfree(controls); 1701 if (icode != NULL) { 1702 kfree((void __force *)icode->gpr_map); 1703 kfree(icode); 1704 } 1705 return err; 1706 } 1707 1708 1709 /* 1710 * initial DSP configuration for Emu10k1 1711 */ 1712 1713 /* when volume = max, then copy only to avoid volume modification */ 1714 /* with iMAC0 (negative values) */ 1715 static void __devinit _volume(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol) 1716 { 1717 OP(icode, ptr, iMAC0, dst, C_00000000, src, vol); 1718 OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff); 1719 OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000001); 1720 OP(icode, ptr, iACC3, dst, src, C_00000000, C_00000000); 1721 } 1722 static void __devinit _volume_add(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol) 1723 { 1724 OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff); 1725 OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002); 1726 OP(icode, ptr, iMACINT0, dst, dst, src, C_00000001); 1727 OP(icode, ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000001); 1728 OP(icode, ptr, iMAC0, dst, dst, src, vol); 1729 } 1730 static void __devinit _volume_out(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol) 1731 { 1732 OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff); 1733 OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002); 1734 OP(icode, ptr, iACC3, dst, src, C_00000000, C_00000000); 1735 OP(icode, ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000001); 1736 OP(icode, ptr, iMAC0, dst, C_00000000, src, vol); 1737 } 1738 1739 #define VOLUME(icode, ptr, dst, src, vol) \ 1740 _volume(icode, ptr, GPR(dst), GPR(src), GPR(vol)) 1741 #define VOLUME_IN(icode, ptr, dst, src, vol) \ 1742 _volume(icode, ptr, GPR(dst), EXTIN(src), GPR(vol)) 1743 #define VOLUME_ADD(icode, ptr, dst, src, vol) \ 1744 _volume_add(icode, ptr, GPR(dst), GPR(src), GPR(vol)) 1745 #define VOLUME_ADDIN(icode, ptr, dst, src, vol) \ 1746 _volume_add(icode, ptr, GPR(dst), EXTIN(src), GPR(vol)) 1747 #define VOLUME_OUT(icode, ptr, dst, src, vol) \ 1748 _volume_out(icode, ptr, EXTOUT(dst), GPR(src), GPR(vol)) 1749 #define _SWITCH(icode, ptr, dst, src, sw) \ 1750 OP((icode), ptr, iMACINT0, dst, C_00000000, src, sw); 1751 #define SWITCH(icode, ptr, dst, src, sw) \ 1752 _SWITCH(icode, ptr, GPR(dst), GPR(src), GPR(sw)) 1753 #define SWITCH_IN(icode, ptr, dst, src, sw) \ 1754 _SWITCH(icode, ptr, GPR(dst), EXTIN(src), GPR(sw)) 1755 #define _SWITCH_NEG(icode, ptr, dst, src) \ 1756 OP((icode), ptr, iANDXOR, dst, src, C_00000001, C_00000001); 1757 #define SWITCH_NEG(icode, ptr, dst, src) \ 1758 _SWITCH_NEG(icode, ptr, GPR(dst), GPR(src)) 1759 1760 1761 static int __devinit _snd_emu10k1_init_efx(struct snd_emu10k1 *emu) 1762 { 1763 int err, i, z, gpr, tmp, playback, capture; 1764 u32 ptr; 1765 struct snd_emu10k1_fx8010_code *icode; 1766 struct snd_emu10k1_fx8010_pcm_rec *ipcm = NULL; 1767 struct snd_emu10k1_fx8010_control_gpr *controls = NULL, *ctl; 1768 u32 *gpr_map; 1769 mm_segment_t seg; 1770 1771 if ((icode = kzalloc(sizeof(*icode), GFP_KERNEL)) == NULL) 1772 return -ENOMEM; 1773 if ((icode->gpr_map = (u_int32_t __user *) 1774 kcalloc(256 + 160 + 160 + 2 * 512, sizeof(u_int32_t), 1775 GFP_KERNEL)) == NULL || 1776 (controls = kcalloc(SND_EMU10K1_GPR_CONTROLS, 1777 sizeof(struct snd_emu10k1_fx8010_control_gpr), 1778 GFP_KERNEL)) == NULL || 1779 (ipcm = kzalloc(sizeof(*ipcm), GFP_KERNEL)) == NULL) { 1780 err = -ENOMEM; 1781 goto __err; 1782 } 1783 gpr_map = (u32 __force *)icode->gpr_map; 1784 1785 icode->tram_data_map = icode->gpr_map + 256; 1786 icode->tram_addr_map = icode->tram_data_map + 160; 1787 icode->code = icode->tram_addr_map + 160; 1788 1789 /* clear free GPRs */ 1790 for (i = 0; i < 256; i++) 1791 set_bit(i, icode->gpr_valid); 1792 1793 /* clear TRAM data & address lines */ 1794 for (i = 0; i < 160; i++) 1795 set_bit(i, icode->tram_valid); 1796 1797 strcpy(icode->name, "SB Live! FX8010 code for ALSA v1.2 by Jaroslav Kysela"); 1798 ptr = 0; i = 0; 1799 /* we have 12 inputs */ 1800 playback = SND_EMU10K1_INPUTS; 1801 /* we have 6 playback channels and tone control doubles */ 1802 capture = playback + (SND_EMU10K1_PLAYBACK_CHANNELS * 2); 1803 gpr = capture + SND_EMU10K1_CAPTURE_CHANNELS; 1804 tmp = 0x88; /* we need 4 temporary GPR */ 1805 /* from 0x8c to 0xff is the area for tone control */ 1806 1807 /* stop FX processor */ 1808 snd_emu10k1_ptr_write(emu, DBG, 0, (emu->fx8010.dbg = 0) | EMU10K1_DBG_SINGLE_STEP); 1809 1810 /* 1811 * Process FX Buses 1812 */ 1813 OP(icode, &ptr, iMACINT0, GPR(0), C_00000000, FXBUS(FXBUS_PCM_LEFT), C_00000004); 1814 OP(icode, &ptr, iMACINT0, GPR(1), C_00000000, FXBUS(FXBUS_PCM_RIGHT), C_00000004); 1815 OP(icode, &ptr, iMACINT0, GPR(2), C_00000000, FXBUS(FXBUS_MIDI_LEFT), C_00000004); 1816 OP(icode, &ptr, iMACINT0, GPR(3), C_00000000, FXBUS(FXBUS_MIDI_RIGHT), C_00000004); 1817 OP(icode, &ptr, iMACINT0, GPR(4), C_00000000, FXBUS(FXBUS_PCM_LEFT_REAR), C_00000004); 1818 OP(icode, &ptr, iMACINT0, GPR(5), C_00000000, FXBUS(FXBUS_PCM_RIGHT_REAR), C_00000004); 1819 OP(icode, &ptr, iMACINT0, GPR(6), C_00000000, FXBUS(FXBUS_PCM_CENTER), C_00000004); 1820 OP(icode, &ptr, iMACINT0, GPR(7), C_00000000, FXBUS(FXBUS_PCM_LFE), C_00000004); 1821 OP(icode, &ptr, iMACINT0, GPR(8), C_00000000, C_00000000, C_00000000); /* S/PDIF left */ 1822 OP(icode, &ptr, iMACINT0, GPR(9), C_00000000, C_00000000, C_00000000); /* S/PDIF right */ 1823 OP(icode, &ptr, iMACINT0, GPR(10), C_00000000, FXBUS(FXBUS_PCM_LEFT_FRONT), C_00000004); 1824 OP(icode, &ptr, iMACINT0, GPR(11), C_00000000, FXBUS(FXBUS_PCM_RIGHT_FRONT), C_00000004); 1825 1826 /* Raw S/PDIF PCM */ 1827 ipcm->substream = 0; 1828 ipcm->channels = 2; 1829 ipcm->tram_start = 0; 1830 ipcm->buffer_size = (64 * 1024) / 2; 1831 ipcm->gpr_size = gpr++; 1832 ipcm->gpr_ptr = gpr++; 1833 ipcm->gpr_count = gpr++; 1834 ipcm->gpr_tmpcount = gpr++; 1835 ipcm->gpr_trigger = gpr++; 1836 ipcm->gpr_running = gpr++; 1837 ipcm->etram[0] = 0; 1838 ipcm->etram[1] = 1; 1839 1840 gpr_map[gpr + 0] = 0xfffff000; 1841 gpr_map[gpr + 1] = 0xffff0000; 1842 gpr_map[gpr + 2] = 0x70000000; 1843 gpr_map[gpr + 3] = 0x00000007; 1844 gpr_map[gpr + 4] = 0x001f << 11; 1845 gpr_map[gpr + 5] = 0x001c << 11; 1846 gpr_map[gpr + 6] = (0x22 - 0x01) - 1; /* skip at 01 to 22 */ 1847 gpr_map[gpr + 7] = (0x22 - 0x06) - 1; /* skip at 06 to 22 */ 1848 gpr_map[gpr + 8] = 0x2000000 + (2<<11); 1849 gpr_map[gpr + 9] = 0x4000000 + (2<<11); 1850 gpr_map[gpr + 10] = 1<<11; 1851 gpr_map[gpr + 11] = (0x24 - 0x0a) - 1; /* skip at 0a to 24 */ 1852 gpr_map[gpr + 12] = 0; 1853 1854 /* if the trigger flag is not set, skip */ 1855 /* 00: */ OP(icode, &ptr, iMAC0, C_00000000, GPR(ipcm->gpr_trigger), C_00000000, C_00000000); 1856 /* 01: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_ZERO, GPR(gpr + 6)); 1857 /* if the running flag is set, we're running */ 1858 /* 02: */ OP(icode, &ptr, iMAC0, C_00000000, GPR(ipcm->gpr_running), C_00000000, C_00000000); 1859 /* 03: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000004); 1860 /* wait until ((GPR_DBAC>>11) & 0x1f) == 0x1c) */ 1861 /* 04: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), GPR_DBAC, GPR(gpr + 4), C_00000000); 1862 /* 05: */ OP(icode, &ptr, iMACINT0, C_00000000, GPR(tmp + 0), C_ffffffff, GPR(gpr + 5)); 1863 /* 06: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, GPR(gpr + 7)); 1864 /* 07: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), C_00000010, C_00000001, C_00000000); 1865 1866 /* 08: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00000000, C_00000001); 1867 /* 09: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), GPR(gpr + 12), C_ffffffff, C_00000000); 1868 /* 0a: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, GPR(gpr + 11)); 1869 /* 0b: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), C_00000001, C_00000000, C_00000000); 1870 1871 /* 0c: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), ETRAM_DATA(ipcm->etram[0]), GPR(gpr + 0), C_00000000); 1872 /* 0d: */ OP(icode, &ptr, iLOG, GPR(tmp + 0), GPR(tmp + 0), GPR(gpr + 3), C_00000000); 1873 /* 0e: */ OP(icode, &ptr, iANDXOR, GPR(8), GPR(tmp + 0), GPR(gpr + 1), GPR(gpr + 2)); 1874 /* 0f: */ OP(icode, &ptr, iSKIP, C_00000000, GPR_COND, CC_REG_MINUS, C_00000001); 1875 /* 10: */ OP(icode, &ptr, iANDXOR, GPR(8), GPR(8), GPR(gpr + 1), GPR(gpr + 2)); 1876 1877 /* 11: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), ETRAM_DATA(ipcm->etram[1]), GPR(gpr + 0), C_00000000); 1878 /* 12: */ OP(icode, &ptr, iLOG, GPR(tmp + 0), GPR(tmp + 0), GPR(gpr + 3), C_00000000); 1879 /* 13: */ OP(icode, &ptr, iANDXOR, GPR(9), GPR(tmp + 0), GPR(gpr + 1), GPR(gpr + 2)); 1880 /* 14: */ OP(icode, &ptr, iSKIP, C_00000000, GPR_COND, CC_REG_MINUS, C_00000001); 1881 /* 15: */ OP(icode, &ptr, iANDXOR, GPR(9), GPR(9), GPR(gpr + 1), GPR(gpr + 2)); 1882 1883 /* 16: */ OP(icode, &ptr, iACC3, GPR(tmp + 0), GPR(ipcm->gpr_ptr), C_00000001, C_00000000); 1884 /* 17: */ OP(icode, &ptr, iMACINT0, C_00000000, GPR(tmp + 0), C_ffffffff, GPR(ipcm->gpr_size)); 1885 /* 18: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_MINUS, C_00000001); 1886 /* 19: */ OP(icode, &ptr, iACC3, GPR(tmp + 0), C_00000000, C_00000000, C_00000000); 1887 /* 1a: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_ptr), GPR(tmp + 0), C_00000000, C_00000000); 1888 1889 /* 1b: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_tmpcount), GPR(ipcm->gpr_tmpcount), C_ffffffff, C_00000000); 1890 /* 1c: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002); 1891 /* 1d: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_tmpcount), GPR(ipcm->gpr_count), C_00000000, C_00000000); 1892 /* 1e: */ OP(icode, &ptr, iACC3, GPR_IRQ, C_80000000, C_00000000, C_00000000); 1893 /* 1f: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00000001, C_00010000); 1894 1895 /* 20: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00010000, C_00000001); 1896 /* 21: */ OP(icode, &ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000002); 1897 1898 /* 22: */ OP(icode, &ptr, iMACINT1, ETRAM_ADDR(ipcm->etram[0]), GPR(gpr + 8), GPR_DBAC, C_ffffffff); 1899 /* 23: */ OP(icode, &ptr, iMACINT1, ETRAM_ADDR(ipcm->etram[1]), GPR(gpr + 9), GPR_DBAC, C_ffffffff); 1900 1901 /* 24: */ 1902 gpr += 13; 1903 1904 /* Wave Playback Volume */ 1905 for (z = 0; z < 2; z++) 1906 VOLUME(icode, &ptr, playback + z, z, gpr + z); 1907 snd_emu10k1_init_stereo_control(controls + i++, "Wave Playback Volume", gpr, 100); 1908 gpr += 2; 1909 1910 /* Wave Surround Playback Volume */ 1911 for (z = 0; z < 2; z++) 1912 VOLUME(icode, &ptr, playback + 2 + z, z, gpr + z); 1913 snd_emu10k1_init_stereo_control(controls + i++, "Wave Surround Playback Volume", gpr, 0); 1914 gpr += 2; 1915 1916 /* Wave Center/LFE Playback Volume */ 1917 OP(icode, &ptr, iACC3, GPR(tmp + 0), FXBUS(FXBUS_PCM_LEFT), FXBUS(FXBUS_PCM_RIGHT), C_00000000); 1918 OP(icode, &ptr, iMACINT0, GPR(tmp + 0), C_00000000, GPR(tmp + 0), C_00000002); 1919 VOLUME(icode, &ptr, playback + 4, tmp + 0, gpr); 1920 snd_emu10k1_init_mono_control(controls + i++, "Wave Center Playback Volume", gpr++, 0); 1921 VOLUME(icode, &ptr, playback + 5, tmp + 0, gpr); 1922 snd_emu10k1_init_mono_control(controls + i++, "Wave LFE Playback Volume", gpr++, 0); 1923 1924 /* Wave Capture Volume + Switch */ 1925 for (z = 0; z < 2; z++) { 1926 SWITCH(icode, &ptr, tmp + 0, z, gpr + 2 + z); 1927 VOLUME(icode, &ptr, capture + z, tmp + 0, gpr + z); 1928 } 1929 snd_emu10k1_init_stereo_control(controls + i++, "Wave Capture Volume", gpr, 0); 1930 snd_emu10k1_init_stereo_onoff_control(controls + i++, "Wave Capture Switch", gpr + 2, 0); 1931 gpr += 4; 1932 1933 /* Synth Playback Volume */ 1934 for (z = 0; z < 2; z++) 1935 VOLUME_ADD(icode, &ptr, playback + z, 2 + z, gpr + z); 1936 snd_emu10k1_init_stereo_control(controls + i++, "Synth Playback Volume", gpr, 100); 1937 gpr += 2; 1938 1939 /* Synth Capture Volume + Switch */ 1940 for (z = 0; z < 2; z++) { 1941 SWITCH(icode, &ptr, tmp + 0, 2 + z, gpr + 2 + z); 1942 VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z); 1943 } 1944 snd_emu10k1_init_stereo_control(controls + i++, "Synth Capture Volume", gpr, 0); 1945 snd_emu10k1_init_stereo_onoff_control(controls + i++, "Synth Capture Switch", gpr + 2, 0); 1946 gpr += 4; 1947 1948 /* Surround Digital Playback Volume (renamed later without Digital) */ 1949 for (z = 0; z < 2; z++) 1950 VOLUME_ADD(icode, &ptr, playback + 2 + z, 4 + z, gpr + z); 1951 snd_emu10k1_init_stereo_control(controls + i++, "Surround Digital Playback Volume", gpr, 100); 1952 gpr += 2; 1953 1954 /* Surround Capture Volume + Switch */ 1955 for (z = 0; z < 2; z++) { 1956 SWITCH(icode, &ptr, tmp + 0, 4 + z, gpr + 2 + z); 1957 VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z); 1958 } 1959 snd_emu10k1_init_stereo_control(controls + i++, "Surround Capture Volume", gpr, 0); 1960 snd_emu10k1_init_stereo_onoff_control(controls + i++, "Surround Capture Switch", gpr + 2, 0); 1961 gpr += 4; 1962 1963 /* Center Playback Volume (renamed later without Digital) */ 1964 VOLUME_ADD(icode, &ptr, playback + 4, 6, gpr); 1965 snd_emu10k1_init_mono_control(controls + i++, "Center Digital Playback Volume", gpr++, 100); 1966 1967 /* LFE Playback Volume + Switch (renamed later without Digital) */ 1968 VOLUME_ADD(icode, &ptr, playback + 5, 7, gpr); 1969 snd_emu10k1_init_mono_control(controls + i++, "LFE Digital Playback Volume", gpr++, 100); 1970 1971 /* Front Playback Volume */ 1972 for (z = 0; z < 2; z++) 1973 VOLUME_ADD(icode, &ptr, playback + z, 10 + z, gpr + z); 1974 snd_emu10k1_init_stereo_control(controls + i++, "Front Playback Volume", gpr, 100); 1975 gpr += 2; 1976 1977 /* Front Capture Volume + Switch */ 1978 for (z = 0; z < 2; z++) { 1979 SWITCH(icode, &ptr, tmp + 0, 10 + z, gpr + 2); 1980 VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z); 1981 } 1982 snd_emu10k1_init_stereo_control(controls + i++, "Front Capture Volume", gpr, 0); 1983 snd_emu10k1_init_mono_onoff_control(controls + i++, "Front Capture Switch", gpr + 2, 0); 1984 gpr += 3; 1985 1986 /* 1987 * Process inputs 1988 */ 1989 1990 if (emu->fx8010.extin_mask & ((1<<EXTIN_AC97_L)|(1<<EXTIN_AC97_R))) { 1991 /* AC'97 Playback Volume */ 1992 VOLUME_ADDIN(icode, &ptr, playback + 0, EXTIN_AC97_L, gpr); gpr++; 1993 VOLUME_ADDIN(icode, &ptr, playback + 1, EXTIN_AC97_R, gpr); gpr++; 1994 snd_emu10k1_init_stereo_control(controls + i++, "AC97 Playback Volume", gpr-2, 0); 1995 /* AC'97 Capture Volume */ 1996 VOLUME_ADDIN(icode, &ptr, capture + 0, EXTIN_AC97_L, gpr); gpr++; 1997 VOLUME_ADDIN(icode, &ptr, capture + 1, EXTIN_AC97_R, gpr); gpr++; 1998 snd_emu10k1_init_stereo_control(controls + i++, "AC97 Capture Volume", gpr-2, 100); 1999 } 2000 2001 if (emu->fx8010.extin_mask & ((1<<EXTIN_SPDIF_CD_L)|(1<<EXTIN_SPDIF_CD_R))) { 2002 /* IEC958 TTL Playback Volume */ 2003 for (z = 0; z < 2; z++) 2004 VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_SPDIF_CD_L + z, gpr + z); 2005 snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",PLAYBACK,VOLUME), gpr, 0); 2006 gpr += 2; 2007 2008 /* IEC958 TTL Capture Volume + Switch */ 2009 for (z = 0; z < 2; z++) { 2010 SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_SPDIF_CD_L + z, gpr + 2 + z); 2011 VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z); 2012 } 2013 snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",CAPTURE,VOLUME), gpr, 0); 2014 snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",CAPTURE,SWITCH), gpr + 2, 0); 2015 gpr += 4; 2016 } 2017 2018 if (emu->fx8010.extin_mask & ((1<<EXTIN_ZOOM_L)|(1<<EXTIN_ZOOM_R))) { 2019 /* Zoom Video Playback Volume */ 2020 for (z = 0; z < 2; z++) 2021 VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_ZOOM_L + z, gpr + z); 2022 snd_emu10k1_init_stereo_control(controls + i++, "Zoom Video Playback Volume", gpr, 0); 2023 gpr += 2; 2024 2025 /* Zoom Video Capture Volume + Switch */ 2026 for (z = 0; z < 2; z++) { 2027 SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_ZOOM_L + z, gpr + 2 + z); 2028 VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z); 2029 } 2030 snd_emu10k1_init_stereo_control(controls + i++, "Zoom Video Capture Volume", gpr, 0); 2031 snd_emu10k1_init_stereo_onoff_control(controls + i++, "Zoom Video Capture Switch", gpr + 2, 0); 2032 gpr += 4; 2033 } 2034 2035 if (emu->fx8010.extin_mask & ((1<<EXTIN_TOSLINK_L)|(1<<EXTIN_TOSLINK_R))) { 2036 /* IEC958 Optical Playback Volume */ 2037 for (z = 0; z < 2; z++) 2038 VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_TOSLINK_L + z, gpr + z); 2039 snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",PLAYBACK,VOLUME), gpr, 0); 2040 gpr += 2; 2041 2042 /* IEC958 Optical Capture Volume */ 2043 for (z = 0; z < 2; z++) { 2044 SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_TOSLINK_L + z, gpr + 2 + z); 2045 VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z); 2046 } 2047 snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",CAPTURE,VOLUME), gpr, 0); 2048 snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",CAPTURE,SWITCH), gpr + 2, 0); 2049 gpr += 4; 2050 } 2051 2052 if (emu->fx8010.extin_mask & ((1<<EXTIN_LINE1_L)|(1<<EXTIN_LINE1_R))) { 2053 /* Line LiveDrive Playback Volume */ 2054 for (z = 0; z < 2; z++) 2055 VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_LINE1_L + z, gpr + z); 2056 snd_emu10k1_init_stereo_control(controls + i++, "Line LiveDrive Playback Volume", gpr, 0); 2057 gpr += 2; 2058 2059 /* Line LiveDrive Capture Volume + Switch */ 2060 for (z = 0; z < 2; z++) { 2061 SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_LINE1_L + z, gpr + 2 + z); 2062 VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z); 2063 } 2064 snd_emu10k1_init_stereo_control(controls + i++, "Line LiveDrive Capture Volume", gpr, 0); 2065 snd_emu10k1_init_stereo_onoff_control(controls + i++, "Line LiveDrive Capture Switch", gpr + 2, 0); 2066 gpr += 4; 2067 } 2068 2069 if (emu->fx8010.extin_mask & ((1<<EXTIN_COAX_SPDIF_L)|(1<<EXTIN_COAX_SPDIF_R))) { 2070 /* IEC958 Coax Playback Volume */ 2071 for (z = 0; z < 2; z++) 2072 VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_COAX_SPDIF_L + z, gpr + z); 2073 snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",PLAYBACK,VOLUME), gpr, 0); 2074 gpr += 2; 2075 2076 /* IEC958 Coax Capture Volume + Switch */ 2077 for (z = 0; z < 2; z++) { 2078 SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_COAX_SPDIF_L + z, gpr + 2 + z); 2079 VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z); 2080 } 2081 snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",CAPTURE,VOLUME), gpr, 0); 2082 snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",CAPTURE,SWITCH), gpr + 2, 0); 2083 gpr += 4; 2084 } 2085 2086 if (emu->fx8010.extin_mask & ((1<<EXTIN_LINE2_L)|(1<<EXTIN_LINE2_R))) { 2087 /* Line LiveDrive Playback Volume */ 2088 for (z = 0; z < 2; z++) 2089 VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_LINE2_L + z, gpr + z); 2090 snd_emu10k1_init_stereo_control(controls + i++, "Line2 LiveDrive Playback Volume", gpr, 0); 2091 controls[i-1].id.index = 1; 2092 gpr += 2; 2093 2094 /* Line LiveDrive Capture Volume */ 2095 for (z = 0; z < 2; z++) { 2096 SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_LINE2_L + z, gpr + 2 + z); 2097 VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z); 2098 } 2099 snd_emu10k1_init_stereo_control(controls + i++, "Line2 LiveDrive Capture Volume", gpr, 0); 2100 controls[i-1].id.index = 1; 2101 snd_emu10k1_init_stereo_onoff_control(controls + i++, "Line2 LiveDrive Capture Switch", gpr + 2, 0); 2102 controls[i-1].id.index = 1; 2103 gpr += 4; 2104 } 2105 2106 /* 2107 * Process tone control 2108 */ 2109 OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), GPR(playback + 0), C_00000000, C_00000000); /* left */ 2110 OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), GPR(playback + 1), C_00000000, C_00000000); /* right */ 2111 OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2), GPR(playback + 2), C_00000000, C_00000000); /* rear left */ 2112 OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 3), GPR(playback + 3), C_00000000, C_00000000); /* rear right */ 2113 OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), GPR(playback + 4), C_00000000, C_00000000); /* center */ 2114 OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), GPR(playback + 5), C_00000000, C_00000000); /* LFE */ 2115 2116 ctl = &controls[i + 0]; 2117 ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; 2118 strcpy(ctl->id.name, "Tone Control - Bass"); 2119 ctl->vcount = 2; 2120 ctl->count = 10; 2121 ctl->min = 0; 2122 ctl->max = 40; 2123 ctl->value[0] = ctl->value[1] = 20; 2124 ctl->translation = EMU10K1_GPR_TRANSLATION_BASS; 2125 ctl = &controls[i + 1]; 2126 ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; 2127 strcpy(ctl->id.name, "Tone Control - Treble"); 2128 ctl->vcount = 2; 2129 ctl->count = 10; 2130 ctl->min = 0; 2131 ctl->max = 40; 2132 ctl->value[0] = ctl->value[1] = 20; 2133 ctl->translation = EMU10K1_GPR_TRANSLATION_TREBLE; 2134 2135 #define BASS_GPR 0x8c 2136 #define TREBLE_GPR 0x96 2137 2138 for (z = 0; z < 5; z++) { 2139 int j; 2140 for (j = 0; j < 2; j++) { 2141 controls[i + 0].gpr[z * 2 + j] = BASS_GPR + z * 2 + j; 2142 controls[i + 1].gpr[z * 2 + j] = TREBLE_GPR + z * 2 + j; 2143 } 2144 } 2145 for (z = 0; z < 3; z++) { /* front/rear/center-lfe */ 2146 int j, k, l, d; 2147 for (j = 0; j < 2; j++) { /* left/right */ 2148 k = 0xa0 + (z * 8) + (j * 4); 2149 l = 0xd0 + (z * 8) + (j * 4); 2150 d = playback + SND_EMU10K1_PLAYBACK_CHANNELS + z * 2 + j; 2151 2152 OP(icode, &ptr, iMAC0, C_00000000, C_00000000, GPR(d), GPR(BASS_GPR + 0 + j)); 2153 OP(icode, &ptr, iMACMV, GPR(k+1), GPR(k), GPR(k+1), GPR(BASS_GPR + 4 + j)); 2154 OP(icode, &ptr, iMACMV, GPR(k), GPR(d), GPR(k), GPR(BASS_GPR + 2 + j)); 2155 OP(icode, &ptr, iMACMV, GPR(k+3), GPR(k+2), GPR(k+3), GPR(BASS_GPR + 8 + j)); 2156 OP(icode, &ptr, iMAC0, GPR(k+2), GPR_ACCU, GPR(k+2), GPR(BASS_GPR + 6 + j)); 2157 OP(icode, &ptr, iACC3, GPR(k+2), GPR(k+2), GPR(k+2), C_00000000); 2158 2159 OP(icode, &ptr, iMAC0, C_00000000, C_00000000, GPR(k+2), GPR(TREBLE_GPR + 0 + j)); 2160 OP(icode, &ptr, iMACMV, GPR(l+1), GPR(l), GPR(l+1), GPR(TREBLE_GPR + 4 + j)); 2161 OP(icode, &ptr, iMACMV, GPR(l), GPR(k+2), GPR(l), GPR(TREBLE_GPR + 2 + j)); 2162 OP(icode, &ptr, iMACMV, GPR(l+3), GPR(l+2), GPR(l+3), GPR(TREBLE_GPR + 8 + j)); 2163 OP(icode, &ptr, iMAC0, GPR(l+2), GPR_ACCU, GPR(l+2), GPR(TREBLE_GPR + 6 + j)); 2164 OP(icode, &ptr, iMACINT0, GPR(l+2), C_00000000, GPR(l+2), C_00000010); 2165 2166 OP(icode, &ptr, iACC3, GPR(d), GPR(l+2), C_00000000, C_00000000); 2167 2168 if (z == 2) /* center */ 2169 break; 2170 } 2171 } 2172 i += 2; 2173 2174 #undef BASS_GPR 2175 #undef TREBLE_GPR 2176 2177 for (z = 0; z < 6; z++) { 2178 SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, gpr + 0); 2179 SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 0); 2180 SWITCH(icode, &ptr, tmp + 1, playback + z, tmp + 1); 2181 OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000); 2182 } 2183 snd_emu10k1_init_stereo_onoff_control(controls + i++, "Tone Control - Switch", gpr, 0); 2184 gpr += 2; 2185 2186 /* 2187 * Process outputs 2188 */ 2189 if (emu->fx8010.extout_mask & ((1<<EXTOUT_AC97_L)|(1<<EXTOUT_AC97_R))) { 2190 /* AC'97 Playback Volume */ 2191 2192 for (z = 0; z < 2; z++) 2193 OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), C_00000000, C_00000000); 2194 } 2195 2196 if (emu->fx8010.extout_mask & ((1<<EXTOUT_TOSLINK_L)|(1<<EXTOUT_TOSLINK_R))) { 2197 /* IEC958 Optical Raw Playback Switch */ 2198 2199 for (z = 0; z < 2; z++) { 2200 SWITCH(icode, &ptr, tmp + 0, 8 + z, gpr + z); 2201 SWITCH_NEG(icode, &ptr, tmp + 1, gpr + z); 2202 SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1); 2203 OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_TOSLINK_L + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000); 2204 #ifdef EMU10K1_CAPTURE_DIGITAL_OUT 2205 OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ADC_CAP_L + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000); 2206 #endif 2207 } 2208 2209 snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("Optical Raw ",PLAYBACK,SWITCH), gpr, 0); 2210 gpr += 2; 2211 } 2212 2213 if (emu->fx8010.extout_mask & ((1<<EXTOUT_HEADPHONE_L)|(1<<EXTOUT_HEADPHONE_R))) { 2214 /* Headphone Playback Volume */ 2215 2216 for (z = 0; z < 2; z++) { 2217 SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4 + z, gpr + 2 + z); 2218 SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 2 + z); 2219 SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1); 2220 OP(icode, &ptr, iACC3, GPR(tmp + 0), GPR(tmp + 0), GPR(tmp + 1), C_00000000); 2221 VOLUME_OUT(icode, &ptr, EXTOUT_HEADPHONE_L + z, tmp + 0, gpr + z); 2222 } 2223 2224 snd_emu10k1_init_stereo_control(controls + i++, "Headphone Playback Volume", gpr + 0, 0); 2225 controls[i-1].id.index = 1; /* AC'97 can have also Headphone control */ 2226 snd_emu10k1_init_mono_onoff_control(controls + i++, "Headphone Center Playback Switch", gpr + 2, 0); 2227 controls[i-1].id.index = 1; 2228 snd_emu10k1_init_mono_onoff_control(controls + i++, "Headphone LFE Playback Switch", gpr + 3, 0); 2229 controls[i-1].id.index = 1; 2230 2231 gpr += 4; 2232 } 2233 2234 if (emu->fx8010.extout_mask & ((1<<EXTOUT_REAR_L)|(1<<EXTOUT_REAR_R))) 2235 for (z = 0; z < 2; z++) 2236 OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_REAR_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2 + z), C_00000000, C_00000000); 2237 2238 if (emu->fx8010.extout_mask & ((1<<EXTOUT_AC97_REAR_L)|(1<<EXTOUT_AC97_REAR_R))) 2239 for (z = 0; z < 2; z++) 2240 OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_REAR_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2 + z), C_00000000, C_00000000); 2241 2242 if (emu->fx8010.extout_mask & (1<<EXTOUT_AC97_CENTER)) { 2243 #ifndef EMU10K1_CENTER_LFE_FROM_FRONT 2244 OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_CENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), C_00000000, C_00000000); 2245 OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ACENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), C_00000000, C_00000000); 2246 #else 2247 OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_CENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), C_00000000, C_00000000); 2248 OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ACENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), C_00000000, C_00000000); 2249 #endif 2250 } 2251 2252 if (emu->fx8010.extout_mask & (1<<EXTOUT_AC97_LFE)) { 2253 #ifndef EMU10K1_CENTER_LFE_FROM_FRONT 2254 OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_LFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), C_00000000, C_00000000); 2255 OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ALFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), C_00000000, C_00000000); 2256 #else 2257 OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_LFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), C_00000000, C_00000000); 2258 OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ALFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), C_00000000, C_00000000); 2259 #endif 2260 } 2261 2262 #ifndef EMU10K1_CAPTURE_DIGITAL_OUT 2263 for (z = 0; z < 2; z++) 2264 OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ADC_CAP_L + z), GPR(capture + z), C_00000000, C_00000000); 2265 #endif 2266 2267 if (emu->fx8010.extout_mask & (1<<EXTOUT_MIC_CAP)) 2268 OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_MIC_CAP), GPR(capture + 2), C_00000000, C_00000000); 2269 2270 /* EFX capture - capture the 16 EXTINS */ 2271 if (emu->card_capabilities->sblive51) { 2272 /* On the Live! 5.1, FXBUS2(1) and FXBUS(2) are shared with EXTOUT_ACENTER 2273 * and EXTOUT_ALFE, so we can't connect inputs to them for multitrack recording. 2274 * 2275 * Since only 14 of the 16 EXTINs are used, this is not a big problem. 2276 * We route AC97L and R to FX capture 14 and 15, SPDIF CD in to FX capture 2277 * 0 and 3, then the rest of the EXTINs to the corresponding FX capture 2278 * channel. Multitrack recorders will still see the center/lfe output signal 2279 * on the second and third channels. 2280 */ 2281 OP(icode, &ptr, iACC3, FXBUS2(14), C_00000000, C_00000000, EXTIN(0)); 2282 OP(icode, &ptr, iACC3, FXBUS2(15), C_00000000, C_00000000, EXTIN(1)); 2283 OP(icode, &ptr, iACC3, FXBUS2(0), C_00000000, C_00000000, EXTIN(2)); 2284 OP(icode, &ptr, iACC3, FXBUS2(3), C_00000000, C_00000000, EXTIN(3)); 2285 for (z = 4; z < 14; z++) 2286 OP(icode, &ptr, iACC3, FXBUS2(z), C_00000000, C_00000000, EXTIN(z)); 2287 } else { 2288 for (z = 0; z < 16; z++) 2289 OP(icode, &ptr, iACC3, FXBUS2(z), C_00000000, C_00000000, EXTIN(z)); 2290 } 2291 2292 2293 if (gpr > tmp) { 2294 snd_BUG(); 2295 err = -EIO; 2296 goto __err; 2297 } 2298 if (i > SND_EMU10K1_GPR_CONTROLS) { 2299 snd_BUG(); 2300 err = -EIO; 2301 goto __err; 2302 } 2303 2304 /* clear remaining instruction memory */ 2305 while (ptr < 0x200) 2306 OP(icode, &ptr, iACC3, C_00000000, C_00000000, C_00000000, C_00000000); 2307 2308 if ((err = snd_emu10k1_fx8010_tram_setup(emu, ipcm->buffer_size)) < 0) 2309 goto __err; 2310 seg = snd_enter_user(); 2311 icode->gpr_add_control_count = i; 2312 icode->gpr_add_controls = (struct snd_emu10k1_fx8010_control_gpr __user *)controls; 2313 emu->support_tlv = 1; /* support TLV */ 2314 err = snd_emu10k1_icode_poke(emu, icode); 2315 emu->support_tlv = 0; /* clear again */ 2316 snd_leave_user(seg); 2317 if (err >= 0) 2318 err = snd_emu10k1_ipcm_poke(emu, ipcm); 2319 __err: 2320 kfree(ipcm); 2321 kfree(controls); 2322 if (icode != NULL) { 2323 kfree((void __force *)icode->gpr_map); 2324 kfree(icode); 2325 } 2326 return err; 2327 } 2328 2329 int __devinit snd_emu10k1_init_efx(struct snd_emu10k1 *emu) 2330 { 2331 spin_lock_init(&emu->fx8010.irq_lock); 2332 INIT_LIST_HEAD(&emu->fx8010.gpr_ctl); 2333 if (emu->audigy) 2334 return _snd_emu10k1_audigy_init_efx(emu); 2335 else 2336 return _snd_emu10k1_init_efx(emu); 2337 } 2338 2339 void snd_emu10k1_free_efx(struct snd_emu10k1 *emu) 2340 { 2341 /* stop processor */ 2342 if (emu->audigy) 2343 snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg = A_DBG_SINGLE_STEP); 2344 else 2345 snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg = EMU10K1_DBG_SINGLE_STEP); 2346 } 2347 2348 #if 0 /* FIXME: who use them? */ 2349 int snd_emu10k1_fx8010_tone_control_activate(struct snd_emu10k1 *emu, int output) 2350 { 2351 if (output < 0 || output >= 6) 2352 return -EINVAL; 2353 snd_emu10k1_ptr_write(emu, emu->gpr_base + 0x94 + output, 0, 1); 2354 return 0; 2355 } 2356 2357 int snd_emu10k1_fx8010_tone_control_deactivate(struct snd_emu10k1 *emu, int output) 2358 { 2359 if (output < 0 || output >= 6) 2360 return -EINVAL; 2361 snd_emu10k1_ptr_write(emu, emu->gpr_base + 0x94 + output, 0, 0); 2362 return 0; 2363 } 2364 #endif 2365 2366 int snd_emu10k1_fx8010_tram_setup(struct snd_emu10k1 *emu, u32 size) 2367 { 2368 u8 size_reg = 0; 2369 2370 /* size is in samples */ 2371 if (size != 0) { 2372 size = (size - 1) >> 13; 2373 2374 while (size) { 2375 size >>= 1; 2376 size_reg++; 2377 } 2378 size = 0x2000 << size_reg; 2379 } 2380 if ((emu->fx8010.etram_pages.bytes / 2) == size) 2381 return 0; 2382 spin_lock_irq(&emu->emu_lock); 2383 outl(HCFG_LOCKTANKCACHE_MASK | inl(emu->port + HCFG), emu->port + HCFG); 2384 spin_unlock_irq(&emu->emu_lock); 2385 snd_emu10k1_ptr_write(emu, TCB, 0, 0); 2386 snd_emu10k1_ptr_write(emu, TCBS, 0, 0); 2387 if (emu->fx8010.etram_pages.area != NULL) { 2388 snd_dma_free_pages(&emu->fx8010.etram_pages); 2389 emu->fx8010.etram_pages.area = NULL; 2390 emu->fx8010.etram_pages.bytes = 0; 2391 } 2392 2393 if (size > 0) { 2394 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(emu->pci), 2395 size * 2, &emu->fx8010.etram_pages) < 0) 2396 return -ENOMEM; 2397 memset(emu->fx8010.etram_pages.area, 0, size * 2); 2398 snd_emu10k1_ptr_write(emu, TCB, 0, emu->fx8010.etram_pages.addr); 2399 snd_emu10k1_ptr_write(emu, TCBS, 0, size_reg); 2400 spin_lock_irq(&emu->emu_lock); 2401 outl(inl(emu->port + HCFG) & ~HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG); 2402 spin_unlock_irq(&emu->emu_lock); 2403 } 2404 2405 return 0; 2406 } 2407 2408 static int snd_emu10k1_fx8010_open(struct snd_hwdep * hw, struct file *file) 2409 { 2410 return 0; 2411 } 2412 2413 static void copy_string(char *dst, char *src, char *null, int idx) 2414 { 2415 if (src == NULL) 2416 sprintf(dst, "%s %02X", null, idx); 2417 else 2418 strcpy(dst, src); 2419 } 2420 2421 static int snd_emu10k1_fx8010_info(struct snd_emu10k1 *emu, 2422 struct snd_emu10k1_fx8010_info *info) 2423 { 2424 char **fxbus, **extin, **extout; 2425 unsigned short fxbus_mask, extin_mask, extout_mask; 2426 int res; 2427 2428 memset(info, 0, sizeof(info)); 2429 info->internal_tram_size = emu->fx8010.itram_size; 2430 info->external_tram_size = emu->fx8010.etram_pages.bytes / 2; 2431 fxbus = fxbuses; 2432 extin = emu->audigy ? audigy_ins : creative_ins; 2433 extout = emu->audigy ? audigy_outs : creative_outs; 2434 fxbus_mask = emu->fx8010.fxbus_mask; 2435 extin_mask = emu->fx8010.extin_mask; 2436 extout_mask = emu->fx8010.extout_mask; 2437 for (res = 0; res < 16; res++, fxbus++, extin++, extout++) { 2438 copy_string(info->fxbus_names[res], fxbus_mask & (1 << res) ? *fxbus : NULL, "FXBUS", res); 2439 copy_string(info->extin_names[res], extin_mask & (1 << res) ? *extin : NULL, "Unused", res); 2440 copy_string(info->extout_names[res], extout_mask & (1 << res) ? *extout : NULL, "Unused", res); 2441 } 2442 for (res = 16; res < 32; res++, extout++) 2443 copy_string(info->extout_names[res], extout_mask & (1 << res) ? *extout : NULL, "Unused", res); 2444 info->gpr_controls = emu->fx8010.gpr_count; 2445 return 0; 2446 } 2447 2448 static int snd_emu10k1_fx8010_ioctl(struct snd_hwdep * hw, struct file *file, unsigned int cmd, unsigned long arg) 2449 { 2450 struct snd_emu10k1 *emu = hw->private_data; 2451 struct snd_emu10k1_fx8010_info *info; 2452 struct snd_emu10k1_fx8010_code *icode; 2453 struct snd_emu10k1_fx8010_pcm_rec *ipcm; 2454 unsigned int addr; 2455 void __user *argp = (void __user *)arg; 2456 int res; 2457 2458 switch (cmd) { 2459 case SNDRV_EMU10K1_IOCTL_PVERSION: 2460 emu->support_tlv = 1; 2461 return put_user(SNDRV_EMU10K1_VERSION, (int __user *)argp); 2462 case SNDRV_EMU10K1_IOCTL_INFO: 2463 info = kmalloc(sizeof(*info), GFP_KERNEL); 2464 if (!info) 2465 return -ENOMEM; 2466 if ((res = snd_emu10k1_fx8010_info(emu, info)) < 0) { 2467 kfree(info); 2468 return res; 2469 } 2470 if (copy_to_user(argp, info, sizeof(*info))) { 2471 kfree(info); 2472 return -EFAULT; 2473 } 2474 kfree(info); 2475 return 0; 2476 case SNDRV_EMU10K1_IOCTL_CODE_POKE: 2477 if (!capable(CAP_SYS_ADMIN)) 2478 return -EPERM; 2479 icode = kmalloc(sizeof(*icode), GFP_KERNEL); 2480 if (icode == NULL) 2481 return -ENOMEM; 2482 if (copy_from_user(icode, argp, sizeof(*icode))) { 2483 kfree(icode); 2484 return -EFAULT; 2485 } 2486 res = snd_emu10k1_icode_poke(emu, icode); 2487 kfree(icode); 2488 return res; 2489 case SNDRV_EMU10K1_IOCTL_CODE_PEEK: 2490 icode = kmalloc(sizeof(*icode), GFP_KERNEL); 2491 if (icode == NULL) 2492 return -ENOMEM; 2493 if (copy_from_user(icode, argp, sizeof(*icode))) { 2494 kfree(icode); 2495 return -EFAULT; 2496 } 2497 res = snd_emu10k1_icode_peek(emu, icode); 2498 if (res == 0 && copy_to_user(argp, icode, sizeof(*icode))) { 2499 kfree(icode); 2500 return -EFAULT; 2501 } 2502 kfree(icode); 2503 return res; 2504 case SNDRV_EMU10K1_IOCTL_PCM_POKE: 2505 ipcm = kmalloc(sizeof(*ipcm), GFP_KERNEL); 2506 if (ipcm == NULL) 2507 return -ENOMEM; 2508 if (copy_from_user(ipcm, argp, sizeof(*ipcm))) { 2509 kfree(ipcm); 2510 return -EFAULT; 2511 } 2512 res = snd_emu10k1_ipcm_poke(emu, ipcm); 2513 kfree(ipcm); 2514 return res; 2515 case SNDRV_EMU10K1_IOCTL_PCM_PEEK: 2516 ipcm = kzalloc(sizeof(*ipcm), GFP_KERNEL); 2517 if (ipcm == NULL) 2518 return -ENOMEM; 2519 if (copy_from_user(ipcm, argp, sizeof(*ipcm))) { 2520 kfree(ipcm); 2521 return -EFAULT; 2522 } 2523 res = snd_emu10k1_ipcm_peek(emu, ipcm); 2524 if (res == 0 && copy_to_user(argp, ipcm, sizeof(*ipcm))) { 2525 kfree(ipcm); 2526 return -EFAULT; 2527 } 2528 kfree(ipcm); 2529 return res; 2530 case SNDRV_EMU10K1_IOCTL_TRAM_SETUP: 2531 if (!capable(CAP_SYS_ADMIN)) 2532 return -EPERM; 2533 if (get_user(addr, (unsigned int __user *)argp)) 2534 return -EFAULT; 2535 mutex_lock(&emu->fx8010.lock); 2536 res = snd_emu10k1_fx8010_tram_setup(emu, addr); 2537 mutex_unlock(&emu->fx8010.lock); 2538 return res; 2539 case SNDRV_EMU10K1_IOCTL_STOP: 2540 if (!capable(CAP_SYS_ADMIN)) 2541 return -EPERM; 2542 if (emu->audigy) 2543 snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP); 2544 else 2545 snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP); 2546 return 0; 2547 case SNDRV_EMU10K1_IOCTL_CONTINUE: 2548 if (!capable(CAP_SYS_ADMIN)) 2549 return -EPERM; 2550 if (emu->audigy) 2551 snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg = 0); 2552 else 2553 snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg = 0); 2554 return 0; 2555 case SNDRV_EMU10K1_IOCTL_ZERO_TRAM_COUNTER: 2556 if (!capable(CAP_SYS_ADMIN)) 2557 return -EPERM; 2558 if (emu->audigy) 2559 snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_ZC); 2560 else 2561 snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_ZC); 2562 udelay(10); 2563 if (emu->audigy) 2564 snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg); 2565 else 2566 snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg); 2567 return 0; 2568 case SNDRV_EMU10K1_IOCTL_SINGLE_STEP: 2569 if (!capable(CAP_SYS_ADMIN)) 2570 return -EPERM; 2571 if (get_user(addr, (unsigned int __user *)argp)) 2572 return -EFAULT; 2573 if (addr > 0x1ff) 2574 return -EINVAL; 2575 if (emu->audigy) 2576 snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP | addr); 2577 else 2578 snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP | addr); 2579 udelay(10); 2580 if (emu->audigy) 2581 snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP | A_DBG_STEP_ADDR | addr); 2582 else 2583 snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP | EMU10K1_DBG_STEP | addr); 2584 return 0; 2585 case SNDRV_EMU10K1_IOCTL_DBG_READ: 2586 if (emu->audigy) 2587 addr = snd_emu10k1_ptr_read(emu, A_DBG, 0); 2588 else 2589 addr = snd_emu10k1_ptr_read(emu, DBG, 0); 2590 if (put_user(addr, (unsigned int __user *)argp)) 2591 return -EFAULT; 2592 return 0; 2593 } 2594 return -ENOTTY; 2595 } 2596 2597 static int snd_emu10k1_fx8010_release(struct snd_hwdep * hw, struct file *file) 2598 { 2599 return 0; 2600 } 2601 2602 int __devinit snd_emu10k1_fx8010_new(struct snd_emu10k1 *emu, int device, struct snd_hwdep ** rhwdep) 2603 { 2604 struct snd_hwdep *hw; 2605 int err; 2606 2607 if (rhwdep) 2608 *rhwdep = NULL; 2609 if ((err = snd_hwdep_new(emu->card, "FX8010", device, &hw)) < 0) 2610 return err; 2611 strcpy(hw->name, "EMU10K1 (FX8010)"); 2612 hw->iface = SNDRV_HWDEP_IFACE_EMU10K1; 2613 hw->ops.open = snd_emu10k1_fx8010_open; 2614 hw->ops.ioctl = snd_emu10k1_fx8010_ioctl; 2615 hw->ops.release = snd_emu10k1_fx8010_release; 2616 hw->private_data = emu; 2617 if (rhwdep) 2618 *rhwdep = hw; 2619 return 0; 2620 } 2621 2622 #ifdef CONFIG_PM 2623 int __devinit snd_emu10k1_efx_alloc_pm_buffer(struct snd_emu10k1 *emu) 2624 { 2625 int len; 2626 2627 len = emu->audigy ? 0x200 : 0x100; 2628 emu->saved_gpr = kmalloc(len * 4, GFP_KERNEL); 2629 if (! emu->saved_gpr) 2630 return -ENOMEM; 2631 len = emu->audigy ? 0x100 : 0xa0; 2632 emu->tram_val_saved = kmalloc(len * 4, GFP_KERNEL); 2633 emu->tram_addr_saved = kmalloc(len * 4, GFP_KERNEL); 2634 if (! emu->tram_val_saved || ! emu->tram_addr_saved) 2635 return -ENOMEM; 2636 len = emu->audigy ? 2 * 1024 : 2 * 512; 2637 emu->saved_icode = vmalloc(len * 4); 2638 if (! emu->saved_icode) 2639 return -ENOMEM; 2640 return 0; 2641 } 2642 2643 void snd_emu10k1_efx_free_pm_buffer(struct snd_emu10k1 *emu) 2644 { 2645 kfree(emu->saved_gpr); 2646 kfree(emu->tram_val_saved); 2647 kfree(emu->tram_addr_saved); 2648 vfree(emu->saved_icode); 2649 } 2650 2651 /* 2652 * save/restore GPR, TRAM and codes 2653 */ 2654 void snd_emu10k1_efx_suspend(struct snd_emu10k1 *emu) 2655 { 2656 int i, len; 2657 2658 len = emu->audigy ? 0x200 : 0x100; 2659 for (i = 0; i < len; i++) 2660 emu->saved_gpr[i] = snd_emu10k1_ptr_read(emu, emu->gpr_base + i, 0); 2661 2662 len = emu->audigy ? 0x100 : 0xa0; 2663 for (i = 0; i < len; i++) { 2664 emu->tram_val_saved[i] = snd_emu10k1_ptr_read(emu, TANKMEMDATAREGBASE + i, 0); 2665 emu->tram_addr_saved[i] = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + i, 0); 2666 if (emu->audigy) { 2667 emu->tram_addr_saved[i] >>= 12; 2668 emu->tram_addr_saved[i] |= 2669 snd_emu10k1_ptr_read(emu, A_TANKMEMCTLREGBASE + i, 0) << 20; 2670 } 2671 } 2672 2673 len = emu->audigy ? 2 * 1024 : 2 * 512; 2674 for (i = 0; i < len; i++) 2675 emu->saved_icode[i] = snd_emu10k1_efx_read(emu, i); 2676 } 2677 2678 void snd_emu10k1_efx_resume(struct snd_emu10k1 *emu) 2679 { 2680 int i, len; 2681 2682 /* set up TRAM */ 2683 if (emu->fx8010.etram_pages.bytes > 0) { 2684 unsigned size, size_reg = 0; 2685 size = emu->fx8010.etram_pages.bytes / 2; 2686 size = (size - 1) >> 13; 2687 while (size) { 2688 size >>= 1; 2689 size_reg++; 2690 } 2691 outl(HCFG_LOCKTANKCACHE_MASK | inl(emu->port + HCFG), emu->port + HCFG); 2692 snd_emu10k1_ptr_write(emu, TCB, 0, emu->fx8010.etram_pages.addr); 2693 snd_emu10k1_ptr_write(emu, TCBS, 0, size_reg); 2694 outl(inl(emu->port + HCFG) & ~HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG); 2695 } 2696 2697 if (emu->audigy) 2698 snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_SINGLE_STEP); 2699 else 2700 snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_SINGLE_STEP); 2701 2702 len = emu->audigy ? 0x200 : 0x100; 2703 for (i = 0; i < len; i++) 2704 snd_emu10k1_ptr_write(emu, emu->gpr_base + i, 0, emu->saved_gpr[i]); 2705 2706 len = emu->audigy ? 0x100 : 0xa0; 2707 for (i = 0; i < len; i++) { 2708 snd_emu10k1_ptr_write(emu, TANKMEMDATAREGBASE + i, 0, 2709 emu->tram_val_saved[i]); 2710 if (! emu->audigy) 2711 snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0, 2712 emu->tram_addr_saved[i]); 2713 else { 2714 snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0, 2715 emu->tram_addr_saved[i] << 12); 2716 snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0, 2717 emu->tram_addr_saved[i] >> 20); 2718 } 2719 } 2720 2721 len = emu->audigy ? 2 * 1024 : 2 * 512; 2722 for (i = 0; i < len; i++) 2723 snd_emu10k1_efx_write(emu, i, emu->saved_icode[i]); 2724 2725 /* start FX processor when the DSP code is updated */ 2726 if (emu->audigy) 2727 snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg); 2728 else 2729 snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg); 2730 } 2731 #endif 2732