1 /* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License as published by 4 * the Free Software Foundation; either version 2 of the License, or 5 * (at your option) any later version. 6 * 7 * This program is distributed in the hope that it will be useful, 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * GNU General Public License for more details. 11 * 12 * You should have received a copy of the GNU General Public License 13 * along with this program; if not, write to the Free Software 14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 15 * 16 */ 17 18 /* 19 * 2002-07 Benny Sjostrand benny@hostmobility.com 20 */ 21 22 23 #include <linux/io.h> 24 #include <linux/delay.h> 25 #include <linux/pm.h> 26 #include <linux/init.h> 27 #include <linux/slab.h> 28 #include <linux/vmalloc.h> 29 #include <linux/mutex.h> 30 31 #include <sound/core.h> 32 #include <sound/control.h> 33 #include <sound/info.h> 34 #include <sound/asoundef.h> 35 #include "cs46xx.h" 36 37 #include "cs46xx_lib.h" 38 #include "dsp_spos.h" 39 40 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip, 41 struct dsp_scb_descriptor * fg_entry); 42 43 static enum wide_opcode wide_opcodes[] = { 44 WIDE_FOR_BEGIN_LOOP, 45 WIDE_FOR_BEGIN_LOOP2, 46 WIDE_COND_GOTO_ADDR, 47 WIDE_COND_GOTO_CALL, 48 WIDE_TBEQ_COND_GOTO_ADDR, 49 WIDE_TBEQ_COND_CALL_ADDR, 50 WIDE_TBEQ_NCOND_GOTO_ADDR, 51 WIDE_TBEQ_NCOND_CALL_ADDR, 52 WIDE_TBEQ_COND_GOTO1_ADDR, 53 WIDE_TBEQ_COND_CALL1_ADDR, 54 WIDE_TBEQ_NCOND_GOTOI_ADDR, 55 WIDE_TBEQ_NCOND_CALL1_ADDR 56 }; 57 58 static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size, 59 u32 overlay_begin_address) 60 { 61 unsigned int i = 0, j, nreallocated = 0; 62 u32 hival,loval,address; 63 u32 mop_operands,mop_type,wide_op; 64 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 65 66 if (snd_BUG_ON(size %2)) 67 return -EINVAL; 68 69 while (i < size) { 70 loval = data[i++]; 71 hival = data[i++]; 72 73 if (ins->code.offset > 0) { 74 mop_operands = (hival >> 6) & 0x03fff; 75 mop_type = mop_operands >> 10; 76 77 /* check for wide type instruction */ 78 if (mop_type == 0 && 79 (mop_operands & WIDE_LADD_INSTR_MASK) == 0 && 80 (mop_operands & WIDE_INSTR_MASK) != 0) { 81 wide_op = loval & 0x7f; 82 for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) { 83 if (wide_opcodes[j] == wide_op) { 84 /* need to reallocate instruction */ 85 address = (hival & 0x00FFF) << 5; 86 address |= loval >> 15; 87 88 dev_dbg(chip->card->dev, 89 "handle_wideop[1]: %05x:%05x addr %04x\n", 90 hival, loval, address); 91 92 if ( !(address & 0x8000) ) { 93 address += (ins->code.offset / 2) - overlay_begin_address; 94 } else { 95 dev_dbg(chip->card->dev, 96 "handle_wideop[1]: ROM symbol not reallocated\n"); 97 } 98 99 hival &= 0xFF000; 100 loval &= 0x07FFF; 101 102 hival |= ( (address >> 5) & 0x00FFF); 103 loval |= ( (address << 15) & 0xF8000); 104 105 address = (hival & 0x00FFF) << 5; 106 address |= loval >> 15; 107 108 dev_dbg(chip->card->dev, 109 "handle_wideop:[2] %05x:%05x addr %04x\n", 110 hival, loval, address); 111 nreallocated++; 112 } /* wide_opcodes[j] == wide_op */ 113 } /* for */ 114 } /* mod_type == 0 ... */ 115 } /* ins->code.offset > 0 */ 116 117 ins->code.data[ins->code.size++] = loval; 118 ins->code.data[ins->code.size++] = hival; 119 } 120 121 dev_dbg(chip->card->dev, 122 "dsp_spos: %d instructions reallocated\n", nreallocated); 123 return nreallocated; 124 } 125 126 static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type) 127 { 128 int i; 129 for (i = 0;i < module->nsegments; ++i) { 130 if (module->segments[i].segment_type == seg_type) { 131 return (module->segments + i); 132 } 133 } 134 135 return NULL; 136 }; 137 138 static int find_free_symbol_index (struct dsp_spos_instance * ins) 139 { 140 int index = ins->symbol_table.nsymbols,i; 141 142 for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) { 143 if (ins->symbol_table.symbols[i].deleted) { 144 index = i; 145 break; 146 } 147 } 148 149 return index; 150 } 151 152 static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module) 153 { 154 int i; 155 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 156 157 if (module->symbol_table.nsymbols > 0) { 158 if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") && 159 module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) { 160 module->overlay_begin_address = module->symbol_table.symbols[0].address; 161 } 162 } 163 164 for (i = 0;i < module->symbol_table.nsymbols; ++i) { 165 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) { 166 dev_err(chip->card->dev, 167 "dsp_spos: symbol table is full\n"); 168 return -ENOMEM; 169 } 170 171 172 if (cs46xx_dsp_lookup_symbol(chip, 173 module->symbol_table.symbols[i].symbol_name, 174 module->symbol_table.symbols[i].symbol_type) == NULL) { 175 176 ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i]; 177 ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address); 178 ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module; 179 ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0; 180 181 if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index) 182 ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols; 183 184 ins->symbol_table.nsymbols++; 185 } else { 186 #if 0 187 dev_dbg(chip->card->dev, 188 "dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n", 189 module->symbol_table.symbols[i].symbol_name); */ 190 #endif 191 } 192 } 193 194 return 0; 195 } 196 197 static struct dsp_symbol_entry * 198 add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type) 199 { 200 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 201 struct dsp_symbol_entry * symbol = NULL; 202 int index; 203 204 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) { 205 dev_err(chip->card->dev, "dsp_spos: symbol table is full\n"); 206 return NULL; 207 } 208 209 if (cs46xx_dsp_lookup_symbol(chip, 210 symbol_name, 211 type) != NULL) { 212 dev_err(chip->card->dev, 213 "dsp_spos: symbol <%s> duplicated\n", symbol_name); 214 return NULL; 215 } 216 217 index = find_free_symbol_index (ins); 218 219 strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name); 220 ins->symbol_table.symbols[index].address = address; 221 ins->symbol_table.symbols[index].symbol_type = type; 222 ins->symbol_table.symbols[index].module = NULL; 223 ins->symbol_table.symbols[index].deleted = 0; 224 symbol = (ins->symbol_table.symbols + index); 225 226 if (index > ins->symbol_table.highest_frag_index) 227 ins->symbol_table.highest_frag_index = index; 228 229 if (index == ins->symbol_table.nsymbols) 230 ins->symbol_table.nsymbols++; /* no frag. in list */ 231 232 return symbol; 233 } 234 235 struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip) 236 { 237 struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL); 238 239 if (ins == NULL) 240 return NULL; 241 242 /* better to use vmalloc for this big table */ 243 ins->symbol_table.symbols = 244 vmalloc(array_size(DSP_MAX_SYMBOLS, 245 sizeof(struct dsp_symbol_entry))); 246 ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL); 247 ins->modules = kmalloc_array(DSP_MAX_MODULES, 248 sizeof(struct dsp_module_desc), 249 GFP_KERNEL); 250 if (!ins->symbol_table.symbols || !ins->code.data || !ins->modules) { 251 cs46xx_dsp_spos_destroy(chip); 252 goto error; 253 } 254 ins->symbol_table.nsymbols = 0; 255 ins->symbol_table.highest_frag_index = 0; 256 ins->code.offset = 0; 257 ins->code.size = 0; 258 ins->nscb = 0; 259 ins->ntask = 0; 260 ins->nmodules = 0; 261 262 /* default SPDIF input sample rate 263 to 48000 khz */ 264 ins->spdif_in_sample_rate = 48000; 265 266 /* maximize volume */ 267 ins->dac_volume_right = 0x8000; 268 ins->dac_volume_left = 0x8000; 269 ins->spdif_input_volume_right = 0x8000; 270 ins->spdif_input_volume_left = 0x8000; 271 272 /* set left and right validity bits and 273 default channel status */ 274 ins->spdif_csuv_default = 275 ins->spdif_csuv_stream = 276 /* byte 0 */ ((unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF & 0xff)) << 24) | 277 /* byte 1 */ ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) | 278 /* byte 3 */ (unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) | 279 /* left and right validity bits */ (1 << 13) | (1 << 12); 280 281 return ins; 282 283 error: 284 kfree(ins->modules); 285 kfree(ins->code.data); 286 vfree(ins->symbol_table.symbols); 287 kfree(ins); 288 return NULL; 289 } 290 291 void cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip) 292 { 293 int i; 294 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 295 296 if (snd_BUG_ON(!ins)) 297 return; 298 299 mutex_lock(&chip->spos_mutex); 300 for (i = 0; i < ins->nscb; ++i) { 301 if (ins->scbs[i].deleted) continue; 302 303 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) ); 304 #ifdef CONFIG_PM_SLEEP 305 kfree(ins->scbs[i].data); 306 #endif 307 } 308 309 kfree(ins->code.data); 310 vfree(ins->symbol_table.symbols); 311 kfree(ins->modules); 312 kfree(ins); 313 mutex_unlock(&chip->spos_mutex); 314 } 315 316 static int dsp_load_parameter(struct snd_cs46xx *chip, 317 struct dsp_segment_desc *parameter) 318 { 319 u32 doffset, dsize; 320 321 if (!parameter) { 322 dev_dbg(chip->card->dev, 323 "dsp_spos: module got no parameter segment\n"); 324 return 0; 325 } 326 327 doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET); 328 dsize = parameter->size * 4; 329 330 dev_dbg(chip->card->dev, 331 "dsp_spos: downloading parameter data to chip (%08x-%08x)\n", 332 doffset,doffset + dsize); 333 if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) { 334 dev_err(chip->card->dev, 335 "dsp_spos: failed to download parameter data to DSP\n"); 336 return -EINVAL; 337 } 338 return 0; 339 } 340 341 static int dsp_load_sample(struct snd_cs46xx *chip, 342 struct dsp_segment_desc *sample) 343 { 344 u32 doffset, dsize; 345 346 if (!sample) { 347 dev_dbg(chip->card->dev, 348 "dsp_spos: module got no sample segment\n"); 349 return 0; 350 } 351 352 doffset = (sample->offset * 4 + DSP_SAMPLE_BYTE_OFFSET); 353 dsize = sample->size * 4; 354 355 dev_dbg(chip->card->dev, 356 "dsp_spos: downloading sample data to chip (%08x-%08x)\n", 357 doffset,doffset + dsize); 358 359 if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) { 360 dev_err(chip->card->dev, 361 "dsp_spos: failed to sample data to DSP\n"); 362 return -EINVAL; 363 } 364 return 0; 365 } 366 367 int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module) 368 { 369 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 370 struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM); 371 u32 doffset, dsize; 372 int err; 373 374 if (ins->nmodules == DSP_MAX_MODULES - 1) { 375 dev_err(chip->card->dev, 376 "dsp_spos: to many modules loaded into DSP\n"); 377 return -ENOMEM; 378 } 379 380 dev_dbg(chip->card->dev, 381 "dsp_spos: loading module %s into DSP\n", module->module_name); 382 383 if (ins->nmodules == 0) { 384 dev_dbg(chip->card->dev, "dsp_spos: clearing parameter area\n"); 385 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE); 386 } 387 388 err = dsp_load_parameter(chip, get_segment_desc(module, 389 SEGTYPE_SP_PARAMETER)); 390 if (err < 0) 391 return err; 392 393 if (ins->nmodules == 0) { 394 dev_dbg(chip->card->dev, "dsp_spos: clearing sample area\n"); 395 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE); 396 } 397 398 err = dsp_load_sample(chip, get_segment_desc(module, 399 SEGTYPE_SP_SAMPLE)); 400 if (err < 0) 401 return err; 402 403 if (ins->nmodules == 0) { 404 dev_dbg(chip->card->dev, "dsp_spos: clearing code area\n"); 405 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE); 406 } 407 408 if (code == NULL) { 409 dev_dbg(chip->card->dev, 410 "dsp_spos: module got no code segment\n"); 411 } else { 412 if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) { 413 dev_err(chip->card->dev, 414 "dsp_spos: no space available in DSP\n"); 415 return -ENOMEM; 416 } 417 418 module->load_address = ins->code.offset; 419 module->overlay_begin_address = 0x000; 420 421 /* if module has a code segment it must have 422 symbol table */ 423 if (snd_BUG_ON(!module->symbol_table.symbols)) 424 return -ENOMEM; 425 if (add_symbols(chip,module)) { 426 dev_err(chip->card->dev, 427 "dsp_spos: failed to load symbol table\n"); 428 return -ENOMEM; 429 } 430 431 doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET); 432 dsize = code->size * 4; 433 dev_dbg(chip->card->dev, 434 "dsp_spos: downloading code to chip (%08x-%08x)\n", 435 doffset,doffset + dsize); 436 437 module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address); 438 439 if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) { 440 dev_err(chip->card->dev, 441 "dsp_spos: failed to download code to DSP\n"); 442 return -EINVAL; 443 } 444 445 ins->code.offset += code->size; 446 } 447 448 /* NOTE: module segments and symbol table must be 449 statically allocated. Case that module data is 450 not generated by the ospparser */ 451 ins->modules[ins->nmodules] = *module; 452 ins->nmodules++; 453 454 return 0; 455 } 456 457 struct dsp_symbol_entry * 458 cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type) 459 { 460 int i; 461 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 462 463 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) { 464 465 if (ins->symbol_table.symbols[i].deleted) 466 continue; 467 468 if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) && 469 ins->symbol_table.symbols[i].symbol_type == symbol_type) { 470 return (ins->symbol_table.symbols + i); 471 } 472 } 473 474 #if 0 475 dev_err(chip->card->dev, "dsp_spos: symbol <%s> type %02x not found\n", 476 symbol_name,symbol_type); 477 #endif 478 479 return NULL; 480 } 481 482 483 #ifdef CONFIG_SND_PROC_FS 484 static struct dsp_symbol_entry * 485 cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type) 486 { 487 int i; 488 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 489 490 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) { 491 492 if (ins->symbol_table.symbols[i].deleted) 493 continue; 494 495 if (ins->symbol_table.symbols[i].address == address && 496 ins->symbol_table.symbols[i].symbol_type == symbol_type) { 497 return (ins->symbol_table.symbols + i); 498 } 499 } 500 501 502 return NULL; 503 } 504 505 506 static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry, 507 struct snd_info_buffer *buffer) 508 { 509 struct snd_cs46xx *chip = entry->private_data; 510 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 511 int i; 512 513 snd_iprintf(buffer, "SYMBOLS:\n"); 514 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) { 515 char *module_str = "system"; 516 517 if (ins->symbol_table.symbols[i].deleted) 518 continue; 519 520 if (ins->symbol_table.symbols[i].module != NULL) { 521 module_str = ins->symbol_table.symbols[i].module->module_name; 522 } 523 524 525 snd_iprintf(buffer, "%04X <%02X> %s [%s]\n", 526 ins->symbol_table.symbols[i].address, 527 ins->symbol_table.symbols[i].symbol_type, 528 ins->symbol_table.symbols[i].symbol_name, 529 module_str); 530 } 531 } 532 533 534 static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry, 535 struct snd_info_buffer *buffer) 536 { 537 struct snd_cs46xx *chip = entry->private_data; 538 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 539 int i,j; 540 541 mutex_lock(&chip->spos_mutex); 542 snd_iprintf(buffer, "MODULES:\n"); 543 for ( i = 0; i < ins->nmodules; ++i ) { 544 snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name); 545 snd_iprintf(buffer, " %d symbols\n", ins->modules[i].symbol_table.nsymbols); 546 snd_iprintf(buffer, " %d fixups\n", ins->modules[i].nfixups); 547 548 for (j = 0; j < ins->modules[i].nsegments; ++ j) { 549 struct dsp_segment_desc * desc = (ins->modules[i].segments + j); 550 snd_iprintf(buffer, " segment %02x offset %08x size %08x\n", 551 desc->segment_type,desc->offset, desc->size); 552 } 553 } 554 mutex_unlock(&chip->spos_mutex); 555 } 556 557 static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry, 558 struct snd_info_buffer *buffer) 559 { 560 struct snd_cs46xx *chip = entry->private_data; 561 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 562 int i, j, col; 563 void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET; 564 565 mutex_lock(&chip->spos_mutex); 566 snd_iprintf(buffer, "TASK TREES:\n"); 567 for ( i = 0; i < ins->ntask; ++i) { 568 snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name); 569 570 for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) { 571 u32 val; 572 if (col == 4) { 573 snd_iprintf(buffer,"\n"); 574 col = 0; 575 } 576 val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32)); 577 snd_iprintf(buffer,"%08x ",val); 578 } 579 } 580 581 snd_iprintf(buffer,"\n"); 582 mutex_unlock(&chip->spos_mutex); 583 } 584 585 static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry, 586 struct snd_info_buffer *buffer) 587 { 588 struct snd_cs46xx *chip = entry->private_data; 589 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 590 int i; 591 592 mutex_lock(&chip->spos_mutex); 593 snd_iprintf(buffer, "SCB's:\n"); 594 for ( i = 0; i < ins->nscb; ++i) { 595 if (ins->scbs[i].deleted) 596 continue; 597 snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name); 598 599 if (ins->scbs[i].parent_scb_ptr != NULL) { 600 snd_iprintf(buffer,"parent [%s:%04x] ", 601 ins->scbs[i].parent_scb_ptr->scb_name, 602 ins->scbs[i].parent_scb_ptr->address); 603 } else snd_iprintf(buffer,"parent [none] "); 604 605 snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x] task_entry [%s:%04x]\n", 606 ins->scbs[i].sub_list_ptr->scb_name, 607 ins->scbs[i].sub_list_ptr->address, 608 ins->scbs[i].next_scb_ptr->scb_name, 609 ins->scbs[i].next_scb_ptr->address, 610 ins->scbs[i].task_entry->symbol_name, 611 ins->scbs[i].task_entry->address); 612 } 613 614 snd_iprintf(buffer,"\n"); 615 mutex_unlock(&chip->spos_mutex); 616 } 617 618 static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry, 619 struct snd_info_buffer *buffer) 620 { 621 struct snd_cs46xx *chip = entry->private_data; 622 /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */ 623 unsigned int i, col = 0; 624 void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET; 625 struct dsp_symbol_entry * symbol; 626 627 for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) { 628 if (col == 4) { 629 snd_iprintf(buffer,"\n"); 630 col = 0; 631 } 632 633 if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) { 634 col = 0; 635 snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name); 636 } 637 638 if (col == 0) { 639 snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32)); 640 } 641 642 snd_iprintf(buffer,"%08X ",readl(dst + i)); 643 } 644 } 645 646 static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry, 647 struct snd_info_buffer *buffer) 648 { 649 struct snd_cs46xx *chip = entry->private_data; 650 int i,col = 0; 651 void __iomem *dst = chip->region.idx[2].remap_addr; 652 653 snd_iprintf(buffer,"PCMREADER:\n"); 654 for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) { 655 if (col == 4) { 656 snd_iprintf(buffer,"\n"); 657 col = 0; 658 } 659 660 if (col == 0) { 661 snd_iprintf(buffer, "%04X ",i); 662 } 663 664 snd_iprintf(buffer,"%08X ",readl(dst + i)); 665 } 666 667 snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n"); 668 669 col = 0; 670 for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) { 671 if (col == 4) { 672 snd_iprintf(buffer,"\n"); 673 col = 0; 674 } 675 676 if (col == 0) { 677 snd_iprintf(buffer, "%04X ",i); 678 } 679 680 snd_iprintf(buffer,"%08X ",readl(dst + i)); 681 } 682 683 snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n"); 684 col = 0; 685 for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) { 686 if (col == 4) { 687 snd_iprintf(buffer,"\n"); 688 col = 0; 689 } 690 691 if (col == 0) { 692 snd_iprintf(buffer, "%04X ",i); 693 } 694 695 snd_iprintf(buffer,"%08X ",readl(dst + i)); 696 } 697 698 699 snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n"); 700 col = 0; 701 for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) { 702 if (col == 4) { 703 snd_iprintf(buffer,"\n"); 704 col = 0; 705 } 706 707 if (col == 0) { 708 snd_iprintf(buffer, "%04X ",i); 709 } 710 711 snd_iprintf(buffer,"%08X ",readl(dst + i)); 712 } 713 714 snd_iprintf(buffer,"\n...\n"); 715 col = 0; 716 717 for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) { 718 if (col == 4) { 719 snd_iprintf(buffer,"\n"); 720 col = 0; 721 } 722 723 if (col == 0) { 724 snd_iprintf(buffer, "%04X ",i); 725 } 726 727 snd_iprintf(buffer,"%08X ",readl(dst + i)); 728 } 729 730 731 snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n"); 732 col = 0; 733 for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) { 734 if (col == 4) { 735 snd_iprintf(buffer,"\n"); 736 col = 0; 737 } 738 739 if (col == 0) { 740 snd_iprintf(buffer, "%04X ",i); 741 } 742 743 snd_iprintf(buffer,"%08X ",readl(dst + i)); 744 } 745 746 snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n"); 747 col = 0; 748 for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) { 749 if (col == 4) { 750 snd_iprintf(buffer,"\n"); 751 col = 0; 752 } 753 754 if (col == 0) { 755 snd_iprintf(buffer, "%04X ",i); 756 } 757 758 snd_iprintf(buffer,"%08X ",readl(dst + i)); 759 } 760 #if 0 761 snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n"); 762 col = 0; 763 for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) { 764 if (col == 4) { 765 snd_iprintf(buffer,"\n"); 766 col = 0; 767 } 768 769 if (col == 0) { 770 snd_iprintf(buffer, "%04X ",i); 771 } 772 773 snd_iprintf(buffer,"%08X ",readl(dst + i)); 774 } 775 #endif 776 777 snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n"); 778 col = 0; 779 for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) { 780 if (col == 4) { 781 snd_iprintf(buffer,"\n"); 782 col = 0; 783 } 784 785 if (col == 0) { 786 snd_iprintf(buffer, "%04X ",i); 787 } 788 789 snd_iprintf(buffer,"%08X ",readl(dst + i)); 790 } 791 snd_iprintf(buffer,"\n"); 792 } 793 794 int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip) 795 { 796 struct snd_info_entry *entry; 797 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 798 int i; 799 800 ins->snd_card = card; 801 802 if ((entry = snd_info_create_card_entry(card, "dsp", card->proc_root)) != NULL) { 803 entry->content = SNDRV_INFO_CONTENT_TEXT; 804 entry->mode = S_IFDIR | 0555; 805 806 if (snd_info_register(entry) < 0) { 807 snd_info_free_entry(entry); 808 entry = NULL; 809 } 810 } 811 812 ins->proc_dsp_dir = entry; 813 814 if (!ins->proc_dsp_dir) 815 return -ENOMEM; 816 817 if ((entry = snd_info_create_card_entry(card, "spos_symbols", ins->proc_dsp_dir)) != NULL) { 818 entry->content = SNDRV_INFO_CONTENT_TEXT; 819 entry->private_data = chip; 820 entry->mode = S_IFREG | 0644; 821 entry->c.text.read = cs46xx_dsp_proc_symbol_table_read; 822 if (snd_info_register(entry) < 0) { 823 snd_info_free_entry(entry); 824 entry = NULL; 825 } 826 } 827 ins->proc_sym_info_entry = entry; 828 829 if ((entry = snd_info_create_card_entry(card, "spos_modules", ins->proc_dsp_dir)) != NULL) { 830 entry->content = SNDRV_INFO_CONTENT_TEXT; 831 entry->private_data = chip; 832 entry->mode = S_IFREG | 0644; 833 entry->c.text.read = cs46xx_dsp_proc_modules_read; 834 if (snd_info_register(entry) < 0) { 835 snd_info_free_entry(entry); 836 entry = NULL; 837 } 838 } 839 ins->proc_modules_info_entry = entry; 840 841 if ((entry = snd_info_create_card_entry(card, "parameter", ins->proc_dsp_dir)) != NULL) { 842 entry->content = SNDRV_INFO_CONTENT_TEXT; 843 entry->private_data = chip; 844 entry->mode = S_IFREG | 0644; 845 entry->c.text.read = cs46xx_dsp_proc_parameter_dump_read; 846 if (snd_info_register(entry) < 0) { 847 snd_info_free_entry(entry); 848 entry = NULL; 849 } 850 } 851 ins->proc_parameter_dump_info_entry = entry; 852 853 if ((entry = snd_info_create_card_entry(card, "sample", ins->proc_dsp_dir)) != NULL) { 854 entry->content = SNDRV_INFO_CONTENT_TEXT; 855 entry->private_data = chip; 856 entry->mode = S_IFREG | 0644; 857 entry->c.text.read = cs46xx_dsp_proc_sample_dump_read; 858 if (snd_info_register(entry) < 0) { 859 snd_info_free_entry(entry); 860 entry = NULL; 861 } 862 } 863 ins->proc_sample_dump_info_entry = entry; 864 865 if ((entry = snd_info_create_card_entry(card, "task_tree", ins->proc_dsp_dir)) != NULL) { 866 entry->content = SNDRV_INFO_CONTENT_TEXT; 867 entry->private_data = chip; 868 entry->mode = S_IFREG | 0644; 869 entry->c.text.read = cs46xx_dsp_proc_task_tree_read; 870 if (snd_info_register(entry) < 0) { 871 snd_info_free_entry(entry); 872 entry = NULL; 873 } 874 } 875 ins->proc_task_info_entry = entry; 876 877 if ((entry = snd_info_create_card_entry(card, "scb_info", ins->proc_dsp_dir)) != NULL) { 878 entry->content = SNDRV_INFO_CONTENT_TEXT; 879 entry->private_data = chip; 880 entry->mode = S_IFREG | 0644; 881 entry->c.text.read = cs46xx_dsp_proc_scb_read; 882 if (snd_info_register(entry) < 0) { 883 snd_info_free_entry(entry); 884 entry = NULL; 885 } 886 } 887 ins->proc_scb_info_entry = entry; 888 889 mutex_lock(&chip->spos_mutex); 890 /* register/update SCB's entries on proc */ 891 for (i = 0; i < ins->nscb; ++i) { 892 if (ins->scbs[i].deleted) continue; 893 894 cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i)); 895 } 896 mutex_unlock(&chip->spos_mutex); 897 898 return 0; 899 } 900 901 int cs46xx_dsp_proc_done (struct snd_cs46xx *chip) 902 { 903 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 904 int i; 905 906 if (!ins) 907 return 0; 908 909 snd_info_free_entry(ins->proc_sym_info_entry); 910 ins->proc_sym_info_entry = NULL; 911 912 snd_info_free_entry(ins->proc_modules_info_entry); 913 ins->proc_modules_info_entry = NULL; 914 915 snd_info_free_entry(ins->proc_parameter_dump_info_entry); 916 ins->proc_parameter_dump_info_entry = NULL; 917 918 snd_info_free_entry(ins->proc_sample_dump_info_entry); 919 ins->proc_sample_dump_info_entry = NULL; 920 921 snd_info_free_entry(ins->proc_scb_info_entry); 922 ins->proc_scb_info_entry = NULL; 923 924 snd_info_free_entry(ins->proc_task_info_entry); 925 ins->proc_task_info_entry = NULL; 926 927 mutex_lock(&chip->spos_mutex); 928 for (i = 0; i < ins->nscb; ++i) { 929 if (ins->scbs[i].deleted) continue; 930 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) ); 931 } 932 mutex_unlock(&chip->spos_mutex); 933 934 snd_info_free_entry(ins->proc_dsp_dir); 935 ins->proc_dsp_dir = NULL; 936 937 return 0; 938 } 939 #endif /* CONFIG_SND_PROC_FS */ 940 941 static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data, 942 u32 dest, int size) 943 { 944 void __iomem *spdst = chip->region.idx[1].remap_addr + 945 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32); 946 int i; 947 948 for (i = 0; i < size; ++i) { 949 dev_dbg(chip->card->dev, "addr %p, val %08x\n", 950 spdst, task_data[i]); 951 writel(task_data[i],spdst); 952 spdst += sizeof(u32); 953 } 954 } 955 956 static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest) 957 { 958 void __iomem *spdst = chip->region.idx[1].remap_addr + 959 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32); 960 int i; 961 962 for (i = 0; i < 0x10; ++i) { 963 dev_dbg(chip->card->dev, "addr %p, val %08x\n", 964 spdst, scb_data[i]); 965 writel(scb_data[i],spdst); 966 spdst += sizeof(u32); 967 } 968 } 969 970 static int find_free_scb_index (struct dsp_spos_instance * ins) 971 { 972 int index = ins->nscb, i; 973 974 for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) { 975 if (ins->scbs[i].deleted) { 976 index = i; 977 break; 978 } 979 } 980 981 return index; 982 } 983 984 static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest) 985 { 986 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 987 struct dsp_scb_descriptor * desc = NULL; 988 int index; 989 990 if (ins->nscb == DSP_MAX_SCB_DESC - 1) { 991 dev_err(chip->card->dev, 992 "dsp_spos: got no place for other SCB\n"); 993 return NULL; 994 } 995 996 index = find_free_scb_index (ins); 997 998 memset(&ins->scbs[index], 0, sizeof(ins->scbs[index])); 999 strcpy(ins->scbs[index].scb_name, name); 1000 ins->scbs[index].address = dest; 1001 ins->scbs[index].index = index; 1002 ins->scbs[index].ref_count = 1; 1003 1004 desc = (ins->scbs + index); 1005 ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER); 1006 1007 if (index > ins->scb_highest_frag_index) 1008 ins->scb_highest_frag_index = index; 1009 1010 if (index == ins->nscb) 1011 ins->nscb++; 1012 1013 return desc; 1014 } 1015 1016 static struct dsp_task_descriptor * 1017 _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size) 1018 { 1019 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1020 struct dsp_task_descriptor * desc = NULL; 1021 1022 if (ins->ntask == DSP_MAX_TASK_DESC - 1) { 1023 dev_err(chip->card->dev, 1024 "dsp_spos: got no place for other TASK\n"); 1025 return NULL; 1026 } 1027 1028 if (name) 1029 strcpy(ins->tasks[ins->ntask].task_name, name); 1030 else 1031 strcpy(ins->tasks[ins->ntask].task_name, "(NULL)"); 1032 ins->tasks[ins->ntask].address = dest; 1033 ins->tasks[ins->ntask].size = size; 1034 1035 /* quick find in list */ 1036 ins->tasks[ins->ntask].index = ins->ntask; 1037 desc = (ins->tasks + ins->ntask); 1038 ins->ntask++; 1039 1040 if (name) 1041 add_symbol (chip,name,dest,SYMBOL_PARAMETER); 1042 return desc; 1043 } 1044 1045 #define SCB_BYTES (0x10 * 4) 1046 1047 struct dsp_scb_descriptor * 1048 cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest) 1049 { 1050 struct dsp_scb_descriptor * desc; 1051 1052 #ifdef CONFIG_PM_SLEEP 1053 /* copy the data for resume */ 1054 scb_data = kmemdup(scb_data, SCB_BYTES, GFP_KERNEL); 1055 if (!scb_data) 1056 return NULL; 1057 #endif 1058 1059 desc = _map_scb (chip,name,dest); 1060 if (desc) { 1061 desc->data = scb_data; 1062 _dsp_create_scb(chip,scb_data,dest); 1063 } else { 1064 dev_err(chip->card->dev, "dsp_spos: failed to map SCB\n"); 1065 #ifdef CONFIG_PM_SLEEP 1066 kfree(scb_data); 1067 #endif 1068 } 1069 1070 return desc; 1071 } 1072 1073 1074 static struct dsp_task_descriptor * 1075 cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data, 1076 u32 dest, int size) 1077 { 1078 struct dsp_task_descriptor * desc; 1079 1080 desc = _map_task_tree (chip,name,dest,size); 1081 if (desc) { 1082 desc->data = task_data; 1083 _dsp_create_task_tree(chip,task_data,dest,size); 1084 } else { 1085 dev_err(chip->card->dev, "dsp_spos: failed to map TASK\n"); 1086 } 1087 1088 return desc; 1089 } 1090 1091 int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip) 1092 { 1093 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1094 struct dsp_symbol_entry * fg_task_tree_header_code; 1095 struct dsp_symbol_entry * task_tree_header_code; 1096 struct dsp_symbol_entry * task_tree_thread; 1097 struct dsp_symbol_entry * null_algorithm; 1098 struct dsp_symbol_entry * magic_snoop_task; 1099 1100 struct dsp_scb_descriptor * timing_master_scb; 1101 struct dsp_scb_descriptor * codec_out_scb; 1102 struct dsp_scb_descriptor * codec_in_scb; 1103 struct dsp_scb_descriptor * src_task_scb; 1104 struct dsp_scb_descriptor * master_mix_scb; 1105 struct dsp_scb_descriptor * rear_mix_scb; 1106 struct dsp_scb_descriptor * record_mix_scb; 1107 struct dsp_scb_descriptor * write_back_scb; 1108 struct dsp_scb_descriptor * vari_decimate_scb; 1109 struct dsp_scb_descriptor * rear_codec_out_scb; 1110 struct dsp_scb_descriptor * clfe_codec_out_scb; 1111 struct dsp_scb_descriptor * magic_snoop_scb; 1112 1113 int fifo_addr, fifo_span, valid_slots; 1114 1115 static struct dsp_spos_control_block sposcb = { 1116 /* 0 */ HFG_TREE_SCB,HFG_STACK, 1117 /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR, 1118 /* 2 */ DSP_SPOS_DC,0, 1119 /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC, 1120 /* 4 */ 0,0, 1121 /* 5 */ DSP_SPOS_UU,0, 1122 /* 6 */ FG_TASK_HEADER_ADDR,0, 1123 /* 7 */ 0,0, 1124 /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC, 1125 /* 9 */ 0, 1126 /* A */ 0,HFG_FIRST_EXECUTE_MODE, 1127 /* B */ DSP_SPOS_UU,DSP_SPOS_UU, 1128 /* C */ DSP_SPOS_DC_DC, 1129 /* D */ DSP_SPOS_DC_DC, 1130 /* E */ DSP_SPOS_DC_DC, 1131 /* F */ DSP_SPOS_DC_DC 1132 }; 1133 1134 cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10); 1135 1136 null_algorithm = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE); 1137 if (null_algorithm == NULL) { 1138 dev_err(chip->card->dev, 1139 "dsp_spos: symbol NULLALGORITHM not found\n"); 1140 return -EIO; 1141 } 1142 1143 fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE); 1144 if (fg_task_tree_header_code == NULL) { 1145 dev_err(chip->card->dev, 1146 "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n"); 1147 return -EIO; 1148 } 1149 1150 task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE); 1151 if (task_tree_header_code == NULL) { 1152 dev_err(chip->card->dev, 1153 "dsp_spos: symbol TASKTREEHEADERCODE not found\n"); 1154 return -EIO; 1155 } 1156 1157 task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE); 1158 if (task_tree_thread == NULL) { 1159 dev_err(chip->card->dev, 1160 "dsp_spos: symbol TASKTREETHREAD not found\n"); 1161 return -EIO; 1162 } 1163 1164 magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE); 1165 if (magic_snoop_task == NULL) { 1166 dev_err(chip->card->dev, 1167 "dsp_spos: symbol MAGICSNOOPTASK not found\n"); 1168 return -EIO; 1169 } 1170 1171 { 1172 /* create the null SCB */ 1173 static struct dsp_generic_scb null_scb = { 1174 { 0, 0, 0, 0 }, 1175 { 0, 0, 0, 0, 0 }, 1176 NULL_SCB_ADDR, NULL_SCB_ADDR, 1177 0, 0, 0, 0, 0, 1178 { 1179 0,0, 1180 0,0, 1181 } 1182 }; 1183 1184 null_scb.entry_point = null_algorithm->address; 1185 ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR); 1186 ins->the_null_scb->task_entry = null_algorithm; 1187 ins->the_null_scb->sub_list_ptr = ins->the_null_scb; 1188 ins->the_null_scb->next_scb_ptr = ins->the_null_scb; 1189 ins->the_null_scb->parent_scb_ptr = NULL; 1190 cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb); 1191 } 1192 1193 { 1194 /* setup foreground task tree */ 1195 static struct dsp_task_tree_control_block fg_task_tree_hdr = { 1196 { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10), 1197 DSP_SPOS_DC_DC, 1198 DSP_SPOS_DC_DC, 1199 0x0000,DSP_SPOS_DC, 1200 DSP_SPOS_DC, DSP_SPOS_DC, 1201 DSP_SPOS_DC_DC, 1202 DSP_SPOS_DC_DC, 1203 DSP_SPOS_DC_DC, 1204 DSP_SPOS_DC,DSP_SPOS_DC }, 1205 1206 { 1207 BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR, 1208 0, 1209 FG_TASK_HEADER_ADDR + TCBData, 1210 }, 1211 1212 { 1213 4,0, 1214 1,0, 1215 2,SPOSCB_ADDR + HFGFlags, 1216 0,0, 1217 FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK 1218 }, 1219 1220 { 1221 DSP_SPOS_DC,0, 1222 DSP_SPOS_DC,DSP_SPOS_DC, 1223 DSP_SPOS_DC,DSP_SPOS_DC, 1224 DSP_SPOS_DC,DSP_SPOS_DC, 1225 DSP_SPOS_DC,DSP_SPOS_DC, 1226 DSP_SPOS_DCDC, 1227 DSP_SPOS_UU,1, 1228 DSP_SPOS_DCDC, 1229 DSP_SPOS_DCDC, 1230 DSP_SPOS_DCDC, 1231 DSP_SPOS_DCDC, 1232 DSP_SPOS_DCDC, 1233 DSP_SPOS_DCDC, 1234 DSP_SPOS_DCDC, 1235 DSP_SPOS_DCDC, 1236 DSP_SPOS_DCDC, 1237 DSP_SPOS_DCDC, 1238 DSP_SPOS_DCDC, 1239 DSP_SPOS_DCDC, 1240 DSP_SPOS_DCDC, 1241 DSP_SPOS_DCDC, 1242 DSP_SPOS_DCDC, 1243 DSP_SPOS_DCDC, 1244 DSP_SPOS_DCDC, 1245 DSP_SPOS_DCDC, 1246 DSP_SPOS_DCDC, 1247 DSP_SPOS_DCDC, 1248 DSP_SPOS_DCDC, 1249 DSP_SPOS_DCDC, 1250 DSP_SPOS_DCDC, 1251 DSP_SPOS_DCDC, 1252 DSP_SPOS_DCDC, 1253 DSP_SPOS_DCDC, 1254 DSP_SPOS_DCDC, 1255 DSP_SPOS_DCDC 1256 }, 1257 { 1258 FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU, 1259 0,0 1260 } 1261 }; 1262 1263 fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address; 1264 fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address; 1265 cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35); 1266 } 1267 1268 1269 { 1270 /* setup foreground task tree */ 1271 static struct dsp_task_tree_control_block bg_task_tree_hdr = { 1272 { DSP_SPOS_DC_DC, 1273 DSP_SPOS_DC_DC, 1274 DSP_SPOS_DC_DC, 1275 DSP_SPOS_DC, DSP_SPOS_DC, 1276 DSP_SPOS_DC, DSP_SPOS_DC, 1277 DSP_SPOS_DC_DC, 1278 DSP_SPOS_DC_DC, 1279 DSP_SPOS_DC_DC, 1280 DSP_SPOS_DC,DSP_SPOS_DC }, 1281 1282 { 1283 NULL_SCB_ADDR,NULL_SCB_ADDR, /* Set up the background to do nothing */ 1284 0, 1285 BG_TREE_SCB_ADDR + TCBData, 1286 }, 1287 1288 { 1289 9999,0, 1290 0,1, 1291 0,SPOSCB_ADDR + HFGFlags, 1292 0,0, 1293 BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK 1294 }, 1295 1296 { 1297 DSP_SPOS_DC,0, 1298 DSP_SPOS_DC,DSP_SPOS_DC, 1299 DSP_SPOS_DC,DSP_SPOS_DC, 1300 DSP_SPOS_DC,DSP_SPOS_DC, 1301 DSP_SPOS_DC,DSP_SPOS_DC, 1302 DSP_SPOS_DCDC, 1303 DSP_SPOS_UU,1, 1304 DSP_SPOS_DCDC, 1305 DSP_SPOS_DCDC, 1306 DSP_SPOS_DCDC, 1307 DSP_SPOS_DCDC, 1308 DSP_SPOS_DCDC, 1309 DSP_SPOS_DCDC, 1310 DSP_SPOS_DCDC, 1311 DSP_SPOS_DCDC, 1312 DSP_SPOS_DCDC, 1313 DSP_SPOS_DCDC, 1314 DSP_SPOS_DCDC, 1315 DSP_SPOS_DCDC, 1316 DSP_SPOS_DCDC, 1317 DSP_SPOS_DCDC, 1318 DSP_SPOS_DCDC, 1319 DSP_SPOS_DCDC, 1320 DSP_SPOS_DCDC, 1321 DSP_SPOS_DCDC, 1322 DSP_SPOS_DCDC, 1323 DSP_SPOS_DCDC, 1324 DSP_SPOS_DCDC, 1325 DSP_SPOS_DCDC, 1326 DSP_SPOS_DCDC, 1327 DSP_SPOS_DCDC, 1328 DSP_SPOS_DCDC, 1329 DSP_SPOS_DCDC, 1330 DSP_SPOS_DCDC, 1331 DSP_SPOS_DCDC 1332 }, 1333 { 1334 BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU, 1335 0,0 1336 } 1337 }; 1338 1339 bg_task_tree_hdr.links.entry_point = task_tree_header_code->address; 1340 bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address; 1341 cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35); 1342 } 1343 1344 /* create timing master SCB */ 1345 timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip); 1346 1347 /* create the CODEC output task */ 1348 codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000, 1349 MASTERMIX_SCB_ADDR, 1350 CODECOUT_SCB_ADDR,timing_master_scb, 1351 SCB_ON_PARENT_SUBLIST_SCB); 1352 1353 if (!codec_out_scb) goto _fail_end; 1354 /* create the master mix SCB */ 1355 master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB", 1356 MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR, 1357 codec_out_scb, 1358 SCB_ON_PARENT_SUBLIST_SCB); 1359 ins->master_mix_scb = master_mix_scb; 1360 1361 if (!master_mix_scb) goto _fail_end; 1362 1363 /* create codec in */ 1364 codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0, 1365 CODEC_INPUT_BUF1, 1366 CODECIN_SCB_ADDR,codec_out_scb, 1367 SCB_ON_PARENT_NEXT_SCB); 1368 if (!codec_in_scb) goto _fail_end; 1369 ins->codec_in_scb = codec_in_scb; 1370 1371 /* create write back scb */ 1372 write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB", 1373 WRITE_BACK_BUF1,WRITE_BACK_SPB, 1374 WRITEBACK_SCB_ADDR, 1375 timing_master_scb, 1376 SCB_ON_PARENT_NEXT_SCB); 1377 if (!write_back_scb) goto _fail_end; 1378 1379 { 1380 static struct dsp_mix2_ostream_spb mix2_ostream_spb = { 1381 0x00020000, 1382 0x0000ffff 1383 }; 1384 1385 if (!cs46xx_dsp_create_task_tree(chip, NULL, 1386 (u32 *)&mix2_ostream_spb, 1387 WRITE_BACK_SPB, 2)) 1388 goto _fail_end; 1389 } 1390 1391 /* input sample converter */ 1392 vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB", 1393 VARI_DECIMATE_BUF0, 1394 VARI_DECIMATE_BUF1, 1395 VARIDECIMATE_SCB_ADDR, 1396 write_back_scb, 1397 SCB_ON_PARENT_SUBLIST_SCB); 1398 if (!vari_decimate_scb) goto _fail_end; 1399 1400 /* create the record mixer SCB */ 1401 record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB", 1402 MIX_SAMPLE_BUF2, 1403 RECORD_MIXER_SCB_ADDR, 1404 vari_decimate_scb, 1405 SCB_ON_PARENT_SUBLIST_SCB); 1406 ins->record_mixer_scb = record_mix_scb; 1407 1408 if (!record_mix_scb) goto _fail_end; 1409 1410 valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV); 1411 1412 if (snd_BUG_ON(chip->nr_ac97_codecs != 1 && chip->nr_ac97_codecs != 2)) 1413 goto _fail_end; 1414 1415 if (chip->nr_ac97_codecs == 1) { 1416 /* output on slot 5 and 11 1417 on primary CODEC */ 1418 fifo_addr = 0x20; 1419 fifo_span = 0x60; 1420 1421 /* enable slot 5 and 11 */ 1422 valid_slots |= ACOSV_SLV5 | ACOSV_SLV11; 1423 } else { 1424 /* output on slot 7 and 8 1425 on secondary CODEC */ 1426 fifo_addr = 0x40; 1427 fifo_span = 0x10; 1428 1429 /* enable slot 7 and 8 */ 1430 valid_slots |= ACOSV_SLV7 | ACOSV_SLV8; 1431 } 1432 /* create CODEC tasklet for rear speakers output*/ 1433 rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr, 1434 REAR_MIXER_SCB_ADDR, 1435 REAR_CODECOUT_SCB_ADDR,codec_in_scb, 1436 SCB_ON_PARENT_NEXT_SCB); 1437 if (!rear_codec_out_scb) goto _fail_end; 1438 1439 1440 /* create the rear PCM channel mixer SCB */ 1441 rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB", 1442 MIX_SAMPLE_BUF3, 1443 REAR_MIXER_SCB_ADDR, 1444 rear_codec_out_scb, 1445 SCB_ON_PARENT_SUBLIST_SCB); 1446 ins->rear_mix_scb = rear_mix_scb; 1447 if (!rear_mix_scb) goto _fail_end; 1448 1449 if (chip->nr_ac97_codecs == 2) { 1450 /* create CODEC tasklet for rear Center/LFE output 1451 slot 6 and 9 on secondary CODEC */ 1452 clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030, 1453 CLFE_MIXER_SCB_ADDR, 1454 CLFE_CODEC_SCB_ADDR, 1455 rear_codec_out_scb, 1456 SCB_ON_PARENT_NEXT_SCB); 1457 if (!clfe_codec_out_scb) goto _fail_end; 1458 1459 1460 /* create the rear PCM channel mixer SCB */ 1461 ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB", 1462 MIX_SAMPLE_BUF4, 1463 CLFE_MIXER_SCB_ADDR, 1464 clfe_codec_out_scb, 1465 SCB_ON_PARENT_SUBLIST_SCB); 1466 if (!ins->center_lfe_mix_scb) goto _fail_end; 1467 1468 /* enable slot 6 and 9 */ 1469 valid_slots |= ACOSV_SLV6 | ACOSV_SLV9; 1470 } else { 1471 clfe_codec_out_scb = rear_codec_out_scb; 1472 ins->center_lfe_mix_scb = rear_mix_scb; 1473 } 1474 1475 /* enable slots depending on CODEC configuration */ 1476 snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots); 1477 1478 /* the magic snooper */ 1479 magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR, 1480 OUTPUT_SNOOP_BUFFER, 1481 codec_out_scb, 1482 clfe_codec_out_scb, 1483 SCB_ON_PARENT_NEXT_SCB); 1484 1485 1486 if (!magic_snoop_scb) goto _fail_end; 1487 ins->ref_snoop_scb = magic_snoop_scb; 1488 1489 /* SP IO access */ 1490 if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR, 1491 magic_snoop_scb, 1492 SCB_ON_PARENT_NEXT_SCB)) 1493 goto _fail_end; 1494 1495 /* SPDIF input sampel rate converter */ 1496 src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI", 1497 ins->spdif_in_sample_rate, 1498 SRC_OUTPUT_BUF1, 1499 SRC_DELAY_BUF1,SRCTASK_SCB_ADDR, 1500 master_mix_scb, 1501 SCB_ON_PARENT_SUBLIST_SCB,1); 1502 1503 if (!src_task_scb) goto _fail_end; 1504 cs46xx_src_unlink(chip,src_task_scb); 1505 1506 /* NOTE: when we now how to detect the SPDIF input 1507 sample rate we will use this SRC to adjust it */ 1508 ins->spdif_in_src = src_task_scb; 1509 1510 cs46xx_dsp_async_init(chip,timing_master_scb); 1511 return 0; 1512 1513 _fail_end: 1514 dev_err(chip->card->dev, "dsp_spos: failed to setup SCB's in DSP\n"); 1515 return -EINVAL; 1516 } 1517 1518 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip, 1519 struct dsp_scb_descriptor * fg_entry) 1520 { 1521 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1522 struct dsp_symbol_entry * s16_async_codec_input_task; 1523 struct dsp_symbol_entry * spdifo_task; 1524 struct dsp_symbol_entry * spdifi_task; 1525 struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc; 1526 1527 s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE); 1528 if (s16_async_codec_input_task == NULL) { 1529 dev_err(chip->card->dev, 1530 "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n"); 1531 return -EIO; 1532 } 1533 spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE); 1534 if (spdifo_task == NULL) { 1535 dev_err(chip->card->dev, 1536 "dsp_spos: symbol SPDIFOTASK not found\n"); 1537 return -EIO; 1538 } 1539 1540 spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE); 1541 if (spdifi_task == NULL) { 1542 dev_err(chip->card->dev, 1543 "dsp_spos: symbol SPDIFITASK not found\n"); 1544 return -EIO; 1545 } 1546 1547 { 1548 /* 0xBC0 */ 1549 struct dsp_spdifoscb spdifo_scb = { 1550 /* 0 */ DSP_SPOS_UUUU, 1551 { 1552 /* 1 */ 0xb0, 1553 /* 2 */ 0, 1554 /* 3 */ 0, 1555 /* 4 */ 0, 1556 }, 1557 /* NOTE: the SPDIF output task read samples in mono 1558 format, the AsynchFGTxSCB task writes to buffer 1559 in stereo format 1560 */ 1561 /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256, 1562 /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 ) | 0xFFFC, 1563 /* 7 */ 0,0, 1564 /* 8 */ 0, 1565 /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR, 1566 /* A */ spdifo_task->address, 1567 SPDIFO_SCB_INST + SPDIFOFIFOPointer, 1568 { 1569 /* B */ 0x0040, /*DSP_SPOS_UUUU,*/ 1570 /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/ 1571 }, 1572 /* D */ 0x804c,0, /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */ 1573 /* E */ 0x0108,0x0001, /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */ 1574 /* F */ DSP_SPOS_UUUU /* SPDIFOFree; */ 1575 }; 1576 1577 /* 0xBB0 */ 1578 struct dsp_spdifiscb spdifi_scb = { 1579 /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI, 1580 /* 1 */ 0, 1581 /* 2 */ 0, 1582 /* 3 */ 1,4000, /* SPDIFICountLimit SPDIFICount */ 1583 /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */ 1584 /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */ 1585 /* 6 */ DSP_SPOS_UUUU, /* Free3 */ 1586 /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC, /* Free2 BitCount*/ 1587 /* 8 */ DSP_SPOS_UUUU, /* TempStatus */ 1588 /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR, 1589 /* A */ spdifi_task->address, 1590 SPDIFI_SCB_INST + SPDIFIFIFOPointer, 1591 /* NOTE: The SPDIF input task write the sample in mono 1592 format from the HW FIFO, the AsynchFGRxSCB task reads 1593 them in stereo 1594 */ 1595 /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128, 1596 /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC, 1597 /* D */ 0x8048,0, 1598 /* E */ 0x01f0,0x0001, 1599 /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */ 1600 }; 1601 1602 /* 0xBA0 */ 1603 struct dsp_async_codec_input_scb async_codec_input_scb = { 1604 /* 0 */ DSP_SPOS_UUUU, 1605 /* 1 */ 0, 1606 /* 2 */ 0, 1607 /* 3 */ 1,4000, 1608 /* 4 */ 0x0118,0x0001, 1609 /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64, 1610 /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC, 1611 /* 7 */ DSP_SPOS_UU,0x3, 1612 /* 8 */ DSP_SPOS_UUUU, 1613 /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR, 1614 /* A */ s16_async_codec_input_task->address, 1615 HFG_TREE_SCB + AsyncCIOFIFOPointer, 1616 1617 /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64, 1618 /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10), /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/ 1619 1620 #ifdef UseASER1Input 1621 /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr; 1622 Init. 0000:8042: for ASER1 1623 0000:8044: for ASER2 */ 1624 /* D */ 0x8042,0, 1625 1626 /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr; 1627 Init 1 stero:8050 ASER1 1628 Init 0 mono:8070 ASER2 1629 Init 1 Stereo : 0100 ASER1 (Set by script) */ 1630 /* E */ 0x0100,0x0001, 1631 1632 #endif 1633 1634 #ifdef UseASER2Input 1635 /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr; 1636 Init. 0000:8042: for ASER1 1637 0000:8044: for ASER2 */ 1638 /* D */ 0x8044,0, 1639 1640 /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr; 1641 Init 1 stero:8050 ASER1 1642 Init 0 mono:8070 ASER2 1643 Init 1 Stereo : 0100 ASER1 (Set by script) */ 1644 /* E */ 0x0110,0x0001, 1645 1646 #endif 1647 1648 /* short AsyncCIOutputBufModulo:AsyncCIFree; 1649 AsyncCIOutputBufModulo: The modulo size for 1650 the output buffer of this task */ 1651 /* F */ 0, /* DSP_SPOS_UUUU */ 1652 }; 1653 1654 spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST); 1655 1656 if (snd_BUG_ON(!spdifo_scb_desc)) 1657 return -EIO; 1658 spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST); 1659 if (snd_BUG_ON(!spdifi_scb_desc)) 1660 return -EIO; 1661 async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB); 1662 if (snd_BUG_ON(!async_codec_scb_desc)) 1663 return -EIO; 1664 1665 async_codec_scb_desc->parent_scb_ptr = NULL; 1666 async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc; 1667 async_codec_scb_desc->sub_list_ptr = ins->the_null_scb; 1668 async_codec_scb_desc->task_entry = s16_async_codec_input_task; 1669 1670 spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc; 1671 spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc; 1672 spdifi_scb_desc->sub_list_ptr = ins->the_null_scb; 1673 spdifi_scb_desc->task_entry = spdifi_task; 1674 1675 spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc; 1676 spdifo_scb_desc->next_scb_ptr = fg_entry; 1677 spdifo_scb_desc->sub_list_ptr = ins->the_null_scb; 1678 spdifo_scb_desc->task_entry = spdifo_task; 1679 1680 /* this one is faked, as the parnet of SPDIFO task 1681 is the FG task tree */ 1682 fg_entry->parent_scb_ptr = spdifo_scb_desc; 1683 1684 /* for proc fs */ 1685 cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc); 1686 cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc); 1687 cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc); 1688 1689 /* Async MASTER ENABLE, affects both SPDIF input and output */ 1690 snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 ); 1691 } 1692 1693 return 0; 1694 } 1695 1696 static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip) 1697 { 1698 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1699 1700 /* set SPDIF output FIFO slot */ 1701 snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0); 1702 1703 /* SPDIF output MASTER ENABLE */ 1704 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0); 1705 1706 /* right and left validate bit */ 1707 /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/ 1708 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0); 1709 1710 /* clear fifo pointer */ 1711 cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0); 1712 1713 /* monitor state */ 1714 ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED; 1715 } 1716 1717 int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip) 1718 { 1719 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1720 1721 /* if hw-ctrl already enabled, turn off to reset logic ... */ 1722 cs46xx_dsp_disable_spdif_hw (chip); 1723 udelay(50); 1724 1725 /* set SPDIF output FIFO slot */ 1726 snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) )); 1727 1728 /* SPDIF output MASTER ENABLE */ 1729 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000); 1730 1731 /* right and left validate bit */ 1732 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default); 1733 1734 /* monitor state */ 1735 ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED; 1736 1737 return 0; 1738 } 1739 1740 int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip) 1741 { 1742 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1743 1744 /* turn on amplifier */ 1745 chip->active_ctrl(chip, 1); 1746 chip->amplifier_ctrl(chip, 1); 1747 1748 if (snd_BUG_ON(ins->asynch_rx_scb)) 1749 return -EINVAL; 1750 if (snd_BUG_ON(!ins->spdif_in_src)) 1751 return -EINVAL; 1752 1753 mutex_lock(&chip->spos_mutex); 1754 1755 if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) { 1756 /* time countdown enable */ 1757 cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005); 1758 /* NOTE: 80000005 value is just magic. With all values 1759 that I've tested this one seem to give the best result. 1760 Got no explication why. (Benny) */ 1761 1762 /* SPDIF input MASTER ENABLE */ 1763 cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff); 1764 1765 ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED; 1766 } 1767 1768 /* create and start the asynchronous receiver SCB */ 1769 ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB", 1770 ASYNCRX_SCB_ADDR, 1771 SPDIFI_SCB_INST, 1772 SPDIFI_IP_OUTPUT_BUFFER1, 1773 ins->spdif_in_src, 1774 SCB_ON_PARENT_SUBLIST_SCB); 1775 1776 spin_lock_irq(&chip->reg_lock); 1777 1778 /* reset SPDIF input sample buffer pointer */ 1779 /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2, 1780 (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/ 1781 1782 /* reset FIFO ptr */ 1783 /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/ 1784 cs46xx_src_link(chip,ins->spdif_in_src); 1785 1786 /* unmute SRC volume */ 1787 cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff); 1788 1789 spin_unlock_irq(&chip->reg_lock); 1790 1791 /* set SPDIF input sample rate and unmute 1792 NOTE: only 48khz support for SPDIF input this time */ 1793 /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */ 1794 1795 /* monitor state */ 1796 ins->spdif_status_in = 1; 1797 mutex_unlock(&chip->spos_mutex); 1798 1799 return 0; 1800 } 1801 1802 int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip) 1803 { 1804 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1805 1806 if (snd_BUG_ON(!ins->asynch_rx_scb)) 1807 return -EINVAL; 1808 if (snd_BUG_ON(!ins->spdif_in_src)) 1809 return -EINVAL; 1810 1811 mutex_lock(&chip->spos_mutex); 1812 1813 /* Remove the asynchronous receiver SCB */ 1814 cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb); 1815 ins->asynch_rx_scb = NULL; 1816 1817 cs46xx_src_unlink(chip,ins->spdif_in_src); 1818 1819 /* monitor state */ 1820 ins->spdif_status_in = 0; 1821 mutex_unlock(&chip->spos_mutex); 1822 1823 /* restore amplifier */ 1824 chip->active_ctrl(chip, -1); 1825 chip->amplifier_ctrl(chip, -1); 1826 1827 return 0; 1828 } 1829 1830 int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip) 1831 { 1832 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1833 1834 if (snd_BUG_ON(ins->pcm_input)) 1835 return -EINVAL; 1836 if (snd_BUG_ON(!ins->ref_snoop_scb)) 1837 return -EINVAL; 1838 1839 mutex_lock(&chip->spos_mutex); 1840 ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR, 1841 "PCMSerialInput_Wave"); 1842 mutex_unlock(&chip->spos_mutex); 1843 1844 return 0; 1845 } 1846 1847 int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip) 1848 { 1849 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1850 1851 if (snd_BUG_ON(!ins->pcm_input)) 1852 return -EINVAL; 1853 1854 mutex_lock(&chip->spos_mutex); 1855 cs46xx_dsp_remove_scb (chip,ins->pcm_input); 1856 ins->pcm_input = NULL; 1857 mutex_unlock(&chip->spos_mutex); 1858 1859 return 0; 1860 } 1861 1862 int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip) 1863 { 1864 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1865 1866 if (snd_BUG_ON(ins->adc_input)) 1867 return -EINVAL; 1868 if (snd_BUG_ON(!ins->codec_in_scb)) 1869 return -EINVAL; 1870 1871 mutex_lock(&chip->spos_mutex); 1872 ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR, 1873 "PCMSerialInput_ADC"); 1874 mutex_unlock(&chip->spos_mutex); 1875 1876 return 0; 1877 } 1878 1879 int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip) 1880 { 1881 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1882 1883 if (snd_BUG_ON(!ins->adc_input)) 1884 return -EINVAL; 1885 1886 mutex_lock(&chip->spos_mutex); 1887 cs46xx_dsp_remove_scb (chip,ins->adc_input); 1888 ins->adc_input = NULL; 1889 mutex_unlock(&chip->spos_mutex); 1890 1891 return 0; 1892 } 1893 1894 int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data) 1895 { 1896 u32 temp; 1897 int i; 1898 1899 /* santiy check the parameters. (These numbers are not 100% correct. They are 1900 a rough guess from looking at the controller spec.) */ 1901 if (address < 0x8000 || address >= 0x9000) 1902 return -EINVAL; 1903 1904 /* initialize the SP_IO_WRITE SCB with the data. */ 1905 temp = ( address << 16 ) | ( address & 0x0000FFFF); /* offset 0 <-- address2 : address1 */ 1906 1907 snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR << 2), temp); 1908 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */ 1909 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */ 1910 1911 /* Poke this location to tell the task to start */ 1912 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10); 1913 1914 /* Verify that the task ran */ 1915 for (i=0; i<25; i++) { 1916 udelay(125); 1917 1918 temp = snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2)); 1919 if (temp == 0x00000000) 1920 break; 1921 } 1922 1923 if (i == 25) { 1924 dev_err(chip->card->dev, 1925 "dsp_spos: SPIOWriteTask not responding\n"); 1926 return -EBUSY; 1927 } 1928 1929 return 0; 1930 } 1931 1932 int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right) 1933 { 1934 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1935 struct dsp_scb_descriptor * scb; 1936 1937 mutex_lock(&chip->spos_mutex); 1938 1939 /* main output */ 1940 scb = ins->master_mix_scb->sub_list_ptr; 1941 while (scb != ins->the_null_scb) { 1942 cs46xx_dsp_scb_set_volume (chip,scb,left,right); 1943 scb = scb->next_scb_ptr; 1944 } 1945 1946 /* rear output */ 1947 scb = ins->rear_mix_scb->sub_list_ptr; 1948 while (scb != ins->the_null_scb) { 1949 cs46xx_dsp_scb_set_volume (chip,scb,left,right); 1950 scb = scb->next_scb_ptr; 1951 } 1952 1953 ins->dac_volume_left = left; 1954 ins->dac_volume_right = right; 1955 1956 mutex_unlock(&chip->spos_mutex); 1957 1958 return 0; 1959 } 1960 1961 int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right) 1962 { 1963 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1964 1965 mutex_lock(&chip->spos_mutex); 1966 1967 if (ins->asynch_rx_scb != NULL) 1968 cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb, 1969 left,right); 1970 1971 ins->spdif_input_volume_left = left; 1972 ins->spdif_input_volume_right = right; 1973 1974 mutex_unlock(&chip->spos_mutex); 1975 1976 return 0; 1977 } 1978 1979 #ifdef CONFIG_PM_SLEEP 1980 int cs46xx_dsp_resume(struct snd_cs46xx * chip) 1981 { 1982 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1983 int i, err; 1984 1985 /* clear parameter, sample and code areas */ 1986 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, 1987 DSP_PARAMETER_BYTE_SIZE); 1988 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, 1989 DSP_SAMPLE_BYTE_SIZE); 1990 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE); 1991 1992 for (i = 0; i < ins->nmodules; i++) { 1993 struct dsp_module_desc *module = &ins->modules[i]; 1994 struct dsp_segment_desc *seg; 1995 u32 doffset, dsize; 1996 1997 seg = get_segment_desc(module, SEGTYPE_SP_PARAMETER); 1998 err = dsp_load_parameter(chip, seg); 1999 if (err < 0) 2000 return err; 2001 2002 seg = get_segment_desc(module, SEGTYPE_SP_SAMPLE); 2003 err = dsp_load_sample(chip, seg); 2004 if (err < 0) 2005 return err; 2006 2007 seg = get_segment_desc(module, SEGTYPE_SP_PROGRAM); 2008 if (!seg) 2009 continue; 2010 2011 doffset = seg->offset * 4 + module->load_address * 4 2012 + DSP_CODE_BYTE_OFFSET; 2013 dsize = seg->size * 4; 2014 err = snd_cs46xx_download(chip, 2015 ins->code.data + module->load_address, 2016 doffset, dsize); 2017 if (err < 0) 2018 return err; 2019 } 2020 2021 for (i = 0; i < ins->ntask; i++) { 2022 struct dsp_task_descriptor *t = &ins->tasks[i]; 2023 _dsp_create_task_tree(chip, t->data, t->address, t->size); 2024 } 2025 2026 for (i = 0; i < ins->nscb; i++) { 2027 struct dsp_scb_descriptor *s = &ins->scbs[i]; 2028 if (s->deleted) 2029 continue; 2030 _dsp_create_scb(chip, s->data, s->address); 2031 } 2032 for (i = 0; i < ins->nscb; i++) { 2033 struct dsp_scb_descriptor *s = &ins->scbs[i]; 2034 if (s->deleted) 2035 continue; 2036 if (s->updated) 2037 cs46xx_dsp_spos_update_scb(chip, s); 2038 if (s->volume_set) 2039 cs46xx_dsp_scb_set_volume(chip, s, 2040 s->volume[0], s->volume[1]); 2041 } 2042 if (ins->spdif_status_out & DSP_SPDIF_STATUS_HW_ENABLED) { 2043 cs46xx_dsp_enable_spdif_hw(chip); 2044 snd_cs46xx_poke(chip, (ins->ref_snoop_scb->address + 2) << 2, 2045 (OUTPUT_SNOOP_BUFFER + 0x10) << 0x10); 2046 if (ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN) 2047 cs46xx_poke_via_dsp(chip, SP_SPDOUT_CSUV, 2048 ins->spdif_csuv_stream); 2049 } 2050 if (chip->dsp_spos_instance->spdif_status_in) { 2051 cs46xx_poke_via_dsp(chip, SP_ASER_COUNTDOWN, 0x80000005); 2052 cs46xx_poke_via_dsp(chip, SP_SPDIN_CONTROL, 0x800003ff); 2053 } 2054 return 0; 2055 } 2056 #endif 2057