11a59d1b8SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 21da177e4SLinus Torvalds /* 31da177e4SLinus Torvalds * Driver for C-Media CMI8338 and 8738 PCI soundcards. 41da177e4SLinus Torvalds * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de> 51da177e4SLinus Torvalds */ 61da177e4SLinus Torvalds 71da177e4SLinus Torvalds /* Does not work. Warning may block system in capture mode */ 81da177e4SLinus Torvalds /* #define USE_VAR48KRATE */ 91da177e4SLinus Torvalds 106cbbfe1cSTakashi Iwai #include <linux/io.h> 111da177e4SLinus Torvalds #include <linux/delay.h> 121da177e4SLinus Torvalds #include <linux/interrupt.h> 131da177e4SLinus Torvalds #include <linux/init.h> 141da177e4SLinus Torvalds #include <linux/pci.h> 151da177e4SLinus Torvalds #include <linux/slab.h> 161da177e4SLinus Torvalds #include <linux/gameport.h> 1765a77217SPaul Gortmaker #include <linux/module.h> 1862932df8SIngo Molnar #include <linux/mutex.h> 191da177e4SLinus Torvalds #include <sound/core.h> 201da177e4SLinus Torvalds #include <sound/info.h> 211da177e4SLinus Torvalds #include <sound/control.h> 221da177e4SLinus Torvalds #include <sound/pcm.h> 231da177e4SLinus Torvalds #include <sound/rawmidi.h> 241da177e4SLinus Torvalds #include <sound/mpu401.h> 251da177e4SLinus Torvalds #include <sound/opl3.h> 261da177e4SLinus Torvalds #include <sound/sb.h> 271da177e4SLinus Torvalds #include <sound/asoundef.h> 281da177e4SLinus Torvalds #include <sound/initval.h> 291da177e4SLinus Torvalds 301da177e4SLinus Torvalds MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>"); 311da177e4SLinus Torvalds MODULE_DESCRIPTION("C-Media CMI8x38 PCI"); 321da177e4SLinus Torvalds MODULE_LICENSE("GPL"); 331da177e4SLinus Torvalds 34b2fac073SFabian Frederick #if IS_REACHABLE(CONFIG_GAMEPORT) 351da177e4SLinus Torvalds #define SUPPORT_JOYSTICK 1 361da177e4SLinus Torvalds #endif 371da177e4SLinus Torvalds 381da177e4SLinus Torvalds static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 391da177e4SLinus Torvalds static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 40a67ff6a5SRusty Russell static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable switches */ 41d8cac620STakashi Iwai static long mpu_port[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 1}; 422f24d159STakashi Iwai static long fm_port[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)]=1}; 43a67ff6a5SRusty Russell static bool soft_ac3[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)]=1}; 441da177e4SLinus Torvalds #ifdef SUPPORT_JOYSTICK 451da177e4SLinus Torvalds static int joystick_port[SNDRV_CARDS]; 461da177e4SLinus Torvalds #endif 471da177e4SLinus Torvalds 481da177e4SLinus Torvalds module_param_array(index, int, NULL, 0444); 491da177e4SLinus Torvalds MODULE_PARM_DESC(index, "Index value for C-Media PCI soundcard."); 501da177e4SLinus Torvalds module_param_array(id, charp, NULL, 0444); 511da177e4SLinus Torvalds MODULE_PARM_DESC(id, "ID string for C-Media PCI soundcard."); 521da177e4SLinus Torvalds module_param_array(enable, bool, NULL, 0444); 531da177e4SLinus Torvalds MODULE_PARM_DESC(enable, "Enable C-Media PCI soundcard."); 546192c41fSDavid Howells module_param_hw_array(mpu_port, long, ioport, NULL, 0444); 551da177e4SLinus Torvalds MODULE_PARM_DESC(mpu_port, "MPU-401 port."); 566192c41fSDavid Howells module_param_hw_array(fm_port, long, ioport, NULL, 0444); 571da177e4SLinus Torvalds MODULE_PARM_DESC(fm_port, "FM port."); 581da177e4SLinus Torvalds module_param_array(soft_ac3, bool, NULL, 0444); 5925985edcSLucas De Marchi MODULE_PARM_DESC(soft_ac3, "Software-conversion of raw SPDIF packets (model 033 only)."); 601da177e4SLinus Torvalds #ifdef SUPPORT_JOYSTICK 616192c41fSDavid Howells module_param_hw_array(joystick_port, int, ioport, NULL, 0444); 621da177e4SLinus Torvalds MODULE_PARM_DESC(joystick_port, "Joystick port address."); 631da177e4SLinus Torvalds #endif 641da177e4SLinus Torvalds 651da177e4SLinus Torvalds /* 661da177e4SLinus Torvalds * CM8x38 registers definition 671da177e4SLinus Torvalds */ 681da177e4SLinus Torvalds 691da177e4SLinus Torvalds #define CM_REG_FUNCTRL0 0x00 701da177e4SLinus Torvalds #define CM_RST_CH1 0x00080000 711da177e4SLinus Torvalds #define CM_RST_CH0 0x00040000 721da177e4SLinus Torvalds #define CM_CHEN1 0x00020000 /* ch1: enable */ 731da177e4SLinus Torvalds #define CM_CHEN0 0x00010000 /* ch0: enable */ 741da177e4SLinus Torvalds #define CM_PAUSE1 0x00000008 /* ch1: pause */ 751da177e4SLinus Torvalds #define CM_PAUSE0 0x00000004 /* ch0: pause */ 761da177e4SLinus Torvalds #define CM_CHADC1 0x00000002 /* ch1, 0:playback, 1:record */ 771da177e4SLinus Torvalds #define CM_CHADC0 0x00000001 /* ch0, 0:playback, 1:record */ 781da177e4SLinus Torvalds 791da177e4SLinus Torvalds #define CM_REG_FUNCTRL1 0x04 80a839a33dSClemens Ladisch #define CM_DSFC_MASK 0x0000E000 /* channel 1 (DAC?) sampling frequency */ 81a839a33dSClemens Ladisch #define CM_DSFC_SHIFT 13 82a839a33dSClemens Ladisch #define CM_ASFC_MASK 0x00001C00 /* channel 0 (ADC?) sampling frequency */ 83a839a33dSClemens Ladisch #define CM_ASFC_SHIFT 10 841da177e4SLinus Torvalds #define CM_SPDF_1 0x00000200 /* SPDIF IN/OUT at channel B */ 851da177e4SLinus Torvalds #define CM_SPDF_0 0x00000100 /* SPDIF OUT only channel A */ 86a839a33dSClemens Ladisch #define CM_SPDFLOOP 0x00000080 /* ext. SPDIIF/IN -> OUT loopback */ 871da177e4SLinus Torvalds #define CM_SPDO2DAC 0x00000040 /* SPDIF/OUT can be heard from internal DAC */ 881da177e4SLinus Torvalds #define CM_INTRM 0x00000020 /* master control block (MCB) interrupt enabled */ 891da177e4SLinus Torvalds #define CM_BREQ 0x00000010 /* bus master enabled */ 901da177e4SLinus Torvalds #define CM_VOICE_EN 0x00000008 /* legacy voice (SB16,FM) */ 91a839a33dSClemens Ladisch #define CM_UART_EN 0x00000004 /* legacy UART */ 92a839a33dSClemens Ladisch #define CM_JYSTK_EN 0x00000002 /* legacy joystick */ 93a839a33dSClemens Ladisch #define CM_ZVPORT 0x00000001 /* ZVPORT */ 941da177e4SLinus Torvalds 951da177e4SLinus Torvalds #define CM_REG_CHFORMAT 0x08 961da177e4SLinus Torvalds 971da177e4SLinus Torvalds #define CM_CHB3D5C 0x80000000 /* 5,6 channels */ 98a839a33dSClemens Ladisch #define CM_FMOFFSET2 0x40000000 /* initial FM PCM offset 2 when Fmute=1 */ 991da177e4SLinus Torvalds #define CM_CHB3D 0x20000000 /* 4 channels */ 1001da177e4SLinus Torvalds 1011da177e4SLinus Torvalds #define CM_CHIP_MASK1 0x1f000000 1021da177e4SLinus Torvalds #define CM_CHIP_037 0x01000000 103a839a33dSClemens Ladisch #define CM_SETLAT48 0x00800000 /* set latency timer 48h */ 104a839a33dSClemens Ladisch #define CM_EDGEIRQ 0x00400000 /* emulated edge trigger legacy IRQ */ 105a839a33dSClemens Ladisch #define CM_SPD24SEL39 0x00200000 /* 24-bit spdif: model 039 */ 1061da177e4SLinus Torvalds #define CM_AC3EN1 0x00100000 /* enable AC3: model 037 */ 107a839a33dSClemens Ladisch #define CM_SPDIF_SELECT1 0x00080000 /* for model <= 037 ? */ 1081da177e4SLinus Torvalds #define CM_SPD24SEL 0x00020000 /* 24bit spdif: model 037 */ 1091da177e4SLinus Torvalds /* #define CM_SPDIF_INVERSE 0x00010000 */ /* ??? */ 1101da177e4SLinus Torvalds 1111da177e4SLinus Torvalds #define CM_ADCBITLEN_MASK 0x0000C000 1121da177e4SLinus Torvalds #define CM_ADCBITLEN_16 0x00000000 1131da177e4SLinus Torvalds #define CM_ADCBITLEN_15 0x00004000 1141da177e4SLinus Torvalds #define CM_ADCBITLEN_14 0x00008000 1151da177e4SLinus Torvalds #define CM_ADCBITLEN_13 0x0000C000 1161da177e4SLinus Torvalds 117a839a33dSClemens Ladisch #define CM_ADCDACLEN_MASK 0x00003000 /* model 037 */ 1181da177e4SLinus Torvalds #define CM_ADCDACLEN_060 0x00000000 1191da177e4SLinus Torvalds #define CM_ADCDACLEN_066 0x00001000 1201da177e4SLinus Torvalds #define CM_ADCDACLEN_130 0x00002000 1211da177e4SLinus Torvalds #define CM_ADCDACLEN_280 0x00003000 1221da177e4SLinus Torvalds 123a839a33dSClemens Ladisch #define CM_ADCDLEN_MASK 0x00003000 /* model 039 */ 124a839a33dSClemens Ladisch #define CM_ADCDLEN_ORIGINAL 0x00000000 125a839a33dSClemens Ladisch #define CM_ADCDLEN_EXTRA 0x00001000 126a839a33dSClemens Ladisch #define CM_ADCDLEN_24K 0x00002000 127a839a33dSClemens Ladisch #define CM_ADCDLEN_WEIGHT 0x00003000 128a839a33dSClemens Ladisch 1291da177e4SLinus Torvalds #define CM_CH1_SRATE_176K 0x00000800 1308992e18dSClemens Ladisch #define CM_CH1_SRATE_96K 0x00000800 /* model 055? */ 1311da177e4SLinus Torvalds #define CM_CH1_SRATE_88K 0x00000400 1321da177e4SLinus Torvalds #define CM_CH0_SRATE_176K 0x00000200 1338992e18dSClemens Ladisch #define CM_CH0_SRATE_96K 0x00000200 /* model 055? */ 1341da177e4SLinus Torvalds #define CM_CH0_SRATE_88K 0x00000100 135755c48abSTimofei Bondarenko #define CM_CH0_SRATE_128K 0x00000300 136755c48abSTimofei Bondarenko #define CM_CH0_SRATE_MASK 0x00000300 1371da177e4SLinus Torvalds 1381da177e4SLinus Torvalds #define CM_SPDIF_INVERSE2 0x00000080 /* model 055? */ 139a839a33dSClemens Ladisch #define CM_DBLSPDS 0x00000040 /* double SPDIF sample rate 88.2/96 */ 140a839a33dSClemens Ladisch #define CM_POLVALID 0x00000020 /* inverse SPDIF/IN valid bit */ 141a839a33dSClemens Ladisch #define CM_SPDLOCKED 0x00000010 1421da177e4SLinus Torvalds 143a839a33dSClemens Ladisch #define CM_CH1FMT_MASK 0x0000000C /* bit 3: 16 bits, bit 2: stereo */ 1441da177e4SLinus Torvalds #define CM_CH1FMT_SHIFT 2 145a839a33dSClemens Ladisch #define CM_CH0FMT_MASK 0x00000003 /* bit 1: 16 bits, bit 0: stereo */ 1461da177e4SLinus Torvalds #define CM_CH0FMT_SHIFT 0 1471da177e4SLinus Torvalds 1481da177e4SLinus Torvalds #define CM_REG_INT_HLDCLR 0x0C 1491da177e4SLinus Torvalds #define CM_CHIP_MASK2 0xff000000 150a839a33dSClemens Ladisch #define CM_CHIP_8768 0x20000000 151a839a33dSClemens Ladisch #define CM_CHIP_055 0x08000000 1521da177e4SLinus Torvalds #define CM_CHIP_039 0x04000000 1531da177e4SLinus Torvalds #define CM_CHIP_039_6CH 0x01000000 154a839a33dSClemens Ladisch #define CM_UNKNOWN_INT_EN 0x00080000 /* ? */ 1551da177e4SLinus Torvalds #define CM_TDMA_INT_EN 0x00040000 1561da177e4SLinus Torvalds #define CM_CH1_INT_EN 0x00020000 1571da177e4SLinus Torvalds #define CM_CH0_INT_EN 0x00010000 1581da177e4SLinus Torvalds 1591da177e4SLinus Torvalds #define CM_REG_INT_STATUS 0x10 1601da177e4SLinus Torvalds #define CM_INTR 0x80000000 1611da177e4SLinus Torvalds #define CM_VCO 0x08000000 /* Voice Control? CMI8738 */ 1621da177e4SLinus Torvalds #define CM_MCBINT 0x04000000 /* Master Control Block abort cond.? */ 1631da177e4SLinus Torvalds #define CM_UARTINT 0x00010000 1641da177e4SLinus Torvalds #define CM_LTDMAINT 0x00008000 1651da177e4SLinus Torvalds #define CM_HTDMAINT 0x00004000 1661da177e4SLinus Torvalds #define CM_XDO46 0x00000080 /* Modell 033? Direct programming EEPROM (read data register) */ 1671da177e4SLinus Torvalds #define CM_LHBTOG 0x00000040 /* High/Low status from DMA ctrl register */ 1681da177e4SLinus Torvalds #define CM_LEG_HDMA 0x00000020 /* Legacy is in High DMA channel */ 1691da177e4SLinus Torvalds #define CM_LEG_STEREO 0x00000010 /* Legacy is in Stereo mode */ 1701da177e4SLinus Torvalds #define CM_CH1BUSY 0x00000008 1711da177e4SLinus Torvalds #define CM_CH0BUSY 0x00000004 1721da177e4SLinus Torvalds #define CM_CHINT1 0x00000002 1731da177e4SLinus Torvalds #define CM_CHINT0 0x00000001 1741da177e4SLinus Torvalds 1751da177e4SLinus Torvalds #define CM_REG_LEGACY_CTRL 0x14 176a839a33dSClemens Ladisch #define CM_NXCHG 0x80000000 /* don't map base reg dword->sample */ 1771da177e4SLinus Torvalds #define CM_VMPU_MASK 0x60000000 /* MPU401 i/o port address */ 1781da177e4SLinus Torvalds #define CM_VMPU_330 0x00000000 1791da177e4SLinus Torvalds #define CM_VMPU_320 0x20000000 1801da177e4SLinus Torvalds #define CM_VMPU_310 0x40000000 1811da177e4SLinus Torvalds #define CM_VMPU_300 0x60000000 182a839a33dSClemens Ladisch #define CM_ENWR8237 0x10000000 /* enable bus master to write 8237 base reg */ 1831da177e4SLinus Torvalds #define CM_VSBSEL_MASK 0x0C000000 /* SB16 base address */ 1841da177e4SLinus Torvalds #define CM_VSBSEL_220 0x00000000 1851da177e4SLinus Torvalds #define CM_VSBSEL_240 0x04000000 1861da177e4SLinus Torvalds #define CM_VSBSEL_260 0x08000000 1871da177e4SLinus Torvalds #define CM_VSBSEL_280 0x0C000000 1881da177e4SLinus Torvalds #define CM_FMSEL_MASK 0x03000000 /* FM OPL3 base address */ 1891da177e4SLinus Torvalds #define CM_FMSEL_388 0x00000000 1901da177e4SLinus Torvalds #define CM_FMSEL_3C8 0x01000000 1911da177e4SLinus Torvalds #define CM_FMSEL_3E0 0x02000000 1921da177e4SLinus Torvalds #define CM_FMSEL_3E8 0x03000000 193a839a33dSClemens Ladisch #define CM_ENSPDOUT 0x00800000 /* enable XSPDIF/OUT to I/O interface */ 194a839a33dSClemens Ladisch #define CM_SPDCOPYRHT 0x00400000 /* spdif in/out copyright bit */ 1951da177e4SLinus Torvalds #define CM_DAC2SPDO 0x00200000 /* enable wave+fm_midi -> SPDIF/OUT */ 196a839a33dSClemens Ladisch #define CM_INVIDWEN 0x00100000 /* internal vendor ID write enable, model 039? */ 197a839a33dSClemens Ladisch #define CM_SETRETRY 0x00100000 /* 0: legacy i/o wait (default), 1: legacy i/o bus retry */ 198a839a33dSClemens Ladisch #define CM_C_EEACCESS 0x00080000 /* direct programming eeprom regs */ 199a839a33dSClemens Ladisch #define CM_C_EECS 0x00040000 200a839a33dSClemens Ladisch #define CM_C_EEDI46 0x00020000 201a839a33dSClemens Ladisch #define CM_C_EECK46 0x00010000 2021da177e4SLinus Torvalds #define CM_CHB3D6C 0x00008000 /* 5.1 channels support */ 203a839a33dSClemens Ladisch #define CM_CENTR2LIN 0x00004000 /* line-in as center out */ 204a839a33dSClemens Ladisch #define CM_BASE2LIN 0x00002000 /* line-in as bass out */ 205a839a33dSClemens Ladisch #define CM_EXBASEN 0x00001000 /* external bass input enable */ 2061da177e4SLinus Torvalds 2071da177e4SLinus Torvalds #define CM_REG_MISC_CTRL 0x18 208a839a33dSClemens Ladisch #define CM_PWD 0x80000000 /* power down */ 2091da177e4SLinus Torvalds #define CM_RESET 0x40000000 210a839a33dSClemens Ladisch #define CM_SFIL_MASK 0x30000000 /* filter control at front end DAC, model 037? */ 211a839a33dSClemens Ladisch #define CM_VMGAIN 0x10000000 /* analog master amp +6dB, model 039? */ 212a839a33dSClemens Ladisch #define CM_TXVX 0x08000000 /* model 037? */ 213a839a33dSClemens Ladisch #define CM_N4SPK3D 0x04000000 /* copy front to rear */ 2141da177e4SLinus Torvalds #define CM_SPDO5V 0x02000000 /* 5V spdif output (1 = 0.5v (coax)) */ 2151da177e4SLinus Torvalds #define CM_SPDIF48K 0x01000000 /* write */ 2161da177e4SLinus Torvalds #define CM_SPATUS48K 0x01000000 /* read */ 217a839a33dSClemens Ladisch #define CM_ENDBDAC 0x00800000 /* enable double dac */ 2181da177e4SLinus Torvalds #define CM_XCHGDAC 0x00400000 /* 0: front=ch0, 1: front=ch1 */ 2191da177e4SLinus Torvalds #define CM_SPD32SEL 0x00200000 /* 0: 16bit SPDIF, 1: 32bit */ 220a839a33dSClemens Ladisch #define CM_SPDFLOOPI 0x00100000 /* int. SPDIF-OUT -> int. IN */ 221a839a33dSClemens Ladisch #define CM_FM_EN 0x00080000 /* enable legacy FM */ 2221da177e4SLinus Torvalds #define CM_AC3EN2 0x00040000 /* enable AC3: model 039 */ 223a839a33dSClemens Ladisch #define CM_ENWRASID 0x00010000 /* choose writable internal SUBID (audio) */ 224a839a33dSClemens Ladisch #define CM_VIDWPDSB 0x00010000 /* model 037? */ 2251da177e4SLinus Torvalds #define CM_SPDF_AC97 0x00008000 /* 0: SPDIF/OUT 44.1K, 1: 48K */ 226a839a33dSClemens Ladisch #define CM_MASK_EN 0x00004000 /* activate channel mask on legacy DMA */ 227a839a33dSClemens Ladisch #define CM_ENWRMSID 0x00002000 /* choose writable internal SUBID (modem) */ 228a839a33dSClemens Ladisch #define CM_VIDWPPRT 0x00002000 /* model 037? */ 229a839a33dSClemens Ladisch #define CM_SFILENB 0x00001000 /* filter stepping at front end DAC, model 037? */ 230a839a33dSClemens Ladisch #define CM_MMODE_MASK 0x00000E00 /* model DAA interface mode */ 2311da177e4SLinus Torvalds #define CM_SPDIF_SELECT2 0x00000100 /* for model > 039 ? */ 2321da177e4SLinus Torvalds #define CM_ENCENTER 0x00000080 23356c36ca3SClemens Ladisch #define CM_FLINKON 0x00000040 /* force modem link detection on, model 037 */ 234a839a33dSClemens Ladisch #define CM_MUTECH1 0x00000040 /* mute PCI ch1 to DAC */ 23556c36ca3SClemens Ladisch #define CM_FLINKOFF 0x00000020 /* force modem link detection off, model 037 */ 236a839a33dSClemens Ladisch #define CM_MIDSMP 0x00000010 /* 1/2 interpolation at front end DAC */ 237a839a33dSClemens Ladisch #define CM_UPDDMA_MASK 0x0000000C /* TDMA position update notification */ 238a839a33dSClemens Ladisch #define CM_UPDDMA_2048 0x00000000 239a839a33dSClemens Ladisch #define CM_UPDDMA_1024 0x00000004 240a839a33dSClemens Ladisch #define CM_UPDDMA_512 0x00000008 241a839a33dSClemens Ladisch #define CM_UPDDMA_256 0x0000000C 242a839a33dSClemens Ladisch #define CM_TWAIT_MASK 0x00000003 /* model 037 */ 243a839a33dSClemens Ladisch #define CM_TWAIT1 0x00000002 /* FM i/o cycle, 0: 48, 1: 64 PCICLKs */ 244a839a33dSClemens Ladisch #define CM_TWAIT0 0x00000001 /* i/o cycle, 0: 4, 1: 6 PCICLKs */ 245a839a33dSClemens Ladisch 246a839a33dSClemens Ladisch #define CM_REG_TDMA_POSITION 0x1C 247a839a33dSClemens Ladisch #define CM_TDMA_CNT_MASK 0xFFFF0000 /* current byte/word count */ 248a839a33dSClemens Ladisch #define CM_TDMA_ADR_MASK 0x0000FFFF /* current address */ 2491da177e4SLinus Torvalds 2501da177e4SLinus Torvalds /* byte */ 2511da177e4SLinus Torvalds #define CM_REG_MIXER0 0x20 252a839a33dSClemens Ladisch #define CM_REG_SBVR 0x20 /* write: sb16 version */ 253a839a33dSClemens Ladisch #define CM_REG_DEV 0x20 /* read: hardware device version */ 254a839a33dSClemens Ladisch 255a839a33dSClemens Ladisch #define CM_REG_MIXER21 0x21 256a839a33dSClemens Ladisch #define CM_UNKNOWN_21_MASK 0x78 /* ? */ 257a839a33dSClemens Ladisch #define CM_X_ADPCM 0x04 /* SB16 ADPCM enable */ 258a839a33dSClemens Ladisch #define CM_PROINV 0x02 /* SBPro left/right channel switching */ 259a839a33dSClemens Ladisch #define CM_X_SB16 0x01 /* SB16 compatible */ 2601da177e4SLinus Torvalds 2611da177e4SLinus Torvalds #define CM_REG_SB16_DATA 0x22 2621da177e4SLinus Torvalds #define CM_REG_SB16_ADDR 0x23 2631da177e4SLinus Torvalds 2641da177e4SLinus Torvalds #define CM_REFFREQ_XIN (315*1000*1000)/22 /* 14.31818 Mhz reference clock frequency pin XIN */ 2651da177e4SLinus Torvalds #define CM_ADCMULT_XIN 512 /* Guessed (487 best for 44.1kHz, not for 88/176kHz) */ 2661da177e4SLinus Torvalds #define CM_TOLERANCE_RATE 0.001 /* Tolerance sample rate pitch (1000ppm) */ 2671da177e4SLinus Torvalds #define CM_MAXIMUM_RATE 80000000 /* Note more than 80MHz */ 2681da177e4SLinus Torvalds 2691da177e4SLinus Torvalds #define CM_REG_MIXER1 0x24 2701da177e4SLinus Torvalds #define CM_FMMUTE 0x80 /* mute FM */ 2711da177e4SLinus Torvalds #define CM_FMMUTE_SHIFT 7 2721da177e4SLinus Torvalds #define CM_WSMUTE 0x40 /* mute PCM */ 2731da177e4SLinus Torvalds #define CM_WSMUTE_SHIFT 6 274a839a33dSClemens Ladisch #define CM_REAR2LIN 0x20 /* lin-in -> rear line out */ 275a839a33dSClemens Ladisch #define CM_REAR2LIN_SHIFT 5 2761da177e4SLinus Torvalds #define CM_REAR2FRONT 0x10 /* exchange rear/front */ 2771da177e4SLinus Torvalds #define CM_REAR2FRONT_SHIFT 4 2781da177e4SLinus Torvalds #define CM_WAVEINL 0x08 /* digital wave rec. left chan */ 2791da177e4SLinus Torvalds #define CM_WAVEINL_SHIFT 3 2801da177e4SLinus Torvalds #define CM_WAVEINR 0x04 /* digical wave rec. right */ 2811da177e4SLinus Torvalds #define CM_WAVEINR_SHIFT 2 2821da177e4SLinus Torvalds #define CM_X3DEN 0x02 /* 3D surround enable */ 2831da177e4SLinus Torvalds #define CM_X3DEN_SHIFT 1 2841da177e4SLinus Torvalds #define CM_CDPLAY 0x01 /* enable SPDIF/IN PCM -> DAC */ 2851da177e4SLinus Torvalds #define CM_CDPLAY_SHIFT 0 2861da177e4SLinus Torvalds 2871da177e4SLinus Torvalds #define CM_REG_MIXER2 0x25 2881da177e4SLinus Torvalds #define CM_RAUXREN 0x80 /* AUX right capture */ 2891da177e4SLinus Torvalds #define CM_RAUXREN_SHIFT 7 2901da177e4SLinus Torvalds #define CM_RAUXLEN 0x40 /* AUX left capture */ 2911da177e4SLinus Torvalds #define CM_RAUXLEN_SHIFT 6 2921da177e4SLinus Torvalds #define CM_VAUXRM 0x20 /* AUX right mute */ 2931da177e4SLinus Torvalds #define CM_VAUXRM_SHIFT 5 2941da177e4SLinus Torvalds #define CM_VAUXLM 0x10 /* AUX left mute */ 2951da177e4SLinus Torvalds #define CM_VAUXLM_SHIFT 4 2961da177e4SLinus Torvalds #define CM_VADMIC_MASK 0x0e /* mic gain level (0-3) << 1 */ 2971da177e4SLinus Torvalds #define CM_VADMIC_SHIFT 1 2981da177e4SLinus Torvalds #define CM_MICGAINZ 0x01 /* mic boost */ 2991da177e4SLinus Torvalds #define CM_MICGAINZ_SHIFT 0 3001da177e4SLinus Torvalds 3011da177e4SLinus Torvalds #define CM_REG_AUX_VOL 0x26 3021da177e4SLinus Torvalds #define CM_VAUXL_MASK 0xf0 3031da177e4SLinus Torvalds #define CM_VAUXR_MASK 0x0f 3041da177e4SLinus Torvalds 3051da177e4SLinus Torvalds #define CM_REG_MISC 0x27 306a839a33dSClemens Ladisch #define CM_UNKNOWN_27_MASK 0xd8 /* ? */ 3071da177e4SLinus Torvalds #define CM_XGPO1 0x20 3081da177e4SLinus Torvalds // #define CM_XGPBIO 0x04 3091da177e4SLinus Torvalds #define CM_MIC_CENTER_LFE 0x04 /* mic as center/lfe out? (model 039 or later?) */ 3101da177e4SLinus Torvalds #define CM_SPDIF_INVERSE 0x04 /* spdif input phase inverse (model 037) */ 3111da177e4SLinus Torvalds #define CM_SPDVALID 0x02 /* spdif input valid check */ 312a839a33dSClemens Ladisch #define CM_DMAUTO 0x01 /* SB16 DMA auto detect */ 3131da177e4SLinus Torvalds 3141da177e4SLinus Torvalds #define CM_REG_AC97 0x28 /* hmmm.. do we have ac97 link? */ 3151da177e4SLinus Torvalds /* 3161da177e4SLinus Torvalds * For CMI-8338 (0x28 - 0x2b) .. is this valid for CMI-8738 3171da177e4SLinus Torvalds * or identical with AC97 codec? 3181da177e4SLinus Torvalds */ 3191da177e4SLinus Torvalds #define CM_REG_EXTERN_CODEC CM_REG_AC97 3201da177e4SLinus Torvalds 3211da177e4SLinus Torvalds /* 3221da177e4SLinus Torvalds * MPU401 pci port index address 0x40 - 0x4f (CMI-8738 spec ver. 0.6) 3231da177e4SLinus Torvalds */ 3241da177e4SLinus Torvalds #define CM_REG_MPU_PCI 0x40 3251da177e4SLinus Torvalds 3261da177e4SLinus Torvalds /* 3271da177e4SLinus Torvalds * FM pci port index address 0x50 - 0x5f (CMI-8738 spec ver. 0.6) 3281da177e4SLinus Torvalds */ 3291da177e4SLinus Torvalds #define CM_REG_FM_PCI 0x50 3301da177e4SLinus Torvalds 3311da177e4SLinus Torvalds /* 3322eff7ec8STakashi Iwai * access from SB-mixer port 3331da177e4SLinus Torvalds */ 3341da177e4SLinus Torvalds #define CM_REG_EXTENT_IND 0xf0 3351da177e4SLinus Torvalds #define CM_VPHONE_MASK 0xe0 /* Phone volume control (0-3) << 5 */ 3361da177e4SLinus Torvalds #define CM_VPHONE_SHIFT 5 3371da177e4SLinus Torvalds #define CM_VPHOM 0x10 /* Phone mute control */ 3381da177e4SLinus Torvalds #define CM_VSPKM 0x08 /* Speaker mute control, default high */ 3391da177e4SLinus Torvalds #define CM_RLOOPREN 0x04 /* Rec. R-channel enable */ 3401da177e4SLinus Torvalds #define CM_RLOOPLEN 0x02 /* Rec. L-channel enable */ 3412eff7ec8STakashi Iwai #define CM_VADMIC3 0x01 /* Mic record boost */ 3421da177e4SLinus Torvalds 3431da177e4SLinus Torvalds /* 3441da177e4SLinus Torvalds * CMI-8338 spec ver 0.5 (this is not valid for CMI-8738): 3451da177e4SLinus Torvalds * the 8 registers 0xf8 - 0xff are used for programming m/n counter by the PLL 3461da177e4SLinus Torvalds * unit (readonly?). 3471da177e4SLinus Torvalds */ 3481da177e4SLinus Torvalds #define CM_REG_PLL 0xf8 3491da177e4SLinus Torvalds 3501da177e4SLinus Torvalds /* 3511da177e4SLinus Torvalds * extended registers 3521da177e4SLinus Torvalds */ 353a839a33dSClemens Ladisch #define CM_REG_CH0_FRAME1 0x80 /* write: base address */ 354a839a33dSClemens Ladisch #define CM_REG_CH0_FRAME2 0x84 /* read: current address */ 3551da177e4SLinus Torvalds #define CM_REG_CH1_FRAME1 0x88 /* 0-15: count of samples at bus master; buffer size */ 3561da177e4SLinus Torvalds #define CM_REG_CH1_FRAME2 0x8C /* 16-31: count of samples at codec; fragment size */ 357a839a33dSClemens Ladisch 358cb60e5f5STakashi Iwai #define CM_REG_EXT_MISC 0x90 359a839a33dSClemens Ladisch #define CM_ADC48K44K 0x10000000 /* ADC parameters group, 0: 44k, 1: 48k */ 360a839a33dSClemens Ladisch #define CM_CHB3D8C 0x00200000 /* 7.1 channels support */ 361a839a33dSClemens Ladisch #define CM_SPD32FMT 0x00100000 /* SPDIF/IN 32k sample rate */ 362a839a33dSClemens Ladisch #define CM_ADC2SPDIF 0x00080000 /* ADC output to SPDIF/OUT */ 363a839a33dSClemens Ladisch #define CM_SHAREADC 0x00040000 /* DAC in ADC as Center/LFE */ 364a839a33dSClemens Ladisch #define CM_REALTCMP 0x00020000 /* monitor the CMPL/CMPR of ADC */ 365a839a33dSClemens Ladisch #define CM_INVLRCK 0x00010000 /* invert ZVPORT's LRCK */ 366a839a33dSClemens Ladisch #define CM_UNKNOWN_90_MASK 0x0000FFFF /* ? */ 3671da177e4SLinus Torvalds 3681da177e4SLinus Torvalds /* 3691da177e4SLinus Torvalds * size of i/o region 3701da177e4SLinus Torvalds */ 3711da177e4SLinus Torvalds #define CM_EXTENT_CODEC 0x100 3721da177e4SLinus Torvalds #define CM_EXTENT_MIDI 0x2 3731da177e4SLinus Torvalds #define CM_EXTENT_SYNTH 0x4 3741da177e4SLinus Torvalds 3751da177e4SLinus Torvalds 3761da177e4SLinus Torvalds /* 3771da177e4SLinus Torvalds * channels for playback / capture 3781da177e4SLinus Torvalds */ 3791da177e4SLinus Torvalds #define CM_CH_PLAY 0 3801da177e4SLinus Torvalds #define CM_CH_CAPT 1 3811da177e4SLinus Torvalds 3821da177e4SLinus Torvalds /* 3831da177e4SLinus Torvalds * flags to check device open/close 3841da177e4SLinus Torvalds */ 3851da177e4SLinus Torvalds #define CM_OPEN_NONE 0 3861da177e4SLinus Torvalds #define CM_OPEN_CH_MASK 0x01 3871da177e4SLinus Torvalds #define CM_OPEN_DAC 0x10 3881da177e4SLinus Torvalds #define CM_OPEN_ADC 0x20 3891da177e4SLinus Torvalds #define CM_OPEN_SPDIF 0x40 3901da177e4SLinus Torvalds #define CM_OPEN_MCHAN 0x80 3911da177e4SLinus Torvalds #define CM_OPEN_PLAYBACK (CM_CH_PLAY | CM_OPEN_DAC) 3921da177e4SLinus Torvalds #define CM_OPEN_PLAYBACK2 (CM_CH_CAPT | CM_OPEN_DAC) 3931da177e4SLinus Torvalds #define CM_OPEN_PLAYBACK_MULTI (CM_CH_PLAY | CM_OPEN_DAC | CM_OPEN_MCHAN) 3941da177e4SLinus Torvalds #define CM_OPEN_CAPTURE (CM_CH_CAPT | CM_OPEN_ADC) 3951da177e4SLinus Torvalds #define CM_OPEN_SPDIF_PLAYBACK (CM_CH_PLAY | CM_OPEN_DAC | CM_OPEN_SPDIF) 3961da177e4SLinus Torvalds #define CM_OPEN_SPDIF_CAPTURE (CM_CH_CAPT | CM_OPEN_ADC | CM_OPEN_SPDIF) 3971da177e4SLinus Torvalds 3981da177e4SLinus Torvalds 3991da177e4SLinus Torvalds #if CM_CH_PLAY == 1 4001da177e4SLinus Torvalds #define CM_PLAYBACK_SRATE_176K CM_CH1_SRATE_176K 4011da177e4SLinus Torvalds #define CM_PLAYBACK_SPDF CM_SPDF_1 4021da177e4SLinus Torvalds #define CM_CAPTURE_SPDF CM_SPDF_0 4031da177e4SLinus Torvalds #else 4041da177e4SLinus Torvalds #define CM_PLAYBACK_SRATE_176K CM_CH0_SRATE_176K 4051da177e4SLinus Torvalds #define CM_PLAYBACK_SPDF CM_SPDF_0 4061da177e4SLinus Torvalds #define CM_CAPTURE_SPDF CM_SPDF_1 4071da177e4SLinus Torvalds #endif 4081da177e4SLinus Torvalds 4091da177e4SLinus Torvalds 4101da177e4SLinus Torvalds /* 4111da177e4SLinus Torvalds * driver data 4121da177e4SLinus Torvalds */ 4131da177e4SLinus Torvalds 4142cbdb686STakashi Iwai struct cmipci_pcm { 4152cbdb686STakashi Iwai struct snd_pcm_substream *substream; 416ebe9e289SClemens Ladisch u8 running; /* dac/adc running? */ 417ebe9e289SClemens Ladisch u8 fmt; /* format bits */ 418ebe9e289SClemens Ladisch u8 is_dac; 419c36fd8c3SClemens Ladisch u8 needs_silencing; 4201da177e4SLinus Torvalds unsigned int dma_size; /* in frames */ 421ebe9e289SClemens Ladisch unsigned int shift; 422ebe9e289SClemens Ladisch unsigned int ch; /* channel (0/1) */ 4231da177e4SLinus Torvalds unsigned int offset; /* physical address of the buffer */ 4241da177e4SLinus Torvalds }; 4251da177e4SLinus Torvalds 4261da177e4SLinus Torvalds /* mixer elements toggled/resumed during ac3 playback */ 4271da177e4SLinus Torvalds struct cmipci_mixer_auto_switches { 4281da177e4SLinus Torvalds const char *name; /* switch to toggle */ 4291da177e4SLinus Torvalds int toggle_on; /* value to change when ac3 mode */ 4301da177e4SLinus Torvalds }; 4311da177e4SLinus Torvalds static const struct cmipci_mixer_auto_switches cm_saved_mixer[] = { 4321da177e4SLinus Torvalds {"PCM Playback Switch", 0}, 4331da177e4SLinus Torvalds {"IEC958 Output Switch", 1}, 4341da177e4SLinus Torvalds {"IEC958 Mix Analog", 0}, 4351da177e4SLinus Torvalds // {"IEC958 Out To DAC", 1}, // no longer used 4361da177e4SLinus Torvalds {"IEC958 Loop", 0}, 4371da177e4SLinus Torvalds }; 4381da177e4SLinus Torvalds #define CM_SAVED_MIXERS ARRAY_SIZE(cm_saved_mixer) 4391da177e4SLinus Torvalds 4402cbdb686STakashi Iwai struct cmipci { 4412cbdb686STakashi Iwai struct snd_card *card; 4421da177e4SLinus Torvalds 4431da177e4SLinus Torvalds struct pci_dev *pci; 4441da177e4SLinus Torvalds unsigned int device; /* device ID */ 4451da177e4SLinus Torvalds int irq; 4461da177e4SLinus Torvalds 4471da177e4SLinus Torvalds unsigned long iobase; 4481da177e4SLinus Torvalds unsigned int ctrl; /* FUNCTRL0 current value */ 4491da177e4SLinus Torvalds 4502cbdb686STakashi Iwai struct snd_pcm *pcm; /* DAC/ADC PCM */ 4512cbdb686STakashi Iwai struct snd_pcm *pcm2; /* 2nd DAC */ 4522cbdb686STakashi Iwai struct snd_pcm *pcm_spdif; /* SPDIF */ 4531da177e4SLinus Torvalds 4541da177e4SLinus Torvalds int chip_version; 4551da177e4SLinus Torvalds int max_channels; 4561da177e4SLinus Torvalds unsigned int can_ac3_sw: 1; 4571da177e4SLinus Torvalds unsigned int can_ac3_hw: 1; 4581da177e4SLinus Torvalds unsigned int can_multi_ch: 1; 459755c48abSTimofei Bondarenko unsigned int can_96k: 1; /* samplerate above 48k */ 4601da177e4SLinus Torvalds unsigned int do_soft_ac3: 1; 4611da177e4SLinus Torvalds 4621da177e4SLinus Torvalds unsigned int spdif_playback_avail: 1; /* spdif ready? */ 4631da177e4SLinus Torvalds unsigned int spdif_playback_enabled: 1; /* spdif switch enabled? */ 4641da177e4SLinus Torvalds int spdif_counter; /* for software AC3 */ 4651da177e4SLinus Torvalds 4661da177e4SLinus Torvalds unsigned int dig_status; 4671da177e4SLinus Torvalds unsigned int dig_pcm_status; 4681da177e4SLinus Torvalds 4692cbdb686STakashi Iwai struct snd_pcm_hardware *hw_info[3]; /* for playbacks */ 4701da177e4SLinus Torvalds 4711da177e4SLinus Torvalds int opened[2]; /* open mode */ 47262932df8SIngo Molnar struct mutex open_mutex; 4731da177e4SLinus Torvalds 4741da177e4SLinus Torvalds unsigned int mixer_insensitive: 1; 4752cbdb686STakashi Iwai struct snd_kcontrol *mixer_res_ctl[CM_SAVED_MIXERS]; 4761da177e4SLinus Torvalds int mixer_res_status[CM_SAVED_MIXERS]; 4771da177e4SLinus Torvalds 4782cbdb686STakashi Iwai struct cmipci_pcm channel[2]; /* ch0 - DAC, ch1 - ADC or 2nd DAC */ 4791da177e4SLinus Torvalds 4801da177e4SLinus Torvalds /* external MIDI */ 4812cbdb686STakashi Iwai struct snd_rawmidi *rmidi; 4821da177e4SLinus Torvalds 4831da177e4SLinus Torvalds #ifdef SUPPORT_JOYSTICK 4841da177e4SLinus Torvalds struct gameport *gameport; 4851da177e4SLinus Torvalds #endif 4861da177e4SLinus Torvalds 4871da177e4SLinus Torvalds spinlock_t reg_lock; 488cb60e5f5STakashi Iwai 489cb60e5f5STakashi Iwai unsigned int saved_regs[0x20]; 490cb60e5f5STakashi Iwai unsigned char saved_mixers[0x20]; 4911da177e4SLinus Torvalds }; 4921da177e4SLinus Torvalds 4931da177e4SLinus Torvalds 4941da177e4SLinus Torvalds /* read/write operations for dword register */ 4952cbdb686STakashi Iwai static inline void snd_cmipci_write(struct cmipci *cm, unsigned int cmd, unsigned int data) 4961da177e4SLinus Torvalds { 4971da177e4SLinus Torvalds outl(data, cm->iobase + cmd); 4981da177e4SLinus Torvalds } 49977933d72SJesper Juhl 5002cbdb686STakashi Iwai static inline unsigned int snd_cmipci_read(struct cmipci *cm, unsigned int cmd) 5011da177e4SLinus Torvalds { 5021da177e4SLinus Torvalds return inl(cm->iobase + cmd); 5031da177e4SLinus Torvalds } 5041da177e4SLinus Torvalds 5051da177e4SLinus Torvalds /* read/write operations for word register */ 5062cbdb686STakashi Iwai static inline void snd_cmipci_write_w(struct cmipci *cm, unsigned int cmd, unsigned short data) 5071da177e4SLinus Torvalds { 5081da177e4SLinus Torvalds outw(data, cm->iobase + cmd); 5091da177e4SLinus Torvalds } 51077933d72SJesper Juhl 5112cbdb686STakashi Iwai static inline unsigned short snd_cmipci_read_w(struct cmipci *cm, unsigned int cmd) 5121da177e4SLinus Torvalds { 5131da177e4SLinus Torvalds return inw(cm->iobase + cmd); 5141da177e4SLinus Torvalds } 5151da177e4SLinus Torvalds 5161da177e4SLinus Torvalds /* read/write operations for byte register */ 5172cbdb686STakashi Iwai static inline void snd_cmipci_write_b(struct cmipci *cm, unsigned int cmd, unsigned char data) 5181da177e4SLinus Torvalds { 5191da177e4SLinus Torvalds outb(data, cm->iobase + cmd); 5201da177e4SLinus Torvalds } 5211da177e4SLinus Torvalds 5222cbdb686STakashi Iwai static inline unsigned char snd_cmipci_read_b(struct cmipci *cm, unsigned int cmd) 5231da177e4SLinus Torvalds { 5241da177e4SLinus Torvalds return inb(cm->iobase + cmd); 5251da177e4SLinus Torvalds } 5261da177e4SLinus Torvalds 5271da177e4SLinus Torvalds /* bit operations for dword register */ 5282cbdb686STakashi Iwai static int snd_cmipci_set_bit(struct cmipci *cm, unsigned int cmd, unsigned int flag) 5291da177e4SLinus Torvalds { 53001d25d46STakashi Iwai unsigned int val, oval; 53101d25d46STakashi Iwai val = oval = inl(cm->iobase + cmd); 5321da177e4SLinus Torvalds val |= flag; 53301d25d46STakashi Iwai if (val == oval) 53401d25d46STakashi Iwai return 0; 5351da177e4SLinus Torvalds outl(val, cm->iobase + cmd); 53601d25d46STakashi Iwai return 1; 5371da177e4SLinus Torvalds } 5381da177e4SLinus Torvalds 5392cbdb686STakashi Iwai static int snd_cmipci_clear_bit(struct cmipci *cm, unsigned int cmd, unsigned int flag) 5401da177e4SLinus Torvalds { 54101d25d46STakashi Iwai unsigned int val, oval; 54201d25d46STakashi Iwai val = oval = inl(cm->iobase + cmd); 5431da177e4SLinus Torvalds val &= ~flag; 54401d25d46STakashi Iwai if (val == oval) 54501d25d46STakashi Iwai return 0; 5461da177e4SLinus Torvalds outl(val, cm->iobase + cmd); 54701d25d46STakashi Iwai return 1; 5481da177e4SLinus Torvalds } 5491da177e4SLinus Torvalds 5501da177e4SLinus Torvalds /* bit operations for byte register */ 5512cbdb686STakashi Iwai static int snd_cmipci_set_bit_b(struct cmipci *cm, unsigned int cmd, unsigned char flag) 5521da177e4SLinus Torvalds { 55301d25d46STakashi Iwai unsigned char val, oval; 55401d25d46STakashi Iwai val = oval = inb(cm->iobase + cmd); 5551da177e4SLinus Torvalds val |= flag; 55601d25d46STakashi Iwai if (val == oval) 55701d25d46STakashi Iwai return 0; 5581da177e4SLinus Torvalds outb(val, cm->iobase + cmd); 55901d25d46STakashi Iwai return 1; 5601da177e4SLinus Torvalds } 5611da177e4SLinus Torvalds 5622cbdb686STakashi Iwai static int snd_cmipci_clear_bit_b(struct cmipci *cm, unsigned int cmd, unsigned char flag) 5631da177e4SLinus Torvalds { 56401d25d46STakashi Iwai unsigned char val, oval; 56501d25d46STakashi Iwai val = oval = inb(cm->iobase + cmd); 5661da177e4SLinus Torvalds val &= ~flag; 56701d25d46STakashi Iwai if (val == oval) 56801d25d46STakashi Iwai return 0; 5691da177e4SLinus Torvalds outb(val, cm->iobase + cmd); 57001d25d46STakashi Iwai return 1; 5711da177e4SLinus Torvalds } 5721da177e4SLinus Torvalds 5731da177e4SLinus Torvalds 5741da177e4SLinus Torvalds /* 5751da177e4SLinus Torvalds * PCM interface 5761da177e4SLinus Torvalds */ 5771da177e4SLinus Torvalds 5781da177e4SLinus Torvalds /* 5791da177e4SLinus Torvalds * calculate frequency 5801da177e4SLinus Torvalds */ 5811da177e4SLinus Torvalds 5825f3aca10STakashi Iwai static const unsigned int rates[] = { 5512, 11025, 22050, 44100, 8000, 16000, 32000, 48000 }; 5831da177e4SLinus Torvalds 5841da177e4SLinus Torvalds static unsigned int snd_cmipci_rate_freq(unsigned int rate) 5851da177e4SLinus Torvalds { 5861da177e4SLinus Torvalds unsigned int i; 5870f28eca3SClemens Ladisch 5881da177e4SLinus Torvalds for (i = 0; i < ARRAY_SIZE(rates); i++) { 5891da177e4SLinus Torvalds if (rates[i] == rate) 5901da177e4SLinus Torvalds return i; 5911da177e4SLinus Torvalds } 5921da177e4SLinus Torvalds snd_BUG(); 5931da177e4SLinus Torvalds return 0; 5941da177e4SLinus Torvalds } 5951da177e4SLinus Torvalds 5961da177e4SLinus Torvalds #ifdef USE_VAR48KRATE 5971da177e4SLinus Torvalds /* 5981da177e4SLinus Torvalds * Determine PLL values for frequency setup, maybe the CMI8338 (CMI8738???) 5991da177e4SLinus Torvalds * does it this way .. maybe not. Never get any information from C-Media about 6001da177e4SLinus Torvalds * that <werner@suse.de>. 6011da177e4SLinus Torvalds */ 6021da177e4SLinus Torvalds static int snd_cmipci_pll_rmn(unsigned int rate, unsigned int adcmult, int *r, int *m, int *n) 6031da177e4SLinus Torvalds { 6041da177e4SLinus Torvalds unsigned int delta, tolerance; 6051da177e4SLinus Torvalds int xm, xn, xr; 6061da177e4SLinus Torvalds 6071da177e4SLinus Torvalds for (*r = 0; rate < CM_MAXIMUM_RATE/adcmult; *r += (1<<5)) 6081da177e4SLinus Torvalds rate <<= 1; 6091da177e4SLinus Torvalds *n = -1; 6101da177e4SLinus Torvalds if (*r > 0xff) 6111da177e4SLinus Torvalds goto out; 6121da177e4SLinus Torvalds tolerance = rate*CM_TOLERANCE_RATE; 6131da177e4SLinus Torvalds 6141da177e4SLinus Torvalds for (xn = (1+2); xn < (0x1f+2); xn++) { 6151da177e4SLinus Torvalds for (xm = (1+2); xm < (0xff+2); xm++) { 6161da177e4SLinus Torvalds xr = ((CM_REFFREQ_XIN/adcmult) * xm) / xn; 6171da177e4SLinus Torvalds 6181da177e4SLinus Torvalds if (xr < rate) 6191da177e4SLinus Torvalds delta = rate - xr; 6201da177e4SLinus Torvalds else 6211da177e4SLinus Torvalds delta = xr - rate; 6221da177e4SLinus Torvalds 6231da177e4SLinus Torvalds /* 6241da177e4SLinus Torvalds * If we found one, remember this, 6251da177e4SLinus Torvalds * and try to find a closer one 6261da177e4SLinus Torvalds */ 6271da177e4SLinus Torvalds if (delta < tolerance) { 6281da177e4SLinus Torvalds tolerance = delta; 6291da177e4SLinus Torvalds *m = xm - 2; 6301da177e4SLinus Torvalds *n = xn - 2; 6311da177e4SLinus Torvalds } 6321da177e4SLinus Torvalds } 6331da177e4SLinus Torvalds } 6341da177e4SLinus Torvalds out: 6351da177e4SLinus Torvalds return (*n > -1); 6361da177e4SLinus Torvalds } 6371da177e4SLinus Torvalds 6381da177e4SLinus Torvalds /* 6391da177e4SLinus Torvalds * Program pll register bits, I assume that the 8 registers 0xf8 up to 0xff 64025985edcSLucas De Marchi * are mapped onto the 8 ADC/DAC sampling frequency which can be chosen 6411da177e4SLinus Torvalds * at the register CM_REG_FUNCTRL1 (0x04). 6421da177e4SLinus Torvalds * Problem: other ways are also possible (any information about that?) 6431da177e4SLinus Torvalds */ 6442cbdb686STakashi Iwai static void snd_cmipci_set_pll(struct cmipci *cm, unsigned int rate, unsigned int slot) 6451da177e4SLinus Torvalds { 6461da177e4SLinus Torvalds unsigned int reg = CM_REG_PLL + slot; 6471da177e4SLinus Torvalds /* 6481da177e4SLinus Torvalds * Guess that this programs at reg. 0x04 the pos 15:13/12:10 6491da177e4SLinus Torvalds * for DSFC/ASFC (000 up to 111). 6501da177e4SLinus Torvalds */ 6511da177e4SLinus Torvalds 6521da177e4SLinus Torvalds /* FIXME: Init (Do we've to set an other register first before programming?) */ 6531da177e4SLinus Torvalds 6541da177e4SLinus Torvalds /* FIXME: Is this correct? Or shouldn't the m/n/r values be used for that? */ 6551da177e4SLinus Torvalds snd_cmipci_write_b(cm, reg, rate>>8); 6561da177e4SLinus Torvalds snd_cmipci_write_b(cm, reg, rate&0xff); 6571da177e4SLinus Torvalds 6581da177e4SLinus Torvalds /* FIXME: Setup (Do we've to set an other register first to enable this?) */ 6591da177e4SLinus Torvalds } 6601da177e4SLinus Torvalds #endif /* USE_VAR48KRATE */ 6611da177e4SLinus Torvalds 6622cbdb686STakashi Iwai static int snd_cmipci_playback2_hw_params(struct snd_pcm_substream *substream, 6632cbdb686STakashi Iwai struct snd_pcm_hw_params *hw_params) 6641da177e4SLinus Torvalds { 6652cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 6661da177e4SLinus Torvalds if (params_channels(hw_params) > 2) { 66762932df8SIngo Molnar mutex_lock(&cm->open_mutex); 6681da177e4SLinus Torvalds if (cm->opened[CM_CH_PLAY]) { 66962932df8SIngo Molnar mutex_unlock(&cm->open_mutex); 6701da177e4SLinus Torvalds return -EBUSY; 6711da177e4SLinus Torvalds } 6721da177e4SLinus Torvalds /* reserve the channel A */ 6731da177e4SLinus Torvalds cm->opened[CM_CH_PLAY] = CM_OPEN_PLAYBACK_MULTI; 67462932df8SIngo Molnar mutex_unlock(&cm->open_mutex); 6751da177e4SLinus Torvalds } 676d841e2e8STakashi Iwai return 0; 6771da177e4SLinus Torvalds } 6781da177e4SLinus Torvalds 6792cbdb686STakashi Iwai static void snd_cmipci_ch_reset(struct cmipci *cm, int ch) 6801da177e4SLinus Torvalds { 6811da177e4SLinus Torvalds int reset = CM_RST_CH0 << (cm->channel[ch].ch); 6821da177e4SLinus Torvalds snd_cmipci_write(cm, CM_REG_FUNCTRL0, cm->ctrl | reset); 6831da177e4SLinus Torvalds snd_cmipci_write(cm, CM_REG_FUNCTRL0, cm->ctrl & ~reset); 6841da177e4SLinus Torvalds udelay(10); 6851da177e4SLinus Torvalds } 6861da177e4SLinus Torvalds 6871da177e4SLinus Torvalds 6881da177e4SLinus Torvalds /* 6891da177e4SLinus Torvalds */ 6901da177e4SLinus Torvalds 6910fac3195STakashi Iwai static const unsigned int hw_channels[] = {1, 2, 4, 6, 8}; 6920fac3195STakashi Iwai static const struct snd_pcm_hw_constraint_list hw_constraints_channels_4 = { 6931da177e4SLinus Torvalds .count = 3, 6941da177e4SLinus Torvalds .list = hw_channels, 6951da177e4SLinus Torvalds .mask = 0, 6961da177e4SLinus Torvalds }; 6970fac3195STakashi Iwai static const struct snd_pcm_hw_constraint_list hw_constraints_channels_6 = { 69835add1c2SClemens Ladisch .count = 4, 6991da177e4SLinus Torvalds .list = hw_channels, 7001da177e4SLinus Torvalds .mask = 0, 7011da177e4SLinus Torvalds }; 7020fac3195STakashi Iwai static const struct snd_pcm_hw_constraint_list hw_constraints_channels_8 = { 70335add1c2SClemens Ladisch .count = 5, 7041da177e4SLinus Torvalds .list = hw_channels, 7051da177e4SLinus Torvalds .mask = 0, 7061da177e4SLinus Torvalds }; 7071da177e4SLinus Torvalds 7082cbdb686STakashi Iwai static int set_dac_channels(struct cmipci *cm, struct cmipci_pcm *rec, int channels) 7091da177e4SLinus Torvalds { 7101da177e4SLinus Torvalds if (channels > 2) { 7118ffbc01eSClemens Ladisch if (!cm->can_multi_ch || !rec->ch) 7121da177e4SLinus Torvalds return -EINVAL; 7131da177e4SLinus Torvalds if (rec->fmt != 0x03) /* stereo 16bit only */ 7141da177e4SLinus Torvalds return -EINVAL; 7158ffbc01eSClemens Ladisch } 7161da177e4SLinus Torvalds 7171da177e4SLinus Torvalds if (cm->can_multi_ch) { 7181da177e4SLinus Torvalds spin_lock_irq(&cm->reg_lock); 7198ffbc01eSClemens Ladisch if (channels > 2) { 7208ffbc01eSClemens Ladisch snd_cmipci_set_bit(cm, CM_REG_LEGACY_CTRL, CM_NXCHG); 7218ffbc01eSClemens Ladisch snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC); 7228ffbc01eSClemens Ladisch } else { 7231da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_LEGACY_CTRL, CM_NXCHG); 7248ffbc01eSClemens Ladisch snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC); 7258ffbc01eSClemens Ladisch } 7268ffbc01eSClemens Ladisch if (channels == 8) 7278ffbc01eSClemens Ladisch snd_cmipci_set_bit(cm, CM_REG_EXT_MISC, CM_CHB3D8C); 7288ffbc01eSClemens Ladisch else 7298ffbc01eSClemens Ladisch snd_cmipci_clear_bit(cm, CM_REG_EXT_MISC, CM_CHB3D8C); 7308ffbc01eSClemens Ladisch if (channels == 6) { 7318ffbc01eSClemens Ladisch snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C); 7328ffbc01eSClemens Ladisch snd_cmipci_set_bit(cm, CM_REG_LEGACY_CTRL, CM_CHB3D6C); 7338ffbc01eSClemens Ladisch } else { 7341da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C); 7351da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_LEGACY_CTRL, CM_CHB3D6C); 7361da177e4SLinus Torvalds } 7378ffbc01eSClemens Ladisch if (channels == 4) 7388ffbc01eSClemens Ladisch snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D); 7398ffbc01eSClemens Ladisch else 7408ffbc01eSClemens Ladisch snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D); 7418ffbc01eSClemens Ladisch spin_unlock_irq(&cm->reg_lock); 7421da177e4SLinus Torvalds } 7431da177e4SLinus Torvalds return 0; 7441da177e4SLinus Torvalds } 7451da177e4SLinus Torvalds 7461da177e4SLinus Torvalds 7471da177e4SLinus Torvalds /* 7481da177e4SLinus Torvalds * prepare playback/capture channel 7491da177e4SLinus Torvalds * channel to be used must have been set in rec->ch. 7501da177e4SLinus Torvalds */ 7512cbdb686STakashi Iwai static int snd_cmipci_pcm_prepare(struct cmipci *cm, struct cmipci_pcm *rec, 7522cbdb686STakashi Iwai struct snd_pcm_substream *substream) 7531da177e4SLinus Torvalds { 754755c48abSTimofei Bondarenko unsigned int reg, freq, freq_ext, val; 755ebe9e289SClemens Ladisch unsigned int period_size; 7562cbdb686STakashi Iwai struct snd_pcm_runtime *runtime = substream->runtime; 7571da177e4SLinus Torvalds 7581da177e4SLinus Torvalds rec->fmt = 0; 7591da177e4SLinus Torvalds rec->shift = 0; 7601da177e4SLinus Torvalds if (snd_pcm_format_width(runtime->format) >= 16) { 7611da177e4SLinus Torvalds rec->fmt |= 0x02; 7621da177e4SLinus Torvalds if (snd_pcm_format_width(runtime->format) > 16) 7631da177e4SLinus Torvalds rec->shift++; /* 24/32bit */ 7641da177e4SLinus Torvalds } 7651da177e4SLinus Torvalds if (runtime->channels > 1) 7661da177e4SLinus Torvalds rec->fmt |= 0x01; 7671da177e4SLinus Torvalds if (rec->is_dac && set_dac_channels(cm, rec, runtime->channels) < 0) { 76840175bdbSTakashi Iwai dev_dbg(cm->card->dev, "cannot set dac channels\n"); 7691da177e4SLinus Torvalds return -EINVAL; 7701da177e4SLinus Torvalds } 7711da177e4SLinus Torvalds 7721da177e4SLinus Torvalds rec->offset = runtime->dma_addr; 7731da177e4SLinus Torvalds /* buffer and period sizes in frame */ 7741da177e4SLinus Torvalds rec->dma_size = runtime->buffer_size << rec->shift; 775ebe9e289SClemens Ladisch period_size = runtime->period_size << rec->shift; 7761da177e4SLinus Torvalds if (runtime->channels > 2) { 7771da177e4SLinus Torvalds /* multi-channels */ 7781da177e4SLinus Torvalds rec->dma_size = (rec->dma_size * runtime->channels) / 2; 779ebe9e289SClemens Ladisch period_size = (period_size * runtime->channels) / 2; 7801da177e4SLinus Torvalds } 7811da177e4SLinus Torvalds 7821da177e4SLinus Torvalds spin_lock_irq(&cm->reg_lock); 7831da177e4SLinus Torvalds 7841da177e4SLinus Torvalds /* set buffer address */ 7851da177e4SLinus Torvalds reg = rec->ch ? CM_REG_CH1_FRAME1 : CM_REG_CH0_FRAME1; 7861da177e4SLinus Torvalds snd_cmipci_write(cm, reg, rec->offset); 7871da177e4SLinus Torvalds /* program sample counts */ 7881da177e4SLinus Torvalds reg = rec->ch ? CM_REG_CH1_FRAME2 : CM_REG_CH0_FRAME2; 7891da177e4SLinus Torvalds snd_cmipci_write_w(cm, reg, rec->dma_size - 1); 790ebe9e289SClemens Ladisch snd_cmipci_write_w(cm, reg + 2, period_size - 1); 7911da177e4SLinus Torvalds 7921da177e4SLinus Torvalds /* set adc/dac flag */ 7931da177e4SLinus Torvalds val = rec->ch ? CM_CHADC1 : CM_CHADC0; 7941da177e4SLinus Torvalds if (rec->is_dac) 7951da177e4SLinus Torvalds cm->ctrl &= ~val; 7961da177e4SLinus Torvalds else 7971da177e4SLinus Torvalds cm->ctrl |= val; 7981da177e4SLinus Torvalds snd_cmipci_write(cm, CM_REG_FUNCTRL0, cm->ctrl); 79940175bdbSTakashi Iwai /* dev_dbg(cm->card->dev, "functrl0 = %08x\n", cm->ctrl); */ 8001da177e4SLinus Torvalds 8011da177e4SLinus Torvalds /* set sample rate */ 802755c48abSTimofei Bondarenko freq = 0; 803755c48abSTimofei Bondarenko freq_ext = 0; 804755c48abSTimofei Bondarenko if (runtime->rate > 48000) 805755c48abSTimofei Bondarenko switch (runtime->rate) { 806755c48abSTimofei Bondarenko case 88200: freq_ext = CM_CH0_SRATE_88K; break; 807755c48abSTimofei Bondarenko case 96000: freq_ext = CM_CH0_SRATE_96K; break; 808755c48abSTimofei Bondarenko case 128000: freq_ext = CM_CH0_SRATE_128K; break; 809755c48abSTimofei Bondarenko default: snd_BUG(); break; 810755c48abSTimofei Bondarenko } 811755c48abSTimofei Bondarenko else 8121da177e4SLinus Torvalds freq = snd_cmipci_rate_freq(runtime->rate); 8131da177e4SLinus Torvalds val = snd_cmipci_read(cm, CM_REG_FUNCTRL1); 8141da177e4SLinus Torvalds if (rec->ch) { 8151da177e4SLinus Torvalds val &= ~CM_DSFC_MASK; 8161da177e4SLinus Torvalds val |= (freq << CM_DSFC_SHIFT) & CM_DSFC_MASK; 817a839a33dSClemens Ladisch } else { 818a839a33dSClemens Ladisch val &= ~CM_ASFC_MASK; 819a839a33dSClemens Ladisch val |= (freq << CM_ASFC_SHIFT) & CM_ASFC_MASK; 8201da177e4SLinus Torvalds } 8211da177e4SLinus Torvalds snd_cmipci_write(cm, CM_REG_FUNCTRL1, val); 82240175bdbSTakashi Iwai dev_dbg(cm->card->dev, "functrl1 = %08x\n", val); 8231da177e4SLinus Torvalds 8241da177e4SLinus Torvalds /* set format */ 8251da177e4SLinus Torvalds val = snd_cmipci_read(cm, CM_REG_CHFORMAT); 8261da177e4SLinus Torvalds if (rec->ch) { 8271da177e4SLinus Torvalds val &= ~CM_CH1FMT_MASK; 8281da177e4SLinus Torvalds val |= rec->fmt << CM_CH1FMT_SHIFT; 8291da177e4SLinus Torvalds } else { 8301da177e4SLinus Torvalds val &= ~CM_CH0FMT_MASK; 8311da177e4SLinus Torvalds val |= rec->fmt << CM_CH0FMT_SHIFT; 8321da177e4SLinus Torvalds } 833755c48abSTimofei Bondarenko if (cm->can_96k) { 834755c48abSTimofei Bondarenko val &= ~(CM_CH0_SRATE_MASK << (rec->ch * 2)); 835755c48abSTimofei Bondarenko val |= freq_ext << (rec->ch * 2); 8368992e18dSClemens Ladisch } 8371da177e4SLinus Torvalds snd_cmipci_write(cm, CM_REG_CHFORMAT, val); 83840175bdbSTakashi Iwai dev_dbg(cm->card->dev, "chformat = %08x\n", val); 8391da177e4SLinus Torvalds 840feb77712STimofei Bondarenko if (!rec->is_dac && cm->chip_version) { 841feb77712STimofei Bondarenko if (runtime->rate > 44100) 842feb77712STimofei Bondarenko snd_cmipci_set_bit(cm, CM_REG_EXT_MISC, CM_ADC48K44K); 843feb77712STimofei Bondarenko else 844feb77712STimofei Bondarenko snd_cmipci_clear_bit(cm, CM_REG_EXT_MISC, CM_ADC48K44K); 845feb77712STimofei Bondarenko } 846feb77712STimofei Bondarenko 8471da177e4SLinus Torvalds rec->running = 0; 8481da177e4SLinus Torvalds spin_unlock_irq(&cm->reg_lock); 8491da177e4SLinus Torvalds 8501da177e4SLinus Torvalds return 0; 8511da177e4SLinus Torvalds } 8521da177e4SLinus Torvalds 8531da177e4SLinus Torvalds /* 8541da177e4SLinus Torvalds * PCM trigger/stop 8551da177e4SLinus Torvalds */ 8562cbdb686STakashi Iwai static int snd_cmipci_pcm_trigger(struct cmipci *cm, struct cmipci_pcm *rec, 857ebe9e289SClemens Ladisch int cmd) 8581da177e4SLinus Torvalds { 8591da177e4SLinus Torvalds unsigned int inthld, chen, reset, pause; 8601da177e4SLinus Torvalds int result = 0; 8611da177e4SLinus Torvalds 8621da177e4SLinus Torvalds inthld = CM_CH0_INT_EN << rec->ch; 8631da177e4SLinus Torvalds chen = CM_CHEN0 << rec->ch; 8641da177e4SLinus Torvalds reset = CM_RST_CH0 << rec->ch; 8651da177e4SLinus Torvalds pause = CM_PAUSE0 << rec->ch; 8661da177e4SLinus Torvalds 8671da177e4SLinus Torvalds spin_lock(&cm->reg_lock); 8681da177e4SLinus Torvalds switch (cmd) { 8691da177e4SLinus Torvalds case SNDRV_PCM_TRIGGER_START: 8701da177e4SLinus Torvalds rec->running = 1; 8711da177e4SLinus Torvalds /* set interrupt */ 8721da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_INT_HLDCLR, inthld); 8731da177e4SLinus Torvalds cm->ctrl |= chen; 8741da177e4SLinus Torvalds /* enable channel */ 8751da177e4SLinus Torvalds snd_cmipci_write(cm, CM_REG_FUNCTRL0, cm->ctrl); 87640175bdbSTakashi Iwai dev_dbg(cm->card->dev, "functrl0 = %08x\n", cm->ctrl); 8771da177e4SLinus Torvalds break; 8781da177e4SLinus Torvalds case SNDRV_PCM_TRIGGER_STOP: 8791da177e4SLinus Torvalds rec->running = 0; 8801da177e4SLinus Torvalds /* disable interrupt */ 8811da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_INT_HLDCLR, inthld); 8821da177e4SLinus Torvalds /* reset */ 8831da177e4SLinus Torvalds cm->ctrl &= ~chen; 8841da177e4SLinus Torvalds snd_cmipci_write(cm, CM_REG_FUNCTRL0, cm->ctrl | reset); 8851da177e4SLinus Torvalds snd_cmipci_write(cm, CM_REG_FUNCTRL0, cm->ctrl & ~reset); 886c36fd8c3SClemens Ladisch rec->needs_silencing = rec->is_dac; 8871da177e4SLinus Torvalds break; 8881da177e4SLinus Torvalds case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 889cb60e5f5STakashi Iwai case SNDRV_PCM_TRIGGER_SUSPEND: 8901da177e4SLinus Torvalds cm->ctrl |= pause; 8911da177e4SLinus Torvalds snd_cmipci_write(cm, CM_REG_FUNCTRL0, cm->ctrl); 8921da177e4SLinus Torvalds break; 8931da177e4SLinus Torvalds case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 894cb60e5f5STakashi Iwai case SNDRV_PCM_TRIGGER_RESUME: 8951da177e4SLinus Torvalds cm->ctrl &= ~pause; 8961da177e4SLinus Torvalds snd_cmipci_write(cm, CM_REG_FUNCTRL0, cm->ctrl); 8971da177e4SLinus Torvalds break; 8981da177e4SLinus Torvalds default: 8991da177e4SLinus Torvalds result = -EINVAL; 9001da177e4SLinus Torvalds break; 9011da177e4SLinus Torvalds } 9021da177e4SLinus Torvalds spin_unlock(&cm->reg_lock); 9031da177e4SLinus Torvalds return result; 9041da177e4SLinus Torvalds } 9051da177e4SLinus Torvalds 9061da177e4SLinus Torvalds /* 9071da177e4SLinus Torvalds * return the current pointer 9081da177e4SLinus Torvalds */ 9092cbdb686STakashi Iwai static snd_pcm_uframes_t snd_cmipci_pcm_pointer(struct cmipci *cm, struct cmipci_pcm *rec, 9102cbdb686STakashi Iwai struct snd_pcm_substream *substream) 9111da177e4SLinus Torvalds { 9121da177e4SLinus Torvalds size_t ptr; 9131c583063SClemens Ladisch unsigned int reg, rem, tries; 9141c583063SClemens Ladisch 9151da177e4SLinus Torvalds if (!rec->running) 9161da177e4SLinus Torvalds return 0; 9171da177e4SLinus Torvalds #if 1 // this seems better.. 9181da177e4SLinus Torvalds reg = rec->ch ? CM_REG_CH1_FRAME2 : CM_REG_CH0_FRAME2; 9191c583063SClemens Ladisch for (tries = 0; tries < 3; tries++) { 9201c583063SClemens Ladisch rem = snd_cmipci_read_w(cm, reg); 9211c583063SClemens Ladisch if (rem < rec->dma_size) 9221c583063SClemens Ladisch goto ok; 9231c583063SClemens Ladisch } 92440175bdbSTakashi Iwai dev_err(cm->card->dev, "invalid PCM pointer: %#x\n", rem); 9251c583063SClemens Ladisch return SNDRV_PCM_POS_XRUN; 9261c583063SClemens Ladisch ok: 9271c583063SClemens Ladisch ptr = (rec->dma_size - (rem + 1)) >> rec->shift; 9281da177e4SLinus Torvalds #else 9291da177e4SLinus Torvalds reg = rec->ch ? CM_REG_CH1_FRAME1 : CM_REG_CH0_FRAME1; 9301da177e4SLinus Torvalds ptr = snd_cmipci_read(cm, reg) - rec->offset; 9311da177e4SLinus Torvalds ptr = bytes_to_frames(substream->runtime, ptr); 9321da177e4SLinus Torvalds #endif 9331da177e4SLinus Torvalds if (substream->runtime->channels > 2) 9341da177e4SLinus Torvalds ptr = (ptr * 2) / substream->runtime->channels; 9351da177e4SLinus Torvalds return ptr; 9361da177e4SLinus Torvalds } 9371da177e4SLinus Torvalds 9381da177e4SLinus Torvalds /* 9391da177e4SLinus Torvalds * playback 9401da177e4SLinus Torvalds */ 9411da177e4SLinus Torvalds 9422cbdb686STakashi Iwai static int snd_cmipci_playback_trigger(struct snd_pcm_substream *substream, 9431da177e4SLinus Torvalds int cmd) 9441da177e4SLinus Torvalds { 9452cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 946ebe9e289SClemens Ladisch return snd_cmipci_pcm_trigger(cm, &cm->channel[CM_CH_PLAY], cmd); 9471da177e4SLinus Torvalds } 9481da177e4SLinus Torvalds 9492cbdb686STakashi Iwai static snd_pcm_uframes_t snd_cmipci_playback_pointer(struct snd_pcm_substream *substream) 9501da177e4SLinus Torvalds { 9512cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 9521da177e4SLinus Torvalds return snd_cmipci_pcm_pointer(cm, &cm->channel[CM_CH_PLAY], substream); 9531da177e4SLinus Torvalds } 9541da177e4SLinus Torvalds 9551da177e4SLinus Torvalds 9561da177e4SLinus Torvalds 9571da177e4SLinus Torvalds /* 9581da177e4SLinus Torvalds * capture 9591da177e4SLinus Torvalds */ 9601da177e4SLinus Torvalds 9612cbdb686STakashi Iwai static int snd_cmipci_capture_trigger(struct snd_pcm_substream *substream, 9621da177e4SLinus Torvalds int cmd) 9631da177e4SLinus Torvalds { 9642cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 965ebe9e289SClemens Ladisch return snd_cmipci_pcm_trigger(cm, &cm->channel[CM_CH_CAPT], cmd); 9661da177e4SLinus Torvalds } 9671da177e4SLinus Torvalds 9682cbdb686STakashi Iwai static snd_pcm_uframes_t snd_cmipci_capture_pointer(struct snd_pcm_substream *substream) 9691da177e4SLinus Torvalds { 9702cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 9711da177e4SLinus Torvalds return snd_cmipci_pcm_pointer(cm, &cm->channel[CM_CH_CAPT], substream); 9721da177e4SLinus Torvalds } 9731da177e4SLinus Torvalds 9741da177e4SLinus Torvalds 9751da177e4SLinus Torvalds /* 9761da177e4SLinus Torvalds * hw preparation for spdif 9771da177e4SLinus Torvalds */ 9781da177e4SLinus Torvalds 9792cbdb686STakashi Iwai static int snd_cmipci_spdif_default_info(struct snd_kcontrol *kcontrol, 9802cbdb686STakashi Iwai struct snd_ctl_elem_info *uinfo) 9811da177e4SLinus Torvalds { 9821da177e4SLinus Torvalds uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 9831da177e4SLinus Torvalds uinfo->count = 1; 9841da177e4SLinus Torvalds return 0; 9851da177e4SLinus Torvalds } 9861da177e4SLinus Torvalds 9872cbdb686STakashi Iwai static int snd_cmipci_spdif_default_get(struct snd_kcontrol *kcontrol, 9882cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 9891da177e4SLinus Torvalds { 9902cbdb686STakashi Iwai struct cmipci *chip = snd_kcontrol_chip(kcontrol); 9911da177e4SLinus Torvalds int i; 9921da177e4SLinus Torvalds 9931da177e4SLinus Torvalds spin_lock_irq(&chip->reg_lock); 9941da177e4SLinus Torvalds for (i = 0; i < 4; i++) 9951da177e4SLinus Torvalds ucontrol->value.iec958.status[i] = (chip->dig_status >> (i * 8)) & 0xff; 9961da177e4SLinus Torvalds spin_unlock_irq(&chip->reg_lock); 9971da177e4SLinus Torvalds return 0; 9981da177e4SLinus Torvalds } 9991da177e4SLinus Torvalds 10002cbdb686STakashi Iwai static int snd_cmipci_spdif_default_put(struct snd_kcontrol *kcontrol, 10012cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 10021da177e4SLinus Torvalds { 10032cbdb686STakashi Iwai struct cmipci *chip = snd_kcontrol_chip(kcontrol); 10041da177e4SLinus Torvalds int i, change; 10051da177e4SLinus Torvalds unsigned int val; 10061da177e4SLinus Torvalds 10071da177e4SLinus Torvalds val = 0; 10081da177e4SLinus Torvalds spin_lock_irq(&chip->reg_lock); 10091da177e4SLinus Torvalds for (i = 0; i < 4; i++) 10101da177e4SLinus Torvalds val |= (unsigned int)ucontrol->value.iec958.status[i] << (i * 8); 10111da177e4SLinus Torvalds change = val != chip->dig_status; 10121da177e4SLinus Torvalds chip->dig_status = val; 10131da177e4SLinus Torvalds spin_unlock_irq(&chip->reg_lock); 10141da177e4SLinus Torvalds return change; 10151da177e4SLinus Torvalds } 10161da177e4SLinus Torvalds 1017f3b827e0SBhumika Goyal static const struct snd_kcontrol_new snd_cmipci_spdif_default = 10181da177e4SLinus Torvalds { 10191da177e4SLinus Torvalds .iface = SNDRV_CTL_ELEM_IFACE_PCM, 10201da177e4SLinus Torvalds .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 10211da177e4SLinus Torvalds .info = snd_cmipci_spdif_default_info, 10221da177e4SLinus Torvalds .get = snd_cmipci_spdif_default_get, 10231da177e4SLinus Torvalds .put = snd_cmipci_spdif_default_put 10241da177e4SLinus Torvalds }; 10251da177e4SLinus Torvalds 10262cbdb686STakashi Iwai static int snd_cmipci_spdif_mask_info(struct snd_kcontrol *kcontrol, 10272cbdb686STakashi Iwai struct snd_ctl_elem_info *uinfo) 10281da177e4SLinus Torvalds { 10291da177e4SLinus Torvalds uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 10301da177e4SLinus Torvalds uinfo->count = 1; 10311da177e4SLinus Torvalds return 0; 10321da177e4SLinus Torvalds } 10331da177e4SLinus Torvalds 10342cbdb686STakashi Iwai static int snd_cmipci_spdif_mask_get(struct snd_kcontrol *kcontrol, 10352cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 10361da177e4SLinus Torvalds { 10371da177e4SLinus Torvalds ucontrol->value.iec958.status[0] = 0xff; 10381da177e4SLinus Torvalds ucontrol->value.iec958.status[1] = 0xff; 10391da177e4SLinus Torvalds ucontrol->value.iec958.status[2] = 0xff; 10401da177e4SLinus Torvalds ucontrol->value.iec958.status[3] = 0xff; 10411da177e4SLinus Torvalds return 0; 10421da177e4SLinus Torvalds } 10431da177e4SLinus Torvalds 1044f3b827e0SBhumika Goyal static const struct snd_kcontrol_new snd_cmipci_spdif_mask = 10451da177e4SLinus Torvalds { 10461da177e4SLinus Torvalds .access = SNDRV_CTL_ELEM_ACCESS_READ, 104767ed4161SClemens Ladisch .iface = SNDRV_CTL_ELEM_IFACE_PCM, 10481da177e4SLinus Torvalds .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 10491da177e4SLinus Torvalds .info = snd_cmipci_spdif_mask_info, 10501da177e4SLinus Torvalds .get = snd_cmipci_spdif_mask_get, 10511da177e4SLinus Torvalds }; 10521da177e4SLinus Torvalds 10532cbdb686STakashi Iwai static int snd_cmipci_spdif_stream_info(struct snd_kcontrol *kcontrol, 10542cbdb686STakashi Iwai struct snd_ctl_elem_info *uinfo) 10551da177e4SLinus Torvalds { 10561da177e4SLinus Torvalds uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 10571da177e4SLinus Torvalds uinfo->count = 1; 10581da177e4SLinus Torvalds return 0; 10591da177e4SLinus Torvalds } 10601da177e4SLinus Torvalds 10612cbdb686STakashi Iwai static int snd_cmipci_spdif_stream_get(struct snd_kcontrol *kcontrol, 10622cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 10631da177e4SLinus Torvalds { 10642cbdb686STakashi Iwai struct cmipci *chip = snd_kcontrol_chip(kcontrol); 10651da177e4SLinus Torvalds int i; 10661da177e4SLinus Torvalds 10671da177e4SLinus Torvalds spin_lock_irq(&chip->reg_lock); 10681da177e4SLinus Torvalds for (i = 0; i < 4; i++) 10691da177e4SLinus Torvalds ucontrol->value.iec958.status[i] = (chip->dig_pcm_status >> (i * 8)) & 0xff; 10701da177e4SLinus Torvalds spin_unlock_irq(&chip->reg_lock); 10711da177e4SLinus Torvalds return 0; 10721da177e4SLinus Torvalds } 10731da177e4SLinus Torvalds 10742cbdb686STakashi Iwai static int snd_cmipci_spdif_stream_put(struct snd_kcontrol *kcontrol, 10752cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 10761da177e4SLinus Torvalds { 10772cbdb686STakashi Iwai struct cmipci *chip = snd_kcontrol_chip(kcontrol); 10781da177e4SLinus Torvalds int i, change; 10791da177e4SLinus Torvalds unsigned int val; 10801da177e4SLinus Torvalds 10811da177e4SLinus Torvalds val = 0; 10821da177e4SLinus Torvalds spin_lock_irq(&chip->reg_lock); 10831da177e4SLinus Torvalds for (i = 0; i < 4; i++) 10841da177e4SLinus Torvalds val |= (unsigned int)ucontrol->value.iec958.status[i] << (i * 8); 10851da177e4SLinus Torvalds change = val != chip->dig_pcm_status; 10861da177e4SLinus Torvalds chip->dig_pcm_status = val; 10871da177e4SLinus Torvalds spin_unlock_irq(&chip->reg_lock); 10881da177e4SLinus Torvalds return change; 10891da177e4SLinus Torvalds } 10901da177e4SLinus Torvalds 1091f3b827e0SBhumika Goyal static const struct snd_kcontrol_new snd_cmipci_spdif_stream = 10921da177e4SLinus Torvalds { 10931da177e4SLinus Torvalds .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, 10941da177e4SLinus Torvalds .iface = SNDRV_CTL_ELEM_IFACE_PCM, 10951da177e4SLinus Torvalds .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 10961da177e4SLinus Torvalds .info = snd_cmipci_spdif_stream_info, 10971da177e4SLinus Torvalds .get = snd_cmipci_spdif_stream_get, 10981da177e4SLinus Torvalds .put = snd_cmipci_spdif_stream_put 10991da177e4SLinus Torvalds }; 11001da177e4SLinus Torvalds 11011da177e4SLinus Torvalds /* 11021da177e4SLinus Torvalds */ 11031da177e4SLinus Torvalds 11041da177e4SLinus Torvalds /* save mixer setting and mute for AC3 playback */ 11052cbdb686STakashi Iwai static int save_mixer_state(struct cmipci *cm) 11061da177e4SLinus Torvalds { 11071da177e4SLinus Torvalds if (! cm->mixer_insensitive) { 11082cbdb686STakashi Iwai struct snd_ctl_elem_value *val; 11091da177e4SLinus Torvalds unsigned int i; 11101da177e4SLinus Torvalds 11110be51680STakashi Iwai val = kmalloc(sizeof(*val), GFP_KERNEL); 11121da177e4SLinus Torvalds if (!val) 11131da177e4SLinus Torvalds return -ENOMEM; 11141da177e4SLinus Torvalds for (i = 0; i < CM_SAVED_MIXERS; i++) { 11152cbdb686STakashi Iwai struct snd_kcontrol *ctl = cm->mixer_res_ctl[i]; 11161da177e4SLinus Torvalds if (ctl) { 11171da177e4SLinus Torvalds int event; 11181da177e4SLinus Torvalds memset(val, 0, sizeof(*val)); 11191da177e4SLinus Torvalds ctl->get(ctl, val); 11201da177e4SLinus Torvalds cm->mixer_res_status[i] = val->value.integer.value[0]; 11211da177e4SLinus Torvalds val->value.integer.value[0] = cm_saved_mixer[i].toggle_on; 11221da177e4SLinus Torvalds event = SNDRV_CTL_EVENT_MASK_INFO; 11231da177e4SLinus Torvalds if (cm->mixer_res_status[i] != val->value.integer.value[0]) { 11241da177e4SLinus Torvalds ctl->put(ctl, val); /* toggle */ 11251da177e4SLinus Torvalds event |= SNDRV_CTL_EVENT_MASK_VALUE; 11261da177e4SLinus Torvalds } 11271da177e4SLinus Torvalds ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 11281da177e4SLinus Torvalds snd_ctl_notify(cm->card, event, &ctl->id); 11291da177e4SLinus Torvalds } 11301da177e4SLinus Torvalds } 11311da177e4SLinus Torvalds kfree(val); 11321da177e4SLinus Torvalds cm->mixer_insensitive = 1; 11331da177e4SLinus Torvalds } 11341da177e4SLinus Torvalds return 0; 11351da177e4SLinus Torvalds } 11361da177e4SLinus Torvalds 11371da177e4SLinus Torvalds 11381da177e4SLinus Torvalds /* restore the previously saved mixer status */ 11392cbdb686STakashi Iwai static void restore_mixer_state(struct cmipci *cm) 11401da177e4SLinus Torvalds { 11411da177e4SLinus Torvalds if (cm->mixer_insensitive) { 11422cbdb686STakashi Iwai struct snd_ctl_elem_value *val; 11431da177e4SLinus Torvalds unsigned int i; 11441da177e4SLinus Torvalds 11451da177e4SLinus Torvalds val = kmalloc(sizeof(*val), GFP_KERNEL); 11461da177e4SLinus Torvalds if (!val) 11471da177e4SLinus Torvalds return; 11481da177e4SLinus Torvalds cm->mixer_insensitive = 0; /* at first clear this; 11491da177e4SLinus Torvalds otherwise the changes will be ignored */ 11501da177e4SLinus Torvalds for (i = 0; i < CM_SAVED_MIXERS; i++) { 11512cbdb686STakashi Iwai struct snd_kcontrol *ctl = cm->mixer_res_ctl[i]; 11521da177e4SLinus Torvalds if (ctl) { 11531da177e4SLinus Torvalds int event; 11541da177e4SLinus Torvalds 11551da177e4SLinus Torvalds memset(val, 0, sizeof(*val)); 11561da177e4SLinus Torvalds ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 11571da177e4SLinus Torvalds ctl->get(ctl, val); 11581da177e4SLinus Torvalds event = SNDRV_CTL_EVENT_MASK_INFO; 11591da177e4SLinus Torvalds if (val->value.integer.value[0] != cm->mixer_res_status[i]) { 11601da177e4SLinus Torvalds val->value.integer.value[0] = cm->mixer_res_status[i]; 11611da177e4SLinus Torvalds ctl->put(ctl, val); 11621da177e4SLinus Torvalds event |= SNDRV_CTL_EVENT_MASK_VALUE; 11631da177e4SLinus Torvalds } 11641da177e4SLinus Torvalds snd_ctl_notify(cm->card, event, &ctl->id); 11651da177e4SLinus Torvalds } 11661da177e4SLinus Torvalds } 11671da177e4SLinus Torvalds kfree(val); 11681da177e4SLinus Torvalds } 11691da177e4SLinus Torvalds } 11701da177e4SLinus Torvalds 11711da177e4SLinus Torvalds /* spinlock held! */ 11722cbdb686STakashi Iwai static void setup_ac3(struct cmipci *cm, struct snd_pcm_substream *subs, int do_ac3, int rate) 11731da177e4SLinus Torvalds { 11741da177e4SLinus Torvalds if (do_ac3) { 11751da177e4SLinus Torvalds /* AC3EN for 037 */ 11761da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_AC3EN1); 11771da177e4SLinus Torvalds /* AC3EN for 039 */ 11781da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_AC3EN2); 11791da177e4SLinus Torvalds 11801da177e4SLinus Torvalds if (cm->can_ac3_hw) { 11811da177e4SLinus Torvalds /* SPD24SEL for 037, 0x02 */ 11821da177e4SLinus Torvalds /* SPD24SEL for 039, 0x20, but cannot be set */ 11831da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_SPD24SEL); 11841da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL); 11851da177e4SLinus Torvalds } else { /* can_ac3_sw */ 11861da177e4SLinus Torvalds /* SPD32SEL for 037 & 039, 0x20 */ 11871da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL); 11881da177e4SLinus Torvalds /* set 176K sample rate to fix 033 HW bug */ 11891da177e4SLinus Torvalds if (cm->chip_version == 33) { 11901da177e4SLinus Torvalds if (rate >= 48000) { 11911da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_PLAYBACK_SRATE_176K); 11921da177e4SLinus Torvalds } else { 11931da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_PLAYBACK_SRATE_176K); 11941da177e4SLinus Torvalds } 11951da177e4SLinus Torvalds } 11961da177e4SLinus Torvalds } 11971da177e4SLinus Torvalds 11981da177e4SLinus Torvalds } else { 11991da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_AC3EN1); 12001da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_AC3EN2); 12011da177e4SLinus Torvalds 12021da177e4SLinus Torvalds if (cm->can_ac3_hw) { 12031da177e4SLinus Torvalds /* chip model >= 37 */ 12041da177e4SLinus Torvalds if (snd_pcm_format_width(subs->runtime->format) > 16) { 12051da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL); 12061da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_SPD24SEL); 12071da177e4SLinus Torvalds } else { 12081da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL); 12091da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_SPD24SEL); 12101da177e4SLinus Torvalds } 12111da177e4SLinus Torvalds } else { 12121da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL); 12131da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_SPD24SEL); 12141da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_PLAYBACK_SRATE_176K); 12151da177e4SLinus Torvalds } 12161da177e4SLinus Torvalds } 12171da177e4SLinus Torvalds } 12181da177e4SLinus Torvalds 12192cbdb686STakashi Iwai static int setup_spdif_playback(struct cmipci *cm, struct snd_pcm_substream *subs, int up, int do_ac3) 12201da177e4SLinus Torvalds { 12211da177e4SLinus Torvalds int rate, err; 12221da177e4SLinus Torvalds 12231da177e4SLinus Torvalds rate = subs->runtime->rate; 12241da177e4SLinus Torvalds 122543795882STakashi Iwai if (up && do_ac3) { 122643795882STakashi Iwai err = save_mixer_state(cm); 122743795882STakashi Iwai if (err < 0) 12281da177e4SLinus Torvalds return err; 122943795882STakashi Iwai } 12301da177e4SLinus Torvalds 12311da177e4SLinus Torvalds spin_lock_irq(&cm->reg_lock); 12321da177e4SLinus Torvalds cm->spdif_playback_avail = up; 12331da177e4SLinus Torvalds if (up) { 12341da177e4SLinus Torvalds /* they are controlled via "IEC958 Output Switch" */ 12351da177e4SLinus Torvalds /* snd_cmipci_set_bit(cm, CM_REG_LEGACY_CTRL, CM_ENSPDOUT); */ 12361da177e4SLinus Torvalds /* snd_cmipci_set_bit(cm, CM_REG_FUNCTRL1, CM_SPDO2DAC); */ 12371da177e4SLinus Torvalds if (cm->spdif_playback_enabled) 12381da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_FUNCTRL1, CM_PLAYBACK_SPDF); 12391da177e4SLinus Torvalds setup_ac3(cm, subs, do_ac3, rate); 12401da177e4SLinus Torvalds 12418992e18dSClemens Ladisch if (rate == 48000 || rate == 96000) 12421da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_SPDIF48K | CM_SPDF_AC97); 12431da177e4SLinus Torvalds else 12441da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_SPDIF48K | CM_SPDF_AC97); 12458992e18dSClemens Ladisch if (rate > 48000) 12468992e18dSClemens Ladisch snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS); 12478992e18dSClemens Ladisch else 12488992e18dSClemens Ladisch snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS); 12491da177e4SLinus Torvalds } else { 12501da177e4SLinus Torvalds /* they are controlled via "IEC958 Output Switch" */ 12511da177e4SLinus Torvalds /* snd_cmipci_clear_bit(cm, CM_REG_LEGACY_CTRL, CM_ENSPDOUT); */ 12521da177e4SLinus Torvalds /* snd_cmipci_clear_bit(cm, CM_REG_FUNCTRL1, CM_SPDO2DAC); */ 12538992e18dSClemens Ladisch snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS); 12541da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_FUNCTRL1, CM_PLAYBACK_SPDF); 12551da177e4SLinus Torvalds setup_ac3(cm, subs, 0, 0); 12561da177e4SLinus Torvalds } 12571da177e4SLinus Torvalds spin_unlock_irq(&cm->reg_lock); 12581da177e4SLinus Torvalds return 0; 12591da177e4SLinus Torvalds } 12601da177e4SLinus Torvalds 12611da177e4SLinus Torvalds 12621da177e4SLinus Torvalds /* 12631da177e4SLinus Torvalds * preparation 12641da177e4SLinus Torvalds */ 12651da177e4SLinus Torvalds 12661da177e4SLinus Torvalds /* playback - enable spdif only on the certain condition */ 12672cbdb686STakashi Iwai static int snd_cmipci_playback_prepare(struct snd_pcm_substream *substream) 12681da177e4SLinus Torvalds { 12692cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 12701da177e4SLinus Torvalds int rate = substream->runtime->rate; 12711da177e4SLinus Torvalds int err, do_spdif, do_ac3 = 0; 12721da177e4SLinus Torvalds 1273755c48abSTimofei Bondarenko do_spdif = (rate >= 44100 && rate <= 96000 && 12741da177e4SLinus Torvalds substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE && 12751da177e4SLinus Torvalds substream->runtime->channels == 2); 12761da177e4SLinus Torvalds if (do_spdif && cm->can_ac3_hw) 12771da177e4SLinus Torvalds do_ac3 = cm->dig_pcm_status & IEC958_AES0_NONAUDIO; 127843795882STakashi Iwai err = setup_spdif_playback(cm, substream, do_spdif, do_ac3); 127943795882STakashi Iwai if (err < 0) 12801da177e4SLinus Torvalds return err; 12811da177e4SLinus Torvalds return snd_cmipci_pcm_prepare(cm, &cm->channel[CM_CH_PLAY], substream); 12821da177e4SLinus Torvalds } 12831da177e4SLinus Torvalds 12841da177e4SLinus Torvalds /* playback (via device #2) - enable spdif always */ 12852cbdb686STakashi Iwai static int snd_cmipci_playback_spdif_prepare(struct snd_pcm_substream *substream) 12861da177e4SLinus Torvalds { 12872cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 12881da177e4SLinus Torvalds int err, do_ac3; 12891da177e4SLinus Torvalds 12901da177e4SLinus Torvalds if (cm->can_ac3_hw) 12911da177e4SLinus Torvalds do_ac3 = cm->dig_pcm_status & IEC958_AES0_NONAUDIO; 12921da177e4SLinus Torvalds else 12931da177e4SLinus Torvalds do_ac3 = 1; /* doesn't matter */ 129443795882STakashi Iwai err = setup_spdif_playback(cm, substream, 1, do_ac3); 129543795882STakashi Iwai if (err < 0) 12961da177e4SLinus Torvalds return err; 12971da177e4SLinus Torvalds return snd_cmipci_pcm_prepare(cm, &cm->channel[CM_CH_PLAY], substream); 12981da177e4SLinus Torvalds } 12991da177e4SLinus Torvalds 1300c36fd8c3SClemens Ladisch /* 1301c36fd8c3SClemens Ladisch * Apparently, the samples last played on channel A stay in some buffer, even 1302c36fd8c3SClemens Ladisch * after the channel is reset, and get added to the data for the rear DACs when 1303c36fd8c3SClemens Ladisch * playing a multichannel stream on channel B. This is likely to generate 1304c36fd8c3SClemens Ladisch * wraparounds and thus distortions. 1305c36fd8c3SClemens Ladisch * To avoid this, we play at least one zero sample after the actual stream has 1306c36fd8c3SClemens Ladisch * stopped. 1307c36fd8c3SClemens Ladisch */ 1308c36fd8c3SClemens Ladisch static void snd_cmipci_silence_hack(struct cmipci *cm, struct cmipci_pcm *rec) 1309c36fd8c3SClemens Ladisch { 1310c36fd8c3SClemens Ladisch struct snd_pcm_runtime *runtime = rec->substream->runtime; 1311c36fd8c3SClemens Ladisch unsigned int reg, val; 1312c36fd8c3SClemens Ladisch 1313c36fd8c3SClemens Ladisch if (rec->needs_silencing && runtime && runtime->dma_area) { 1314c36fd8c3SClemens Ladisch /* set up a small silence buffer */ 1315c36fd8c3SClemens Ladisch memset(runtime->dma_area, 0, PAGE_SIZE); 1316c36fd8c3SClemens Ladisch reg = rec->ch ? CM_REG_CH1_FRAME2 : CM_REG_CH0_FRAME2; 1317c36fd8c3SClemens Ladisch val = ((PAGE_SIZE / 4) - 1) | (((PAGE_SIZE / 4) / 2 - 1) << 16); 1318c36fd8c3SClemens Ladisch snd_cmipci_write(cm, reg, val); 1319c36fd8c3SClemens Ladisch 1320c36fd8c3SClemens Ladisch /* configure for 16 bits, 2 channels, 8 kHz */ 1321c36fd8c3SClemens Ladisch if (runtime->channels > 2) 1322c36fd8c3SClemens Ladisch set_dac_channels(cm, rec, 2); 1323c36fd8c3SClemens Ladisch spin_lock_irq(&cm->reg_lock); 1324c36fd8c3SClemens Ladisch val = snd_cmipci_read(cm, CM_REG_FUNCTRL1); 1325c36fd8c3SClemens Ladisch val &= ~(CM_ASFC_MASK << (rec->ch * 3)); 1326c36fd8c3SClemens Ladisch val |= (4 << CM_ASFC_SHIFT) << (rec->ch * 3); 1327c36fd8c3SClemens Ladisch snd_cmipci_write(cm, CM_REG_FUNCTRL1, val); 1328c36fd8c3SClemens Ladisch val = snd_cmipci_read(cm, CM_REG_CHFORMAT); 1329c36fd8c3SClemens Ladisch val &= ~(CM_CH0FMT_MASK << (rec->ch * 2)); 1330c36fd8c3SClemens Ladisch val |= (3 << CM_CH0FMT_SHIFT) << (rec->ch * 2); 1331755c48abSTimofei Bondarenko if (cm->can_96k) 1332755c48abSTimofei Bondarenko val &= ~(CM_CH0_SRATE_MASK << (rec->ch * 2)); 1333c36fd8c3SClemens Ladisch snd_cmipci_write(cm, CM_REG_CHFORMAT, val); 1334c36fd8c3SClemens Ladisch 1335c36fd8c3SClemens Ladisch /* start stream (we don't need interrupts) */ 1336c36fd8c3SClemens Ladisch cm->ctrl |= CM_CHEN0 << rec->ch; 1337c36fd8c3SClemens Ladisch snd_cmipci_write(cm, CM_REG_FUNCTRL0, cm->ctrl); 1338c36fd8c3SClemens Ladisch spin_unlock_irq(&cm->reg_lock); 1339c36fd8c3SClemens Ladisch 1340c36fd8c3SClemens Ladisch msleep(1); 1341c36fd8c3SClemens Ladisch 1342c36fd8c3SClemens Ladisch /* stop and reset stream */ 1343c36fd8c3SClemens Ladisch spin_lock_irq(&cm->reg_lock); 1344c36fd8c3SClemens Ladisch cm->ctrl &= ~(CM_CHEN0 << rec->ch); 1345c36fd8c3SClemens Ladisch val = CM_RST_CH0 << rec->ch; 1346c36fd8c3SClemens Ladisch snd_cmipci_write(cm, CM_REG_FUNCTRL0, cm->ctrl | val); 1347c36fd8c3SClemens Ladisch snd_cmipci_write(cm, CM_REG_FUNCTRL0, cm->ctrl & ~val); 1348c36fd8c3SClemens Ladisch spin_unlock_irq(&cm->reg_lock); 1349c36fd8c3SClemens Ladisch 1350c36fd8c3SClemens Ladisch rec->needs_silencing = 0; 1351c36fd8c3SClemens Ladisch } 1352c36fd8c3SClemens Ladisch } 1353c36fd8c3SClemens Ladisch 13542cbdb686STakashi Iwai static int snd_cmipci_playback_hw_free(struct snd_pcm_substream *substream) 13551da177e4SLinus Torvalds { 13562cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 13571da177e4SLinus Torvalds setup_spdif_playback(cm, substream, 0, 0); 13581da177e4SLinus Torvalds restore_mixer_state(cm); 1359c36fd8c3SClemens Ladisch snd_cmipci_silence_hack(cm, &cm->channel[0]); 1360d841e2e8STakashi Iwai return 0; 1361c36fd8c3SClemens Ladisch } 1362c36fd8c3SClemens Ladisch 1363c36fd8c3SClemens Ladisch static int snd_cmipci_playback2_hw_free(struct snd_pcm_substream *substream) 1364c36fd8c3SClemens Ladisch { 1365c36fd8c3SClemens Ladisch struct cmipci *cm = snd_pcm_substream_chip(substream); 1366c36fd8c3SClemens Ladisch snd_cmipci_silence_hack(cm, &cm->channel[1]); 1367d841e2e8STakashi Iwai return 0; 13681da177e4SLinus Torvalds } 13691da177e4SLinus Torvalds 13701da177e4SLinus Torvalds /* capture */ 13712cbdb686STakashi Iwai static int snd_cmipci_capture_prepare(struct snd_pcm_substream *substream) 13721da177e4SLinus Torvalds { 13732cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 13741da177e4SLinus Torvalds return snd_cmipci_pcm_prepare(cm, &cm->channel[CM_CH_CAPT], substream); 13751da177e4SLinus Torvalds } 13761da177e4SLinus Torvalds 13771da177e4SLinus Torvalds /* capture with spdif (via device #2) */ 13782cbdb686STakashi Iwai static int snd_cmipci_capture_spdif_prepare(struct snd_pcm_substream *substream) 13791da177e4SLinus Torvalds { 13802cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 13811da177e4SLinus Torvalds 13821da177e4SLinus Torvalds spin_lock_irq(&cm->reg_lock); 13831da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_FUNCTRL1, CM_CAPTURE_SPDF); 1384755c48abSTimofei Bondarenko if (cm->can_96k) { 1385755c48abSTimofei Bondarenko if (substream->runtime->rate > 48000) 1386755c48abSTimofei Bondarenko snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS); 1387755c48abSTimofei Bondarenko else 1388755c48abSTimofei Bondarenko snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS); 1389755c48abSTimofei Bondarenko } 1390b46be727STimofei Bondarenko if (snd_pcm_format_width(substream->runtime->format) > 16) 1391b46be727STimofei Bondarenko snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL); 1392b46be727STimofei Bondarenko else 1393b46be727STimofei Bondarenko snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL); 1394b46be727STimofei Bondarenko 13951da177e4SLinus Torvalds spin_unlock_irq(&cm->reg_lock); 13961da177e4SLinus Torvalds 13971da177e4SLinus Torvalds return snd_cmipci_pcm_prepare(cm, &cm->channel[CM_CH_CAPT], substream); 13981da177e4SLinus Torvalds } 13991da177e4SLinus Torvalds 14002cbdb686STakashi Iwai static int snd_cmipci_capture_spdif_hw_free(struct snd_pcm_substream *subs) 14011da177e4SLinus Torvalds { 14022cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(subs); 14031da177e4SLinus Torvalds 14041da177e4SLinus Torvalds spin_lock_irq(&cm->reg_lock); 14051da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_FUNCTRL1, CM_CAPTURE_SPDF); 1406b46be727STimofei Bondarenko snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL); 14071da177e4SLinus Torvalds spin_unlock_irq(&cm->reg_lock); 14081da177e4SLinus Torvalds 1409d841e2e8STakashi Iwai return 0; 14101da177e4SLinus Torvalds } 14111da177e4SLinus Torvalds 14121da177e4SLinus Torvalds 14131da177e4SLinus Torvalds /* 14141da177e4SLinus Torvalds * interrupt handler 14151da177e4SLinus Torvalds */ 14167d12e780SDavid Howells static irqreturn_t snd_cmipci_interrupt(int irq, void *dev_id) 14171da177e4SLinus Torvalds { 14182cbdb686STakashi Iwai struct cmipci *cm = dev_id; 14191da177e4SLinus Torvalds unsigned int status, mask = 0; 14201da177e4SLinus Torvalds 14211da177e4SLinus Torvalds /* fastpath out, to ease interrupt sharing */ 14221da177e4SLinus Torvalds status = snd_cmipci_read(cm, CM_REG_INT_STATUS); 14231da177e4SLinus Torvalds if (!(status & CM_INTR)) 14241da177e4SLinus Torvalds return IRQ_NONE; 14251da177e4SLinus Torvalds 14261da177e4SLinus Torvalds /* acknowledge interrupt */ 14271da177e4SLinus Torvalds spin_lock(&cm->reg_lock); 14281da177e4SLinus Torvalds if (status & CM_CHINT0) 14291da177e4SLinus Torvalds mask |= CM_CH0_INT_EN; 14301da177e4SLinus Torvalds if (status & CM_CHINT1) 14311da177e4SLinus Torvalds mask |= CM_CH1_INT_EN; 14321da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_INT_HLDCLR, mask); 14331da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_INT_HLDCLR, mask); 14341da177e4SLinus Torvalds spin_unlock(&cm->reg_lock); 14351da177e4SLinus Torvalds 14361da177e4SLinus Torvalds if (cm->rmidi && (status & CM_UARTINT)) 14377d12e780SDavid Howells snd_mpu401_uart_interrupt(irq, cm->rmidi->private_data); 14381da177e4SLinus Torvalds 14391da177e4SLinus Torvalds if (cm->pcm) { 14401da177e4SLinus Torvalds if ((status & CM_CHINT0) && cm->channel[0].running) 14411da177e4SLinus Torvalds snd_pcm_period_elapsed(cm->channel[0].substream); 14421da177e4SLinus Torvalds if ((status & CM_CHINT1) && cm->channel[1].running) 14431da177e4SLinus Torvalds snd_pcm_period_elapsed(cm->channel[1].substream); 14441da177e4SLinus Torvalds } 14451da177e4SLinus Torvalds return IRQ_HANDLED; 14461da177e4SLinus Torvalds } 14471da177e4SLinus Torvalds 14481da177e4SLinus Torvalds /* 14491da177e4SLinus Torvalds * h/w infos 14501da177e4SLinus Torvalds */ 14511da177e4SLinus Torvalds 14521da177e4SLinus Torvalds /* playback on channel A */ 1453dee49895SBhumika Goyal static const struct snd_pcm_hardware snd_cmipci_playback = 14541da177e4SLinus Torvalds { 14551da177e4SLinus Torvalds .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 14561da177e4SLinus Torvalds SNDRV_PCM_INFO_BLOCK_TRANSFER | SNDRV_PCM_INFO_PAUSE | 1457cb60e5f5STakashi Iwai SNDRV_PCM_INFO_RESUME | SNDRV_PCM_INFO_MMAP_VALID), 14581da177e4SLinus Torvalds .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 14591da177e4SLinus Torvalds .rates = SNDRV_PCM_RATE_5512 | SNDRV_PCM_RATE_8000_48000, 14601da177e4SLinus Torvalds .rate_min = 5512, 14611da177e4SLinus Torvalds .rate_max = 48000, 14621da177e4SLinus Torvalds .channels_min = 1, 14631da177e4SLinus Torvalds .channels_max = 2, 14641da177e4SLinus Torvalds .buffer_bytes_max = (128*1024), 14651da177e4SLinus Torvalds .period_bytes_min = 64, 14661da177e4SLinus Torvalds .period_bytes_max = (128*1024), 14671da177e4SLinus Torvalds .periods_min = 2, 14681da177e4SLinus Torvalds .periods_max = 1024, 14691da177e4SLinus Torvalds .fifo_size = 0, 14701da177e4SLinus Torvalds }; 14711da177e4SLinus Torvalds 14721da177e4SLinus Torvalds /* capture on channel B */ 1473dee49895SBhumika Goyal static const struct snd_pcm_hardware snd_cmipci_capture = 14741da177e4SLinus Torvalds { 14751da177e4SLinus Torvalds .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 14761da177e4SLinus Torvalds SNDRV_PCM_INFO_BLOCK_TRANSFER | SNDRV_PCM_INFO_PAUSE | 1477cb60e5f5STakashi Iwai SNDRV_PCM_INFO_RESUME | SNDRV_PCM_INFO_MMAP_VALID), 14781da177e4SLinus Torvalds .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 14791da177e4SLinus Torvalds .rates = SNDRV_PCM_RATE_5512 | SNDRV_PCM_RATE_8000_48000, 14801da177e4SLinus Torvalds .rate_min = 5512, 14811da177e4SLinus Torvalds .rate_max = 48000, 14821da177e4SLinus Torvalds .channels_min = 1, 14831da177e4SLinus Torvalds .channels_max = 2, 14841da177e4SLinus Torvalds .buffer_bytes_max = (128*1024), 14851da177e4SLinus Torvalds .period_bytes_min = 64, 14861da177e4SLinus Torvalds .period_bytes_max = (128*1024), 14871da177e4SLinus Torvalds .periods_min = 2, 14881da177e4SLinus Torvalds .periods_max = 1024, 14891da177e4SLinus Torvalds .fifo_size = 0, 14901da177e4SLinus Torvalds }; 14911da177e4SLinus Torvalds 14921da177e4SLinus Torvalds /* playback on channel B - stereo 16bit only? */ 1493dee49895SBhumika Goyal static const struct snd_pcm_hardware snd_cmipci_playback2 = 14941da177e4SLinus Torvalds { 14951da177e4SLinus Torvalds .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 14961da177e4SLinus Torvalds SNDRV_PCM_INFO_BLOCK_TRANSFER | SNDRV_PCM_INFO_PAUSE | 1497cb60e5f5STakashi Iwai SNDRV_PCM_INFO_RESUME | SNDRV_PCM_INFO_MMAP_VALID), 14981da177e4SLinus Torvalds .formats = SNDRV_PCM_FMTBIT_S16_LE, 14991da177e4SLinus Torvalds .rates = SNDRV_PCM_RATE_5512 | SNDRV_PCM_RATE_8000_48000, 15001da177e4SLinus Torvalds .rate_min = 5512, 15011da177e4SLinus Torvalds .rate_max = 48000, 15021da177e4SLinus Torvalds .channels_min = 2, 15031da177e4SLinus Torvalds .channels_max = 2, 15041da177e4SLinus Torvalds .buffer_bytes_max = (128*1024), 15051da177e4SLinus Torvalds .period_bytes_min = 64, 15061da177e4SLinus Torvalds .period_bytes_max = (128*1024), 15071da177e4SLinus Torvalds .periods_min = 2, 15081da177e4SLinus Torvalds .periods_max = 1024, 15091da177e4SLinus Torvalds .fifo_size = 0, 15101da177e4SLinus Torvalds }; 15111da177e4SLinus Torvalds 15121da177e4SLinus Torvalds /* spdif playback on channel A */ 1513dee49895SBhumika Goyal static const struct snd_pcm_hardware snd_cmipci_playback_spdif = 15141da177e4SLinus Torvalds { 15151da177e4SLinus Torvalds .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 15161da177e4SLinus Torvalds SNDRV_PCM_INFO_BLOCK_TRANSFER | SNDRV_PCM_INFO_PAUSE | 1517cb60e5f5STakashi Iwai SNDRV_PCM_INFO_RESUME | SNDRV_PCM_INFO_MMAP_VALID), 15181da177e4SLinus Torvalds .formats = SNDRV_PCM_FMTBIT_S16_LE, 15191da177e4SLinus Torvalds .rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, 15201da177e4SLinus Torvalds .rate_min = 44100, 15211da177e4SLinus Torvalds .rate_max = 48000, 15221da177e4SLinus Torvalds .channels_min = 2, 15231da177e4SLinus Torvalds .channels_max = 2, 15241da177e4SLinus Torvalds .buffer_bytes_max = (128*1024), 15251da177e4SLinus Torvalds .period_bytes_min = 64, 15261da177e4SLinus Torvalds .period_bytes_max = (128*1024), 15271da177e4SLinus Torvalds .periods_min = 2, 15281da177e4SLinus Torvalds .periods_max = 1024, 15291da177e4SLinus Torvalds .fifo_size = 0, 15301da177e4SLinus Torvalds }; 15311da177e4SLinus Torvalds 15321da177e4SLinus Torvalds /* spdif playback on channel A (32bit, IEC958 subframes) */ 1533dee49895SBhumika Goyal static const struct snd_pcm_hardware snd_cmipci_playback_iec958_subframe = 15341da177e4SLinus Torvalds { 15351da177e4SLinus Torvalds .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 15361da177e4SLinus Torvalds SNDRV_PCM_INFO_BLOCK_TRANSFER | SNDRV_PCM_INFO_PAUSE | 1537cb60e5f5STakashi Iwai SNDRV_PCM_INFO_RESUME | SNDRV_PCM_INFO_MMAP_VALID), 15381da177e4SLinus Torvalds .formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE, 15391da177e4SLinus Torvalds .rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, 15401da177e4SLinus Torvalds .rate_min = 44100, 15411da177e4SLinus Torvalds .rate_max = 48000, 15421da177e4SLinus Torvalds .channels_min = 2, 15431da177e4SLinus Torvalds .channels_max = 2, 15441da177e4SLinus Torvalds .buffer_bytes_max = (128*1024), 15451da177e4SLinus Torvalds .period_bytes_min = 64, 15461da177e4SLinus Torvalds .period_bytes_max = (128*1024), 15471da177e4SLinus Torvalds .periods_min = 2, 15481da177e4SLinus Torvalds .periods_max = 1024, 15491da177e4SLinus Torvalds .fifo_size = 0, 15501da177e4SLinus Torvalds }; 15511da177e4SLinus Torvalds 15521da177e4SLinus Torvalds /* spdif capture on channel B */ 1553dee49895SBhumika Goyal static const struct snd_pcm_hardware snd_cmipci_capture_spdif = 15541da177e4SLinus Torvalds { 15551da177e4SLinus Torvalds .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 15561da177e4SLinus Torvalds SNDRV_PCM_INFO_BLOCK_TRANSFER | SNDRV_PCM_INFO_PAUSE | 1557cb60e5f5STakashi Iwai SNDRV_PCM_INFO_RESUME | SNDRV_PCM_INFO_MMAP_VALID), 1558b46be727STimofei Bondarenko .formats = SNDRV_PCM_FMTBIT_S16_LE | 1559b46be727STimofei Bondarenko SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE, 15601da177e4SLinus Torvalds .rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, 15611da177e4SLinus Torvalds .rate_min = 44100, 15621da177e4SLinus Torvalds .rate_max = 48000, 15631da177e4SLinus Torvalds .channels_min = 2, 15641da177e4SLinus Torvalds .channels_max = 2, 15651da177e4SLinus Torvalds .buffer_bytes_max = (128*1024), 15661da177e4SLinus Torvalds .period_bytes_min = 64, 15671da177e4SLinus Torvalds .period_bytes_max = (128*1024), 15681da177e4SLinus Torvalds .periods_min = 2, 15691da177e4SLinus Torvalds .periods_max = 1024, 15701da177e4SLinus Torvalds .fifo_size = 0, 15711da177e4SLinus Torvalds }; 15721da177e4SLinus Torvalds 15731da177e4SLinus Torvalds /* 15741da177e4SLinus Torvalds * check device open/close 15751da177e4SLinus Torvalds */ 15762cbdb686STakashi Iwai static int open_device_check(struct cmipci *cm, int mode, struct snd_pcm_substream *subs) 15771da177e4SLinus Torvalds { 15781da177e4SLinus Torvalds int ch = mode & CM_OPEN_CH_MASK; 15791da177e4SLinus Torvalds 15801da177e4SLinus Torvalds /* FIXME: a file should wait until the device becomes free 15811da177e4SLinus Torvalds * when it's opened on blocking mode. however, since the current 15821da177e4SLinus Torvalds * pcm framework doesn't pass file pointer before actually opened, 15831da177e4SLinus Torvalds * we can't know whether blocking mode or not in open callback.. 15841da177e4SLinus Torvalds */ 158562932df8SIngo Molnar mutex_lock(&cm->open_mutex); 15861da177e4SLinus Torvalds if (cm->opened[ch]) { 158762932df8SIngo Molnar mutex_unlock(&cm->open_mutex); 15881da177e4SLinus Torvalds return -EBUSY; 15891da177e4SLinus Torvalds } 15901da177e4SLinus Torvalds cm->opened[ch] = mode; 15911da177e4SLinus Torvalds cm->channel[ch].substream = subs; 15921da177e4SLinus Torvalds if (! (mode & CM_OPEN_DAC)) { 15931da177e4SLinus Torvalds /* disable dual DAC mode */ 15941da177e4SLinus Torvalds cm->channel[ch].is_dac = 0; 15951da177e4SLinus Torvalds spin_lock_irq(&cm->reg_lock); 15961da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_ENDBDAC); 15971da177e4SLinus Torvalds spin_unlock_irq(&cm->reg_lock); 15981da177e4SLinus Torvalds } 159962932df8SIngo Molnar mutex_unlock(&cm->open_mutex); 16001da177e4SLinus Torvalds return 0; 16011da177e4SLinus Torvalds } 16021da177e4SLinus Torvalds 16032cbdb686STakashi Iwai static void close_device_check(struct cmipci *cm, int mode) 16041da177e4SLinus Torvalds { 16051da177e4SLinus Torvalds int ch = mode & CM_OPEN_CH_MASK; 16061da177e4SLinus Torvalds 160762932df8SIngo Molnar mutex_lock(&cm->open_mutex); 16081da177e4SLinus Torvalds if (cm->opened[ch] == mode) { 16091da177e4SLinus Torvalds if (cm->channel[ch].substream) { 16101da177e4SLinus Torvalds snd_cmipci_ch_reset(cm, ch); 16111da177e4SLinus Torvalds cm->channel[ch].running = 0; 16121da177e4SLinus Torvalds cm->channel[ch].substream = NULL; 16131da177e4SLinus Torvalds } 16141da177e4SLinus Torvalds cm->opened[ch] = 0; 16151da177e4SLinus Torvalds if (! cm->channel[ch].is_dac) { 16161da177e4SLinus Torvalds /* enable dual DAC mode again */ 16171da177e4SLinus Torvalds cm->channel[ch].is_dac = 1; 16181da177e4SLinus Torvalds spin_lock_irq(&cm->reg_lock); 16191da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_ENDBDAC); 16201da177e4SLinus Torvalds spin_unlock_irq(&cm->reg_lock); 16211da177e4SLinus Torvalds } 16221da177e4SLinus Torvalds } 162362932df8SIngo Molnar mutex_unlock(&cm->open_mutex); 16241da177e4SLinus Torvalds } 16251da177e4SLinus Torvalds 16261da177e4SLinus Torvalds /* 16271da177e4SLinus Torvalds */ 16281da177e4SLinus Torvalds 16292cbdb686STakashi Iwai static int snd_cmipci_playback_open(struct snd_pcm_substream *substream) 16301da177e4SLinus Torvalds { 16312cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 16322cbdb686STakashi Iwai struct snd_pcm_runtime *runtime = substream->runtime; 16331da177e4SLinus Torvalds int err; 16341da177e4SLinus Torvalds 163543795882STakashi Iwai err = open_device_check(cm, CM_OPEN_PLAYBACK, substream); 163643795882STakashi Iwai if (err < 0) 16371da177e4SLinus Torvalds return err; 16381da177e4SLinus Torvalds runtime->hw = snd_cmipci_playback; 16398992e18dSClemens Ladisch if (cm->chip_version == 68) { 16408992e18dSClemens Ladisch runtime->hw.rates |= SNDRV_PCM_RATE_88200 | 16418992e18dSClemens Ladisch SNDRV_PCM_RATE_96000; 16428992e18dSClemens Ladisch runtime->hw.rate_max = 96000; 1643755c48abSTimofei Bondarenko } else if (cm->chip_version == 55) { 1644*91dd20d8SJerome Brunet runtime->hw.rates |= SNDRV_PCM_RATE_88200 | 1645*91dd20d8SJerome Brunet SNDRV_PCM_RATE_96000 | 1646*91dd20d8SJerome Brunet SNDRV_PCM_RATE_128000; 1647755c48abSTimofei Bondarenko runtime->hw.rate_max = 128000; 16488992e18dSClemens Ladisch } 16491da177e4SLinus Torvalds snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 0, 0x10000); 16501da177e4SLinus Torvalds cm->dig_pcm_status = cm->dig_status; 16511da177e4SLinus Torvalds return 0; 16521da177e4SLinus Torvalds } 16531da177e4SLinus Torvalds 16542cbdb686STakashi Iwai static int snd_cmipci_capture_open(struct snd_pcm_substream *substream) 16551da177e4SLinus Torvalds { 16562cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 16572cbdb686STakashi Iwai struct snd_pcm_runtime *runtime = substream->runtime; 16581da177e4SLinus Torvalds int err; 16591da177e4SLinus Torvalds 166043795882STakashi Iwai err = open_device_check(cm, CM_OPEN_CAPTURE, substream); 166143795882STakashi Iwai if (err < 0) 16621da177e4SLinus Torvalds return err; 16631da177e4SLinus Torvalds runtime->hw = snd_cmipci_capture; 16641da177e4SLinus Torvalds if (cm->chip_version == 68) { // 8768 only supports 44k/48k recording 16651da177e4SLinus Torvalds runtime->hw.rate_min = 41000; 16661da177e4SLinus Torvalds runtime->hw.rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000; 1667755c48abSTimofei Bondarenko } else if (cm->chip_version == 55) { 1668*91dd20d8SJerome Brunet runtime->hw.rates |= SNDRV_PCM_RATE_88200 | 1669*91dd20d8SJerome Brunet SNDRV_PCM_RATE_96000 | 1670*91dd20d8SJerome Brunet SNDRV_PCM_RATE_128000; 1671755c48abSTimofei Bondarenko runtime->hw.rate_max = 128000; 16721da177e4SLinus Torvalds } 16731da177e4SLinus Torvalds snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 0, 0x10000); 16741da177e4SLinus Torvalds return 0; 16751da177e4SLinus Torvalds } 16761da177e4SLinus Torvalds 16772cbdb686STakashi Iwai static int snd_cmipci_playback2_open(struct snd_pcm_substream *substream) 16781da177e4SLinus Torvalds { 16792cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 16802cbdb686STakashi Iwai struct snd_pcm_runtime *runtime = substream->runtime; 16811da177e4SLinus Torvalds int err; 16821da177e4SLinus Torvalds 168343795882STakashi Iwai /* use channel B */ 168443795882STakashi Iwai err = open_device_check(cm, CM_OPEN_PLAYBACK2, substream); 168543795882STakashi Iwai if (err < 0) 16861da177e4SLinus Torvalds return err; 16871da177e4SLinus Torvalds runtime->hw = snd_cmipci_playback2; 168862932df8SIngo Molnar mutex_lock(&cm->open_mutex); 16891da177e4SLinus Torvalds if (! cm->opened[CM_CH_PLAY]) { 16901da177e4SLinus Torvalds if (cm->can_multi_ch) { 16911da177e4SLinus Torvalds runtime->hw.channels_max = cm->max_channels; 16921da177e4SLinus Torvalds if (cm->max_channels == 4) 16931da177e4SLinus Torvalds snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, &hw_constraints_channels_4); 16941da177e4SLinus Torvalds else if (cm->max_channels == 6) 16951da177e4SLinus Torvalds snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, &hw_constraints_channels_6); 16961da177e4SLinus Torvalds else if (cm->max_channels == 8) 16971da177e4SLinus Torvalds snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, &hw_constraints_channels_8); 16981da177e4SLinus Torvalds } 169922a22f5aSClemens Ladisch } 170022a22f5aSClemens Ladisch mutex_unlock(&cm->open_mutex); 17018992e18dSClemens Ladisch if (cm->chip_version == 68) { 17028992e18dSClemens Ladisch runtime->hw.rates |= SNDRV_PCM_RATE_88200 | 17038992e18dSClemens Ladisch SNDRV_PCM_RATE_96000; 17048992e18dSClemens Ladisch runtime->hw.rate_max = 96000; 1705755c48abSTimofei Bondarenko } else if (cm->chip_version == 55) { 1706*91dd20d8SJerome Brunet runtime->hw.rates |= SNDRV_PCM_RATE_88200 | 1707*91dd20d8SJerome Brunet SNDRV_PCM_RATE_96000 | 1708*91dd20d8SJerome Brunet SNDRV_PCM_RATE_128000; 1709755c48abSTimofei Bondarenko runtime->hw.rate_max = 128000; 17108992e18dSClemens Ladisch } 17111da177e4SLinus Torvalds snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 0, 0x10000); 17121da177e4SLinus Torvalds return 0; 17131da177e4SLinus Torvalds } 17141da177e4SLinus Torvalds 17152cbdb686STakashi Iwai static int snd_cmipci_playback_spdif_open(struct snd_pcm_substream *substream) 17161da177e4SLinus Torvalds { 17172cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 17182cbdb686STakashi Iwai struct snd_pcm_runtime *runtime = substream->runtime; 17191da177e4SLinus Torvalds int err; 17201da177e4SLinus Torvalds 172143795882STakashi Iwai /* use channel A */ 172243795882STakashi Iwai err = open_device_check(cm, CM_OPEN_SPDIF_PLAYBACK, substream); 172343795882STakashi Iwai if (err < 0) 17241da177e4SLinus Torvalds return err; 17251da177e4SLinus Torvalds if (cm->can_ac3_hw) { 17261da177e4SLinus Torvalds runtime->hw = snd_cmipci_playback_spdif; 172757bd68b8SClemens Ladisch if (cm->chip_version >= 37) { 17281da177e4SLinus Torvalds runtime->hw.formats |= SNDRV_PCM_FMTBIT_S32_LE; 172957bd68b8SClemens Ladisch snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 173057bd68b8SClemens Ladisch } 1731755c48abSTimofei Bondarenko if (cm->can_96k) { 17328992e18dSClemens Ladisch runtime->hw.rates |= SNDRV_PCM_RATE_88200 | 17338992e18dSClemens Ladisch SNDRV_PCM_RATE_96000; 17348992e18dSClemens Ladisch runtime->hw.rate_max = 96000; 17358992e18dSClemens Ladisch } 17361da177e4SLinus Torvalds } else { 17371da177e4SLinus Torvalds runtime->hw = snd_cmipci_playback_iec958_subframe; 17381da177e4SLinus Torvalds } 17391da177e4SLinus Torvalds snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 0, 0x40000); 17401da177e4SLinus Torvalds cm->dig_pcm_status = cm->dig_status; 17411da177e4SLinus Torvalds return 0; 17421da177e4SLinus Torvalds } 17431da177e4SLinus Torvalds 17442cbdb686STakashi Iwai static int snd_cmipci_capture_spdif_open(struct snd_pcm_substream *substream) 17451da177e4SLinus Torvalds { 17462cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 17472cbdb686STakashi Iwai struct snd_pcm_runtime *runtime = substream->runtime; 17481da177e4SLinus Torvalds int err; 17491da177e4SLinus Torvalds 175043795882STakashi Iwai /* use channel B */ 175143795882STakashi Iwai err = open_device_check(cm, CM_OPEN_SPDIF_CAPTURE, substream); 175243795882STakashi Iwai if (err < 0) 17531da177e4SLinus Torvalds return err; 17541da177e4SLinus Torvalds runtime->hw = snd_cmipci_capture_spdif; 1755755c48abSTimofei Bondarenko if (cm->can_96k && !(cm->chip_version == 68)) { 1756755c48abSTimofei Bondarenko runtime->hw.rates |= SNDRV_PCM_RATE_88200 | 1757755c48abSTimofei Bondarenko SNDRV_PCM_RATE_96000; 1758755c48abSTimofei Bondarenko runtime->hw.rate_max = 96000; 1759755c48abSTimofei Bondarenko } 17601da177e4SLinus Torvalds snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 0, 0x40000); 17611da177e4SLinus Torvalds return 0; 17621da177e4SLinus Torvalds } 17631da177e4SLinus Torvalds 17641da177e4SLinus Torvalds 17651da177e4SLinus Torvalds /* 17661da177e4SLinus Torvalds */ 17671da177e4SLinus Torvalds 17682cbdb686STakashi Iwai static int snd_cmipci_playback_close(struct snd_pcm_substream *substream) 17691da177e4SLinus Torvalds { 17702cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 17711da177e4SLinus Torvalds close_device_check(cm, CM_OPEN_PLAYBACK); 17721da177e4SLinus Torvalds return 0; 17731da177e4SLinus Torvalds } 17741da177e4SLinus Torvalds 17752cbdb686STakashi Iwai static int snd_cmipci_capture_close(struct snd_pcm_substream *substream) 17761da177e4SLinus Torvalds { 17772cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 17781da177e4SLinus Torvalds close_device_check(cm, CM_OPEN_CAPTURE); 17791da177e4SLinus Torvalds return 0; 17801da177e4SLinus Torvalds } 17811da177e4SLinus Torvalds 17822cbdb686STakashi Iwai static int snd_cmipci_playback2_close(struct snd_pcm_substream *substream) 17831da177e4SLinus Torvalds { 17842cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 17851da177e4SLinus Torvalds close_device_check(cm, CM_OPEN_PLAYBACK2); 17861da177e4SLinus Torvalds close_device_check(cm, CM_OPEN_PLAYBACK_MULTI); 17871da177e4SLinus Torvalds return 0; 17881da177e4SLinus Torvalds } 17891da177e4SLinus Torvalds 17902cbdb686STakashi Iwai static int snd_cmipci_playback_spdif_close(struct snd_pcm_substream *substream) 17911da177e4SLinus Torvalds { 17922cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 17931da177e4SLinus Torvalds close_device_check(cm, CM_OPEN_SPDIF_PLAYBACK); 17941da177e4SLinus Torvalds return 0; 17951da177e4SLinus Torvalds } 17961da177e4SLinus Torvalds 17972cbdb686STakashi Iwai static int snd_cmipci_capture_spdif_close(struct snd_pcm_substream *substream) 17981da177e4SLinus Torvalds { 17992cbdb686STakashi Iwai struct cmipci *cm = snd_pcm_substream_chip(substream); 18001da177e4SLinus Torvalds close_device_check(cm, CM_OPEN_SPDIF_CAPTURE); 18011da177e4SLinus Torvalds return 0; 18021da177e4SLinus Torvalds } 18031da177e4SLinus Torvalds 18041da177e4SLinus Torvalds 18051da177e4SLinus Torvalds /* 18061da177e4SLinus Torvalds */ 18071da177e4SLinus Torvalds 18086769e988SJulia Lawall static const struct snd_pcm_ops snd_cmipci_playback_ops = { 18091da177e4SLinus Torvalds .open = snd_cmipci_playback_open, 18101da177e4SLinus Torvalds .close = snd_cmipci_playback_close, 18111da177e4SLinus Torvalds .hw_free = snd_cmipci_playback_hw_free, 18121da177e4SLinus Torvalds .prepare = snd_cmipci_playback_prepare, 18131da177e4SLinus Torvalds .trigger = snd_cmipci_playback_trigger, 18141da177e4SLinus Torvalds .pointer = snd_cmipci_playback_pointer, 18151da177e4SLinus Torvalds }; 18161da177e4SLinus Torvalds 18176769e988SJulia Lawall static const struct snd_pcm_ops snd_cmipci_capture_ops = { 18181da177e4SLinus Torvalds .open = snd_cmipci_capture_open, 18191da177e4SLinus Torvalds .close = snd_cmipci_capture_close, 18201da177e4SLinus Torvalds .prepare = snd_cmipci_capture_prepare, 18211da177e4SLinus Torvalds .trigger = snd_cmipci_capture_trigger, 18221da177e4SLinus Torvalds .pointer = snd_cmipci_capture_pointer, 18231da177e4SLinus Torvalds }; 18241da177e4SLinus Torvalds 18256769e988SJulia Lawall static const struct snd_pcm_ops snd_cmipci_playback2_ops = { 18261da177e4SLinus Torvalds .open = snd_cmipci_playback2_open, 18271da177e4SLinus Torvalds .close = snd_cmipci_playback2_close, 18281da177e4SLinus Torvalds .hw_params = snd_cmipci_playback2_hw_params, 1829c36fd8c3SClemens Ladisch .hw_free = snd_cmipci_playback2_hw_free, 18301da177e4SLinus Torvalds .prepare = snd_cmipci_capture_prepare, /* channel B */ 18311da177e4SLinus Torvalds .trigger = snd_cmipci_capture_trigger, /* channel B */ 18321da177e4SLinus Torvalds .pointer = snd_cmipci_capture_pointer, /* channel B */ 18331da177e4SLinus Torvalds }; 18341da177e4SLinus Torvalds 18356769e988SJulia Lawall static const struct snd_pcm_ops snd_cmipci_playback_spdif_ops = { 18361da177e4SLinus Torvalds .open = snd_cmipci_playback_spdif_open, 18371da177e4SLinus Torvalds .close = snd_cmipci_playback_spdif_close, 18381da177e4SLinus Torvalds .hw_free = snd_cmipci_playback_hw_free, 18391da177e4SLinus Torvalds .prepare = snd_cmipci_playback_spdif_prepare, /* set up rate */ 18401da177e4SLinus Torvalds .trigger = snd_cmipci_playback_trigger, 18411da177e4SLinus Torvalds .pointer = snd_cmipci_playback_pointer, 18421da177e4SLinus Torvalds }; 18431da177e4SLinus Torvalds 18446769e988SJulia Lawall static const struct snd_pcm_ops snd_cmipci_capture_spdif_ops = { 18451da177e4SLinus Torvalds .open = snd_cmipci_capture_spdif_open, 18461da177e4SLinus Torvalds .close = snd_cmipci_capture_spdif_close, 18471da177e4SLinus Torvalds .hw_free = snd_cmipci_capture_spdif_hw_free, 18481da177e4SLinus Torvalds .prepare = snd_cmipci_capture_spdif_prepare, 18491da177e4SLinus Torvalds .trigger = snd_cmipci_capture_trigger, 18501da177e4SLinus Torvalds .pointer = snd_cmipci_capture_pointer, 18511da177e4SLinus Torvalds }; 18521da177e4SLinus Torvalds 18531da177e4SLinus Torvalds 18541da177e4SLinus Torvalds /* 18551da177e4SLinus Torvalds */ 18561da177e4SLinus Torvalds 1857e23e7a14SBill Pemberton static int snd_cmipci_pcm_new(struct cmipci *cm, int device) 18581da177e4SLinus Torvalds { 18592cbdb686STakashi Iwai struct snd_pcm *pcm; 18601da177e4SLinus Torvalds int err; 18611da177e4SLinus Torvalds 18621da177e4SLinus Torvalds err = snd_pcm_new(cm->card, cm->card->driver, device, 1, 1, &pcm); 18631da177e4SLinus Torvalds if (err < 0) 18641da177e4SLinus Torvalds return err; 18651da177e4SLinus Torvalds 18661da177e4SLinus Torvalds snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cmipci_playback_ops); 18671da177e4SLinus Torvalds snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cmipci_capture_ops); 18681da177e4SLinus Torvalds 18691da177e4SLinus Torvalds pcm->private_data = cm; 18701da177e4SLinus Torvalds pcm->info_flags = 0; 18711da177e4SLinus Torvalds strcpy(pcm->name, "C-Media PCI DAC/ADC"); 18721da177e4SLinus Torvalds cm->pcm = pcm; 18731da177e4SLinus Torvalds 1874d841e2e8STakashi Iwai snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 18756974f8adSTakashi Iwai &cm->pci->dev, 64*1024, 128*1024); 18761da177e4SLinus Torvalds 18771da177e4SLinus Torvalds return 0; 18781da177e4SLinus Torvalds } 18791da177e4SLinus Torvalds 1880e23e7a14SBill Pemberton static int snd_cmipci_pcm2_new(struct cmipci *cm, int device) 18811da177e4SLinus Torvalds { 18822cbdb686STakashi Iwai struct snd_pcm *pcm; 18831da177e4SLinus Torvalds int err; 18841da177e4SLinus Torvalds 18851da177e4SLinus Torvalds err = snd_pcm_new(cm->card, cm->card->driver, device, 1, 0, &pcm); 18861da177e4SLinus Torvalds if (err < 0) 18871da177e4SLinus Torvalds return err; 18881da177e4SLinus Torvalds 18891da177e4SLinus Torvalds snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cmipci_playback2_ops); 18901da177e4SLinus Torvalds 18911da177e4SLinus Torvalds pcm->private_data = cm; 18921da177e4SLinus Torvalds pcm->info_flags = 0; 18931da177e4SLinus Torvalds strcpy(pcm->name, "C-Media PCI 2nd DAC"); 18941da177e4SLinus Torvalds cm->pcm2 = pcm; 18951da177e4SLinus Torvalds 1896d841e2e8STakashi Iwai snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 18976974f8adSTakashi Iwai &cm->pci->dev, 64*1024, 128*1024); 18981da177e4SLinus Torvalds 18991da177e4SLinus Torvalds return 0; 19001da177e4SLinus Torvalds } 19011da177e4SLinus Torvalds 1902e23e7a14SBill Pemberton static int snd_cmipci_pcm_spdif_new(struct cmipci *cm, int device) 19031da177e4SLinus Torvalds { 19042cbdb686STakashi Iwai struct snd_pcm *pcm; 19051da177e4SLinus Torvalds int err; 19061da177e4SLinus Torvalds 19071da177e4SLinus Torvalds err = snd_pcm_new(cm->card, cm->card->driver, device, 1, 1, &pcm); 19081da177e4SLinus Torvalds if (err < 0) 19091da177e4SLinus Torvalds return err; 19101da177e4SLinus Torvalds 19111da177e4SLinus Torvalds snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cmipci_playback_spdif_ops); 19121da177e4SLinus Torvalds snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cmipci_capture_spdif_ops); 19131da177e4SLinus Torvalds 19141da177e4SLinus Torvalds pcm->private_data = cm; 19151da177e4SLinus Torvalds pcm->info_flags = 0; 19161da177e4SLinus Torvalds strcpy(pcm->name, "C-Media PCI IEC958"); 19171da177e4SLinus Torvalds cm->pcm_spdif = pcm; 19181da177e4SLinus Torvalds 1919d841e2e8STakashi Iwai snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 19206974f8adSTakashi Iwai &cm->pci->dev, 64*1024, 128*1024); 19211da177e4SLinus Torvalds 1922f49921b8STakashi Iwai err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1923f49921b8STakashi Iwai snd_pcm_alt_chmaps, cm->max_channels, 0, 1924f49921b8STakashi Iwai NULL); 1925f49921b8STakashi Iwai if (err < 0) 1926f49921b8STakashi Iwai return err; 1927f49921b8STakashi Iwai 19281da177e4SLinus Torvalds return 0; 19291da177e4SLinus Torvalds } 19301da177e4SLinus Torvalds 19311da177e4SLinus Torvalds /* 19321da177e4SLinus Torvalds * mixer interface: 19331da177e4SLinus Torvalds * - CM8338/8738 has a compatible mixer interface with SB16, but 19341da177e4SLinus Torvalds * lack of some elements like tone control, i/o gain and AGC. 19351da177e4SLinus Torvalds * - Access to native registers: 19361da177e4SLinus Torvalds * - A 3D switch 19371da177e4SLinus Torvalds * - Output mute switches 19381da177e4SLinus Torvalds */ 19391da177e4SLinus Torvalds 19402cbdb686STakashi Iwai static void snd_cmipci_mixer_write(struct cmipci *s, unsigned char idx, unsigned char data) 19411da177e4SLinus Torvalds { 19421da177e4SLinus Torvalds outb(idx, s->iobase + CM_REG_SB16_ADDR); 19431da177e4SLinus Torvalds outb(data, s->iobase + CM_REG_SB16_DATA); 19441da177e4SLinus Torvalds } 19451da177e4SLinus Torvalds 19462cbdb686STakashi Iwai static unsigned char snd_cmipci_mixer_read(struct cmipci *s, unsigned char idx) 19471da177e4SLinus Torvalds { 19481da177e4SLinus Torvalds unsigned char v; 19491da177e4SLinus Torvalds 19501da177e4SLinus Torvalds outb(idx, s->iobase + CM_REG_SB16_ADDR); 19511da177e4SLinus Torvalds v = inb(s->iobase + CM_REG_SB16_DATA); 19521da177e4SLinus Torvalds return v; 19531da177e4SLinus Torvalds } 19541da177e4SLinus Torvalds 19551da177e4SLinus Torvalds /* 19561da177e4SLinus Torvalds * general mixer element 19571da177e4SLinus Torvalds */ 19582cbdb686STakashi Iwai struct cmipci_sb_reg { 19591da177e4SLinus Torvalds unsigned int left_reg, right_reg; 19601da177e4SLinus Torvalds unsigned int left_shift, right_shift; 19611da177e4SLinus Torvalds unsigned int mask; 19621da177e4SLinus Torvalds unsigned int invert: 1; 19631da177e4SLinus Torvalds unsigned int stereo: 1; 19642cbdb686STakashi Iwai }; 19651da177e4SLinus Torvalds 19661da177e4SLinus Torvalds #define COMPOSE_SB_REG(lreg,rreg,lshift,rshift,mask,invert,stereo) \ 19671da177e4SLinus Torvalds ((lreg) | ((rreg) << 8) | (lshift << 16) | (rshift << 19) | (mask << 24) | (invert << 22) | (stereo << 23)) 19681da177e4SLinus Torvalds 19691da177e4SLinus Torvalds #define CMIPCI_DOUBLE(xname, left_reg, right_reg, left_shift, right_shift, mask, invert, stereo) \ 19701da177e4SLinus Torvalds { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 19711da177e4SLinus Torvalds .info = snd_cmipci_info_volume, \ 19721da177e4SLinus Torvalds .get = snd_cmipci_get_volume, .put = snd_cmipci_put_volume, \ 19731da177e4SLinus Torvalds .private_value = COMPOSE_SB_REG(left_reg, right_reg, left_shift, right_shift, mask, invert, stereo), \ 19741da177e4SLinus Torvalds } 19751da177e4SLinus Torvalds 19761da177e4SLinus Torvalds #define CMIPCI_SB_VOL_STEREO(xname,reg,shift,mask) CMIPCI_DOUBLE(xname, reg, reg+1, shift, shift, mask, 0, 1) 19771da177e4SLinus Torvalds #define CMIPCI_SB_VOL_MONO(xname,reg,shift,mask) CMIPCI_DOUBLE(xname, reg, reg, shift, shift, mask, 0, 0) 19781da177e4SLinus Torvalds #define CMIPCI_SB_SW_STEREO(xname,lshift,rshift) CMIPCI_DOUBLE(xname, SB_DSP4_OUTPUT_SW, SB_DSP4_OUTPUT_SW, lshift, rshift, 1, 0, 1) 19791da177e4SLinus Torvalds #define CMIPCI_SB_SW_MONO(xname,shift) CMIPCI_DOUBLE(xname, SB_DSP4_OUTPUT_SW, SB_DSP4_OUTPUT_SW, shift, shift, 1, 0, 0) 19801da177e4SLinus Torvalds 19812cbdb686STakashi Iwai static void cmipci_sb_reg_decode(struct cmipci_sb_reg *r, unsigned long val) 19821da177e4SLinus Torvalds { 19831da177e4SLinus Torvalds r->left_reg = val & 0xff; 19841da177e4SLinus Torvalds r->right_reg = (val >> 8) & 0xff; 19851da177e4SLinus Torvalds r->left_shift = (val >> 16) & 0x07; 19861da177e4SLinus Torvalds r->right_shift = (val >> 19) & 0x07; 19871da177e4SLinus Torvalds r->invert = (val >> 22) & 1; 19881da177e4SLinus Torvalds r->stereo = (val >> 23) & 1; 19891da177e4SLinus Torvalds r->mask = (val >> 24) & 0xff; 19901da177e4SLinus Torvalds } 19911da177e4SLinus Torvalds 19922cbdb686STakashi Iwai static int snd_cmipci_info_volume(struct snd_kcontrol *kcontrol, 19932cbdb686STakashi Iwai struct snd_ctl_elem_info *uinfo) 19941da177e4SLinus Torvalds { 19952cbdb686STakashi Iwai struct cmipci_sb_reg reg; 19961da177e4SLinus Torvalds 19971da177e4SLinus Torvalds cmipci_sb_reg_decode(®, kcontrol->private_value); 19981da177e4SLinus Torvalds uinfo->type = reg.mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 19991da177e4SLinus Torvalds uinfo->count = reg.stereo + 1; 20001da177e4SLinus Torvalds uinfo->value.integer.min = 0; 20011da177e4SLinus Torvalds uinfo->value.integer.max = reg.mask; 20021da177e4SLinus Torvalds return 0; 20031da177e4SLinus Torvalds } 20041da177e4SLinus Torvalds 20052cbdb686STakashi Iwai static int snd_cmipci_get_volume(struct snd_kcontrol *kcontrol, 20062cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 20071da177e4SLinus Torvalds { 20082cbdb686STakashi Iwai struct cmipci *cm = snd_kcontrol_chip(kcontrol); 20092cbdb686STakashi Iwai struct cmipci_sb_reg reg; 20101da177e4SLinus Torvalds int val; 20111da177e4SLinus Torvalds 20121da177e4SLinus Torvalds cmipci_sb_reg_decode(®, kcontrol->private_value); 20131da177e4SLinus Torvalds spin_lock_irq(&cm->reg_lock); 20141da177e4SLinus Torvalds val = (snd_cmipci_mixer_read(cm, reg.left_reg) >> reg.left_shift) & reg.mask; 20151da177e4SLinus Torvalds if (reg.invert) 20161da177e4SLinus Torvalds val = reg.mask - val; 20171da177e4SLinus Torvalds ucontrol->value.integer.value[0] = val; 20181da177e4SLinus Torvalds if (reg.stereo) { 20191da177e4SLinus Torvalds val = (snd_cmipci_mixer_read(cm, reg.right_reg) >> reg.right_shift) & reg.mask; 20201da177e4SLinus Torvalds if (reg.invert) 20211da177e4SLinus Torvalds val = reg.mask - val; 20221da177e4SLinus Torvalds ucontrol->value.integer.value[1] = val; 20231da177e4SLinus Torvalds } 20241da177e4SLinus Torvalds spin_unlock_irq(&cm->reg_lock); 20251da177e4SLinus Torvalds return 0; 20261da177e4SLinus Torvalds } 20271da177e4SLinus Torvalds 20282cbdb686STakashi Iwai static int snd_cmipci_put_volume(struct snd_kcontrol *kcontrol, 20292cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 20301da177e4SLinus Torvalds { 20312cbdb686STakashi Iwai struct cmipci *cm = snd_kcontrol_chip(kcontrol); 20322cbdb686STakashi Iwai struct cmipci_sb_reg reg; 20331da177e4SLinus Torvalds int change; 20341da177e4SLinus Torvalds int left, right, oleft, oright; 20351da177e4SLinus Torvalds 20361da177e4SLinus Torvalds cmipci_sb_reg_decode(®, kcontrol->private_value); 20371da177e4SLinus Torvalds left = ucontrol->value.integer.value[0] & reg.mask; 20381da177e4SLinus Torvalds if (reg.invert) 20391da177e4SLinus Torvalds left = reg.mask - left; 20401da177e4SLinus Torvalds left <<= reg.left_shift; 20411da177e4SLinus Torvalds if (reg.stereo) { 20421da177e4SLinus Torvalds right = ucontrol->value.integer.value[1] & reg.mask; 20431da177e4SLinus Torvalds if (reg.invert) 20441da177e4SLinus Torvalds right = reg.mask - right; 20451da177e4SLinus Torvalds right <<= reg.right_shift; 20461da177e4SLinus Torvalds } else 20471da177e4SLinus Torvalds right = 0; 20481da177e4SLinus Torvalds spin_lock_irq(&cm->reg_lock); 20491da177e4SLinus Torvalds oleft = snd_cmipci_mixer_read(cm, reg.left_reg); 20501da177e4SLinus Torvalds left |= oleft & ~(reg.mask << reg.left_shift); 20511da177e4SLinus Torvalds change = left != oleft; 20521da177e4SLinus Torvalds if (reg.stereo) { 20531da177e4SLinus Torvalds if (reg.left_reg != reg.right_reg) { 20541da177e4SLinus Torvalds snd_cmipci_mixer_write(cm, reg.left_reg, left); 20551da177e4SLinus Torvalds oright = snd_cmipci_mixer_read(cm, reg.right_reg); 20561da177e4SLinus Torvalds } else 20571da177e4SLinus Torvalds oright = left; 20581da177e4SLinus Torvalds right |= oright & ~(reg.mask << reg.right_shift); 20591da177e4SLinus Torvalds change |= right != oright; 20601da177e4SLinus Torvalds snd_cmipci_mixer_write(cm, reg.right_reg, right); 20611da177e4SLinus Torvalds } else 20621da177e4SLinus Torvalds snd_cmipci_mixer_write(cm, reg.left_reg, left); 20631da177e4SLinus Torvalds spin_unlock_irq(&cm->reg_lock); 20641da177e4SLinus Torvalds return change; 20651da177e4SLinus Torvalds } 20661da177e4SLinus Torvalds 20671da177e4SLinus Torvalds /* 20681da177e4SLinus Torvalds * input route (left,right) -> (left,right) 20691da177e4SLinus Torvalds */ 20701da177e4SLinus Torvalds #define CMIPCI_SB_INPUT_SW(xname, left_shift, right_shift) \ 20711da177e4SLinus Torvalds { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 20721da177e4SLinus Torvalds .info = snd_cmipci_info_input_sw, \ 20731da177e4SLinus Torvalds .get = snd_cmipci_get_input_sw, .put = snd_cmipci_put_input_sw, \ 20741da177e4SLinus Torvalds .private_value = COMPOSE_SB_REG(SB_DSP4_INPUT_LEFT, SB_DSP4_INPUT_RIGHT, left_shift, right_shift, 1, 0, 1), \ 20751da177e4SLinus Torvalds } 20761da177e4SLinus Torvalds 20772cbdb686STakashi Iwai static int snd_cmipci_info_input_sw(struct snd_kcontrol *kcontrol, 20782cbdb686STakashi Iwai struct snd_ctl_elem_info *uinfo) 20791da177e4SLinus Torvalds { 20801da177e4SLinus Torvalds uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 20811da177e4SLinus Torvalds uinfo->count = 4; 20821da177e4SLinus Torvalds uinfo->value.integer.min = 0; 20831da177e4SLinus Torvalds uinfo->value.integer.max = 1; 20841da177e4SLinus Torvalds return 0; 20851da177e4SLinus Torvalds } 20861da177e4SLinus Torvalds 20872cbdb686STakashi Iwai static int snd_cmipci_get_input_sw(struct snd_kcontrol *kcontrol, 20882cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 20891da177e4SLinus Torvalds { 20902cbdb686STakashi Iwai struct cmipci *cm = snd_kcontrol_chip(kcontrol); 20912cbdb686STakashi Iwai struct cmipci_sb_reg reg; 20921da177e4SLinus Torvalds int val1, val2; 20931da177e4SLinus Torvalds 20941da177e4SLinus Torvalds cmipci_sb_reg_decode(®, kcontrol->private_value); 20951da177e4SLinus Torvalds spin_lock_irq(&cm->reg_lock); 20961da177e4SLinus Torvalds val1 = snd_cmipci_mixer_read(cm, reg.left_reg); 20971da177e4SLinus Torvalds val2 = snd_cmipci_mixer_read(cm, reg.right_reg); 20981da177e4SLinus Torvalds spin_unlock_irq(&cm->reg_lock); 20991da177e4SLinus Torvalds ucontrol->value.integer.value[0] = (val1 >> reg.left_shift) & 1; 21001da177e4SLinus Torvalds ucontrol->value.integer.value[1] = (val2 >> reg.left_shift) & 1; 21011da177e4SLinus Torvalds ucontrol->value.integer.value[2] = (val1 >> reg.right_shift) & 1; 21021da177e4SLinus Torvalds ucontrol->value.integer.value[3] = (val2 >> reg.right_shift) & 1; 21031da177e4SLinus Torvalds return 0; 21041da177e4SLinus Torvalds } 21051da177e4SLinus Torvalds 21062cbdb686STakashi Iwai static int snd_cmipci_put_input_sw(struct snd_kcontrol *kcontrol, 21072cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 21081da177e4SLinus Torvalds { 21092cbdb686STakashi Iwai struct cmipci *cm = snd_kcontrol_chip(kcontrol); 21102cbdb686STakashi Iwai struct cmipci_sb_reg reg; 21111da177e4SLinus Torvalds int change; 21121da177e4SLinus Torvalds int val1, val2, oval1, oval2; 21131da177e4SLinus Torvalds 21141da177e4SLinus Torvalds cmipci_sb_reg_decode(®, kcontrol->private_value); 21151da177e4SLinus Torvalds spin_lock_irq(&cm->reg_lock); 21161da177e4SLinus Torvalds oval1 = snd_cmipci_mixer_read(cm, reg.left_reg); 21171da177e4SLinus Torvalds oval2 = snd_cmipci_mixer_read(cm, reg.right_reg); 21181da177e4SLinus Torvalds val1 = oval1 & ~((1 << reg.left_shift) | (1 << reg.right_shift)); 21191da177e4SLinus Torvalds val2 = oval2 & ~((1 << reg.left_shift) | (1 << reg.right_shift)); 21201da177e4SLinus Torvalds val1 |= (ucontrol->value.integer.value[0] & 1) << reg.left_shift; 21211da177e4SLinus Torvalds val2 |= (ucontrol->value.integer.value[1] & 1) << reg.left_shift; 21221da177e4SLinus Torvalds val1 |= (ucontrol->value.integer.value[2] & 1) << reg.right_shift; 21231da177e4SLinus Torvalds val2 |= (ucontrol->value.integer.value[3] & 1) << reg.right_shift; 21241da177e4SLinus Torvalds change = val1 != oval1 || val2 != oval2; 21251da177e4SLinus Torvalds snd_cmipci_mixer_write(cm, reg.left_reg, val1); 21261da177e4SLinus Torvalds snd_cmipci_mixer_write(cm, reg.right_reg, val2); 21271da177e4SLinus Torvalds spin_unlock_irq(&cm->reg_lock); 21281da177e4SLinus Torvalds return change; 21291da177e4SLinus Torvalds } 21301da177e4SLinus Torvalds 21311da177e4SLinus Torvalds /* 21321da177e4SLinus Torvalds * native mixer switches/volumes 21331da177e4SLinus Torvalds */ 21341da177e4SLinus Torvalds 21351da177e4SLinus Torvalds #define CMIPCI_MIXER_SW_STEREO(xname, reg, lshift, rshift, invert) \ 21361da177e4SLinus Torvalds { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 21371da177e4SLinus Torvalds .info = snd_cmipci_info_native_mixer, \ 21381da177e4SLinus Torvalds .get = snd_cmipci_get_native_mixer, .put = snd_cmipci_put_native_mixer, \ 21391da177e4SLinus Torvalds .private_value = COMPOSE_SB_REG(reg, reg, lshift, rshift, 1, invert, 1), \ 21401da177e4SLinus Torvalds } 21411da177e4SLinus Torvalds 21421da177e4SLinus Torvalds #define CMIPCI_MIXER_SW_MONO(xname, reg, shift, invert) \ 21431da177e4SLinus Torvalds { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 21441da177e4SLinus Torvalds .info = snd_cmipci_info_native_mixer, \ 21451da177e4SLinus Torvalds .get = snd_cmipci_get_native_mixer, .put = snd_cmipci_put_native_mixer, \ 21461da177e4SLinus Torvalds .private_value = COMPOSE_SB_REG(reg, reg, shift, shift, 1, invert, 0), \ 21471da177e4SLinus Torvalds } 21481da177e4SLinus Torvalds 21491da177e4SLinus Torvalds #define CMIPCI_MIXER_VOL_STEREO(xname, reg, lshift, rshift, mask) \ 21501da177e4SLinus Torvalds { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 21511da177e4SLinus Torvalds .info = snd_cmipci_info_native_mixer, \ 21521da177e4SLinus Torvalds .get = snd_cmipci_get_native_mixer, .put = snd_cmipci_put_native_mixer, \ 21531da177e4SLinus Torvalds .private_value = COMPOSE_SB_REG(reg, reg, lshift, rshift, mask, 0, 1), \ 21541da177e4SLinus Torvalds } 21551da177e4SLinus Torvalds 21561da177e4SLinus Torvalds #define CMIPCI_MIXER_VOL_MONO(xname, reg, shift, mask) \ 21571da177e4SLinus Torvalds { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 21581da177e4SLinus Torvalds .info = snd_cmipci_info_native_mixer, \ 21591da177e4SLinus Torvalds .get = snd_cmipci_get_native_mixer, .put = snd_cmipci_put_native_mixer, \ 21601da177e4SLinus Torvalds .private_value = COMPOSE_SB_REG(reg, reg, shift, shift, mask, 0, 0), \ 21611da177e4SLinus Torvalds } 21621da177e4SLinus Torvalds 21632cbdb686STakashi Iwai static int snd_cmipci_info_native_mixer(struct snd_kcontrol *kcontrol, 21642cbdb686STakashi Iwai struct snd_ctl_elem_info *uinfo) 21651da177e4SLinus Torvalds { 21662cbdb686STakashi Iwai struct cmipci_sb_reg reg; 21671da177e4SLinus Torvalds 21681da177e4SLinus Torvalds cmipci_sb_reg_decode(®, kcontrol->private_value); 21691da177e4SLinus Torvalds uinfo->type = reg.mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 21701da177e4SLinus Torvalds uinfo->count = reg.stereo + 1; 21711da177e4SLinus Torvalds uinfo->value.integer.min = 0; 21721da177e4SLinus Torvalds uinfo->value.integer.max = reg.mask; 21731da177e4SLinus Torvalds return 0; 21741da177e4SLinus Torvalds 21751da177e4SLinus Torvalds } 21761da177e4SLinus Torvalds 21772cbdb686STakashi Iwai static int snd_cmipci_get_native_mixer(struct snd_kcontrol *kcontrol, 21782cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 21791da177e4SLinus Torvalds { 21802cbdb686STakashi Iwai struct cmipci *cm = snd_kcontrol_chip(kcontrol); 21812cbdb686STakashi Iwai struct cmipci_sb_reg reg; 21821da177e4SLinus Torvalds unsigned char oreg, val; 21831da177e4SLinus Torvalds 21841da177e4SLinus Torvalds cmipci_sb_reg_decode(®, kcontrol->private_value); 21851da177e4SLinus Torvalds spin_lock_irq(&cm->reg_lock); 21861da177e4SLinus Torvalds oreg = inb(cm->iobase + reg.left_reg); 21871da177e4SLinus Torvalds val = (oreg >> reg.left_shift) & reg.mask; 21881da177e4SLinus Torvalds if (reg.invert) 21891da177e4SLinus Torvalds val = reg.mask - val; 21901da177e4SLinus Torvalds ucontrol->value.integer.value[0] = val; 21911da177e4SLinus Torvalds if (reg.stereo) { 21921da177e4SLinus Torvalds val = (oreg >> reg.right_shift) & reg.mask; 21931da177e4SLinus Torvalds if (reg.invert) 21941da177e4SLinus Torvalds val = reg.mask - val; 21951da177e4SLinus Torvalds ucontrol->value.integer.value[1] = val; 21961da177e4SLinus Torvalds } 21971da177e4SLinus Torvalds spin_unlock_irq(&cm->reg_lock); 21981da177e4SLinus Torvalds return 0; 21991da177e4SLinus Torvalds } 22001da177e4SLinus Torvalds 22012cbdb686STakashi Iwai static int snd_cmipci_put_native_mixer(struct snd_kcontrol *kcontrol, 22022cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 22031da177e4SLinus Torvalds { 22042cbdb686STakashi Iwai struct cmipci *cm = snd_kcontrol_chip(kcontrol); 22052cbdb686STakashi Iwai struct cmipci_sb_reg reg; 22061da177e4SLinus Torvalds unsigned char oreg, nreg, val; 22071da177e4SLinus Torvalds 22081da177e4SLinus Torvalds cmipci_sb_reg_decode(®, kcontrol->private_value); 22091da177e4SLinus Torvalds spin_lock_irq(&cm->reg_lock); 22101da177e4SLinus Torvalds oreg = inb(cm->iobase + reg.left_reg); 22111da177e4SLinus Torvalds val = ucontrol->value.integer.value[0] & reg.mask; 22121da177e4SLinus Torvalds if (reg.invert) 22131da177e4SLinus Torvalds val = reg.mask - val; 22141da177e4SLinus Torvalds nreg = oreg & ~(reg.mask << reg.left_shift); 22151da177e4SLinus Torvalds nreg |= (val << reg.left_shift); 22161da177e4SLinus Torvalds if (reg.stereo) { 22171da177e4SLinus Torvalds val = ucontrol->value.integer.value[1] & reg.mask; 22181da177e4SLinus Torvalds if (reg.invert) 22191da177e4SLinus Torvalds val = reg.mask - val; 22201da177e4SLinus Torvalds nreg &= ~(reg.mask << reg.right_shift); 22211da177e4SLinus Torvalds nreg |= (val << reg.right_shift); 22221da177e4SLinus Torvalds } 22231da177e4SLinus Torvalds outb(nreg, cm->iobase + reg.left_reg); 22241da177e4SLinus Torvalds spin_unlock_irq(&cm->reg_lock); 22251da177e4SLinus Torvalds return (nreg != oreg); 22261da177e4SLinus Torvalds } 22271da177e4SLinus Torvalds 22281da177e4SLinus Torvalds /* 22291da177e4SLinus Torvalds * special case - check mixer sensitivity 22301da177e4SLinus Torvalds */ 22312cbdb686STakashi Iwai static int snd_cmipci_get_native_mixer_sensitive(struct snd_kcontrol *kcontrol, 22322cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 22331da177e4SLinus Torvalds { 22342cbdb686STakashi Iwai //struct cmipci *cm = snd_kcontrol_chip(kcontrol); 22351da177e4SLinus Torvalds return snd_cmipci_get_native_mixer(kcontrol, ucontrol); 22361da177e4SLinus Torvalds } 22371da177e4SLinus Torvalds 22382cbdb686STakashi Iwai static int snd_cmipci_put_native_mixer_sensitive(struct snd_kcontrol *kcontrol, 22392cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 22401da177e4SLinus Torvalds { 22412cbdb686STakashi Iwai struct cmipci *cm = snd_kcontrol_chip(kcontrol); 22421da177e4SLinus Torvalds if (cm->mixer_insensitive) { 22431da177e4SLinus Torvalds /* ignored */ 22441da177e4SLinus Torvalds return 0; 22451da177e4SLinus Torvalds } 22461da177e4SLinus Torvalds return snd_cmipci_put_native_mixer(kcontrol, ucontrol); 22471da177e4SLinus Torvalds } 22481da177e4SLinus Torvalds 22491da177e4SLinus Torvalds 2250b4e5e707STakashi Iwai static const struct snd_kcontrol_new snd_cmipci_mixers[] = { 22511da177e4SLinus Torvalds CMIPCI_SB_VOL_STEREO("Master Playback Volume", SB_DSP4_MASTER_DEV, 3, 31), 22521da177e4SLinus Torvalds CMIPCI_MIXER_SW_MONO("3D Control - Switch", CM_REG_MIXER1, CM_X3DEN_SHIFT, 0), 22531da177e4SLinus Torvalds CMIPCI_SB_VOL_STEREO("PCM Playback Volume", SB_DSP4_PCM_DEV, 3, 31), 22541da177e4SLinus Torvalds //CMIPCI_MIXER_SW_MONO("PCM Playback Switch", CM_REG_MIXER1, CM_WSMUTE_SHIFT, 1), 22551da177e4SLinus Torvalds { /* switch with sensitivity */ 22561da177e4SLinus Torvalds .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 22571da177e4SLinus Torvalds .name = "PCM Playback Switch", 22581da177e4SLinus Torvalds .info = snd_cmipci_info_native_mixer, 22591da177e4SLinus Torvalds .get = snd_cmipci_get_native_mixer_sensitive, 22601da177e4SLinus Torvalds .put = snd_cmipci_put_native_mixer_sensitive, 22611da177e4SLinus Torvalds .private_value = COMPOSE_SB_REG(CM_REG_MIXER1, CM_REG_MIXER1, CM_WSMUTE_SHIFT, CM_WSMUTE_SHIFT, 1, 1, 0), 22621da177e4SLinus Torvalds }, 22631da177e4SLinus Torvalds CMIPCI_MIXER_SW_STEREO("PCM Capture Switch", CM_REG_MIXER1, CM_WAVEINL_SHIFT, CM_WAVEINR_SHIFT, 0), 22641da177e4SLinus Torvalds CMIPCI_SB_VOL_STEREO("Synth Playback Volume", SB_DSP4_SYNTH_DEV, 3, 31), 22651da177e4SLinus Torvalds CMIPCI_MIXER_SW_MONO("Synth Playback Switch", CM_REG_MIXER1, CM_FMMUTE_SHIFT, 1), 22661da177e4SLinus Torvalds CMIPCI_SB_INPUT_SW("Synth Capture Route", 6, 5), 22671da177e4SLinus Torvalds CMIPCI_SB_VOL_STEREO("CD Playback Volume", SB_DSP4_CD_DEV, 3, 31), 22681da177e4SLinus Torvalds CMIPCI_SB_SW_STEREO("CD Playback Switch", 2, 1), 22691da177e4SLinus Torvalds CMIPCI_SB_INPUT_SW("CD Capture Route", 2, 1), 22701da177e4SLinus Torvalds CMIPCI_SB_VOL_STEREO("Line Playback Volume", SB_DSP4_LINE_DEV, 3, 31), 22711da177e4SLinus Torvalds CMIPCI_SB_SW_STEREO("Line Playback Switch", 4, 3), 22721da177e4SLinus Torvalds CMIPCI_SB_INPUT_SW("Line Capture Route", 4, 3), 22731da177e4SLinus Torvalds CMIPCI_SB_VOL_MONO("Mic Playback Volume", SB_DSP4_MIC_DEV, 3, 31), 22741da177e4SLinus Torvalds CMIPCI_SB_SW_MONO("Mic Playback Switch", 0), 22751da177e4SLinus Torvalds CMIPCI_DOUBLE("Mic Capture Switch", SB_DSP4_INPUT_LEFT, SB_DSP4_INPUT_RIGHT, 0, 0, 1, 0, 0), 2276d355c82aSJaroslav Kysela CMIPCI_SB_VOL_MONO("Beep Playback Volume", SB_DSP4_SPEAKER_DEV, 6, 3), 22771da177e4SLinus Torvalds CMIPCI_MIXER_VOL_STEREO("Aux Playback Volume", CM_REG_AUX_VOL, 4, 0, 15), 22781da177e4SLinus Torvalds CMIPCI_MIXER_SW_STEREO("Aux Playback Switch", CM_REG_MIXER2, CM_VAUXLM_SHIFT, CM_VAUXRM_SHIFT, 0), 22791da177e4SLinus Torvalds CMIPCI_MIXER_SW_STEREO("Aux Capture Switch", CM_REG_MIXER2, CM_RAUXLEN_SHIFT, CM_RAUXREN_SHIFT, 0), 22802eff7ec8STakashi Iwai CMIPCI_MIXER_SW_MONO("Mic Boost Playback Switch", CM_REG_MIXER2, CM_MICGAINZ_SHIFT, 1), 22811da177e4SLinus Torvalds CMIPCI_MIXER_VOL_MONO("Mic Capture Volume", CM_REG_MIXER2, CM_VADMIC_SHIFT, 7), 22822eff7ec8STakashi Iwai CMIPCI_SB_VOL_MONO("Phone Playback Volume", CM_REG_EXTENT_IND, 5, 7), 22832eff7ec8STakashi Iwai CMIPCI_DOUBLE("Phone Playback Switch", CM_REG_EXTENT_IND, CM_REG_EXTENT_IND, 4, 4, 1, 0, 0), 2284d355c82aSJaroslav Kysela CMIPCI_DOUBLE("Beep Playback Switch", CM_REG_EXTENT_IND, CM_REG_EXTENT_IND, 3, 3, 1, 0, 0), 22852eff7ec8STakashi Iwai CMIPCI_DOUBLE("Mic Boost Capture Switch", CM_REG_EXTENT_IND, CM_REG_EXTENT_IND, 0, 0, 1, 0, 0), 22861da177e4SLinus Torvalds }; 22871da177e4SLinus Torvalds 22881da177e4SLinus Torvalds /* 22891da177e4SLinus Torvalds * other switches 22901da177e4SLinus Torvalds */ 22911da177e4SLinus Torvalds 22922cbdb686STakashi Iwai struct cmipci_switch_args { 22931da177e4SLinus Torvalds int reg; /* register index */ 22941da177e4SLinus Torvalds unsigned int mask; /* mask bits */ 22951da177e4SLinus Torvalds unsigned int mask_on; /* mask bits to turn on */ 22961da177e4SLinus Torvalds unsigned int is_byte: 1; /* byte access? */ 22972cbdb686STakashi Iwai unsigned int ac3_sensitive: 1; /* access forbidden during 22982cbdb686STakashi Iwai * non-audio operation? 22992cbdb686STakashi Iwai */ 23002cbdb686STakashi Iwai }; 23011da177e4SLinus Torvalds 2302a5ce8890STakashi Iwai #define snd_cmipci_uswitch_info snd_ctl_boolean_mono_info 23031da177e4SLinus Torvalds 23042cbdb686STakashi Iwai static int _snd_cmipci_uswitch_get(struct snd_kcontrol *kcontrol, 23052cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol, 23062cbdb686STakashi Iwai struct cmipci_switch_args *args) 23071da177e4SLinus Torvalds { 23081da177e4SLinus Torvalds unsigned int val; 23092cbdb686STakashi Iwai struct cmipci *cm = snd_kcontrol_chip(kcontrol); 23101da177e4SLinus Torvalds 23111da177e4SLinus Torvalds spin_lock_irq(&cm->reg_lock); 23121da177e4SLinus Torvalds if (args->ac3_sensitive && cm->mixer_insensitive) { 23131da177e4SLinus Torvalds ucontrol->value.integer.value[0] = 0; 23141da177e4SLinus Torvalds spin_unlock_irq(&cm->reg_lock); 23151da177e4SLinus Torvalds return 0; 23161da177e4SLinus Torvalds } 23171da177e4SLinus Torvalds if (args->is_byte) 23181da177e4SLinus Torvalds val = inb(cm->iobase + args->reg); 23191da177e4SLinus Torvalds else 23201da177e4SLinus Torvalds val = snd_cmipci_read(cm, args->reg); 23211da177e4SLinus Torvalds ucontrol->value.integer.value[0] = ((val & args->mask) == args->mask_on) ? 1 : 0; 23221da177e4SLinus Torvalds spin_unlock_irq(&cm->reg_lock); 23231da177e4SLinus Torvalds return 0; 23241da177e4SLinus Torvalds } 23251da177e4SLinus Torvalds 23262cbdb686STakashi Iwai static int snd_cmipci_uswitch_get(struct snd_kcontrol *kcontrol, 23272cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 23281da177e4SLinus Torvalds { 23292cbdb686STakashi Iwai struct cmipci_switch_args *args; 23302cbdb686STakashi Iwai args = (struct cmipci_switch_args *)kcontrol->private_value; 2331da3cec35STakashi Iwai if (snd_BUG_ON(!args)) 2332da3cec35STakashi Iwai return -EINVAL; 23331da177e4SLinus Torvalds return _snd_cmipci_uswitch_get(kcontrol, ucontrol, args); 23341da177e4SLinus Torvalds } 23351da177e4SLinus Torvalds 23362cbdb686STakashi Iwai static int _snd_cmipci_uswitch_put(struct snd_kcontrol *kcontrol, 23372cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol, 23382cbdb686STakashi Iwai struct cmipci_switch_args *args) 23391da177e4SLinus Torvalds { 23401da177e4SLinus Torvalds unsigned int val; 23411da177e4SLinus Torvalds int change; 23422cbdb686STakashi Iwai struct cmipci *cm = snd_kcontrol_chip(kcontrol); 23431da177e4SLinus Torvalds 23441da177e4SLinus Torvalds spin_lock_irq(&cm->reg_lock); 23451da177e4SLinus Torvalds if (args->ac3_sensitive && cm->mixer_insensitive) { 23461da177e4SLinus Torvalds /* ignored */ 23471da177e4SLinus Torvalds spin_unlock_irq(&cm->reg_lock); 23481da177e4SLinus Torvalds return 0; 23491da177e4SLinus Torvalds } 23501da177e4SLinus Torvalds if (args->is_byte) 23511da177e4SLinus Torvalds val = inb(cm->iobase + args->reg); 23521da177e4SLinus Torvalds else 23531da177e4SLinus Torvalds val = snd_cmipci_read(cm, args->reg); 23548c670714STimofei V. Bondarenko change = (val & args->mask) != (ucontrol->value.integer.value[0] ? 23558c670714STimofei V. Bondarenko args->mask_on : (args->mask & ~args->mask_on)); 23561da177e4SLinus Torvalds if (change) { 23571da177e4SLinus Torvalds val &= ~args->mask; 23581da177e4SLinus Torvalds if (ucontrol->value.integer.value[0]) 23591da177e4SLinus Torvalds val |= args->mask_on; 23601da177e4SLinus Torvalds else 23611da177e4SLinus Torvalds val |= (args->mask & ~args->mask_on); 23621da177e4SLinus Torvalds if (args->is_byte) 23631da177e4SLinus Torvalds outb((unsigned char)val, cm->iobase + args->reg); 23641da177e4SLinus Torvalds else 23651da177e4SLinus Torvalds snd_cmipci_write(cm, args->reg, val); 23661da177e4SLinus Torvalds } 23671da177e4SLinus Torvalds spin_unlock_irq(&cm->reg_lock); 23681da177e4SLinus Torvalds return change; 23691da177e4SLinus Torvalds } 23701da177e4SLinus Torvalds 23712cbdb686STakashi Iwai static int snd_cmipci_uswitch_put(struct snd_kcontrol *kcontrol, 23722cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 23731da177e4SLinus Torvalds { 23742cbdb686STakashi Iwai struct cmipci_switch_args *args; 23752cbdb686STakashi Iwai args = (struct cmipci_switch_args *)kcontrol->private_value; 2376da3cec35STakashi Iwai if (snd_BUG_ON(!args)) 2377da3cec35STakashi Iwai return -EINVAL; 23781da177e4SLinus Torvalds return _snd_cmipci_uswitch_put(kcontrol, ucontrol, args); 23791da177e4SLinus Torvalds } 23801da177e4SLinus Torvalds 23811da177e4SLinus Torvalds #define DEFINE_SWITCH_ARG(sname, xreg, xmask, xmask_on, xis_byte, xac3) \ 23822cbdb686STakashi Iwai static struct cmipci_switch_args cmipci_switch_arg_##sname = { \ 23831da177e4SLinus Torvalds .reg = xreg, \ 23841da177e4SLinus Torvalds .mask = xmask, \ 23851da177e4SLinus Torvalds .mask_on = xmask_on, \ 23861da177e4SLinus Torvalds .is_byte = xis_byte, \ 23871da177e4SLinus Torvalds .ac3_sensitive = xac3, \ 23881da177e4SLinus Torvalds } 23891da177e4SLinus Torvalds 23901da177e4SLinus Torvalds #define DEFINE_BIT_SWITCH_ARG(sname, xreg, xmask, xis_byte, xac3) \ 23911da177e4SLinus Torvalds DEFINE_SWITCH_ARG(sname, xreg, xmask, xmask, xis_byte, xac3) 23921da177e4SLinus Torvalds 23931da177e4SLinus Torvalds #if 0 /* these will be controlled in pcm device */ 23941da177e4SLinus Torvalds DEFINE_BIT_SWITCH_ARG(spdif_in, CM_REG_FUNCTRL1, CM_SPDF_1, 0, 0); 23951da177e4SLinus Torvalds DEFINE_BIT_SWITCH_ARG(spdif_out, CM_REG_FUNCTRL1, CM_SPDF_0, 0, 0); 23961da177e4SLinus Torvalds #endif 23971da177e4SLinus Torvalds DEFINE_BIT_SWITCH_ARG(spdif_in_sel1, CM_REG_CHFORMAT, CM_SPDIF_SELECT1, 0, 0); 23981da177e4SLinus Torvalds DEFINE_BIT_SWITCH_ARG(spdif_in_sel2, CM_REG_MISC_CTRL, CM_SPDIF_SELECT2, 0, 0); 23991da177e4SLinus Torvalds DEFINE_BIT_SWITCH_ARG(spdif_enable, CM_REG_LEGACY_CTRL, CM_ENSPDOUT, 0, 0); 24001da177e4SLinus Torvalds DEFINE_BIT_SWITCH_ARG(spdo2dac, CM_REG_FUNCTRL1, CM_SPDO2DAC, 0, 1); 24011da177e4SLinus Torvalds DEFINE_BIT_SWITCH_ARG(spdi_valid, CM_REG_MISC, CM_SPDVALID, 1, 0); 24021da177e4SLinus Torvalds DEFINE_BIT_SWITCH_ARG(spdif_copyright, CM_REG_LEGACY_CTRL, CM_SPDCOPYRHT, 0, 0); 24031da177e4SLinus Torvalds DEFINE_BIT_SWITCH_ARG(spdif_dac_out, CM_REG_LEGACY_CTRL, CM_DAC2SPDO, 0, 1); 24041da177e4SLinus Torvalds DEFINE_SWITCH_ARG(spdo_5v, CM_REG_MISC_CTRL, CM_SPDO5V, 0, 0, 0); /* inverse: 0 = 5V */ 24051da177e4SLinus Torvalds // DEFINE_BIT_SWITCH_ARG(spdo_48k, CM_REG_MISC_CTRL, CM_SPDF_AC97|CM_SPDIF48K, 0, 1); 24061da177e4SLinus Torvalds DEFINE_BIT_SWITCH_ARG(spdif_loop, CM_REG_FUNCTRL1, CM_SPDFLOOP, 0, 1); 24071da177e4SLinus Torvalds DEFINE_BIT_SWITCH_ARG(spdi_monitor, CM_REG_MIXER1, CM_CDPLAY, 1, 0); 24081da177e4SLinus Torvalds /* DEFINE_BIT_SWITCH_ARG(spdi_phase, CM_REG_CHFORMAT, CM_SPDIF_INVERSE, 0, 0); */ 24091da177e4SLinus Torvalds DEFINE_BIT_SWITCH_ARG(spdi_phase, CM_REG_MISC, CM_SPDIF_INVERSE, 1, 0); 24101da177e4SLinus Torvalds DEFINE_BIT_SWITCH_ARG(spdi_phase2, CM_REG_CHFORMAT, CM_SPDIF_INVERSE2, 0, 0); 24111da177e4SLinus Torvalds #if CM_CH_PLAY == 1 24121da177e4SLinus Torvalds DEFINE_SWITCH_ARG(exchange_dac, CM_REG_MISC_CTRL, CM_XCHGDAC, 0, 0, 0); /* reversed */ 24131da177e4SLinus Torvalds #else 24141da177e4SLinus Torvalds DEFINE_SWITCH_ARG(exchange_dac, CM_REG_MISC_CTRL, CM_XCHGDAC, CM_XCHGDAC, 0, 0); 24151da177e4SLinus Torvalds #endif 24161da177e4SLinus Torvalds DEFINE_BIT_SWITCH_ARG(fourch, CM_REG_MISC_CTRL, CM_N4SPK3D, 0, 0); 2417a839a33dSClemens Ladisch // DEFINE_BIT_SWITCH_ARG(line_rear, CM_REG_MIXER1, CM_REAR2LIN, 1, 0); 2418a839a33dSClemens Ladisch // DEFINE_BIT_SWITCH_ARG(line_bass, CM_REG_LEGACY_CTRL, CM_CENTR2LIN|CM_BASE2LIN, 0, 0); 24191da177e4SLinus Torvalds // DEFINE_BIT_SWITCH_ARG(joystick, CM_REG_FUNCTRL1, CM_JYSTK_EN, 0, 0); /* now module option */ 24201da177e4SLinus Torvalds DEFINE_SWITCH_ARG(modem, CM_REG_MISC_CTRL, CM_FLINKON|CM_FLINKOFF, CM_FLINKON, 0, 0); 24211da177e4SLinus Torvalds 24221da177e4SLinus Torvalds #define DEFINE_SWITCH(sname, stype, sarg) \ 24231da177e4SLinus Torvalds { .name = sname, \ 24241da177e4SLinus Torvalds .iface = stype, \ 24251da177e4SLinus Torvalds .info = snd_cmipci_uswitch_info, \ 24261da177e4SLinus Torvalds .get = snd_cmipci_uswitch_get, \ 24271da177e4SLinus Torvalds .put = snd_cmipci_uswitch_put, \ 24281da177e4SLinus Torvalds .private_value = (unsigned long)&cmipci_switch_arg_##sarg,\ 24291da177e4SLinus Torvalds } 24301da177e4SLinus Torvalds 24311da177e4SLinus Torvalds #define DEFINE_CARD_SWITCH(sname, sarg) DEFINE_SWITCH(sname, SNDRV_CTL_ELEM_IFACE_CARD, sarg) 24321da177e4SLinus Torvalds #define DEFINE_MIXER_SWITCH(sname, sarg) DEFINE_SWITCH(sname, SNDRV_CTL_ELEM_IFACE_MIXER, sarg) 24331da177e4SLinus Torvalds 24341da177e4SLinus Torvalds 24351da177e4SLinus Torvalds /* 24361da177e4SLinus Torvalds * callbacks for spdif output switch 24371da177e4SLinus Torvalds * needs toggle two registers.. 24381da177e4SLinus Torvalds */ 24392cbdb686STakashi Iwai static int snd_cmipci_spdout_enable_get(struct snd_kcontrol *kcontrol, 24402cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 24411da177e4SLinus Torvalds { 24421da177e4SLinus Torvalds int changed; 24431da177e4SLinus Torvalds changed = _snd_cmipci_uswitch_get(kcontrol, ucontrol, &cmipci_switch_arg_spdif_enable); 24441da177e4SLinus Torvalds changed |= _snd_cmipci_uswitch_get(kcontrol, ucontrol, &cmipci_switch_arg_spdo2dac); 24451da177e4SLinus Torvalds return changed; 24461da177e4SLinus Torvalds } 24471da177e4SLinus Torvalds 24482cbdb686STakashi Iwai static int snd_cmipci_spdout_enable_put(struct snd_kcontrol *kcontrol, 24492cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 24501da177e4SLinus Torvalds { 24512cbdb686STakashi Iwai struct cmipci *chip = snd_kcontrol_chip(kcontrol); 24521da177e4SLinus Torvalds int changed; 24531da177e4SLinus Torvalds changed = _snd_cmipci_uswitch_put(kcontrol, ucontrol, &cmipci_switch_arg_spdif_enable); 24541da177e4SLinus Torvalds changed |= _snd_cmipci_uswitch_put(kcontrol, ucontrol, &cmipci_switch_arg_spdo2dac); 24551da177e4SLinus Torvalds if (changed) { 24561da177e4SLinus Torvalds if (ucontrol->value.integer.value[0]) { 24571da177e4SLinus Torvalds if (chip->spdif_playback_avail) 24581da177e4SLinus Torvalds snd_cmipci_set_bit(chip, CM_REG_FUNCTRL1, CM_PLAYBACK_SPDF); 24591da177e4SLinus Torvalds } else { 24601da177e4SLinus Torvalds if (chip->spdif_playback_avail) 24611da177e4SLinus Torvalds snd_cmipci_clear_bit(chip, CM_REG_FUNCTRL1, CM_PLAYBACK_SPDF); 24621da177e4SLinus Torvalds } 24631da177e4SLinus Torvalds } 24641da177e4SLinus Torvalds chip->spdif_playback_enabled = ucontrol->value.integer.value[0]; 24651da177e4SLinus Torvalds return changed; 24661da177e4SLinus Torvalds } 24671da177e4SLinus Torvalds 24681da177e4SLinus Torvalds 24692cbdb686STakashi Iwai static int snd_cmipci_line_in_mode_info(struct snd_kcontrol *kcontrol, 24702cbdb686STakashi Iwai struct snd_ctl_elem_info *uinfo) 247101d25d46STakashi Iwai { 24722cbdb686STakashi Iwai struct cmipci *cm = snd_kcontrol_chip(kcontrol); 247360c4ce4aSClemens Ladisch static const char *const texts[3] = { 247460c4ce4aSClemens Ladisch "Line-In", "Rear Output", "Bass Output" 247560c4ce4aSClemens Ladisch }; 247660c4ce4aSClemens Ladisch 247760c4ce4aSClemens Ladisch return snd_ctl_enum_info(uinfo, 1, 247860c4ce4aSClemens Ladisch cm->chip_version >= 39 ? 3 : 2, texts); 247901d25d46STakashi Iwai } 248001d25d46STakashi Iwai 24812cbdb686STakashi Iwai static inline unsigned int get_line_in_mode(struct cmipci *cm) 248201d25d46STakashi Iwai { 248301d25d46STakashi Iwai unsigned int val; 248401d25d46STakashi Iwai if (cm->chip_version >= 39) { 248501d25d46STakashi Iwai val = snd_cmipci_read(cm, CM_REG_LEGACY_CTRL); 2486a839a33dSClemens Ladisch if (val & (CM_CENTR2LIN | CM_BASE2LIN)) 248701d25d46STakashi Iwai return 2; 248801d25d46STakashi Iwai } 248901d25d46STakashi Iwai val = snd_cmipci_read_b(cm, CM_REG_MIXER1); 2490a839a33dSClemens Ladisch if (val & CM_REAR2LIN) 249101d25d46STakashi Iwai return 1; 249201d25d46STakashi Iwai return 0; 249301d25d46STakashi Iwai } 249401d25d46STakashi Iwai 24952cbdb686STakashi Iwai static int snd_cmipci_line_in_mode_get(struct snd_kcontrol *kcontrol, 24962cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 249701d25d46STakashi Iwai { 24982cbdb686STakashi Iwai struct cmipci *cm = snd_kcontrol_chip(kcontrol); 249901d25d46STakashi Iwai 250001d25d46STakashi Iwai spin_lock_irq(&cm->reg_lock); 250101d25d46STakashi Iwai ucontrol->value.enumerated.item[0] = get_line_in_mode(cm); 250201d25d46STakashi Iwai spin_unlock_irq(&cm->reg_lock); 250301d25d46STakashi Iwai return 0; 250401d25d46STakashi Iwai } 250501d25d46STakashi Iwai 25062cbdb686STakashi Iwai static int snd_cmipci_line_in_mode_put(struct snd_kcontrol *kcontrol, 25072cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 250801d25d46STakashi Iwai { 25092cbdb686STakashi Iwai struct cmipci *cm = snd_kcontrol_chip(kcontrol); 251001d25d46STakashi Iwai int change; 251101d25d46STakashi Iwai 251201d25d46STakashi Iwai spin_lock_irq(&cm->reg_lock); 251301d25d46STakashi Iwai if (ucontrol->value.enumerated.item[0] == 2) 2514a839a33dSClemens Ladisch change = snd_cmipci_set_bit(cm, CM_REG_LEGACY_CTRL, CM_CENTR2LIN | CM_BASE2LIN); 251501d25d46STakashi Iwai else 2516a839a33dSClemens Ladisch change = snd_cmipci_clear_bit(cm, CM_REG_LEGACY_CTRL, CM_CENTR2LIN | CM_BASE2LIN); 251701d25d46STakashi Iwai if (ucontrol->value.enumerated.item[0] == 1) 2518a839a33dSClemens Ladisch change |= snd_cmipci_set_bit_b(cm, CM_REG_MIXER1, CM_REAR2LIN); 251901d25d46STakashi Iwai else 2520a839a33dSClemens Ladisch change |= snd_cmipci_clear_bit_b(cm, CM_REG_MIXER1, CM_REAR2LIN); 252101d25d46STakashi Iwai spin_unlock_irq(&cm->reg_lock); 252201d25d46STakashi Iwai return change; 252301d25d46STakashi Iwai } 252401d25d46STakashi Iwai 25252cbdb686STakashi Iwai static int snd_cmipci_mic_in_mode_info(struct snd_kcontrol *kcontrol, 25262cbdb686STakashi Iwai struct snd_ctl_elem_info *uinfo) 252701d25d46STakashi Iwai { 252860c4ce4aSClemens Ladisch static const char *const texts[2] = { "Mic-In", "Center/LFE Output" }; 252960c4ce4aSClemens Ladisch 253060c4ce4aSClemens Ladisch return snd_ctl_enum_info(uinfo, 1, 2, texts); 253101d25d46STakashi Iwai } 253201d25d46STakashi Iwai 25332cbdb686STakashi Iwai static int snd_cmipci_mic_in_mode_get(struct snd_kcontrol *kcontrol, 25342cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 253501d25d46STakashi Iwai { 25362cbdb686STakashi Iwai struct cmipci *cm = snd_kcontrol_chip(kcontrol); 253701d25d46STakashi Iwai /* same bit as spdi_phase */ 253801d25d46STakashi Iwai spin_lock_irq(&cm->reg_lock); 253901d25d46STakashi Iwai ucontrol->value.enumerated.item[0] = 254001d25d46STakashi Iwai (snd_cmipci_read_b(cm, CM_REG_MISC) & CM_SPDIF_INVERSE) ? 1 : 0; 254101d25d46STakashi Iwai spin_unlock_irq(&cm->reg_lock); 254201d25d46STakashi Iwai return 0; 254301d25d46STakashi Iwai } 254401d25d46STakashi Iwai 25452cbdb686STakashi Iwai static int snd_cmipci_mic_in_mode_put(struct snd_kcontrol *kcontrol, 25462cbdb686STakashi Iwai struct snd_ctl_elem_value *ucontrol) 254701d25d46STakashi Iwai { 25482cbdb686STakashi Iwai struct cmipci *cm = snd_kcontrol_chip(kcontrol); 254901d25d46STakashi Iwai int change; 255001d25d46STakashi Iwai 255101d25d46STakashi Iwai spin_lock_irq(&cm->reg_lock); 255201d25d46STakashi Iwai if (ucontrol->value.enumerated.item[0]) 255301d25d46STakashi Iwai change = snd_cmipci_set_bit_b(cm, CM_REG_MISC, CM_SPDIF_INVERSE); 255401d25d46STakashi Iwai else 255501d25d46STakashi Iwai change = snd_cmipci_clear_bit_b(cm, CM_REG_MISC, CM_SPDIF_INVERSE); 255601d25d46STakashi Iwai spin_unlock_irq(&cm->reg_lock); 255701d25d46STakashi Iwai return change; 255801d25d46STakashi Iwai } 255901d25d46STakashi Iwai 25601da177e4SLinus Torvalds /* both for CM8338/8738 */ 2561b4e5e707STakashi Iwai static const struct snd_kcontrol_new snd_cmipci_mixer_switches[] = { 25621da177e4SLinus Torvalds DEFINE_MIXER_SWITCH("Four Channel Mode", fourch), 256301d25d46STakashi Iwai { 256401d25d46STakashi Iwai .name = "Line-In Mode", 256501d25d46STakashi Iwai .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 256601d25d46STakashi Iwai .info = snd_cmipci_line_in_mode_info, 256701d25d46STakashi Iwai .get = snd_cmipci_line_in_mode_get, 256801d25d46STakashi Iwai .put = snd_cmipci_line_in_mode_put, 256901d25d46STakashi Iwai }, 25701da177e4SLinus Torvalds }; 25711da177e4SLinus Torvalds 25721da177e4SLinus Torvalds /* for non-multichannel chips */ 2573b4e5e707STakashi Iwai static const struct snd_kcontrol_new snd_cmipci_nomulti_switch = 25741da177e4SLinus Torvalds DEFINE_MIXER_SWITCH("Exchange DAC", exchange_dac); 25751da177e4SLinus Torvalds 25761da177e4SLinus Torvalds /* only for CM8738 */ 2577b4e5e707STakashi Iwai static const struct snd_kcontrol_new snd_cmipci_8738_mixer_switches[] = { 25781da177e4SLinus Torvalds #if 0 /* controlled in pcm device */ 25791da177e4SLinus Torvalds DEFINE_MIXER_SWITCH("IEC958 In Record", spdif_in), 25801da177e4SLinus Torvalds DEFINE_MIXER_SWITCH("IEC958 Out", spdif_out), 25811da177e4SLinus Torvalds DEFINE_MIXER_SWITCH("IEC958 Out To DAC", spdo2dac), 25821da177e4SLinus Torvalds #endif 25831da177e4SLinus Torvalds // DEFINE_MIXER_SWITCH("IEC958 Output Switch", spdif_enable), 25841da177e4SLinus Torvalds { .name = "IEC958 Output Switch", 25851da177e4SLinus Torvalds .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 25861da177e4SLinus Torvalds .info = snd_cmipci_uswitch_info, 25871da177e4SLinus Torvalds .get = snd_cmipci_spdout_enable_get, 25881da177e4SLinus Torvalds .put = snd_cmipci_spdout_enable_put, 25891da177e4SLinus Torvalds }, 25901da177e4SLinus Torvalds DEFINE_MIXER_SWITCH("IEC958 In Valid", spdi_valid), 25911da177e4SLinus Torvalds DEFINE_MIXER_SWITCH("IEC958 Copyright", spdif_copyright), 25921da177e4SLinus Torvalds DEFINE_MIXER_SWITCH("IEC958 5V", spdo_5v), 25931da177e4SLinus Torvalds // DEFINE_MIXER_SWITCH("IEC958 In/Out 48KHz", spdo_48k), 25941da177e4SLinus Torvalds DEFINE_MIXER_SWITCH("IEC958 Loop", spdif_loop), 25951da177e4SLinus Torvalds DEFINE_MIXER_SWITCH("IEC958 In Monitor", spdi_monitor), 25961da177e4SLinus Torvalds }; 25971da177e4SLinus Torvalds 25981da177e4SLinus Torvalds /* only for model 033/037 */ 2599b4e5e707STakashi Iwai static const struct snd_kcontrol_new snd_cmipci_old_mixer_switches[] = { 26001da177e4SLinus Torvalds DEFINE_MIXER_SWITCH("IEC958 Mix Analog", spdif_dac_out), 26011da177e4SLinus Torvalds DEFINE_MIXER_SWITCH("IEC958 In Phase Inverse", spdi_phase), 26021da177e4SLinus Torvalds DEFINE_MIXER_SWITCH("IEC958 In Select", spdif_in_sel1), 26031da177e4SLinus Torvalds }; 26041da177e4SLinus Torvalds 26051da177e4SLinus Torvalds /* only for model 039 or later */ 2606b4e5e707STakashi Iwai static const struct snd_kcontrol_new snd_cmipci_extra_mixer_switches[] = { 26071da177e4SLinus Torvalds DEFINE_MIXER_SWITCH("IEC958 In Select", spdif_in_sel2), 26081da177e4SLinus Torvalds DEFINE_MIXER_SWITCH("IEC958 In Phase Inverse", spdi_phase2), 260901d25d46STakashi Iwai { 261001d25d46STakashi Iwai .name = "Mic-In Mode", 261101d25d46STakashi Iwai .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 261201d25d46STakashi Iwai .info = snd_cmipci_mic_in_mode_info, 261301d25d46STakashi Iwai .get = snd_cmipci_mic_in_mode_get, 261401d25d46STakashi Iwai .put = snd_cmipci_mic_in_mode_put, 261501d25d46STakashi Iwai } 26161da177e4SLinus Torvalds }; 26171da177e4SLinus Torvalds 26181da177e4SLinus Torvalds /* card control switches */ 2619b4e5e707STakashi Iwai static const struct snd_kcontrol_new snd_cmipci_modem_switch = 262069a07304SClemens Ladisch DEFINE_CARD_SWITCH("Modem", modem); 26211da177e4SLinus Torvalds 26221da177e4SLinus Torvalds 2623e23e7a14SBill Pemberton static int snd_cmipci_mixer_new(struct cmipci *cm, int pcm_spdif_device) 26241da177e4SLinus Torvalds { 26252cbdb686STakashi Iwai struct snd_card *card; 2626b4e5e707STakashi Iwai const struct snd_kcontrol_new *sw; 26272cbdb686STakashi Iwai struct snd_kcontrol *kctl; 26281da177e4SLinus Torvalds unsigned int idx; 26291da177e4SLinus Torvalds int err; 26301da177e4SLinus Torvalds 2631da3cec35STakashi Iwai if (snd_BUG_ON(!cm || !cm->card)) 2632da3cec35STakashi Iwai return -EINVAL; 26331da177e4SLinus Torvalds 26341da177e4SLinus Torvalds card = cm->card; 26351da177e4SLinus Torvalds 26361da177e4SLinus Torvalds strcpy(card->mixername, "CMedia PCI"); 26371da177e4SLinus Torvalds 26381da177e4SLinus Torvalds spin_lock_irq(&cm->reg_lock); 26391da177e4SLinus Torvalds snd_cmipci_mixer_write(cm, 0x00, 0x00); /* mixer reset */ 26401da177e4SLinus Torvalds spin_unlock_irq(&cm->reg_lock); 26411da177e4SLinus Torvalds 26421da177e4SLinus Torvalds for (idx = 0; idx < ARRAY_SIZE(snd_cmipci_mixers); idx++) { 26431da177e4SLinus Torvalds if (cm->chip_version == 68) { // 8768 has no PCM volume 26441da177e4SLinus Torvalds if (!strcmp(snd_cmipci_mixers[idx].name, 26451da177e4SLinus Torvalds "PCM Playback Volume")) 26461da177e4SLinus Torvalds continue; 26471da177e4SLinus Torvalds } 264843795882STakashi Iwai err = snd_ctl_add(card, snd_ctl_new1(&snd_cmipci_mixers[idx], cm)); 264943795882STakashi Iwai if (err < 0) 26501da177e4SLinus Torvalds return err; 26511da177e4SLinus Torvalds } 26521da177e4SLinus Torvalds 26531da177e4SLinus Torvalds /* mixer switches */ 26541da177e4SLinus Torvalds sw = snd_cmipci_mixer_switches; 26551da177e4SLinus Torvalds for (idx = 0; idx < ARRAY_SIZE(snd_cmipci_mixer_switches); idx++, sw++) { 26561da177e4SLinus Torvalds err = snd_ctl_add(cm->card, snd_ctl_new1(sw, cm)); 26571da177e4SLinus Torvalds if (err < 0) 26581da177e4SLinus Torvalds return err; 26591da177e4SLinus Torvalds } 26601da177e4SLinus Torvalds if (! cm->can_multi_ch) { 26611da177e4SLinus Torvalds err = snd_ctl_add(cm->card, snd_ctl_new1(&snd_cmipci_nomulti_switch, cm)); 26621da177e4SLinus Torvalds if (err < 0) 26631da177e4SLinus Torvalds return err; 26641da177e4SLinus Torvalds } 26651da177e4SLinus Torvalds if (cm->device == PCI_DEVICE_ID_CMEDIA_CM8738 || 26661da177e4SLinus Torvalds cm->device == PCI_DEVICE_ID_CMEDIA_CM8738B) { 26671da177e4SLinus Torvalds sw = snd_cmipci_8738_mixer_switches; 26681da177e4SLinus Torvalds for (idx = 0; idx < ARRAY_SIZE(snd_cmipci_8738_mixer_switches); idx++, sw++) { 26691da177e4SLinus Torvalds err = snd_ctl_add(cm->card, snd_ctl_new1(sw, cm)); 26701da177e4SLinus Torvalds if (err < 0) 26711da177e4SLinus Torvalds return err; 26721da177e4SLinus Torvalds } 26731da177e4SLinus Torvalds if (cm->can_ac3_hw) { 267443795882STakashi Iwai kctl = snd_ctl_new1(&snd_cmipci_spdif_default, cm); 2675f2f312adSTakashi Iwai kctl->id.device = pcm_spdif_device; 267643795882STakashi Iwai err = snd_ctl_add(card, kctl); 267743795882STakashi Iwai if (err < 0) 26781da177e4SLinus Torvalds return err; 267943795882STakashi Iwai kctl = snd_ctl_new1(&snd_cmipci_spdif_mask, cm); 2680f2f312adSTakashi Iwai kctl->id.device = pcm_spdif_device; 268143795882STakashi Iwai err = snd_ctl_add(card, kctl); 268243795882STakashi Iwai if (err < 0) 26831da177e4SLinus Torvalds return err; 268443795882STakashi Iwai kctl = snd_ctl_new1(&snd_cmipci_spdif_stream, cm); 2685f2f312adSTakashi Iwai kctl->id.device = pcm_spdif_device; 268643795882STakashi Iwai err = snd_ctl_add(card, kctl); 268743795882STakashi Iwai if (err < 0) 26881da177e4SLinus Torvalds return err; 26891da177e4SLinus Torvalds } 26901da177e4SLinus Torvalds if (cm->chip_version <= 37) { 26911da177e4SLinus Torvalds sw = snd_cmipci_old_mixer_switches; 26921da177e4SLinus Torvalds for (idx = 0; idx < ARRAY_SIZE(snd_cmipci_old_mixer_switches); idx++, sw++) { 26931da177e4SLinus Torvalds err = snd_ctl_add(cm->card, snd_ctl_new1(sw, cm)); 26941da177e4SLinus Torvalds if (err < 0) 26951da177e4SLinus Torvalds return err; 26961da177e4SLinus Torvalds } 26971da177e4SLinus Torvalds } 26981da177e4SLinus Torvalds } 26991da177e4SLinus Torvalds if (cm->chip_version >= 39) { 27001da177e4SLinus Torvalds sw = snd_cmipci_extra_mixer_switches; 27011da177e4SLinus Torvalds for (idx = 0; idx < ARRAY_SIZE(snd_cmipci_extra_mixer_switches); idx++, sw++) { 27021da177e4SLinus Torvalds err = snd_ctl_add(cm->card, snd_ctl_new1(sw, cm)); 27031da177e4SLinus Torvalds if (err < 0) 27041da177e4SLinus Torvalds return err; 27051da177e4SLinus Torvalds } 27061da177e4SLinus Torvalds } 27071da177e4SLinus Torvalds 27081da177e4SLinus Torvalds /* card switches */ 270925543fa7SClemens Ladisch /* 271025543fa7SClemens Ladisch * newer chips don't have the register bits to force modem link 271125543fa7SClemens Ladisch * detection; the bit that was FLINKON now mutes CH1 271225543fa7SClemens Ladisch */ 271369a07304SClemens Ladisch if (cm->chip_version < 39) { 271469a07304SClemens Ladisch err = snd_ctl_add(cm->card, 271569a07304SClemens Ladisch snd_ctl_new1(&snd_cmipci_modem_switch, cm)); 27161da177e4SLinus Torvalds if (err < 0) 27171da177e4SLinus Torvalds return err; 27181da177e4SLinus Torvalds } 27191da177e4SLinus Torvalds 27201da177e4SLinus Torvalds for (idx = 0; idx < CM_SAVED_MIXERS; idx++) { 27212cbdb686STakashi Iwai struct snd_kcontrol *ctl; 2722b6ba0aa4STakashi Iwai ctl = snd_ctl_find_id_mixer(cm->card, cm_saved_mixer[idx].name); 27237dfa31edSHarvey Harrison if (ctl) 27241da177e4SLinus Torvalds cm->mixer_res_ctl[idx] = ctl; 27251da177e4SLinus Torvalds } 27261da177e4SLinus Torvalds 27271da177e4SLinus Torvalds return 0; 27281da177e4SLinus Torvalds } 27291da177e4SLinus Torvalds 27301da177e4SLinus Torvalds 27311da177e4SLinus Torvalds /* 27321da177e4SLinus Torvalds * proc interface 27331da177e4SLinus Torvalds */ 27341da177e4SLinus Torvalds 27352cbdb686STakashi Iwai static void snd_cmipci_proc_read(struct snd_info_entry *entry, 27362cbdb686STakashi Iwai struct snd_info_buffer *buffer) 27371da177e4SLinus Torvalds { 27382cbdb686STakashi Iwai struct cmipci *cm = entry->private_data; 273954d030ccSClemens Ladisch int i, v; 27401da177e4SLinus Torvalds 274154d030ccSClemens Ladisch snd_iprintf(buffer, "%s\n", cm->card->longname); 274254d030ccSClemens Ladisch for (i = 0; i < 0x94; i++) { 274354d030ccSClemens Ladisch if (i == 0x28) 274454d030ccSClemens Ladisch i = 0x90; 274554d030ccSClemens Ladisch v = inb(cm->iobase + i); 27461da177e4SLinus Torvalds if (i % 4 == 0) 274754d030ccSClemens Ladisch snd_iprintf(buffer, "\n%02x:", i); 27481da177e4SLinus Torvalds snd_iprintf(buffer, " %02x", v); 27491da177e4SLinus Torvalds } 275054d030ccSClemens Ladisch snd_iprintf(buffer, "\n"); 27511da177e4SLinus Torvalds } 27521da177e4SLinus Torvalds 2753e23e7a14SBill Pemberton static void snd_cmipci_proc_init(struct cmipci *cm) 27541da177e4SLinus Torvalds { 275547f2769bSTakashi Iwai snd_card_ro_proc_new(cm->card, "cmipci", cm, snd_cmipci_proc_read); 27561da177e4SLinus Torvalds } 27571da177e4SLinus Torvalds 27589baa3c34SBenoit Taine static const struct pci_device_id snd_cmipci_ids[] = { 275928d27aaeSJoe Perches {PCI_VDEVICE(CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8338A), 0}, 276028d27aaeSJoe Perches {PCI_VDEVICE(CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8338B), 0}, 276128d27aaeSJoe Perches {PCI_VDEVICE(CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8738), 0}, 276228d27aaeSJoe Perches {PCI_VDEVICE(CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8738B), 0}, 276328d27aaeSJoe Perches {PCI_VDEVICE(AL, PCI_DEVICE_ID_CMEDIA_CM8738), 0}, 27641da177e4SLinus Torvalds {0,}, 27651da177e4SLinus Torvalds }; 27661da177e4SLinus Torvalds 27671da177e4SLinus Torvalds 27681da177e4SLinus Torvalds /* 27691da177e4SLinus Torvalds * check chip version and capabilities 27701da177e4SLinus Torvalds * driver name is modified according to the chip model 27711da177e4SLinus Torvalds */ 2772e23e7a14SBill Pemberton static void query_chip(struct cmipci *cm) 27731da177e4SLinus Torvalds { 27741da177e4SLinus Torvalds unsigned int detect; 27751da177e4SLinus Torvalds 27761da177e4SLinus Torvalds /* check reg 0Ch, bit 24-31 */ 27771da177e4SLinus Torvalds detect = snd_cmipci_read(cm, CM_REG_INT_HLDCLR) & CM_CHIP_MASK2; 27781da177e4SLinus Torvalds if (! detect) { 27791da177e4SLinus Torvalds /* check reg 08h, bit 24-28 */ 27801da177e4SLinus Torvalds detect = snd_cmipci_read(cm, CM_REG_CHFORMAT) & CM_CHIP_MASK1; 2781133271feSClemens Ladisch switch (detect) { 2782133271feSClemens Ladisch case 0: 27831da177e4SLinus Torvalds cm->chip_version = 33; 27841da177e4SLinus Torvalds if (cm->do_soft_ac3) 27851da177e4SLinus Torvalds cm->can_ac3_sw = 1; 27861da177e4SLinus Torvalds else 27871da177e4SLinus Torvalds cm->can_ac3_hw = 1; 2788133271feSClemens Ladisch break; 27896935e688SClemens Ladisch case CM_CHIP_037: 27901da177e4SLinus Torvalds cm->chip_version = 37; 27911da177e4SLinus Torvalds cm->can_ac3_hw = 1; 2792133271feSClemens Ladisch break; 2793133271feSClemens Ladisch default: 2794133271feSClemens Ladisch cm->chip_version = 39; 2795133271feSClemens Ladisch cm->can_ac3_hw = 1; 2796133271feSClemens Ladisch break; 27971da177e4SLinus Torvalds } 2798133271feSClemens Ladisch cm->max_channels = 2; 27991da177e4SLinus Torvalds } else { 2800133271feSClemens Ladisch if (detect & CM_CHIP_039) { 28011da177e4SLinus Torvalds cm->chip_version = 39; 28021da177e4SLinus Torvalds if (detect & CM_CHIP_039_6CH) /* 4 or 6 channels */ 28031da177e4SLinus Torvalds cm->max_channels = 6; 28041da177e4SLinus Torvalds else 28051da177e4SLinus Torvalds cm->max_channels = 4; 2806133271feSClemens Ladisch } else if (detect & CM_CHIP_8768) { 2807133271feSClemens Ladisch cm->chip_version = 68; 2808133271feSClemens Ladisch cm->max_channels = 8; 2809755c48abSTimofei Bondarenko cm->can_96k = 1; 2810133271feSClemens Ladisch } else { 2811133271feSClemens Ladisch cm->chip_version = 55; 2812133271feSClemens Ladisch cm->max_channels = 6; 2813755c48abSTimofei Bondarenko cm->can_96k = 1; 2814133271feSClemens Ladisch } 28151da177e4SLinus Torvalds cm->can_ac3_hw = 1; 28161da177e4SLinus Torvalds cm->can_multi_ch = 1; 28171da177e4SLinus Torvalds } 28181da177e4SLinus Torvalds } 28191da177e4SLinus Torvalds 28201da177e4SLinus Torvalds #ifdef SUPPORT_JOYSTICK 2821e23e7a14SBill Pemberton static int snd_cmipci_create_gameport(struct cmipci *cm, int dev) 28221da177e4SLinus Torvalds { 28235f3aca10STakashi Iwai static const int ports[] = { 0x201, 0x200, 0 }; /* FIXME: majority is 0x201? */ 28241da177e4SLinus Torvalds struct gameport *gp; 28251da177e4SLinus Torvalds struct resource *r = NULL; 28261da177e4SLinus Torvalds int i, io_port = 0; 28271da177e4SLinus Torvalds 28281da177e4SLinus Torvalds if (joystick_port[dev] == 0) 28291da177e4SLinus Torvalds return -ENODEV; 28301da177e4SLinus Torvalds 28311da177e4SLinus Torvalds if (joystick_port[dev] == 1) { /* auto-detect */ 28321da177e4SLinus Torvalds for (i = 0; ports[i]; i++) { 28331da177e4SLinus Torvalds io_port = ports[i]; 283487e082adSTakashi Iwai r = devm_request_region(&cm->pci->dev, io_port, 1, 283587e082adSTakashi Iwai "CMIPCI gameport"); 28361da177e4SLinus Torvalds if (r) 28371da177e4SLinus Torvalds break; 28381da177e4SLinus Torvalds } 28391da177e4SLinus Torvalds } else { 28401da177e4SLinus Torvalds io_port = joystick_port[dev]; 284187e082adSTakashi Iwai r = devm_request_region(&cm->pci->dev, io_port, 1, 284287e082adSTakashi Iwai "CMIPCI gameport"); 28431da177e4SLinus Torvalds } 28441da177e4SLinus Torvalds 28451da177e4SLinus Torvalds if (!r) { 284640175bdbSTakashi Iwai dev_warn(cm->card->dev, "cannot reserve joystick ports\n"); 28471da177e4SLinus Torvalds return -EBUSY; 28481da177e4SLinus Torvalds } 28491da177e4SLinus Torvalds 28501da177e4SLinus Torvalds cm->gameport = gp = gameport_allocate_port(); 28511da177e4SLinus Torvalds if (!gp) { 285240175bdbSTakashi Iwai dev_err(cm->card->dev, "cannot allocate memory for gameport\n"); 28531da177e4SLinus Torvalds return -ENOMEM; 28541da177e4SLinus Torvalds } 28551da177e4SLinus Torvalds gameport_set_name(gp, "C-Media Gameport"); 28561da177e4SLinus Torvalds gameport_set_phys(gp, "pci%s/gameport0", pci_name(cm->pci)); 28571da177e4SLinus Torvalds gameport_set_dev_parent(gp, &cm->pci->dev); 28581da177e4SLinus Torvalds gp->io = io_port; 28591da177e4SLinus Torvalds 28601da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_FUNCTRL1, CM_JYSTK_EN); 28611da177e4SLinus Torvalds 28621da177e4SLinus Torvalds gameport_register_port(cm->gameport); 28631da177e4SLinus Torvalds 28641da177e4SLinus Torvalds return 0; 28651da177e4SLinus Torvalds } 28661da177e4SLinus Torvalds 28672cbdb686STakashi Iwai static void snd_cmipci_free_gameport(struct cmipci *cm) 28681da177e4SLinus Torvalds { 28691da177e4SLinus Torvalds if (cm->gameport) { 28701da177e4SLinus Torvalds gameport_unregister_port(cm->gameport); 28711da177e4SLinus Torvalds cm->gameport = NULL; 28721da177e4SLinus Torvalds 28731da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_FUNCTRL1, CM_JYSTK_EN); 28741da177e4SLinus Torvalds } 28751da177e4SLinus Torvalds } 28761da177e4SLinus Torvalds #else 28772cbdb686STakashi Iwai static inline int snd_cmipci_create_gameport(struct cmipci *cm, int dev) { return -ENOSYS; } 28782cbdb686STakashi Iwai static inline void snd_cmipci_free_gameport(struct cmipci *cm) { } 28791da177e4SLinus Torvalds #endif 28801da177e4SLinus Torvalds 288187e082adSTakashi Iwai static void snd_cmipci_free(struct snd_card *card) 28821da177e4SLinus Torvalds { 288387e082adSTakashi Iwai struct cmipci *cm = card->private_data; 288487e082adSTakashi Iwai 28851da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_FM_EN); 28861da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_LEGACY_CTRL, CM_ENSPDOUT); 28871da177e4SLinus Torvalds snd_cmipci_write(cm, CM_REG_INT_HLDCLR, 0); /* disable ints */ 28881da177e4SLinus Torvalds snd_cmipci_ch_reset(cm, CM_CH_PLAY); 28891da177e4SLinus Torvalds snd_cmipci_ch_reset(cm, CM_CH_CAPT); 28901da177e4SLinus Torvalds snd_cmipci_write(cm, CM_REG_FUNCTRL0, 0); /* disable channels */ 28911da177e4SLinus Torvalds snd_cmipci_write(cm, CM_REG_FUNCTRL1, 0); 28921da177e4SLinus Torvalds 28931da177e4SLinus Torvalds /* reset mixer */ 28941da177e4SLinus Torvalds snd_cmipci_mixer_write(cm, 0, 0); 28951da177e4SLinus Torvalds 28961da177e4SLinus Torvalds snd_cmipci_free_gameport(cm); 28971da177e4SLinus Torvalds } 28981da177e4SLinus Torvalds 2899e23e7a14SBill Pemberton static int snd_cmipci_create_fm(struct cmipci *cm, long fm_port) 29005747e540SClemens Ladisch { 29015747e540SClemens Ladisch long iosynth; 29025747e540SClemens Ladisch unsigned int val; 29032cbdb686STakashi Iwai struct snd_opl3 *opl3; 29045747e540SClemens Ladisch int err; 29055747e540SClemens Ladisch 29062f24d159STakashi Iwai if (!fm_port) 29072f24d159STakashi Iwai goto disable_fm; 29082f24d159STakashi Iwai 2909c78c950dSClemens Ladisch if (cm->chip_version >= 39) { 29105747e540SClemens Ladisch /* first try FM regs in PCI port range */ 29115747e540SClemens Ladisch iosynth = cm->iobase + CM_REG_FM_PCI; 29125747e540SClemens Ladisch err = snd_opl3_create(cm->card, iosynth, iosynth + 2, 29135747e540SClemens Ladisch OPL3_HW_OPL3, 1, &opl3); 291445c41b48SClemens Ladisch } else { 291545c41b48SClemens Ladisch err = -EIO; 291645c41b48SClemens Ladisch } 29175747e540SClemens Ladisch if (err < 0) { 29185747e540SClemens Ladisch /* then try legacy ports */ 29195747e540SClemens Ladisch val = snd_cmipci_read(cm, CM_REG_LEGACY_CTRL) & ~CM_FMSEL_MASK; 29205747e540SClemens Ladisch iosynth = fm_port; 29215747e540SClemens Ladisch switch (iosynth) { 29225747e540SClemens Ladisch case 0x3E8: val |= CM_FMSEL_3E8; break; 29235747e540SClemens Ladisch case 0x3E0: val |= CM_FMSEL_3E0; break; 29245747e540SClemens Ladisch case 0x3C8: val |= CM_FMSEL_3C8; break; 29255747e540SClemens Ladisch case 0x388: val |= CM_FMSEL_388; break; 29265747e540SClemens Ladisch default: 29272f24d159STakashi Iwai goto disable_fm; 29285747e540SClemens Ladisch } 29295747e540SClemens Ladisch snd_cmipci_write(cm, CM_REG_LEGACY_CTRL, val); 29305747e540SClemens Ladisch /* enable FM */ 29315747e540SClemens Ladisch snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_FM_EN); 29325747e540SClemens Ladisch 29335747e540SClemens Ladisch if (snd_opl3_create(cm->card, iosynth, iosynth + 2, 29345747e540SClemens Ladisch OPL3_HW_OPL3, 0, &opl3) < 0) { 293540175bdbSTakashi Iwai dev_err(cm->card->dev, 293640175bdbSTakashi Iwai "no OPL device at %#lx, skipping...\n", 293740175bdbSTakashi Iwai iosynth); 29382f24d159STakashi Iwai goto disable_fm; 29395747e540SClemens Ladisch } 29405747e540SClemens Ladisch } 294143795882STakashi Iwai err = snd_opl3_hwdep_new(opl3, 0, 1, NULL); 294243795882STakashi Iwai if (err < 0) { 294340175bdbSTakashi Iwai dev_err(cm->card->dev, "cannot create OPL3 hwdep\n"); 29445747e540SClemens Ladisch return err; 29455747e540SClemens Ladisch } 29465747e540SClemens Ladisch return 0; 29472f24d159STakashi Iwai 29482f24d159STakashi Iwai disable_fm: 29492f24d159STakashi Iwai snd_cmipci_clear_bit(cm, CM_REG_LEGACY_CTRL, CM_FMSEL_MASK); 29502f24d159STakashi Iwai snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_FM_EN); 29512f24d159STakashi Iwai return 0; 29525747e540SClemens Ladisch } 29535747e540SClemens Ladisch 2954e23e7a14SBill Pemberton static int snd_cmipci_create(struct snd_card *card, struct pci_dev *pci, 295587e082adSTakashi Iwai int dev) 29561da177e4SLinus Torvalds { 295787e082adSTakashi Iwai struct cmipci *cm = card->private_data; 29581da177e4SLinus Torvalds int err; 2959d6426257SClemens Ladisch unsigned int val; 2960395a434eSSubrata Modak long iomidi = 0; 2961c9116ae4SClemens Ladisch int integrated_midi = 0; 2962b7e054a7SClemens Ladisch char modelstr[16]; 29631da177e4SLinus Torvalds int pcm_index, pcm_spdif_index; 29649baa3c34SBenoit Taine static const struct pci_device_id intel_82437vx[] = { 29651da177e4SLinus Torvalds { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437VX) }, 29661da177e4SLinus Torvalds { }, 29671da177e4SLinus Torvalds }; 29681da177e4SLinus Torvalds 296987e082adSTakashi Iwai err = pcim_enable_device(pci); 297043795882STakashi Iwai if (err < 0) 29711da177e4SLinus Torvalds return err; 29721da177e4SLinus Torvalds 29731da177e4SLinus Torvalds spin_lock_init(&cm->reg_lock); 297462932df8SIngo Molnar mutex_init(&cm->open_mutex); 29751da177e4SLinus Torvalds cm->device = pci->device; 29761da177e4SLinus Torvalds cm->card = card; 29771da177e4SLinus Torvalds cm->pci = pci; 29781da177e4SLinus Torvalds cm->irq = -1; 29791da177e4SLinus Torvalds cm->channel[0].ch = 0; 29801da177e4SLinus Torvalds cm->channel[1].ch = 1; 29811da177e4SLinus Torvalds cm->channel[0].is_dac = cm->channel[1].is_dac = 1; /* dual DAC mode */ 29821da177e4SLinus Torvalds 298343795882STakashi Iwai err = pci_request_regions(pci, card->driver); 298487e082adSTakashi Iwai if (err < 0) 29851da177e4SLinus Torvalds return err; 29861da177e4SLinus Torvalds cm->iobase = pci_resource_start(pci, 0); 29871da177e4SLinus Torvalds 298887e082adSTakashi Iwai if (devm_request_irq(&pci->dev, pci->irq, snd_cmipci_interrupt, 2989934c2b6dSTakashi Iwai IRQF_SHARED, KBUILD_MODNAME, cm)) { 299040175bdbSTakashi Iwai dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); 29911da177e4SLinus Torvalds return -EBUSY; 29921da177e4SLinus Torvalds } 29931da177e4SLinus Torvalds cm->irq = pci->irq; 29943663984eSTakashi Iwai card->sync_irq = cm->irq; 299587e082adSTakashi Iwai card->private_free = snd_cmipci_free; 29961da177e4SLinus Torvalds 29971da177e4SLinus Torvalds pci_set_master(cm->pci); 29981da177e4SLinus Torvalds 29991da177e4SLinus Torvalds /* 30001da177e4SLinus Torvalds * check chip version, max channels and capabilities 30011da177e4SLinus Torvalds */ 30021da177e4SLinus Torvalds 30031da177e4SLinus Torvalds cm->chip_version = 0; 30041da177e4SLinus Torvalds cm->max_channels = 2; 30051da177e4SLinus Torvalds cm->do_soft_ac3 = soft_ac3[dev]; 30061da177e4SLinus Torvalds 30071da177e4SLinus Torvalds if (pci->device != PCI_DEVICE_ID_CMEDIA_CM8338A && 30081da177e4SLinus Torvalds pci->device != PCI_DEVICE_ID_CMEDIA_CM8338B) 30091da177e4SLinus Torvalds query_chip(cm); 30101da177e4SLinus Torvalds /* added -MCx suffix for chip supporting multi-channels */ 30111da177e4SLinus Torvalds if (cm->can_multi_ch) 30121da177e4SLinus Torvalds sprintf(cm->card->driver + strlen(cm->card->driver), 30131da177e4SLinus Torvalds "-MC%d", cm->max_channels); 30141da177e4SLinus Torvalds else if (cm->can_ac3_sw) 30151da177e4SLinus Torvalds strcpy(cm->card->driver + strlen(cm->card->driver), "-SWIEC"); 30161da177e4SLinus Torvalds 30171da177e4SLinus Torvalds cm->dig_status = SNDRV_PCM_DEFAULT_CON_SPDIF; 30181da177e4SLinus Torvalds cm->dig_pcm_status = SNDRV_PCM_DEFAULT_CON_SPDIF; 30191da177e4SLinus Torvalds 30201da177e4SLinus Torvalds #if CM_CH_PLAY == 1 30211da177e4SLinus Torvalds cm->ctrl = CM_CHADC0; /* default FUNCNTRL0 */ 30221da177e4SLinus Torvalds #else 30231da177e4SLinus Torvalds cm->ctrl = CM_CHADC1; /* default FUNCNTRL0 */ 30241da177e4SLinus Torvalds #endif 30251da177e4SLinus Torvalds 30261da177e4SLinus Torvalds /* initialize codec registers */ 30273042ef75SClemens Ladisch snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_RESET); 30283042ef75SClemens Ladisch snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_RESET); 30291da177e4SLinus Torvalds snd_cmipci_write(cm, CM_REG_INT_HLDCLR, 0); /* disable ints */ 30301da177e4SLinus Torvalds snd_cmipci_ch_reset(cm, CM_CH_PLAY); 30311da177e4SLinus Torvalds snd_cmipci_ch_reset(cm, CM_CH_CAPT); 30321da177e4SLinus Torvalds snd_cmipci_write(cm, CM_REG_FUNCTRL0, 0); /* disable channels */ 30331da177e4SLinus Torvalds snd_cmipci_write(cm, CM_REG_FUNCTRL1, 0); 30341da177e4SLinus Torvalds 30351da177e4SLinus Torvalds snd_cmipci_write(cm, CM_REG_CHFORMAT, 0); 30361da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_ENDBDAC|CM_N4SPK3D); 30371da177e4SLinus Torvalds #if CM_CH_PLAY == 1 30381da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC); 30391da177e4SLinus Torvalds #else 30401da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC); 30411da177e4SLinus Torvalds #endif 30424ee72717SClemens Ladisch if (cm->chip_version) { 30434ee72717SClemens Ladisch snd_cmipci_write_b(cm, CM_REG_EXT_MISC, 0x20); /* magic */ 30444ee72717SClemens Ladisch snd_cmipci_write_b(cm, CM_REG_EXT_MISC + 1, 0x09); /* more magic */ 30454ee72717SClemens Ladisch } 30461da177e4SLinus Torvalds /* Set Bus Master Request */ 30471da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_FUNCTRL1, CM_BREQ); 30481da177e4SLinus Torvalds 30491da177e4SLinus Torvalds /* Assume TX and compatible chip set (Autodetection required for VX chip sets) */ 30501da177e4SLinus Torvalds switch (pci->device) { 30511da177e4SLinus Torvalds case PCI_DEVICE_ID_CMEDIA_CM8738: 30521da177e4SLinus Torvalds case PCI_DEVICE_ID_CMEDIA_CM8738B: 30531da177e4SLinus Torvalds if (!pci_dev_present(intel_82437vx)) 30541da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_TXVX); 30551da177e4SLinus Torvalds break; 30561da177e4SLinus Torvalds default: 30571da177e4SLinus Torvalds break; 30581da177e4SLinus Torvalds } 30591da177e4SLinus Torvalds 3060d6426257SClemens Ladisch if (cm->chip_version < 68) { 3061d6426257SClemens Ladisch val = pci->device < 0x110 ? 8338 : 8738; 3062d6426257SClemens Ladisch } else { 3063d6426257SClemens Ladisch switch (snd_cmipci_read_b(cm, CM_REG_INT_HLDCLR + 3) & 0x03) { 3064d6426257SClemens Ladisch case 0: 3065d6426257SClemens Ladisch val = 8769; 3066d6426257SClemens Ladisch break; 3067d6426257SClemens Ladisch case 2: 3068d6426257SClemens Ladisch val = 8762; 3069d6426257SClemens Ladisch break; 3070d6426257SClemens Ladisch default: 3071d6426257SClemens Ladisch switch ((pci->subsystem_vendor << 16) | 3072d6426257SClemens Ladisch pci->subsystem_device) { 3073d6426257SClemens Ladisch case 0x13f69761: 3074d6426257SClemens Ladisch case 0x584d3741: 3075d6426257SClemens Ladisch case 0x584d3751: 3076d6426257SClemens Ladisch case 0x584d3761: 3077d6426257SClemens Ladisch case 0x584d3771: 3078d6426257SClemens Ladisch case 0x72848384: 3079d6426257SClemens Ladisch val = 8770; 3080d6426257SClemens Ladisch break; 3081d6426257SClemens Ladisch default: 3082d6426257SClemens Ladisch val = 8768; 3083d6426257SClemens Ladisch break; 3084d6426257SClemens Ladisch } 3085d6426257SClemens Ladisch } 3086d6426257SClemens Ladisch } 3087b7e054a7SClemens Ladisch sprintf(card->shortname, "C-Media CMI%d", val); 3088b7e054a7SClemens Ladisch if (cm->chip_version < 68) 308928329936STakashi Iwai scnprintf(modelstr, sizeof(modelstr), 309028329936STakashi Iwai " (model %d)", cm->chip_version); 3091b7e054a7SClemens Ladisch else 3092b7e054a7SClemens Ladisch modelstr[0] = '\0'; 309328329936STakashi Iwai scnprintf(card->longname, sizeof(card->longname), 309428329936STakashi Iwai "%s%s at %#lx, irq %i", 3095b7e054a7SClemens Ladisch card->shortname, modelstr, cm->iobase, cm->irq); 30961e02d6eaSClemens Ladisch 3097c78c950dSClemens Ladisch if (cm->chip_version >= 39) { 3098c9116ae4SClemens Ladisch val = snd_cmipci_read_b(cm, CM_REG_MPU_PCI + 1); 3099c9116ae4SClemens Ladisch if (val != 0x00 && val != 0xff) { 3100d8cac620STakashi Iwai if (mpu_port[dev]) 31015747e540SClemens Ladisch iomidi = cm->iobase + CM_REG_MPU_PCI; 3102c9116ae4SClemens Ladisch integrated_midi = 1; 3103c9116ae4SClemens Ladisch } 3104c9116ae4SClemens Ladisch } 3105c9116ae4SClemens Ladisch if (!integrated_midi) { 3106c78c950dSClemens Ladisch val = 0; 31075747e540SClemens Ladisch iomidi = mpu_port[dev]; 31081da177e4SLinus Torvalds switch (iomidi) { 31091da177e4SLinus Torvalds case 0x320: val = CM_VMPU_320; break; 31101da177e4SLinus Torvalds case 0x310: val = CM_VMPU_310; break; 31111da177e4SLinus Torvalds case 0x300: val = CM_VMPU_300; break; 31121da177e4SLinus Torvalds case 0x330: val = CM_VMPU_330; break; 31131da177e4SLinus Torvalds default: 31141da177e4SLinus Torvalds iomidi = 0; break; 31151da177e4SLinus Torvalds } 31161da177e4SLinus Torvalds if (iomidi > 0) { 31171da177e4SLinus Torvalds snd_cmipci_write(cm, CM_REG_LEGACY_CTRL, val); 31181da177e4SLinus Torvalds /* enable UART */ 31191da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_FUNCTRL1, CM_UART_EN); 312088039815SClemens Ladisch if (inb(iomidi + 1) == 0xff) { 312140175bdbSTakashi Iwai dev_err(cm->card->dev, 312240175bdbSTakashi Iwai "cannot enable MPU-401 port at %#lx\n", 312340175bdbSTakashi Iwai iomidi); 312488039815SClemens Ladisch snd_cmipci_clear_bit(cm, CM_REG_FUNCTRL1, 312588039815SClemens Ladisch CM_UART_EN); 312688039815SClemens Ladisch iomidi = 0; 312788039815SClemens Ladisch } 31281da177e4SLinus Torvalds } 31291da177e4SLinus Torvalds } 31301da177e4SLinus Torvalds 313145c41b48SClemens Ladisch if (cm->chip_version < 68) { 313245c41b48SClemens Ladisch err = snd_cmipci_create_fm(cm, fm_port[dev]); 313345c41b48SClemens Ladisch if (err < 0) 31341da177e4SLinus Torvalds return err; 313545c41b48SClemens Ladisch } 31361da177e4SLinus Torvalds 31371da177e4SLinus Torvalds /* reset mixer */ 31381da177e4SLinus Torvalds snd_cmipci_mixer_write(cm, 0, 0); 31391da177e4SLinus Torvalds 31401da177e4SLinus Torvalds snd_cmipci_proc_init(cm); 31411da177e4SLinus Torvalds 31421da177e4SLinus Torvalds /* create pcm devices */ 31431da177e4SLinus Torvalds pcm_index = pcm_spdif_index = 0; 314443795882STakashi Iwai err = snd_cmipci_pcm_new(cm, pcm_index); 314543795882STakashi Iwai if (err < 0) 31461da177e4SLinus Torvalds return err; 31471da177e4SLinus Torvalds pcm_index++; 314843795882STakashi Iwai err = snd_cmipci_pcm2_new(cm, pcm_index); 314943795882STakashi Iwai if (err < 0) 31501da177e4SLinus Torvalds return err; 31511da177e4SLinus Torvalds pcm_index++; 31521da177e4SLinus Torvalds if (cm->can_ac3_hw || cm->can_ac3_sw) { 31531da177e4SLinus Torvalds pcm_spdif_index = pcm_index; 315443795882STakashi Iwai err = snd_cmipci_pcm_spdif_new(cm, pcm_index); 315543795882STakashi Iwai if (err < 0) 31561da177e4SLinus Torvalds return err; 31571da177e4SLinus Torvalds } 31581da177e4SLinus Torvalds 31591da177e4SLinus Torvalds /* create mixer interface & switches */ 316043795882STakashi Iwai err = snd_cmipci_mixer_new(cm, pcm_spdif_index); 316143795882STakashi Iwai if (err < 0) 31621da177e4SLinus Torvalds return err; 31631da177e4SLinus Torvalds 31641da177e4SLinus Torvalds if (iomidi > 0) { 316543795882STakashi Iwai err = snd_mpu401_uart_new(card, 0, MPU401_HW_CMIPCI, 3166302e4c2fSTakashi Iwai iomidi, 3167302e4c2fSTakashi Iwai (integrated_midi ? 3168dba8b469SClemens Ladisch MPU401_INFO_INTEGRATED : 0) | 3169dba8b469SClemens Ladisch MPU401_INFO_IRQ_HOOK, 317043795882STakashi Iwai -1, &cm->rmidi); 317143795882STakashi Iwai if (err < 0) 317240175bdbSTakashi Iwai dev_err(cm->card->dev, 317340175bdbSTakashi Iwai "no UART401 device at 0x%lx\n", iomidi); 31741da177e4SLinus Torvalds } 31751da177e4SLinus Torvalds 31761da177e4SLinus Torvalds #ifdef USE_VAR48KRATE 31771da177e4SLinus Torvalds for (val = 0; val < ARRAY_SIZE(rates); val++) 31781da177e4SLinus Torvalds snd_cmipci_set_pll(cm, rates[val], val); 31791da177e4SLinus Torvalds 31801da177e4SLinus Torvalds /* 31811da177e4SLinus Torvalds * (Re-)Enable external switch spdo_48k 31821da177e4SLinus Torvalds */ 31831da177e4SLinus Torvalds snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_SPDIF48K|CM_SPDF_AC97); 31841da177e4SLinus Torvalds #endif /* USE_VAR48KRATE */ 31851da177e4SLinus Torvalds 31861da177e4SLinus Torvalds if (snd_cmipci_create_gameport(cm, dev) < 0) 31871da177e4SLinus Torvalds snd_cmipci_clear_bit(cm, CM_REG_FUNCTRL1, CM_JYSTK_EN); 31881da177e4SLinus Torvalds 31891da177e4SLinus Torvalds return 0; 31901da177e4SLinus Torvalds } 31911da177e4SLinus Torvalds 31921da177e4SLinus Torvalds /* 31931da177e4SLinus Torvalds */ 31941da177e4SLinus Torvalds 31951da177e4SLinus Torvalds MODULE_DEVICE_TABLE(pci, snd_cmipci_ids); 31961da177e4SLinus Torvalds 3197e23e7a14SBill Pemberton static int snd_cmipci_probe(struct pci_dev *pci, 31981da177e4SLinus Torvalds const struct pci_device_id *pci_id) 31991da177e4SLinus Torvalds { 32001da177e4SLinus Torvalds static int dev; 32012cbdb686STakashi Iwai struct snd_card *card; 32021da177e4SLinus Torvalds int err; 32031da177e4SLinus Torvalds 32041da177e4SLinus Torvalds if (dev >= SNDRV_CARDS) 32051da177e4SLinus Torvalds return -ENODEV; 32061da177e4SLinus Torvalds if (! enable[dev]) { 32071da177e4SLinus Torvalds dev++; 32081da177e4SLinus Torvalds return -ENOENT; 32091da177e4SLinus Torvalds } 32101da177e4SLinus Torvalds 321187e082adSTakashi Iwai err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 3212bd5e2c22STakashi Iwai sizeof(struct cmipci), &card); 3213e58de7baSTakashi Iwai if (err < 0) 3214e58de7baSTakashi Iwai return err; 32151da177e4SLinus Torvalds 32161da177e4SLinus Torvalds switch (pci->device) { 32171da177e4SLinus Torvalds case PCI_DEVICE_ID_CMEDIA_CM8738: 32181da177e4SLinus Torvalds case PCI_DEVICE_ID_CMEDIA_CM8738B: 32191da177e4SLinus Torvalds strcpy(card->driver, "CMI8738"); 32201da177e4SLinus Torvalds break; 32211da177e4SLinus Torvalds case PCI_DEVICE_ID_CMEDIA_CM8338A: 32221da177e4SLinus Torvalds case PCI_DEVICE_ID_CMEDIA_CM8338B: 32231da177e4SLinus Torvalds strcpy(card->driver, "CMI8338"); 32241da177e4SLinus Torvalds break; 32251da177e4SLinus Torvalds default: 32261da177e4SLinus Torvalds strcpy(card->driver, "CMIPCI"); 32271da177e4SLinus Torvalds break; 32281da177e4SLinus Torvalds } 32291da177e4SLinus Torvalds 323087e082adSTakashi Iwai err = snd_cmipci_create(card, pci, dev); 3231e17a85ecSMarkus Elfring if (err < 0) 3232a59396b1STakashi Iwai goto error; 32331da177e4SLinus Torvalds 3234e17a85ecSMarkus Elfring err = snd_card_register(card); 3235e17a85ecSMarkus Elfring if (err < 0) 3236a59396b1STakashi Iwai goto error; 3237e17a85ecSMarkus Elfring 32381da177e4SLinus Torvalds pci_set_drvdata(pci, card); 32391da177e4SLinus Torvalds dev++; 32401da177e4SLinus Torvalds return 0; 3241a59396b1STakashi Iwai 3242a59396b1STakashi Iwai error: 3243a59396b1STakashi Iwai snd_card_free(card); 3244a59396b1STakashi Iwai return err; 32451da177e4SLinus Torvalds } 32461da177e4SLinus Torvalds 3247cb60e5f5STakashi Iwai /* 3248cb60e5f5STakashi Iwai * power management 3249cb60e5f5STakashi Iwai */ 32505f3aca10STakashi Iwai static const unsigned char saved_regs[] = { 3251cb60e5f5STakashi Iwai CM_REG_FUNCTRL1, CM_REG_CHFORMAT, CM_REG_LEGACY_CTRL, CM_REG_MISC_CTRL, 3252c14231ccSJonathan Teh CM_REG_MIXER0, CM_REG_MIXER1, CM_REG_MIXER2, CM_REG_AUX_VOL, CM_REG_PLL, 3253cb60e5f5STakashi Iwai CM_REG_CH0_FRAME1, CM_REG_CH0_FRAME2, 3254cb60e5f5STakashi Iwai CM_REG_CH1_FRAME1, CM_REG_CH1_FRAME2, CM_REG_EXT_MISC, 3255cb60e5f5STakashi Iwai CM_REG_INT_STATUS, CM_REG_INT_HLDCLR, CM_REG_FUNCTRL0, 3256cb60e5f5STakashi Iwai }; 3257cb60e5f5STakashi Iwai 32585f3aca10STakashi Iwai static const unsigned char saved_mixers[] = { 3259cb60e5f5STakashi Iwai SB_DSP4_MASTER_DEV, SB_DSP4_MASTER_DEV + 1, 3260cb60e5f5STakashi Iwai SB_DSP4_PCM_DEV, SB_DSP4_PCM_DEV + 1, 3261cb60e5f5STakashi Iwai SB_DSP4_SYNTH_DEV, SB_DSP4_SYNTH_DEV + 1, 3262cb60e5f5STakashi Iwai SB_DSP4_CD_DEV, SB_DSP4_CD_DEV + 1, 3263cb60e5f5STakashi Iwai SB_DSP4_LINE_DEV, SB_DSP4_LINE_DEV + 1, 3264cb60e5f5STakashi Iwai SB_DSP4_MIC_DEV, SB_DSP4_SPEAKER_DEV, 3265cb60e5f5STakashi Iwai CM_REG_EXTENT_IND, SB_DSP4_OUTPUT_SW, 3266cb60e5f5STakashi Iwai SB_DSP4_INPUT_LEFT, SB_DSP4_INPUT_RIGHT, 3267cb60e5f5STakashi Iwai }; 3268cb60e5f5STakashi Iwai 326968cb2b55STakashi Iwai static int snd_cmipci_suspend(struct device *dev) 3270cb60e5f5STakashi Iwai { 327168cb2b55STakashi Iwai struct snd_card *card = dev_get_drvdata(dev); 3272cb60e5f5STakashi Iwai struct cmipci *cm = card->private_data; 3273cb60e5f5STakashi Iwai int i; 3274cb60e5f5STakashi Iwai 3275cb60e5f5STakashi Iwai snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 3276cb60e5f5STakashi Iwai 3277cb60e5f5STakashi Iwai /* save registers */ 3278cb60e5f5STakashi Iwai for (i = 0; i < ARRAY_SIZE(saved_regs); i++) 3279cb60e5f5STakashi Iwai cm->saved_regs[i] = snd_cmipci_read(cm, saved_regs[i]); 3280cb60e5f5STakashi Iwai for (i = 0; i < ARRAY_SIZE(saved_mixers); i++) 3281cb60e5f5STakashi Iwai cm->saved_mixers[i] = snd_cmipci_mixer_read(cm, saved_mixers[i]); 3282cb60e5f5STakashi Iwai 3283cb60e5f5STakashi Iwai /* disable ints */ 3284cb60e5f5STakashi Iwai snd_cmipci_write(cm, CM_REG_INT_HLDCLR, 0); 3285cb60e5f5STakashi Iwai return 0; 3286cb60e5f5STakashi Iwai } 3287cb60e5f5STakashi Iwai 328868cb2b55STakashi Iwai static int snd_cmipci_resume(struct device *dev) 3289cb60e5f5STakashi Iwai { 329068cb2b55STakashi Iwai struct snd_card *card = dev_get_drvdata(dev); 3291cb60e5f5STakashi Iwai struct cmipci *cm = card->private_data; 3292cb60e5f5STakashi Iwai int i; 3293cb60e5f5STakashi Iwai 3294cb60e5f5STakashi Iwai /* reset / initialize to a sane state */ 3295cb60e5f5STakashi Iwai snd_cmipci_write(cm, CM_REG_INT_HLDCLR, 0); 3296cb60e5f5STakashi Iwai snd_cmipci_ch_reset(cm, CM_CH_PLAY); 3297cb60e5f5STakashi Iwai snd_cmipci_ch_reset(cm, CM_CH_CAPT); 3298cb60e5f5STakashi Iwai snd_cmipci_mixer_write(cm, 0, 0); 3299cb60e5f5STakashi Iwai 3300cb60e5f5STakashi Iwai /* restore registers */ 3301cb60e5f5STakashi Iwai for (i = 0; i < ARRAY_SIZE(saved_regs); i++) 3302cb60e5f5STakashi Iwai snd_cmipci_write(cm, saved_regs[i], cm->saved_regs[i]); 3303cb60e5f5STakashi Iwai for (i = 0; i < ARRAY_SIZE(saved_mixers); i++) 3304cb60e5f5STakashi Iwai snd_cmipci_mixer_write(cm, saved_mixers[i], cm->saved_mixers[i]); 3305cb60e5f5STakashi Iwai 3306cb60e5f5STakashi Iwai snd_power_change_state(card, SNDRV_CTL_POWER_D0); 3307cb60e5f5STakashi Iwai return 0; 3308cb60e5f5STakashi Iwai } 330968cb2b55STakashi Iwai 33101c69bc39STakashi Iwai static DEFINE_SIMPLE_DEV_PM_OPS(snd_cmipci_pm, snd_cmipci_suspend, snd_cmipci_resume); 3311cb60e5f5STakashi Iwai 3312e9f66d9bSTakashi Iwai static struct pci_driver cmipci_driver = { 33133733e424STakashi Iwai .name = KBUILD_MODNAME, 33141da177e4SLinus Torvalds .id_table = snd_cmipci_ids, 33151da177e4SLinus Torvalds .probe = snd_cmipci_probe, 331668cb2b55STakashi Iwai .driver = { 33171c69bc39STakashi Iwai .pm = &snd_cmipci_pm, 331868cb2b55STakashi Iwai }, 33191da177e4SLinus Torvalds }; 33201da177e4SLinus Torvalds 3321e9f66d9bSTakashi Iwai module_pci_driver(cmipci_driver); 3322