1 /* 2 * azt3328.c - driver for Aztech AZF3328 based soundcards (e.g. PCI168). 3 * Copyright (C) 2002, 2005 by Andreas Mohr <andi AT lisas.de> 4 * 5 * Framework borrowed from Bart Hartgers's als4000.c. 6 * Driver developed on PCI168 AP(W) version (PCI rev. 10, subsystem ID 1801), 7 * found in a Fujitsu-Siemens PC ("Cordant", aluminum case). 8 * Other versions are: 9 * PCI168 A(W), sub ID 1800 10 * PCI168 A/AP, sub ID 8000 11 * Please give me feedback in case you try my driver with one of these!! 12 * 13 * GPL LICENSE 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License as published by 16 * the Free Software Foundation; either version 2 of the License, or 17 * (at your option) any later version. 18 * 19 * This program is distributed in the hope that it will be useful, 20 * but WITHOUT ANY WARRANTY; without even the implied warranty of 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 * GNU General Public License for more details. 23 24 * You should have received a copy of the GNU General Public License 25 * along with this program; if not, write to the Free Software 26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 27 * 28 * NOTES 29 * Since Aztech does not provide any chipset documentation, 30 * even on repeated request to various addresses, 31 * and the answer that was finally given was negative 32 * (and I was stupid enough to manage to get hold of a PCI168 soundcard 33 * in the first place >:-P}), 34 * I was forced to base this driver on reverse engineering 35 * (3 weeks' worth of evenings filled with driver work). 36 * (and no, I did NOT go the easy way: to pick up a SB PCI128 for 9 Euros) 37 * 38 * The AZF3328 chip (note: AZF3328, *not* AZT3328, that's just the driver name 39 * for compatibility reasons) has the following features: 40 * 41 * - builtin AC97 conformant codec (SNR over 80dB) 42 * Note that "conformant" != "compliant"!! this chip's mixer register layout 43 * *differs* from the standard AC97 layout: 44 * they chose to not implement the headphone register (which is not a 45 * problem since it's merely optional), yet when doing this, they committed 46 * the grave sin of letting other registers follow immediately instead of 47 * keeping a headphone dummy register, thereby shifting the mixer register 48 * addresses illegally. So far unfortunately it looks like the very flexible 49 * ALSA AC97 support is still not enough to easily compensate for such a 50 * grave layout violation despite all tweaks and quirks mechanisms it offers. 51 * - builtin genuine OPL3 52 * - full duplex 16bit playback/record at independent sampling rate 53 * - MPU401 (+ legacy address support) FIXME: how to enable legacy addr?? 54 * - game port (legacy address support) 55 * - built-in General DirectX timer having a 20 bits counter 56 * with 1us resolution (see below!) 57 * - I2S serial port for external DAC 58 * - supports 33MHz PCI spec 2.1, PCI power management 1.0, compliant with ACPI 59 * - supports hardware volume control 60 * - single chip low cost solution (128 pin QFP) 61 * - supports programmable Sub-vendor and Sub-system ID 62 * required for Microsoft's logo compliance (FIXME: where?) 63 * - PCI168 AP(W) card: power amplifier with 4 Watts/channel at 4 Ohms 64 * 65 * Note that this driver now is actually *better* than the Windows driver, 66 * since it additionally supports the card's 1MHz DirectX timer - just try 67 * the following snd-seq module parameters etc.: 68 * - options snd-seq seq_default_timer_class=2 seq_default_timer_sclass=0 69 * seq_default_timer_card=0 seq_client_load=1 seq_default_timer_device=0 70 * seq_default_timer_subdevice=0 seq_default_timer_resolution=1000000 71 * - "timidity -iAv -B2,8 -Os -EFreverb=0" 72 * - "pmidi -p 128:0 jazz.mid" 73 * 74 * Certain PCI versions of this card are susceptible to DMA traffic underruns 75 * in some systems (resulting in sound crackling/clicking/popping), 76 * probably because they don't have a DMA FIFO buffer or so. 77 * Overview (PCI ID/PCI subID/PCI rev.): 78 * - no DMA crackling on SiS735: 0x50DC/0x1801/16 79 * - unknown performance: 0x50DC/0x1801/10 80 * (well, it's not bad on an Athlon 1800 with now very optimized IRQ handler) 81 * 82 * Crackling happens with VIA chipsets or, in my case, an SiS735, which is 83 * supposed to be very fast and supposed to get rid of crackling much 84 * better than a VIA, yet ironically I still get crackling, like many other 85 * people with the same chipset. 86 * Possible remedies: 87 * - plug card into a different PCI slot, preferrably one that isn't shared 88 * too much (this helps a lot, but not completely!) 89 * - get rid of PCI VGA card, use AGP instead 90 * - upgrade or downgrade BIOS 91 * - fiddle with PCI latency settings (setpci -v -s BUSID latency_timer=XX) 92 * Not too helpful. 93 * - Disable ACPI/power management/"Auto Detect RAM/PCI Clk" in BIOS 94 * 95 * BUGS 96 * - full-duplex might *still* be problematic, not fully tested recently 97 * 98 * TODO 99 * - test MPU401 MIDI playback etc. 100 * - add some power micro-management (disable various units of the card 101 * as long as they're unused). However this requires I/O ports which I 102 * haven't figured out yet and which thus might not even exist... 103 * The standard suspend/resume functionality could probably make use of 104 * some improvement, too... 105 * - figure out what all unknown port bits are responsible for 106 * - figure out some cleverly evil scheme to possibly make ALSA AC97 code 107 * fully accept our quite incompatible ""AC97"" mixer and thus save some 108 * code (but I'm not too optimistic that doing this is possible at all) 109 */ 110 111 #include <sound/driver.h> 112 #include <asm/io.h> 113 #include <linux/init.h> 114 #include <linux/pci.h> 115 #include <linux/delay.h> 116 #include <linux/slab.h> 117 #include <linux/gameport.h> 118 #include <linux/moduleparam.h> 119 #include <linux/dma-mapping.h> 120 #include <sound/core.h> 121 #include <sound/control.h> 122 #include <sound/pcm.h> 123 #include <sound/rawmidi.h> 124 #include <sound/mpu401.h> 125 #include <sound/opl3.h> 126 #include <sound/initval.h> 127 #include "azt3328.h" 128 129 MODULE_AUTHOR("Andreas Mohr <andi AT lisas.de>"); 130 MODULE_DESCRIPTION("Aztech AZF3328 (PCI168)"); 131 MODULE_LICENSE("GPL"); 132 MODULE_SUPPORTED_DEVICE("{{Aztech,AZF3328}}"); 133 134 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE)) 135 #define SUPPORT_JOYSTICK 1 136 #endif 137 138 #define DEBUG_MISC 0 139 #define DEBUG_CALLS 0 140 #define DEBUG_MIXER 0 141 #define DEBUG_PLAY_REC 0 142 #define DEBUG_IO 0 143 #define DEBUG_TIMER 0 144 #define MIXER_TESTING 0 145 146 #if DEBUG_MISC 147 #define snd_azf3328_dbgmisc(format, args...) printk(KERN_ERR format, ##args) 148 #else 149 #define snd_azf3328_dbgmisc(format, args...) 150 #endif 151 152 #if DEBUG_CALLS 153 #define snd_azf3328_dbgcalls(format, args...) printk(format, ##args) 154 #define snd_azf3328_dbgcallenter() printk(KERN_ERR "--> %s\n", __FUNCTION__) 155 #define snd_azf3328_dbgcallleave() printk(KERN_ERR "<-- %s\n", __FUNCTION__) 156 #else 157 #define snd_azf3328_dbgcalls(format, args...) 158 #define snd_azf3328_dbgcallenter() 159 #define snd_azf3328_dbgcallleave() 160 #endif 161 162 #if DEBUG_MIXER 163 #define snd_azf3328_dbgmixer(format, args...) printk(format, ##args) 164 #else 165 #define snd_azf3328_dbgmixer(format, args...) 166 #endif 167 168 #if DEBUG_PLAY_REC 169 #define snd_azf3328_dbgplay(format, args...) printk(KERN_ERR format, ##args) 170 #else 171 #define snd_azf3328_dbgplay(format, args...) 172 #endif 173 174 #if DEBUG_MISC 175 #define snd_azf3328_dbgtimer(format, args...) printk(KERN_ERR format, ##args) 176 #else 177 #define snd_azf3328_dbgtimer(format, args...) 178 #endif 179 180 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 181 module_param_array(index, int, NULL, 0444); 182 MODULE_PARM_DESC(index, "Index value for AZF3328 soundcard."); 183 184 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 185 module_param_array(id, charp, NULL, 0444); 186 MODULE_PARM_DESC(id, "ID string for AZF3328 soundcard."); 187 188 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 189 module_param_array(enable, bool, NULL, 0444); 190 MODULE_PARM_DESC(enable, "Enable AZF3328 soundcard."); 191 192 #ifdef SUPPORT_JOYSTICK 193 static int joystick[SNDRV_CARDS]; 194 module_param_array(joystick, bool, NULL, 0444); 195 MODULE_PARM_DESC(joystick, "Enable joystick for AZF3328 soundcard."); 196 #endif 197 198 static int seqtimer_scaling = 128; 199 module_param(seqtimer_scaling, int, 0444); 200 MODULE_PARM_DESC(seqtimer_scaling, "Set 1024000Hz sequencer timer scale factor (lockup danger!). Default 128."); 201 202 struct snd_azf3328 { 203 /* often-used fields towards beginning, then grouped */ 204 unsigned long codec_port; 205 unsigned long io2_port; 206 unsigned long mpu_port; 207 unsigned long synth_port; 208 unsigned long mixer_port; 209 210 spinlock_t reg_lock; 211 212 struct snd_timer *timer; 213 214 struct snd_pcm *pcm; 215 struct snd_pcm_substream *playback_substream; 216 struct snd_pcm_substream *capture_substream; 217 unsigned int is_playing; 218 unsigned int is_recording; 219 220 struct snd_card *card; 221 struct snd_rawmidi *rmidi; 222 223 #ifdef SUPPORT_JOYSTICK 224 struct gameport *gameport; 225 #endif 226 227 struct pci_dev *pci; 228 int irq; 229 230 #ifdef CONFIG_PM 231 /* register value containers for power management 232 * Note: not always full I/O range preserved (just like Win driver!) */ 233 u16 saved_regs_codec [AZF_IO_SIZE_CODEC_PM / 2]; 234 u16 saved_regs_io2 [AZF_IO_SIZE_IO2_PM / 2]; 235 u16 saved_regs_mpu [AZF_IO_SIZE_MPU_PM / 2]; 236 u16 saved_regs_synth[AZF_IO_SIZE_SYNTH_PM / 2]; 237 u16 saved_regs_mixer[AZF_IO_SIZE_MIXER_PM / 2]; 238 #endif 239 }; 240 241 static const struct pci_device_id snd_azf3328_ids[] = { 242 { 0x122D, 0x50DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* PCI168/3328 */ 243 { 0x122D, 0x80DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* 3328 */ 244 { 0, } 245 }; 246 247 MODULE_DEVICE_TABLE(pci, snd_azf3328_ids); 248 249 static inline void 250 snd_azf3328_codec_outb(const struct snd_azf3328 *chip, int reg, u8 value) 251 { 252 outb(value, chip->codec_port + reg); 253 } 254 255 static inline u8 256 snd_azf3328_codec_inb(const struct snd_azf3328 *chip, int reg) 257 { 258 return inb(chip->codec_port + reg); 259 } 260 261 static inline void 262 snd_azf3328_codec_outw(const struct snd_azf3328 *chip, int reg, u16 value) 263 { 264 outw(value, chip->codec_port + reg); 265 } 266 267 static inline u16 268 snd_azf3328_codec_inw(const struct snd_azf3328 *chip, int reg) 269 { 270 return inw(chip->codec_port + reg); 271 } 272 273 static inline void 274 snd_azf3328_codec_outl(const struct snd_azf3328 *chip, int reg, u32 value) 275 { 276 outl(value, chip->codec_port + reg); 277 } 278 279 static inline void 280 snd_azf3328_io2_outb(const struct snd_azf3328 *chip, int reg, u8 value) 281 { 282 outb(value, chip->io2_port + reg); 283 } 284 285 static inline u8 286 snd_azf3328_io2_inb(const struct snd_azf3328 *chip, int reg) 287 { 288 return inb(chip->io2_port + reg); 289 } 290 291 static inline void 292 snd_azf3328_mixer_outw(const struct snd_azf3328 *chip, int reg, u16 value) 293 { 294 outw(value, chip->mixer_port + reg); 295 } 296 297 static inline u16 298 snd_azf3328_mixer_inw(const struct snd_azf3328 *chip, int reg) 299 { 300 return inw(chip->mixer_port + reg); 301 } 302 303 static void 304 snd_azf3328_mixer_set_mute(const struct snd_azf3328 *chip, int reg, int do_mute) 305 { 306 unsigned long portbase = chip->mixer_port + reg + 1; 307 unsigned char oldval; 308 309 /* the mute bit is on the *second* (i.e. right) register of a 310 * left/right channel setting */ 311 oldval = inb(portbase); 312 if (do_mute) 313 oldval |= 0x80; 314 else 315 oldval &= ~0x80; 316 outb(oldval, portbase); 317 } 318 319 static void 320 snd_azf3328_mixer_write_volume_gradually(const struct snd_azf3328 *chip, int reg, unsigned char dst_vol_left, unsigned char dst_vol_right, int chan_sel, int delay) 321 { 322 unsigned long portbase = chip->mixer_port + reg; 323 unsigned char curr_vol_left = 0, curr_vol_right = 0; 324 int left_done = 0, right_done = 0; 325 326 snd_azf3328_dbgcallenter(); 327 if (chan_sel & SET_CHAN_LEFT) 328 curr_vol_left = inb(portbase + 1); 329 else 330 left_done = 1; 331 if (chan_sel & SET_CHAN_RIGHT) 332 curr_vol_right = inb(portbase + 0); 333 else 334 right_done = 1; 335 336 /* take care of muting flag (0x80) contained in left channel */ 337 if (curr_vol_left & 0x80) 338 dst_vol_left |= 0x80; 339 else 340 dst_vol_left &= ~0x80; 341 342 do { 343 if (!left_done) { 344 if (curr_vol_left > dst_vol_left) 345 curr_vol_left--; 346 else 347 if (curr_vol_left < dst_vol_left) 348 curr_vol_left++; 349 else 350 left_done = 1; 351 outb(curr_vol_left, portbase + 1); 352 } 353 if (!right_done) { 354 if (curr_vol_right > dst_vol_right) 355 curr_vol_right--; 356 else 357 if (curr_vol_right < dst_vol_right) 358 curr_vol_right++; 359 else 360 right_done = 1; 361 /* during volume change, the right channel is crackling 362 * somewhat more than the left channel, unfortunately. 363 * This seems to be a hardware issue. */ 364 outb(curr_vol_right, portbase + 0); 365 } 366 if (delay) 367 mdelay(delay); 368 } while ((!left_done) || (!right_done)); 369 snd_azf3328_dbgcallleave(); 370 } 371 372 /* 373 * general mixer element 374 */ 375 struct azf3328_mixer_reg { 376 unsigned int reg; 377 unsigned int lchan_shift, rchan_shift; 378 unsigned int mask; 379 unsigned int invert: 1; 380 unsigned int stereo: 1; 381 unsigned int enum_c: 4; 382 }; 383 384 #define COMPOSE_MIXER_REG(reg,lchan_shift,rchan_shift,mask,invert,stereo,enum_c) \ 385 ((reg) | (lchan_shift << 8) | (rchan_shift << 12) | \ 386 (mask << 16) | \ 387 (invert << 24) | \ 388 (stereo << 25) | \ 389 (enum_c << 26)) 390 391 static void snd_azf3328_mixer_reg_decode(struct azf3328_mixer_reg *r, unsigned long val) 392 { 393 r->reg = val & 0xff; 394 r->lchan_shift = (val >> 8) & 0x0f; 395 r->rchan_shift = (val >> 12) & 0x0f; 396 r->mask = (val >> 16) & 0xff; 397 r->invert = (val >> 24) & 1; 398 r->stereo = (val >> 25) & 1; 399 r->enum_c = (val >> 26) & 0x0f; 400 } 401 402 /* 403 * mixer switches/volumes 404 */ 405 406 #define AZF3328_MIXER_SWITCH(xname, reg, shift, invert) \ 407 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 408 .info = snd_azf3328_info_mixer, \ 409 .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ 410 .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0x1, invert, 0, 0), \ 411 } 412 413 #define AZF3328_MIXER_VOL_STEREO(xname, reg, mask, invert) \ 414 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 415 .info = snd_azf3328_info_mixer, \ 416 .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ 417 .private_value = COMPOSE_MIXER_REG(reg, 8, 0, mask, invert, 1, 0), \ 418 } 419 420 #define AZF3328_MIXER_VOL_MONO(xname, reg, mask, is_right_chan) \ 421 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 422 .info = snd_azf3328_info_mixer, \ 423 .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ 424 .private_value = COMPOSE_MIXER_REG(reg, is_right_chan ? 0 : 8, 0, mask, 1, 0, 0), \ 425 } 426 427 #define AZF3328_MIXER_VOL_SPECIAL(xname, reg, mask, shift, invert) \ 428 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 429 .info = snd_azf3328_info_mixer, \ 430 .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ 431 .private_value = COMPOSE_MIXER_REG(reg, shift, 0, mask, invert, 0, 0), \ 432 } 433 434 #define AZF3328_MIXER_ENUM(xname, reg, enum_c, shift) \ 435 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 436 .info = snd_azf3328_info_mixer_enum, \ 437 .get = snd_azf3328_get_mixer_enum, .put = snd_azf3328_put_mixer_enum, \ 438 .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0, 0, 0, enum_c), \ 439 } 440 441 static int 442 snd_azf3328_info_mixer(struct snd_kcontrol *kcontrol, 443 struct snd_ctl_elem_info *uinfo) 444 { 445 struct azf3328_mixer_reg reg; 446 447 snd_azf3328_dbgcallenter(); 448 snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); 449 uinfo->type = reg.mask == 1 ? 450 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 451 uinfo->count = reg.stereo + 1; 452 uinfo->value.integer.min = 0; 453 uinfo->value.integer.max = reg.mask; 454 snd_azf3328_dbgcallleave(); 455 return 0; 456 } 457 458 static int 459 snd_azf3328_get_mixer(struct snd_kcontrol *kcontrol, 460 struct snd_ctl_elem_value *ucontrol) 461 { 462 struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); 463 struct azf3328_mixer_reg reg; 464 unsigned int oreg, val; 465 466 snd_azf3328_dbgcallenter(); 467 snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); 468 469 oreg = snd_azf3328_mixer_inw(chip, reg.reg); 470 val = (oreg >> reg.lchan_shift) & reg.mask; 471 if (reg.invert) 472 val = reg.mask - val; 473 ucontrol->value.integer.value[0] = val; 474 if (reg.stereo) { 475 val = (oreg >> reg.rchan_shift) & reg.mask; 476 if (reg.invert) 477 val = reg.mask - val; 478 ucontrol->value.integer.value[1] = val; 479 } 480 snd_azf3328_dbgmixer("get: %02x is %04x -> vol %02lx|%02lx " 481 "(shift %02d|%02d, mask %02x, inv. %d, stereo %d)\n", 482 reg.reg, oreg, 483 ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], 484 reg.lchan_shift, reg.rchan_shift, reg.mask, reg.invert, reg.stereo); 485 snd_azf3328_dbgcallleave(); 486 return 0; 487 } 488 489 static int 490 snd_azf3328_put_mixer(struct snd_kcontrol *kcontrol, 491 struct snd_ctl_elem_value *ucontrol) 492 { 493 struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); 494 struct azf3328_mixer_reg reg; 495 unsigned int oreg, nreg, val; 496 497 snd_azf3328_dbgcallenter(); 498 snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); 499 oreg = snd_azf3328_mixer_inw(chip, reg.reg); 500 val = ucontrol->value.integer.value[0] & reg.mask; 501 if (reg.invert) 502 val = reg.mask - val; 503 nreg = oreg & ~(reg.mask << reg.lchan_shift); 504 nreg |= (val << reg.lchan_shift); 505 if (reg.stereo) { 506 val = ucontrol->value.integer.value[1] & reg.mask; 507 if (reg.invert) 508 val = reg.mask - val; 509 nreg &= ~(reg.mask << reg.rchan_shift); 510 nreg |= (val << reg.rchan_shift); 511 } 512 if (reg.mask >= 0x07) /* it's a volume control, so better take care */ 513 snd_azf3328_mixer_write_volume_gradually( 514 chip, reg.reg, nreg >> 8, nreg & 0xff, 515 /* just set both channels, doesn't matter */ 516 SET_CHAN_LEFT|SET_CHAN_RIGHT, 517 0); 518 else 519 snd_azf3328_mixer_outw(chip, reg.reg, nreg); 520 521 snd_azf3328_dbgmixer("put: %02x to %02lx|%02lx, " 522 "oreg %04x; shift %02d|%02d -> nreg %04x; after: %04x\n", 523 reg.reg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], 524 oreg, reg.lchan_shift, reg.rchan_shift, 525 nreg, snd_azf3328_mixer_inw(chip, reg.reg)); 526 snd_azf3328_dbgcallleave(); 527 return (nreg != oreg); 528 } 529 530 static int 531 snd_azf3328_info_mixer_enum(struct snd_kcontrol *kcontrol, 532 struct snd_ctl_elem_info *uinfo) 533 { 534 static const char * const texts1[] = { 535 "Mic1", "Mic2" 536 }; 537 static const char * const texts2[] = { 538 "Mix", "Mic" 539 }; 540 static const char * const texts3[] = { 541 "Mic", "CD", "Video", "Aux", 542 "Line", "Mix", "Mix Mono", "Phone" 543 }; 544 static const char * const texts4[] = { 545 "pre 3D", "post 3D" 546 }; 547 struct azf3328_mixer_reg reg; 548 549 snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); 550 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 551 uinfo->count = (reg.reg == IDX_MIXER_REC_SELECT) ? 2 : 1; 552 uinfo->value.enumerated.items = reg.enum_c; 553 if (uinfo->value.enumerated.item > reg.enum_c - 1U) 554 uinfo->value.enumerated.item = reg.enum_c - 1U; 555 if (reg.reg == IDX_MIXER_ADVCTL2) { 556 switch(reg.lchan_shift) { 557 case 8: /* modem out sel */ 558 strcpy(uinfo->value.enumerated.name, texts1[uinfo->value.enumerated.item]); 559 break; 560 case 9: /* mono sel source */ 561 strcpy(uinfo->value.enumerated.name, texts2[uinfo->value.enumerated.item]); 562 break; 563 case 15: /* PCM Out Path */ 564 strcpy(uinfo->value.enumerated.name, texts4[uinfo->value.enumerated.item]); 565 break; 566 } 567 } else 568 strcpy(uinfo->value.enumerated.name, texts3[uinfo->value.enumerated.item] 569 ); 570 return 0; 571 } 572 573 static int 574 snd_azf3328_get_mixer_enum(struct snd_kcontrol *kcontrol, 575 struct snd_ctl_elem_value *ucontrol) 576 { 577 struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); 578 struct azf3328_mixer_reg reg; 579 unsigned short val; 580 581 snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); 582 val = snd_azf3328_mixer_inw(chip, reg.reg); 583 if (reg.reg == IDX_MIXER_REC_SELECT) { 584 ucontrol->value.enumerated.item[0] = (val >> 8) & (reg.enum_c - 1); 585 ucontrol->value.enumerated.item[1] = (val >> 0) & (reg.enum_c - 1); 586 } else 587 ucontrol->value.enumerated.item[0] = (val >> reg.lchan_shift) & (reg.enum_c - 1); 588 589 snd_azf3328_dbgmixer("get_enum: %02x is %04x -> %d|%d (shift %02d, enum_c %d)\n", 590 reg.reg, val, ucontrol->value.enumerated.item[0], ucontrol->value.enumerated.item[1], 591 reg.lchan_shift, reg.enum_c); 592 return 0; 593 } 594 595 static int 596 snd_azf3328_put_mixer_enum(struct snd_kcontrol *kcontrol, 597 struct snd_ctl_elem_value *ucontrol) 598 { 599 struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); 600 struct azf3328_mixer_reg reg; 601 unsigned int oreg, nreg, val; 602 603 snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); 604 oreg = snd_azf3328_mixer_inw(chip, reg.reg); 605 val = oreg; 606 if (reg.reg == IDX_MIXER_REC_SELECT) { 607 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U || 608 ucontrol->value.enumerated.item[1] > reg.enum_c - 1U) 609 return -EINVAL; 610 val = (ucontrol->value.enumerated.item[0] << 8) | 611 (ucontrol->value.enumerated.item[1] << 0); 612 } else { 613 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U) 614 return -EINVAL; 615 val &= ~((reg.enum_c - 1) << reg.lchan_shift); 616 val |= (ucontrol->value.enumerated.item[0] << reg.lchan_shift); 617 } 618 snd_azf3328_mixer_outw(chip, reg.reg, val); 619 nreg = val; 620 621 snd_azf3328_dbgmixer("put_enum: %02x to %04x, oreg %04x\n", reg.reg, val, oreg); 622 return (nreg != oreg); 623 } 624 625 static const struct snd_kcontrol_new snd_azf3328_mixer_controls[] __devinitdata = { 626 AZF3328_MIXER_SWITCH("Master Playback Switch", IDX_MIXER_PLAY_MASTER, 15, 1), 627 AZF3328_MIXER_VOL_STEREO("Master Playback Volume", IDX_MIXER_PLAY_MASTER, 0x1f, 1), 628 AZF3328_MIXER_SWITCH("Wave Playback Switch", IDX_MIXER_WAVEOUT, 15, 1), 629 AZF3328_MIXER_VOL_STEREO("Wave Playback Volume", IDX_MIXER_WAVEOUT, 0x1f, 1), 630 AZF3328_MIXER_SWITCH("Wave 3D Bypass Playback Switch", IDX_MIXER_ADVCTL2, 7, 1), 631 AZF3328_MIXER_SWITCH("FM Playback Switch", IDX_MIXER_FMSYNTH, 15, 1), 632 AZF3328_MIXER_VOL_STEREO("FM Playback Volume", IDX_MIXER_FMSYNTH, 0x1f, 1), 633 AZF3328_MIXER_SWITCH("CD Playback Switch", IDX_MIXER_CDAUDIO, 15, 1), 634 AZF3328_MIXER_VOL_STEREO("CD Playback Volume", IDX_MIXER_CDAUDIO, 0x1f, 1), 635 AZF3328_MIXER_SWITCH("Capture Switch", IDX_MIXER_REC_VOLUME, 15, 1), 636 AZF3328_MIXER_VOL_STEREO("Capture Volume", IDX_MIXER_REC_VOLUME, 0x0f, 0), 637 AZF3328_MIXER_ENUM("Capture Source", IDX_MIXER_REC_SELECT, 8, 0), 638 AZF3328_MIXER_SWITCH("Mic Playback Switch", IDX_MIXER_MIC, 15, 1), 639 AZF3328_MIXER_VOL_MONO("Mic Playback Volume", IDX_MIXER_MIC, 0x1f, 1), 640 AZF3328_MIXER_SWITCH("Mic Boost (+20dB)", IDX_MIXER_MIC, 6, 0), 641 AZF3328_MIXER_SWITCH("Line Playback Switch", IDX_MIXER_LINEIN, 15, 1), 642 AZF3328_MIXER_VOL_STEREO("Line Playback Volume", IDX_MIXER_LINEIN, 0x1f, 1), 643 AZF3328_MIXER_SWITCH("PC Speaker Playback Switch", IDX_MIXER_PCBEEP, 15, 1), 644 AZF3328_MIXER_VOL_SPECIAL("PC Speaker Playback Volume", IDX_MIXER_PCBEEP, 0x0f, 1, 1), 645 AZF3328_MIXER_SWITCH("Video Playback Switch", IDX_MIXER_VIDEO, 15, 1), 646 AZF3328_MIXER_VOL_STEREO("Video Playback Volume", IDX_MIXER_VIDEO, 0x1f, 1), 647 AZF3328_MIXER_SWITCH("Aux Playback Switch", IDX_MIXER_AUX, 15, 1), 648 AZF3328_MIXER_VOL_STEREO("Aux Playback Volume", IDX_MIXER_AUX, 0x1f, 1), 649 AZF3328_MIXER_SWITCH("Modem Playback Switch", IDX_MIXER_MODEMOUT, 15, 1), 650 AZF3328_MIXER_VOL_MONO("Modem Playback Volume", IDX_MIXER_MODEMOUT, 0x1f, 1), 651 AZF3328_MIXER_SWITCH("Modem Capture Switch", IDX_MIXER_MODEMIN, 15, 1), 652 AZF3328_MIXER_VOL_MONO("Modem Capture Volume", IDX_MIXER_MODEMIN, 0x1f, 1), 653 AZF3328_MIXER_ENUM("Mic Select", IDX_MIXER_ADVCTL2, 2, 8), 654 AZF3328_MIXER_ENUM("Mono Output Select", IDX_MIXER_ADVCTL2, 2, 9), 655 AZF3328_MIXER_ENUM("PCM", IDX_MIXER_ADVCTL2, 2, 15), /* PCM Out Path, place in front since it controls *both* 3D and Bass/Treble! */ 656 AZF3328_MIXER_VOL_SPECIAL("Tone Control - Treble", IDX_MIXER_BASSTREBLE, 0x07, 1, 0), 657 AZF3328_MIXER_VOL_SPECIAL("Tone Control - Bass", IDX_MIXER_BASSTREBLE, 0x07, 9, 0), 658 AZF3328_MIXER_SWITCH("3D Control - Switch", IDX_MIXER_ADVCTL2, 13, 0), 659 AZF3328_MIXER_VOL_SPECIAL("3D Control - Width", IDX_MIXER_ADVCTL1, 0x07, 1, 0), /* "3D Width" */ 660 AZF3328_MIXER_VOL_SPECIAL("3D Control - Depth", IDX_MIXER_ADVCTL1, 0x03, 8, 0), /* "Hifi 3D" */ 661 #if MIXER_TESTING 662 AZF3328_MIXER_SWITCH("0", IDX_MIXER_ADVCTL2, 0, 0), 663 AZF3328_MIXER_SWITCH("1", IDX_MIXER_ADVCTL2, 1, 0), 664 AZF3328_MIXER_SWITCH("2", IDX_MIXER_ADVCTL2, 2, 0), 665 AZF3328_MIXER_SWITCH("3", IDX_MIXER_ADVCTL2, 3, 0), 666 AZF3328_MIXER_SWITCH("4", IDX_MIXER_ADVCTL2, 4, 0), 667 AZF3328_MIXER_SWITCH("5", IDX_MIXER_ADVCTL2, 5, 0), 668 AZF3328_MIXER_SWITCH("6", IDX_MIXER_ADVCTL2, 6, 0), 669 AZF3328_MIXER_SWITCH("7", IDX_MIXER_ADVCTL2, 7, 0), 670 AZF3328_MIXER_SWITCH("8", IDX_MIXER_ADVCTL2, 8, 0), 671 AZF3328_MIXER_SWITCH("9", IDX_MIXER_ADVCTL2, 9, 0), 672 AZF3328_MIXER_SWITCH("10", IDX_MIXER_ADVCTL2, 10, 0), 673 AZF3328_MIXER_SWITCH("11", IDX_MIXER_ADVCTL2, 11, 0), 674 AZF3328_MIXER_SWITCH("12", IDX_MIXER_ADVCTL2, 12, 0), 675 AZF3328_MIXER_SWITCH("13", IDX_MIXER_ADVCTL2, 13, 0), 676 AZF3328_MIXER_SWITCH("14", IDX_MIXER_ADVCTL2, 14, 0), 677 AZF3328_MIXER_SWITCH("15", IDX_MIXER_ADVCTL2, 15, 0), 678 #endif 679 }; 680 681 static const u16 __devinitdata snd_azf3328_init_values[][2] = { 682 { IDX_MIXER_PLAY_MASTER, MIXER_MUTE_MASK|0x1f1f }, 683 { IDX_MIXER_MODEMOUT, MIXER_MUTE_MASK|0x1f1f }, 684 { IDX_MIXER_BASSTREBLE, 0x0000 }, 685 { IDX_MIXER_PCBEEP, MIXER_MUTE_MASK|0x1f1f }, 686 { IDX_MIXER_MODEMIN, MIXER_MUTE_MASK|0x1f1f }, 687 { IDX_MIXER_MIC, MIXER_MUTE_MASK|0x001f }, 688 { IDX_MIXER_LINEIN, MIXER_MUTE_MASK|0x1f1f }, 689 { IDX_MIXER_CDAUDIO, MIXER_MUTE_MASK|0x1f1f }, 690 { IDX_MIXER_VIDEO, MIXER_MUTE_MASK|0x1f1f }, 691 { IDX_MIXER_AUX, MIXER_MUTE_MASK|0x1f1f }, 692 { IDX_MIXER_WAVEOUT, MIXER_MUTE_MASK|0x1f1f }, 693 { IDX_MIXER_FMSYNTH, MIXER_MUTE_MASK|0x1f1f }, 694 { IDX_MIXER_REC_VOLUME, MIXER_MUTE_MASK|0x0707 }, 695 }; 696 697 static int __devinit 698 snd_azf3328_mixer_new(struct snd_azf3328 *chip) 699 { 700 struct snd_card *card; 701 const struct snd_kcontrol_new *sw; 702 unsigned int idx; 703 int err; 704 705 snd_azf3328_dbgcallenter(); 706 snd_assert(chip != NULL && chip->card != NULL, return -EINVAL); 707 708 card = chip->card; 709 710 /* mixer reset */ 711 snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000); 712 713 /* mute and zero volume channels */ 714 for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_init_values); idx++) { 715 snd_azf3328_mixer_outw(chip, 716 snd_azf3328_init_values[idx][0], 717 snd_azf3328_init_values[idx][1]); 718 } 719 720 /* add mixer controls */ 721 sw = snd_azf3328_mixer_controls; 722 for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_mixer_controls); idx++, sw++) { 723 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(sw, chip))) < 0) 724 return err; 725 } 726 snd_component_add(card, "AZF3328 mixer"); 727 strcpy(card->mixername, "AZF3328 mixer"); 728 729 snd_azf3328_dbgcallleave(); 730 return 0; 731 } 732 733 static int 734 snd_azf3328_hw_params(struct snd_pcm_substream *substream, 735 struct snd_pcm_hw_params *hw_params) 736 { 737 int res; 738 snd_azf3328_dbgcallenter(); 739 res = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 740 snd_azf3328_dbgcallleave(); 741 return res; 742 } 743 744 static int 745 snd_azf3328_hw_free(struct snd_pcm_substream *substream) 746 { 747 snd_azf3328_dbgcallenter(); 748 snd_pcm_lib_free_pages(substream); 749 snd_azf3328_dbgcallleave(); 750 return 0; 751 } 752 753 static void 754 snd_azf3328_setfmt(struct snd_azf3328 *chip, 755 unsigned int reg, 756 unsigned int bitrate, 757 unsigned int format_width, 758 unsigned int channels 759 ) 760 { 761 u16 val = 0xff00; 762 unsigned long flags; 763 764 snd_azf3328_dbgcallenter(); 765 switch (bitrate) { 766 case 4000: val |= SOUNDFORMAT_FREQ_SUSPECTED_4000; break; 767 case 4800: val |= SOUNDFORMAT_FREQ_SUSPECTED_4800; break; 768 case 5512: val |= SOUNDFORMAT_FREQ_5510; break; /* the AZF3328 names it "5510" for some strange reason */ 769 case 6620: val |= SOUNDFORMAT_FREQ_6620; break; 770 case 8000: val |= SOUNDFORMAT_FREQ_8000; break; 771 case 9600: val |= SOUNDFORMAT_FREQ_9600; break; 772 case 11025: val |= SOUNDFORMAT_FREQ_11025; break; 773 case 13240: val |= SOUNDFORMAT_FREQ_SUSPECTED_13240; break; 774 case 16000: val |= SOUNDFORMAT_FREQ_16000; break; 775 case 22050: val |= SOUNDFORMAT_FREQ_22050; break; 776 case 32000: val |= SOUNDFORMAT_FREQ_32000; break; 777 case 44100: val |= SOUNDFORMAT_FREQ_44100; break; 778 case 48000: val |= SOUNDFORMAT_FREQ_48000; break; 779 case 66200: val |= SOUNDFORMAT_FREQ_SUSPECTED_66200; break; 780 default: 781 snd_printk(KERN_WARNING "unknown bitrate %d, assuming 44.1kHz!\n", bitrate); 782 val |= SOUNDFORMAT_FREQ_44100; 783 break; 784 } 785 /* val = 0xff07; 3m27.993s (65301Hz; -> 64000Hz???) hmm, 66120, 65967, 66123 */ 786 /* val = 0xff09; 17m15.098s (13123,478Hz; -> 12000Hz???) hmm, 13237.2Hz? */ 787 /* val = 0xff0a; 47m30.599s (4764,891Hz; -> 4800Hz???) yup, 4803Hz */ 788 /* val = 0xff0c; 57m0.510s (4010,263Hz; -> 4000Hz???) yup, 4003Hz */ 789 /* val = 0xff05; 5m11.556s (... -> 44100Hz) */ 790 /* val = 0xff03; 10m21.529s (21872,463Hz; -> 22050Hz???) */ 791 /* val = 0xff0f; 20m41.883s (10937,993Hz; -> 11025Hz???) */ 792 /* val = 0xff0d; 41m23.135s (5523,600Hz; -> 5512Hz???) */ 793 /* val = 0xff0e; 28m30.777s (8017Hz; -> 8000Hz???) */ 794 795 if (channels == 2) 796 val |= SOUNDFORMAT_FLAG_2CHANNELS; 797 798 if (format_width == 16) 799 val |= SOUNDFORMAT_FLAG_16BIT; 800 801 spin_lock_irqsave(&chip->reg_lock, flags); 802 803 /* set bitrate/format */ 804 snd_azf3328_codec_outw(chip, reg, val); 805 806 /* changing the bitrate/format settings switches off the 807 * audio output with an annoying click in case of 8/16bit format change 808 * (maybe shutting down DAC/ADC?), thus immediately 809 * do some tweaking to reenable it and get rid of the clicking 810 * (FIXME: yes, it works, but what exactly am I doing here?? :) 811 * FIXME: does this have some side effects for full-duplex 812 * or other dramatic side effects? */ 813 if (reg == IDX_IO_PLAY_SOUNDFORMAT) /* only do it for playback */ 814 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, 815 snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) | 816 DMA_PLAY_SOMETHING1 | 817 DMA_PLAY_SOMETHING2 | 818 SOMETHING_ALMOST_ALWAYS_SET | 819 DMA_EPILOGUE_SOMETHING | 820 DMA_SOMETHING_ELSE 821 ); 822 823 spin_unlock_irqrestore(&chip->reg_lock, flags); 824 snd_azf3328_dbgcallleave(); 825 } 826 827 static void 828 snd_azf3328_setdmaa(struct snd_azf3328 *chip, 829 long unsigned int addr, 830 unsigned int count, 831 unsigned int size, 832 int do_recording) 833 { 834 unsigned long flags, portbase; 835 unsigned int is_running; 836 837 snd_azf3328_dbgcallenter(); 838 if (do_recording) { 839 /* access capture registers, i.e. skip playback reg section */ 840 portbase = chip->codec_port + 0x20; 841 is_running = chip->is_recording; 842 } else { 843 /* access the playback register section */ 844 portbase = chip->codec_port + 0x00; 845 is_running = chip->is_playing; 846 } 847 848 /* AZF3328 uses a two buffer pointer DMA playback approach */ 849 if (!is_running) { 850 unsigned long addr_area2; 851 unsigned long count_areas, count_tmp; /* width 32bit -- overflow!! */ 852 count_areas = size/2; 853 addr_area2 = addr+count_areas; 854 count_areas--; /* max. index */ 855 snd_azf3328_dbgplay("set DMA: buf1 %08lx[%lu], buf2 %08lx[%lu]\n", addr, count_areas, addr_area2, count_areas); 856 857 /* build combined I/O buffer length word */ 858 count_tmp = count_areas; 859 count_areas |= (count_tmp << 16); 860 spin_lock_irqsave(&chip->reg_lock, flags); 861 outl(addr, portbase + IDX_IO_PLAY_DMA_START_1); 862 outl(addr_area2, portbase + IDX_IO_PLAY_DMA_START_2); 863 outl(count_areas, portbase + IDX_IO_PLAY_DMA_LEN_1); 864 spin_unlock_irqrestore(&chip->reg_lock, flags); 865 } 866 snd_azf3328_dbgcallleave(); 867 } 868 869 static int 870 snd_azf3328_playback_prepare(struct snd_pcm_substream *substream) 871 { 872 #if 0 873 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 874 struct snd_pcm_runtime *runtime = substream->runtime; 875 unsigned int size = snd_pcm_lib_buffer_bytes(substream); 876 unsigned int count = snd_pcm_lib_period_bytes(substream); 877 #endif 878 879 snd_azf3328_dbgcallenter(); 880 #if 0 881 snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 882 runtime->rate, 883 snd_pcm_format_width(runtime->format), 884 runtime->channels); 885 snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 0); 886 #endif 887 snd_azf3328_dbgcallleave(); 888 return 0; 889 } 890 891 static int 892 snd_azf3328_capture_prepare(struct snd_pcm_substream *substream) 893 { 894 #if 0 895 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 896 struct snd_pcm_runtime *runtime = substream->runtime; 897 unsigned int size = snd_pcm_lib_buffer_bytes(substream); 898 unsigned int count = snd_pcm_lib_period_bytes(substream); 899 #endif 900 901 snd_azf3328_dbgcallenter(); 902 #if 0 903 snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, 904 runtime->rate, 905 snd_pcm_format_width(runtime->format), 906 runtime->channels); 907 snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 1); 908 #endif 909 snd_azf3328_dbgcallleave(); 910 return 0; 911 } 912 913 static int 914 snd_azf3328_playback_trigger(struct snd_pcm_substream *substream, int cmd) 915 { 916 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 917 struct snd_pcm_runtime *runtime = substream->runtime; 918 int result = 0; 919 unsigned int status1; 920 921 snd_azf3328_dbgcalls("snd_azf3328_playback_trigger cmd %d\n", cmd); 922 923 switch (cmd) { 924 case SNDRV_PCM_TRIGGER_START: 925 snd_azf3328_dbgplay("START PLAYBACK\n"); 926 927 /* mute WaveOut */ 928 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1); 929 930 snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 931 runtime->rate, 932 snd_pcm_format_width(runtime->format), 933 runtime->channels); 934 935 spin_lock(&chip->reg_lock); 936 /* stop playback */ 937 status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS); 938 status1 &= ~DMA_RESUME; 939 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); 940 941 /* FIXME: clear interrupts or what??? */ 942 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_IRQTYPE, 0xffff); 943 spin_unlock(&chip->reg_lock); 944 945 snd_azf3328_setdmaa(chip, runtime->dma_addr, 946 snd_pcm_lib_period_bytes(substream), 947 snd_pcm_lib_buffer_bytes(substream), 948 0); 949 950 spin_lock(&chip->reg_lock); 951 #ifdef WIN9X 952 /* FIXME: enable playback/recording??? */ 953 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2; 954 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); 955 956 /* start playback again */ 957 /* FIXME: what is this value (0x0010)??? */ 958 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING; 959 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); 960 #else /* NT4 */ 961 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, 962 0x0000); 963 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, 964 DMA_PLAY_SOMETHING1); 965 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, 966 DMA_PLAY_SOMETHING1 | 967 DMA_PLAY_SOMETHING2); 968 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, 969 DMA_RESUME | 970 SOMETHING_ALMOST_ALWAYS_SET | 971 DMA_EPILOGUE_SOMETHING | 972 DMA_SOMETHING_ELSE); 973 #endif 974 spin_unlock(&chip->reg_lock); 975 976 /* now unmute WaveOut */ 977 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0); 978 979 chip->is_playing = 1; 980 snd_azf3328_dbgplay("STARTED PLAYBACK\n"); 981 break; 982 case SNDRV_PCM_TRIGGER_RESUME: 983 snd_azf3328_dbgplay("RESUME PLAYBACK\n"); 984 /* resume playback if we were active */ 985 if (chip->is_playing) 986 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, 987 snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) | DMA_RESUME); 988 break; 989 case SNDRV_PCM_TRIGGER_STOP: 990 snd_azf3328_dbgplay("STOP PLAYBACK\n"); 991 992 /* mute WaveOut */ 993 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1); 994 995 spin_lock(&chip->reg_lock); 996 /* stop playback */ 997 status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS); 998 999 status1 &= ~DMA_RESUME; 1000 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); 1001 1002 /* hmm, is this really required? we're resetting the same bit 1003 * immediately thereafter... */ 1004 status1 |= DMA_PLAY_SOMETHING1; 1005 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); 1006 1007 status1 &= ~DMA_PLAY_SOMETHING1; 1008 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); 1009 spin_unlock(&chip->reg_lock); 1010 1011 /* now unmute WaveOut */ 1012 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0); 1013 chip->is_playing = 0; 1014 snd_azf3328_dbgplay("STOPPED PLAYBACK\n"); 1015 break; 1016 case SNDRV_PCM_TRIGGER_SUSPEND: 1017 snd_azf3328_dbgplay("SUSPEND PLAYBACK\n"); 1018 /* make sure playback is stopped */ 1019 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, 1020 snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) & ~DMA_RESUME); 1021 break; 1022 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 1023 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n"); 1024 break; 1025 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 1026 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n"); 1027 break; 1028 default: 1029 printk(KERN_ERR "FIXME: unknown trigger mode!\n"); 1030 return -EINVAL; 1031 } 1032 1033 snd_azf3328_dbgcallleave(); 1034 return result; 1035 } 1036 1037 /* this is just analogous to playback; I'm not quite sure whether recording 1038 * should actually be triggered like that */ 1039 static int 1040 snd_azf3328_capture_trigger(struct snd_pcm_substream *substream, int cmd) 1041 { 1042 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1043 struct snd_pcm_runtime *runtime = substream->runtime; 1044 int result = 0; 1045 unsigned int status1; 1046 1047 snd_azf3328_dbgcalls("snd_azf3328_capture_trigger cmd %d\n", cmd); 1048 1049 switch (cmd) { 1050 case SNDRV_PCM_TRIGGER_START: 1051 1052 snd_azf3328_dbgplay("START CAPTURE\n"); 1053 1054 snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, 1055 runtime->rate, 1056 snd_pcm_format_width(runtime->format), 1057 runtime->channels); 1058 1059 spin_lock(&chip->reg_lock); 1060 /* stop recording */ 1061 status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS); 1062 status1 &= ~DMA_RESUME; 1063 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); 1064 1065 /* FIXME: clear interrupts or what??? */ 1066 snd_azf3328_codec_outw(chip, IDX_IO_REC_IRQTYPE, 0xffff); 1067 spin_unlock(&chip->reg_lock); 1068 1069 snd_azf3328_setdmaa(chip, runtime->dma_addr, 1070 snd_pcm_lib_period_bytes(substream), 1071 snd_pcm_lib_buffer_bytes(substream), 1072 1); 1073 1074 spin_lock(&chip->reg_lock); 1075 #ifdef WIN9X 1076 /* FIXME: enable playback/recording??? */ 1077 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2; 1078 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); 1079 1080 /* start capture again */ 1081 /* FIXME: what is this value (0x0010)??? */ 1082 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING; 1083 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); 1084 #else 1085 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, 1086 0x0000); 1087 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, 1088 DMA_PLAY_SOMETHING1); 1089 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, 1090 DMA_PLAY_SOMETHING1 | 1091 DMA_PLAY_SOMETHING2); 1092 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, 1093 DMA_RESUME | 1094 SOMETHING_ALMOST_ALWAYS_SET | 1095 DMA_EPILOGUE_SOMETHING | 1096 DMA_SOMETHING_ELSE); 1097 #endif 1098 spin_unlock(&chip->reg_lock); 1099 1100 chip->is_recording = 1; 1101 snd_azf3328_dbgplay("STARTED CAPTURE\n"); 1102 break; 1103 case SNDRV_PCM_TRIGGER_RESUME: 1104 snd_azf3328_dbgplay("RESUME CAPTURE\n"); 1105 /* resume recording if we were active */ 1106 if (chip->is_recording) 1107 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, 1108 snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS) | DMA_RESUME); 1109 break; 1110 case SNDRV_PCM_TRIGGER_STOP: 1111 snd_azf3328_dbgplay("STOP CAPTURE\n"); 1112 1113 spin_lock(&chip->reg_lock); 1114 /* stop recording */ 1115 status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS); 1116 1117 status1 &= ~DMA_RESUME; 1118 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); 1119 1120 status1 |= DMA_PLAY_SOMETHING1; 1121 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); 1122 1123 status1 &= ~DMA_PLAY_SOMETHING1; 1124 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); 1125 spin_unlock(&chip->reg_lock); 1126 1127 chip->is_recording = 0; 1128 snd_azf3328_dbgplay("STOPPED CAPTURE\n"); 1129 break; 1130 case SNDRV_PCM_TRIGGER_SUSPEND: 1131 snd_azf3328_dbgplay("SUSPEND CAPTURE\n"); 1132 /* make sure recording is stopped */ 1133 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, 1134 snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS) & ~DMA_RESUME); 1135 break; 1136 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 1137 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n"); 1138 break; 1139 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 1140 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n"); 1141 break; 1142 default: 1143 printk(KERN_ERR "FIXME: unknown trigger mode!\n"); 1144 return -EINVAL; 1145 } 1146 1147 snd_azf3328_dbgcallleave(); 1148 return result; 1149 } 1150 1151 static snd_pcm_uframes_t 1152 snd_azf3328_playback_pointer(struct snd_pcm_substream *substream) 1153 { 1154 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1155 unsigned long bufptr, result; 1156 snd_pcm_uframes_t frmres; 1157 1158 #ifdef QUERY_HARDWARE 1159 bufptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_START_1); 1160 #else 1161 bufptr = substream->runtime->dma_addr; 1162 #endif 1163 result = inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS); 1164 1165 /* calculate offset */ 1166 result -= bufptr; 1167 frmres = bytes_to_frames( substream->runtime, result); 1168 snd_azf3328_dbgplay("PLAY @ 0x%8lx, frames %8ld\n", result, frmres); 1169 return frmres; 1170 } 1171 1172 static snd_pcm_uframes_t 1173 snd_azf3328_capture_pointer(struct snd_pcm_substream *substream) 1174 { 1175 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1176 unsigned long bufptr, result; 1177 snd_pcm_uframes_t frmres; 1178 1179 #ifdef QUERY_HARDWARE 1180 bufptr = inl(chip->codec_port+IDX_IO_REC_DMA_START_1); 1181 #else 1182 bufptr = substream->runtime->dma_addr; 1183 #endif 1184 result = inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS); 1185 1186 /* calculate offset */ 1187 result -= bufptr; 1188 frmres = bytes_to_frames( substream->runtime, result); 1189 snd_azf3328_dbgplay("REC @ 0x%8lx, frames %8ld\n", result, frmres); 1190 return frmres; 1191 } 1192 1193 static irqreturn_t 1194 snd_azf3328_interrupt(int irq, void *dev_id, struct pt_regs *regs) 1195 { 1196 struct snd_azf3328 *chip = dev_id; 1197 u8 status, which; 1198 static unsigned long irq_count; 1199 1200 status = snd_azf3328_codec_inb(chip, IDX_IO_IRQSTATUS); 1201 1202 /* fast path out, to ease interrupt sharing */ 1203 if (!(status & (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_MPU401|IRQ_TIMER))) 1204 return IRQ_NONE; /* must be interrupt for another device */ 1205 1206 snd_azf3328_dbgplay("Interrupt %ld!\nIDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQTYPE %04x, IDX_IO_IRQSTATUS %04x\n", 1207 irq_count, 1208 snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS), 1209 snd_azf3328_codec_inw(chip, IDX_IO_PLAY_IRQTYPE), 1210 status); 1211 1212 if (status & IRQ_TIMER) { 1213 /* snd_azf3328_dbgplay("timer %ld\n", inl(chip->codec_port+IDX_IO_TIMER_VALUE) & TIMER_VALUE_MASK); */ 1214 if (chip->timer) 1215 snd_timer_interrupt(chip->timer, chip->timer->sticks); 1216 /* ACK timer */ 1217 spin_lock(&chip->reg_lock); 1218 snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x07); 1219 spin_unlock(&chip->reg_lock); 1220 snd_azf3328_dbgplay("azt3328: timer IRQ\n"); 1221 } 1222 if (status & IRQ_PLAYBACK) { 1223 spin_lock(&chip->reg_lock); 1224 which = snd_azf3328_codec_inb(chip, IDX_IO_PLAY_IRQTYPE); 1225 /* ack all IRQ types immediately */ 1226 snd_azf3328_codec_outb(chip, IDX_IO_PLAY_IRQTYPE, which); 1227 spin_unlock(&chip->reg_lock); 1228 1229 if (chip->pcm && chip->playback_substream) { 1230 snd_pcm_period_elapsed(chip->playback_substream); 1231 snd_azf3328_dbgplay("PLAY period done (#%x), @ %x\n", 1232 which, 1233 inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS)); 1234 } else 1235 snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n"); 1236 if (which & IRQ_PLAY_SOMETHING) 1237 snd_azf3328_dbgplay("azt3328: unknown play IRQ type occurred, please report!\n"); 1238 } 1239 if (status & IRQ_RECORDING) { 1240 spin_lock(&chip->reg_lock); 1241 which = snd_azf3328_codec_inb(chip, IDX_IO_REC_IRQTYPE); 1242 /* ack all IRQ types immediately */ 1243 snd_azf3328_codec_outb(chip, IDX_IO_REC_IRQTYPE, which); 1244 spin_unlock(&chip->reg_lock); 1245 1246 if (chip->pcm && chip->capture_substream) { 1247 snd_pcm_period_elapsed(chip->capture_substream); 1248 snd_azf3328_dbgplay("REC period done (#%x), @ %x\n", 1249 which, 1250 inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS)); 1251 } else 1252 snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n"); 1253 if (which & IRQ_REC_SOMETHING) 1254 snd_azf3328_dbgplay("azt3328: unknown rec IRQ type occurred, please report!\n"); 1255 } 1256 /* MPU401 has less critical IRQ requirements 1257 * than timer and playback/recording, right? */ 1258 if (status & IRQ_MPU401) { 1259 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs); 1260 1261 /* hmm, do we have to ack the IRQ here somehow? 1262 * If so, then I don't know how... */ 1263 snd_azf3328_dbgplay("azt3328: MPU401 IRQ\n"); 1264 } 1265 irq_count++; 1266 return IRQ_HANDLED; 1267 } 1268 1269 /*****************************************************************/ 1270 1271 static const struct snd_pcm_hardware snd_azf3328_playback = 1272 { 1273 /* FIXME!! Correct? */ 1274 .info = SNDRV_PCM_INFO_MMAP | 1275 SNDRV_PCM_INFO_INTERLEAVED | 1276 SNDRV_PCM_INFO_MMAP_VALID, 1277 .formats = SNDRV_PCM_FMTBIT_S8 | 1278 SNDRV_PCM_FMTBIT_U8 | 1279 SNDRV_PCM_FMTBIT_S16_LE | 1280 SNDRV_PCM_FMTBIT_U16_LE, 1281 .rates = SNDRV_PCM_RATE_5512 | 1282 SNDRV_PCM_RATE_8000_48000 | 1283 SNDRV_PCM_RATE_KNOT, 1284 .rate_min = 4000, 1285 .rate_max = 66200, 1286 .channels_min = 1, 1287 .channels_max = 2, 1288 .buffer_bytes_max = 65536, 1289 .period_bytes_min = 64, 1290 .period_bytes_max = 65536, 1291 .periods_min = 1, 1292 .periods_max = 1024, 1293 /* FIXME: maybe that card actually has a FIFO? 1294 * Hmm, it seems newer revisions do have one, but we still don't know 1295 * its size... */ 1296 .fifo_size = 0, 1297 }; 1298 1299 static const struct snd_pcm_hardware snd_azf3328_capture = 1300 { 1301 /* FIXME */ 1302 .info = SNDRV_PCM_INFO_MMAP | 1303 SNDRV_PCM_INFO_INTERLEAVED | 1304 SNDRV_PCM_INFO_MMAP_VALID, 1305 .formats = SNDRV_PCM_FMTBIT_S8 | 1306 SNDRV_PCM_FMTBIT_U8 | 1307 SNDRV_PCM_FMTBIT_S16_LE | 1308 SNDRV_PCM_FMTBIT_U16_LE, 1309 .rates = SNDRV_PCM_RATE_5512 | 1310 SNDRV_PCM_RATE_8000_48000 | 1311 SNDRV_PCM_RATE_KNOT, 1312 .rate_min = 4000, 1313 .rate_max = 66200, 1314 .channels_min = 1, 1315 .channels_max = 2, 1316 .buffer_bytes_max = 65536, 1317 .period_bytes_min = 64, 1318 .period_bytes_max = 65536, 1319 .periods_min = 1, 1320 .periods_max = 1024, 1321 .fifo_size = 0, 1322 }; 1323 1324 1325 static unsigned int snd_azf3328_fixed_rates[] = { 1326 4000, 4800, 5512, 6620, 8000, 9600, 11025, 13240, 16000, 22050, 32000, 1327 44100, 48000, 66200 }; 1328 static struct snd_pcm_hw_constraint_list snd_azf3328_hw_constraints_rates = { 1329 .count = ARRAY_SIZE(snd_azf3328_fixed_rates), 1330 .list = snd_azf3328_fixed_rates, 1331 .mask = 0, 1332 }; 1333 1334 /*****************************************************************/ 1335 1336 static int 1337 snd_azf3328_playback_open(struct snd_pcm_substream *substream) 1338 { 1339 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1340 struct snd_pcm_runtime *runtime = substream->runtime; 1341 1342 snd_azf3328_dbgcallenter(); 1343 chip->playback_substream = substream; 1344 runtime->hw = snd_azf3328_playback; 1345 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 1346 &snd_azf3328_hw_constraints_rates); 1347 snd_azf3328_dbgcallleave(); 1348 return 0; 1349 } 1350 1351 static int 1352 snd_azf3328_capture_open(struct snd_pcm_substream *substream) 1353 { 1354 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1355 struct snd_pcm_runtime *runtime = substream->runtime; 1356 1357 snd_azf3328_dbgcallenter(); 1358 chip->capture_substream = substream; 1359 runtime->hw = snd_azf3328_capture; 1360 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 1361 &snd_azf3328_hw_constraints_rates); 1362 snd_azf3328_dbgcallleave(); 1363 return 0; 1364 } 1365 1366 static int 1367 snd_azf3328_playback_close(struct snd_pcm_substream *substream) 1368 { 1369 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1370 1371 snd_azf3328_dbgcallenter(); 1372 1373 chip->playback_substream = NULL; 1374 snd_azf3328_dbgcallleave(); 1375 return 0; 1376 } 1377 1378 static int 1379 snd_azf3328_capture_close(struct snd_pcm_substream *substream) 1380 { 1381 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1382 1383 snd_azf3328_dbgcallenter(); 1384 chip->capture_substream = NULL; 1385 snd_azf3328_dbgcallleave(); 1386 return 0; 1387 } 1388 1389 /******************************************************************/ 1390 1391 static struct snd_pcm_ops snd_azf3328_playback_ops = { 1392 .open = snd_azf3328_playback_open, 1393 .close = snd_azf3328_playback_close, 1394 .ioctl = snd_pcm_lib_ioctl, 1395 .hw_params = snd_azf3328_hw_params, 1396 .hw_free = snd_azf3328_hw_free, 1397 .prepare = snd_azf3328_playback_prepare, 1398 .trigger = snd_azf3328_playback_trigger, 1399 .pointer = snd_azf3328_playback_pointer 1400 }; 1401 1402 static struct snd_pcm_ops snd_azf3328_capture_ops = { 1403 .open = snd_azf3328_capture_open, 1404 .close = snd_azf3328_capture_close, 1405 .ioctl = snd_pcm_lib_ioctl, 1406 .hw_params = snd_azf3328_hw_params, 1407 .hw_free = snd_azf3328_hw_free, 1408 .prepare = snd_azf3328_capture_prepare, 1409 .trigger = snd_azf3328_capture_trigger, 1410 .pointer = snd_azf3328_capture_pointer 1411 }; 1412 1413 static int __devinit 1414 snd_azf3328_pcm(struct snd_azf3328 *chip, int device) 1415 { 1416 struct snd_pcm *pcm; 1417 int err; 1418 1419 snd_azf3328_dbgcallenter(); 1420 if ((err = snd_pcm_new(chip->card, "AZF3328 DSP", device, 1, 1, &pcm)) < 0) 1421 return err; 1422 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_azf3328_playback_ops); 1423 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_azf3328_capture_ops); 1424 1425 pcm->private_data = chip; 1426 pcm->info_flags = 0; 1427 strcpy(pcm->name, chip->card->shortname); 1428 chip->pcm = pcm; 1429 1430 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1431 snd_dma_pci_data(chip->pci), 64*1024, 64*1024); 1432 1433 snd_azf3328_dbgcallleave(); 1434 return 0; 1435 } 1436 1437 /******************************************************************/ 1438 1439 #ifdef SUPPORT_JOYSTICK 1440 static int __devinit 1441 snd_azf3328_config_joystick(struct snd_azf3328 *chip, int dev) 1442 { 1443 struct gameport *gp; 1444 struct resource *r; 1445 1446 if (!joystick[dev]) 1447 return -ENODEV; 1448 1449 if (!(r = request_region(0x200, 8, "AZF3328 gameport"))) { 1450 printk(KERN_WARNING "azt3328: cannot reserve joystick ports\n"); 1451 return -EBUSY; 1452 } 1453 1454 chip->gameport = gp = gameport_allocate_port(); 1455 if (!gp) { 1456 printk(KERN_ERR "azt3328: cannot allocate memory for gameport\n"); 1457 release_and_free_resource(r); 1458 return -ENOMEM; 1459 } 1460 1461 gameport_set_name(gp, "AZF3328 Gameport"); 1462 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); 1463 gameport_set_dev_parent(gp, &chip->pci->dev); 1464 gp->io = 0x200; 1465 gameport_set_port_data(gp, r); 1466 1467 snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR, 1468 snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) | LEGACY_JOY); 1469 1470 gameport_register_port(chip->gameport); 1471 1472 return 0; 1473 } 1474 1475 static void 1476 snd_azf3328_free_joystick(struct snd_azf3328 *chip) 1477 { 1478 if (chip->gameport) { 1479 struct resource *r = gameport_get_port_data(chip->gameport); 1480 1481 gameport_unregister_port(chip->gameport); 1482 chip->gameport = NULL; 1483 /* disable gameport */ 1484 snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR, 1485 snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY); 1486 release_and_free_resource(r); 1487 } 1488 } 1489 #else 1490 static inline int 1491 snd_azf3328_config_joystick(struct snd_azf3328 *chip, int dev) { return -ENOSYS; } 1492 static inline void 1493 snd_azf3328_free_joystick(struct snd_azf3328 *chip) { } 1494 #endif 1495 1496 /******************************************************************/ 1497 1498 static int 1499 snd_azf3328_free(struct snd_azf3328 *chip) 1500 { 1501 if (chip->irq < 0) 1502 goto __end_hw; 1503 1504 /* reset (close) mixer */ 1505 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1); /* first mute master volume */ 1506 snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000); 1507 1508 /* interrupt setup - mask everything (FIXME!) */ 1509 /* well, at least we know how to disable the timer IRQ */ 1510 snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x00); 1511 1512 synchronize_irq(chip->irq); 1513 __end_hw: 1514 snd_azf3328_free_joystick(chip); 1515 if (chip->irq >= 0) 1516 free_irq(chip->irq, (void *)chip); 1517 pci_release_regions(chip->pci); 1518 pci_disable_device(chip->pci); 1519 1520 kfree(chip); 1521 return 0; 1522 } 1523 1524 static int 1525 snd_azf3328_dev_free(struct snd_device *device) 1526 { 1527 struct snd_azf3328 *chip = device->device_data; 1528 return snd_azf3328_free(chip); 1529 } 1530 1531 /******************************************************************/ 1532 1533 /*** NOTE: the physical timer resolution actually is 1024000 ticks per second, 1534 *** but announcing those attributes to user-space would make programs 1535 *** configure the timer to a 1 tick value, resulting in an absolutely fatal 1536 *** timer IRQ storm. 1537 *** Thus I chose to announce a down-scaled virtual timer to the outside and 1538 *** calculate real timer countdown values internally. 1539 *** (the scale factor can be set via module parameter "seqtimer_scaling"). 1540 ***/ 1541 1542 static int 1543 snd_azf3328_timer_start(struct snd_timer *timer) 1544 { 1545 struct snd_azf3328 *chip; 1546 unsigned long flags; 1547 unsigned int delay; 1548 1549 snd_azf3328_dbgcallenter(); 1550 chip = snd_timer_chip(timer); 1551 delay = ((timer->sticks * seqtimer_scaling) - 1) & TIMER_VALUE_MASK; 1552 if (delay < 49) { 1553 /* uhoh, that's not good, since user-space won't know about 1554 * this timing tweak 1555 * (we need to do it to avoid a lockup, though) */ 1556 1557 snd_azf3328_dbgtimer("delay was too low (%d)!\n", delay); 1558 delay = 49; /* minimum time is 49 ticks */ 1559 } 1560 snd_azf3328_dbgtimer("setting timer countdown value %d, add COUNTDOWN|IRQ\n", delay); 1561 delay |= TIMER_ENABLE_COUNTDOWN | TIMER_ENABLE_IRQ; 1562 spin_lock_irqsave(&chip->reg_lock, flags); 1563 snd_azf3328_codec_outl(chip, IDX_IO_TIMER_VALUE, delay); 1564 spin_unlock_irqrestore(&chip->reg_lock, flags); 1565 snd_azf3328_dbgcallleave(); 1566 return 0; 1567 } 1568 1569 static int 1570 snd_azf3328_timer_stop(struct snd_timer *timer) 1571 { 1572 struct snd_azf3328 *chip; 1573 unsigned long flags; 1574 1575 snd_azf3328_dbgcallenter(); 1576 chip = snd_timer_chip(timer); 1577 spin_lock_irqsave(&chip->reg_lock, flags); 1578 /* disable timer countdown and interrupt */ 1579 /* FIXME: should we write TIMER_ACK_IRQ here? */ 1580 snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0); 1581 spin_unlock_irqrestore(&chip->reg_lock, flags); 1582 snd_azf3328_dbgcallleave(); 1583 return 0; 1584 } 1585 1586 1587 static int 1588 snd_azf3328_timer_precise_resolution(struct snd_timer *timer, 1589 unsigned long *num, unsigned long *den) 1590 { 1591 snd_azf3328_dbgcallenter(); 1592 *num = 1; 1593 *den = 1024000 / seqtimer_scaling; 1594 snd_azf3328_dbgcallleave(); 1595 return 0; 1596 } 1597 1598 static struct snd_timer_hardware snd_azf3328_timer_hw = { 1599 .flags = SNDRV_TIMER_HW_AUTO, 1600 .resolution = 977, /* 1000000/1024000 = 0.9765625us */ 1601 .ticks = 1024000, /* max tick count, defined by the value register; actually it's not 1024000, but 1048576, but we don't care */ 1602 .start = snd_azf3328_timer_start, 1603 .stop = snd_azf3328_timer_stop, 1604 .precise_resolution = snd_azf3328_timer_precise_resolution, 1605 }; 1606 1607 static int __devinit 1608 snd_azf3328_timer(struct snd_azf3328 *chip, int device) 1609 { 1610 struct snd_timer *timer = NULL; 1611 struct snd_timer_id tid; 1612 int err; 1613 1614 snd_azf3328_dbgcallenter(); 1615 tid.dev_class = SNDRV_TIMER_CLASS_CARD; 1616 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; 1617 tid.card = chip->card->number; 1618 tid.device = device; 1619 tid.subdevice = 0; 1620 1621 snd_azf3328_timer_hw.resolution *= seqtimer_scaling; 1622 snd_azf3328_timer_hw.ticks /= seqtimer_scaling; 1623 if ((err = snd_timer_new(chip->card, "AZF3328", &tid, &timer)) < 0) { 1624 goto out; 1625 } 1626 1627 strcpy(timer->name, "AZF3328 timer"); 1628 timer->private_data = chip; 1629 timer->hw = snd_azf3328_timer_hw; 1630 1631 chip->timer = timer; 1632 1633 err = 0; 1634 1635 out: 1636 snd_azf3328_dbgcallleave(); 1637 return err; 1638 } 1639 1640 /******************************************************************/ 1641 1642 #if 0 1643 /* check whether a bit can be modified */ 1644 static void 1645 snd_azf3328_test_bit(unsigned int reg, int bit) 1646 { 1647 unsigned char val, valoff, valon; 1648 1649 val = inb(reg); 1650 1651 outb(val & ~(1 << bit), reg); 1652 valoff = inb(reg); 1653 1654 outb(val|(1 << bit), reg); 1655 valon = inb(reg); 1656 1657 outb(val, reg); 1658 1659 printk(KERN_ERR "reg %04x bit %d: %02x %02x %02x\n", reg, bit, val, valoff, valon); 1660 } 1661 #endif 1662 1663 static void 1664 snd_azf3328_debug_show_ports(const struct snd_azf3328 *chip) 1665 { 1666 #if DEBUG_MISC 1667 u16 tmp; 1668 1669 snd_azf3328_dbgmisc("codec_port 0x%lx, io2_port 0x%lx, mpu_port 0x%lx, synth_port 0x%lx, mixer_port 0x%lx, irq %d\n", chip->codec_port, chip->io2_port, chip->mpu_port, chip->synth_port, chip->mixer_port, chip->irq); 1670 1671 snd_azf3328_dbgmisc("io2 %02x %02x %02x %02x %02x %02x\n", snd_azf3328_io2_inb(chip, 0), snd_azf3328_io2_inb(chip, 1), snd_azf3328_io2_inb(chip, 2), snd_azf3328_io2_inb(chip, 3), snd_azf3328_io2_inb(chip, 4), snd_azf3328_io2_inb(chip, 5)); 1672 1673 for (tmp=0; tmp <= 0x01; tmp += 1) 1674 snd_azf3328_dbgmisc("0x%02x: opl 0x%04x, mpu300 0x%04x, mpu310 0x%04x, mpu320 0x%04x, mpu330 0x%04x\n", tmp, inb(0x388 + tmp), inb(0x300 + tmp), inb(0x310 + tmp), inb(0x320 + tmp), inb(0x330 + tmp)); 1675 1676 for (tmp = 0; tmp <= 0x6E; tmp += 2) 1677 snd_azf3328_dbgmisc("0x%02x: 0x%04x\n", tmp, snd_azf3328_codec_inb(chip, tmp)); 1678 #endif 1679 } 1680 1681 static int __devinit 1682 snd_azf3328_create(struct snd_card *card, 1683 struct pci_dev *pci, 1684 unsigned long device_type, 1685 struct snd_azf3328 ** rchip) 1686 { 1687 struct snd_azf3328 *chip; 1688 int err; 1689 static struct snd_device_ops ops = { 1690 .dev_free = snd_azf3328_dev_free, 1691 }; 1692 u16 tmp; 1693 1694 *rchip = NULL; 1695 1696 if ((err = pci_enable_device(pci)) < 0) 1697 return err; 1698 1699 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 1700 if (chip == NULL) { 1701 err = -ENOMEM; 1702 goto out_err; 1703 } 1704 spin_lock_init(&chip->reg_lock); 1705 chip->card = card; 1706 chip->pci = pci; 1707 chip->irq = -1; 1708 1709 /* check if we can restrict PCI DMA transfers to 24 bits */ 1710 if (pci_set_dma_mask(pci, DMA_24BIT_MASK) < 0 || 1711 pci_set_consistent_dma_mask(pci, DMA_24BIT_MASK) < 0) { 1712 snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n"); 1713 err = -ENXIO; 1714 goto out_err; 1715 } 1716 1717 if ((err = pci_request_regions(pci, "Aztech AZF3328")) < 0) { 1718 goto out_err; 1719 } 1720 1721 chip->codec_port = pci_resource_start(pci, 0); 1722 chip->io2_port = pci_resource_start(pci, 1); 1723 chip->mpu_port = pci_resource_start(pci, 2); 1724 chip->synth_port = pci_resource_start(pci, 3); 1725 chip->mixer_port = pci_resource_start(pci, 4); 1726 1727 if (request_irq(pci->irq, snd_azf3328_interrupt, IRQF_DISABLED|IRQF_SHARED, card->shortname, (void *)chip)) { 1728 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); 1729 err = -EBUSY; 1730 goto out_err; 1731 } 1732 chip->irq = pci->irq; 1733 pci_set_master(pci); 1734 synchronize_irq(chip->irq); 1735 1736 snd_azf3328_debug_show_ports(chip); 1737 1738 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 1739 goto out_err; 1740 } 1741 1742 /* create mixer interface & switches */ 1743 if ((err = snd_azf3328_mixer_new(chip)) < 0) 1744 goto out_err; 1745 1746 #if 0 1747 /* set very low bitrate to reduce noise and power consumption? */ 1748 snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 5512, 8, 1); 1749 #endif 1750 1751 /* standard chip init stuff */ 1752 /* default IRQ init value */ 1753 tmp = DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE; 1754 1755 spin_lock_irq(&chip->reg_lock); 1756 snd_azf3328_codec_outb(chip, IDX_IO_PLAY_FLAGS, tmp); 1757 snd_azf3328_codec_outb(chip, IDX_IO_REC_FLAGS, tmp); 1758 snd_azf3328_codec_outb(chip, IDX_IO_SOMETHING_FLAGS, tmp); 1759 snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x00); /* disable timer */ 1760 spin_unlock_irq(&chip->reg_lock); 1761 1762 snd_card_set_dev(card, &pci->dev); 1763 1764 *rchip = chip; 1765 1766 err = 0; 1767 goto out; 1768 1769 out_err: 1770 if (chip) 1771 snd_azf3328_free(chip); 1772 pci_disable_device(pci); 1773 1774 out: 1775 return err; 1776 } 1777 1778 static int __devinit 1779 snd_azf3328_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) 1780 { 1781 static int dev; 1782 struct snd_card *card; 1783 struct snd_azf3328 *chip; 1784 struct snd_opl3 *opl3; 1785 int err; 1786 1787 snd_azf3328_dbgcallenter(); 1788 if (dev >= SNDRV_CARDS) 1789 return -ENODEV; 1790 if (!enable[dev]) { 1791 dev++; 1792 return -ENOENT; 1793 } 1794 1795 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0 ); 1796 if (card == NULL) 1797 return -ENOMEM; 1798 1799 strcpy(card->driver, "AZF3328"); 1800 strcpy(card->shortname, "Aztech AZF3328 (PCI168)"); 1801 1802 if ((err = snd_azf3328_create(card, pci, pci_id->driver_data, &chip)) < 0) { 1803 goto out_err; 1804 } 1805 1806 card->private_data = chip; 1807 1808 if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_MPU401, 1809 chip->mpu_port, MPU401_INFO_INTEGRATED, 1810 pci->irq, 0, &chip->rmidi)) < 0) { 1811 snd_printk(KERN_ERR "azf3328: no MPU-401 device at 0x%lx?\n", chip->mpu_port); 1812 goto out_err; 1813 } 1814 1815 if ((err = snd_azf3328_timer(chip, 0)) < 0) { 1816 goto out_err; 1817 } 1818 1819 if ((err = snd_azf3328_pcm(chip, 0)) < 0) { 1820 goto out_err; 1821 } 1822 1823 if (snd_opl3_create(card, chip->synth_port, chip->synth_port+2, 1824 OPL3_HW_AUTO, 1, &opl3) < 0) { 1825 snd_printk(KERN_ERR "azf3328: no OPL3 device at 0x%lx-0x%lx?\n", 1826 chip->synth_port, chip->synth_port+2 ); 1827 } else { 1828 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) { 1829 goto out_err; 1830 } 1831 } 1832 1833 opl3->private_data = chip; 1834 1835 sprintf(card->longname, "%s at 0x%lx, irq %i", 1836 card->shortname, chip->codec_port, chip->irq); 1837 1838 if ((err = snd_card_register(card)) < 0) { 1839 goto out_err; 1840 } 1841 1842 #ifdef MODULE 1843 printk( 1844 "azt3328: Sound driver for Aztech AZF3328-based soundcards such as PCI168\n" 1845 "azt3328: (hardware was completely undocumented - ZERO support from Aztech).\n" 1846 "azt3328: Feel free to contact andi AT lisas.de for bug reports etc.!\n" 1847 "azt3328: User-scalable sequencer timer set to %dHz (1024000Hz / %d).\n", 1848 1024000 / seqtimer_scaling, seqtimer_scaling); 1849 #endif 1850 1851 if (snd_azf3328_config_joystick(chip, dev) < 0) 1852 snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR, 1853 snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY); 1854 1855 pci_set_drvdata(pci, card); 1856 dev++; 1857 1858 err = 0; 1859 goto out; 1860 1861 out_err: 1862 snd_card_free(card); 1863 1864 out: 1865 snd_azf3328_dbgcallleave(); 1866 return err; 1867 } 1868 1869 static void __devexit 1870 snd_azf3328_remove(struct pci_dev *pci) 1871 { 1872 snd_azf3328_dbgcallenter(); 1873 snd_card_free(pci_get_drvdata(pci)); 1874 pci_set_drvdata(pci, NULL); 1875 snd_azf3328_dbgcallleave(); 1876 } 1877 1878 #ifdef CONFIG_PM 1879 static int 1880 snd_azf3328_suspend(struct pci_dev *pci, pm_message_t state) 1881 { 1882 struct snd_card *card = pci_get_drvdata(pci); 1883 struct snd_azf3328 *chip = card->private_data; 1884 int reg; 1885 1886 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 1887 1888 snd_pcm_suspend_all(chip->pcm); 1889 1890 for (reg = 0; reg < AZF_IO_SIZE_MIXER_PM / 2; reg++) 1891 chip->saved_regs_mixer[reg] = inw(chip->mixer_port + reg * 2); 1892 1893 /* make sure to disable master volume etc. to prevent looping sound */ 1894 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1); 1895 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1); 1896 1897 for (reg = 0; reg < AZF_IO_SIZE_CODEC_PM / 2; reg++) 1898 chip->saved_regs_codec[reg] = inw(chip->codec_port + reg * 2); 1899 for (reg = 0; reg < AZF_IO_SIZE_IO2_PM / 2; reg++) 1900 chip->saved_regs_io2[reg] = inw(chip->io2_port + reg * 2); 1901 for (reg = 0; reg < AZF_IO_SIZE_MPU_PM / 2; reg++) 1902 chip->saved_regs_mpu[reg] = inw(chip->mpu_port + reg * 2); 1903 for (reg = 0; reg < AZF_IO_SIZE_SYNTH_PM / 2; reg++) 1904 chip->saved_regs_synth[reg] = inw(chip->synth_port + reg * 2); 1905 1906 pci_set_power_state(pci, PCI_D3hot); 1907 pci_disable_device(pci); 1908 pci_save_state(pci); 1909 return 0; 1910 } 1911 1912 static int 1913 snd_azf3328_resume(struct pci_dev *pci) 1914 { 1915 struct snd_card *card = pci_get_drvdata(pci); 1916 struct snd_azf3328 *chip = card->private_data; 1917 int reg; 1918 1919 pci_restore_state(pci); 1920 pci_enable_device(pci); 1921 pci_set_power_state(pci, PCI_D0); 1922 pci_set_master(pci); 1923 1924 for (reg = 0; reg < AZF_IO_SIZE_IO2_PM / 2; reg++) 1925 outw(chip->saved_regs_io2[reg], chip->io2_port + reg * 2); 1926 for (reg = 0; reg < AZF_IO_SIZE_MPU_PM / 2; reg++) 1927 outw(chip->saved_regs_mpu[reg], chip->mpu_port + reg * 2); 1928 for (reg = 0; reg < AZF_IO_SIZE_SYNTH_PM / 2; reg++) 1929 outw(chip->saved_regs_synth[reg], chip->synth_port + reg * 2); 1930 for (reg = 0; reg < AZF_IO_SIZE_MIXER_PM / 2; reg++) 1931 outw(chip->saved_regs_mixer[reg], chip->mixer_port + reg * 2); 1932 for (reg = 0; reg < AZF_IO_SIZE_CODEC_PM / 2; reg++) 1933 outw(chip->saved_regs_codec[reg], chip->codec_port + reg * 2); 1934 1935 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 1936 return 0; 1937 } 1938 #endif 1939 1940 1941 1942 1943 static struct pci_driver driver = { 1944 .name = "AZF3328", 1945 .id_table = snd_azf3328_ids, 1946 .probe = snd_azf3328_probe, 1947 .remove = __devexit_p(snd_azf3328_remove), 1948 #ifdef CONFIG_PM 1949 .suspend = snd_azf3328_suspend, 1950 .resume = snd_azf3328_resume, 1951 #endif 1952 }; 1953 1954 static int __init 1955 alsa_card_azf3328_init(void) 1956 { 1957 int err; 1958 snd_azf3328_dbgcallenter(); 1959 err = pci_register_driver(&driver); 1960 snd_azf3328_dbgcallleave(); 1961 return err; 1962 } 1963 1964 static void __exit 1965 alsa_card_azf3328_exit(void) 1966 { 1967 snd_azf3328_dbgcallenter(); 1968 pci_unregister_driver(&driver); 1969 snd_azf3328_dbgcallleave(); 1970 } 1971 1972 module_init(alsa_card_azf3328_init) 1973 module_exit(alsa_card_azf3328_exit) 1974