1*91662577STakashi Iwai /***************************************************************************** 2*91662577STakashi Iwai * 3*91662577STakashi Iwai * Copyright (C) 2008 Cedric Bregardis <cedric.bregardis@free.fr> and 4*91662577STakashi Iwai * Jean-Christian Hassler <jhassler@free.fr> 5*91662577STakashi Iwai * Copyright 1998 Emagic Soft- und Hardware GmbH 6*91662577STakashi Iwai * Copyright 2002 Martijn Sipkema 7*91662577STakashi Iwai * 8*91662577STakashi Iwai * This file is part of the Audiowerk2 ALSA driver 9*91662577STakashi Iwai * 10*91662577STakashi Iwai * The Audiowerk2 ALSA driver is free software; you can redistribute it and/or 11*91662577STakashi Iwai * modify it under the terms of the GNU General Public License as published by 12*91662577STakashi Iwai * the Free Software Foundation; version 2. 13*91662577STakashi Iwai * 14*91662577STakashi Iwai * The Audiowerk2 ALSA driver is distributed in the hope that it will be useful, 15*91662577STakashi Iwai * but WITHOUT ANY WARRANTY; without even the implied warranty of 16*91662577STakashi Iwai * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17*91662577STakashi Iwai * GNU General Public License for more details. 18*91662577STakashi Iwai * 19*91662577STakashi Iwai * You should have received a copy of the GNU General Public License 20*91662577STakashi Iwai * along with the Audiowerk2 ALSA driver; if not, write to the Free Software 21*91662577STakashi Iwai * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 22*91662577STakashi Iwai * USA. 23*91662577STakashi Iwai * 24*91662577STakashi Iwai *****************************************************************************/ 25*91662577STakashi Iwai 26*91662577STakashi Iwai #define TSL_WS0 (1UL << 31) 27*91662577STakashi Iwai #define TSL_WS1 (1UL << 30) 28*91662577STakashi Iwai #define TSL_WS2 (1UL << 29) 29*91662577STakashi Iwai #define TSL_WS3 (1UL << 28) 30*91662577STakashi Iwai #define TSL_WS4 (1UL << 27) 31*91662577STakashi Iwai #define TSL_DIS_A1 (1UL << 24) 32*91662577STakashi Iwai #define TSL_SDW_A1 (1UL << 23) 33*91662577STakashi Iwai #define TSL_SIB_A1 (1UL << 22) 34*91662577STakashi Iwai #define TSL_SF_A1 (1UL << 21) 35*91662577STakashi Iwai #define TSL_LF_A1 (1UL << 20) 36*91662577STakashi Iwai #define TSL_BSEL_A1 (1UL << 17) 37*91662577STakashi Iwai #define TSL_DOD_A1 (1UL << 15) 38*91662577STakashi Iwai #define TSL_LOW_A1 (1UL << 14) 39*91662577STakashi Iwai #define TSL_DIS_A2 (1UL << 11) 40*91662577STakashi Iwai #define TSL_SDW_A2 (1UL << 10) 41*91662577STakashi Iwai #define TSL_SIB_A2 (1UL << 9) 42*91662577STakashi Iwai #define TSL_SF_A2 (1UL << 8) 43*91662577STakashi Iwai #define TSL_LF_A2 (1UL << 7) 44*91662577STakashi Iwai #define TSL_BSEL_A2 (1UL << 4) 45*91662577STakashi Iwai #define TSL_DOD_A2 (1UL << 2) 46*91662577STakashi Iwai #define TSL_LOW_A2 (1UL << 1) 47*91662577STakashi Iwai #define TSL_EOS (1UL << 0) 48*91662577STakashi Iwai 49*91662577STakashi Iwai /* Audiowerk8 hardware setup: */ 50*91662577STakashi Iwai /* WS0, SD4, TSL1 - Analog/ digital in */ 51*91662577STakashi Iwai /* WS1, SD0, TSL1 - Analog out #1, digital out */ 52*91662577STakashi Iwai /* WS2, SD2, TSL1 - Analog out #2 */ 53*91662577STakashi Iwai /* WS3, SD1, TSL2 - Analog out #3 */ 54*91662577STakashi Iwai /* WS4, SD3, TSL2 - Analog out #4 */ 55*91662577STakashi Iwai 56*91662577STakashi Iwai /* Audiowerk8 timing: */ 57*91662577STakashi Iwai /* Timeslot: | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | ... */ 58*91662577STakashi Iwai 59*91662577STakashi Iwai /* A1_INPUT: */ 60*91662577STakashi Iwai /* SD4: <_ADC-L_>-------<_ADC-R_>-------< */ 61*91662577STakashi Iwai /* WS0: _______________/---------------\_ */ 62*91662577STakashi Iwai 63*91662577STakashi Iwai /* A1_OUTPUT: */ 64*91662577STakashi Iwai /* SD0: <_1-L___>-------<_1-R___>-------< */ 65*91662577STakashi Iwai /* WS1: _______________/---------------\_ */ 66*91662577STakashi Iwai /* SD2: >-------<_2-L___>-------<_2-R___> */ 67*91662577STakashi Iwai /* WS2: -------\_______________/--------- */ 68*91662577STakashi Iwai 69*91662577STakashi Iwai /* A2_OUTPUT: */ 70*91662577STakashi Iwai /* SD1: <_3-L___>-------<_3-R___>-------< */ 71*91662577STakashi Iwai /* WS3: _______________/---------------\_ */ 72*91662577STakashi Iwai /* SD3: >-------<_4-L___>-------<_4-R___> */ 73*91662577STakashi Iwai /* WS4: -------\_______________/--------- */ 74*91662577STakashi Iwai 75*91662577STakashi Iwai static int tsl1[8] = { 76*91662577STakashi Iwai 1 * TSL_SDW_A1 | 3 * TSL_BSEL_A1 | 77*91662577STakashi Iwai 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1 | TSL_LF_A1, 78*91662577STakashi Iwai 79*91662577STakashi Iwai 1 * TSL_SDW_A1 | 2 * TSL_BSEL_A1 | 80*91662577STakashi Iwai 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1, 81*91662577STakashi Iwai 82*91662577STakashi Iwai 0 * TSL_SDW_A1 | 3 * TSL_BSEL_A1 | 83*91662577STakashi Iwai 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1, 84*91662577STakashi Iwai 85*91662577STakashi Iwai 0 * TSL_SDW_A1 | 2 * TSL_BSEL_A1 | 86*91662577STakashi Iwai 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1, 87*91662577STakashi Iwai 88*91662577STakashi Iwai 1 * TSL_SDW_A1 | 1 * TSL_BSEL_A1 | 89*91662577STakashi Iwai 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1 | TSL_WS1 | TSL_WS0, 90*91662577STakashi Iwai 91*91662577STakashi Iwai 1 * TSL_SDW_A1 | 0 * TSL_BSEL_A1 | 92*91662577STakashi Iwai 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1 | TSL_WS1 | TSL_WS0, 93*91662577STakashi Iwai 94*91662577STakashi Iwai 0 * TSL_SDW_A1 | 1 * TSL_BSEL_A1 | 95*91662577STakashi Iwai 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1 | TSL_WS1 | TSL_WS0, 96*91662577STakashi Iwai 97*91662577STakashi Iwai 0 * TSL_SDW_A1 | 0 * TSL_BSEL_A1 | 0 * TSL_DIS_A1 | 98*91662577STakashi Iwai 0 * TSL_DOD_A1 | TSL_WS1 | TSL_WS0 | TSL_SF_A1 | TSL_EOS, 99*91662577STakashi Iwai }; 100*91662577STakashi Iwai 101*91662577STakashi Iwai static int tsl2[8] = { 102*91662577STakashi Iwai 0 * TSL_SDW_A2 | 3 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_LF_A2, 103*91662577STakashi Iwai 0 * TSL_SDW_A2 | 2 * TSL_BSEL_A2 | 2 * TSL_DOD_A2, 104*91662577STakashi Iwai 0 * TSL_SDW_A2 | 3 * TSL_BSEL_A2 | 2 * TSL_DOD_A2, 105*91662577STakashi Iwai 0 * TSL_SDW_A2 | 2 * TSL_BSEL_A2 | 2 * TSL_DOD_A2, 106*91662577STakashi Iwai 0 * TSL_SDW_A2 | 1 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_WS2, 107*91662577STakashi Iwai 0 * TSL_SDW_A2 | 0 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_WS2, 108*91662577STakashi Iwai 0 * TSL_SDW_A2 | 1 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_WS2, 109*91662577STakashi Iwai 0 * TSL_SDW_A2 | 0 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_WS2 | TSL_EOS 110*91662577STakashi Iwai }; 111