1 /* 2 * ALSA driver for ATI IXP 150/200/250/300 AC97 controllers 3 * 4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * 20 */ 21 22 #include <asm/io.h> 23 #include <linux/delay.h> 24 #include <linux/interrupt.h> 25 #include <linux/init.h> 26 #include <linux/pci.h> 27 #include <linux/slab.h> 28 #include <linux/module.h> 29 #include <linux/mutex.h> 30 #include <sound/core.h> 31 #include <sound/pcm.h> 32 #include <sound/pcm_params.h> 33 #include <sound/info.h> 34 #include <sound/ac97_codec.h> 35 #include <sound/initval.h> 36 37 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>"); 38 MODULE_DESCRIPTION("ATI IXP AC97 controller"); 39 MODULE_LICENSE("GPL"); 40 MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250/300/400/600}}"); 41 42 static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */ 43 static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */ 44 static int ac97_clock = 48000; 45 static char *ac97_quirk; 46 static bool spdif_aclink = 1; 47 static int ac97_codec = -1; 48 49 module_param(index, int, 0444); 50 MODULE_PARM_DESC(index, "Index value for ATI IXP controller."); 51 module_param(id, charp, 0444); 52 MODULE_PARM_DESC(id, "ID string for ATI IXP controller."); 53 module_param(ac97_clock, int, 0444); 54 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz)."); 55 module_param(ac97_quirk, charp, 0444); 56 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware."); 57 module_param(ac97_codec, int, 0444); 58 MODULE_PARM_DESC(ac97_codec, "Specify codec instead of probing."); 59 module_param(spdif_aclink, bool, 0444); 60 MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link."); 61 62 /* just for backward compatibility */ 63 static bool enable; 64 module_param(enable, bool, 0444); 65 66 67 /* 68 */ 69 70 #define ATI_REG_ISR 0x00 /* interrupt source */ 71 #define ATI_REG_ISR_IN_XRUN (1U<<0) 72 #define ATI_REG_ISR_IN_STATUS (1U<<1) 73 #define ATI_REG_ISR_OUT_XRUN (1U<<2) 74 #define ATI_REG_ISR_OUT_STATUS (1U<<3) 75 #define ATI_REG_ISR_SPDF_XRUN (1U<<4) 76 #define ATI_REG_ISR_SPDF_STATUS (1U<<5) 77 #define ATI_REG_ISR_PHYS_INTR (1U<<8) 78 #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9) 79 #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10) 80 #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11) 81 #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12) 82 #define ATI_REG_ISR_NEW_FRAME (1U<<13) 83 84 #define ATI_REG_IER 0x04 /* interrupt enable */ 85 #define ATI_REG_IER_IN_XRUN_EN (1U<<0) 86 #define ATI_REG_IER_IO_STATUS_EN (1U<<1) 87 #define ATI_REG_IER_OUT_XRUN_EN (1U<<2) 88 #define ATI_REG_IER_OUT_XRUN_COND (1U<<3) 89 #define ATI_REG_IER_SPDF_XRUN_EN (1U<<4) 90 #define ATI_REG_IER_SPDF_STATUS_EN (1U<<5) 91 #define ATI_REG_IER_PHYS_INTR_EN (1U<<8) 92 #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9) 93 #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10) 94 #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11) 95 #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12) 96 #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */ 97 #define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */ 98 99 #define ATI_REG_CMD 0x08 /* command */ 100 #define ATI_REG_CMD_POWERDOWN (1U<<0) 101 #define ATI_REG_CMD_RECEIVE_EN (1U<<1) 102 #define ATI_REG_CMD_SEND_EN (1U<<2) 103 #define ATI_REG_CMD_STATUS_MEM (1U<<3) 104 #define ATI_REG_CMD_SPDF_OUT_EN (1U<<4) 105 #define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5) 106 #define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6) 107 #define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6 108 #define ATI_REG_CMD_IN_DMA_EN (1U<<8) 109 #define ATI_REG_CMD_OUT_DMA_EN (1U<<9) 110 #define ATI_REG_CMD_SPDF_DMA_EN (1U<<10) 111 #define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11) 112 #define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12) 113 #define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12) 114 #define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12) 115 #define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12) 116 #define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12) 117 #define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16) 118 #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20) 119 #define ATI_REG_CMD_INTERLEAVE_IN (1U<<21) 120 #define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22) 121 #define ATI_REG_CMD_LOOPBACK_EN (1U<<23) 122 #define ATI_REG_CMD_PACKED_DIS (1U<<24) 123 #define ATI_REG_CMD_BURST_EN (1U<<25) 124 #define ATI_REG_CMD_PANIC_EN (1U<<26) 125 #define ATI_REG_CMD_MODEM_PRESENT (1U<<27) 126 #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28) 127 #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29) 128 #define ATI_REG_CMD_AC_SYNC (1U<<30) 129 #define ATI_REG_CMD_AC_RESET (1U<<31) 130 131 #define ATI_REG_PHYS_OUT_ADDR 0x0c 132 #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0) 133 #define ATI_REG_PHYS_OUT_RW (1U<<2) 134 #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8) 135 #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9 136 #define ATI_REG_PHYS_OUT_DATA_SHIFT 16 137 138 #define ATI_REG_PHYS_IN_ADDR 0x10 139 #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8) 140 #define ATI_REG_PHYS_IN_ADDR_SHIFT 9 141 #define ATI_REG_PHYS_IN_DATA_SHIFT 16 142 143 #define ATI_REG_SLOTREQ 0x14 144 145 #define ATI_REG_COUNTER 0x18 146 #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */ 147 #define ATI_REG_COUNTER_BITCLOCK (31U<<8) 148 149 #define ATI_REG_IN_FIFO_THRESHOLD 0x1c 150 151 #define ATI_REG_IN_DMA_LINKPTR 0x20 152 #define ATI_REG_IN_DMA_DT_START 0x24 /* RO */ 153 #define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */ 154 #define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */ 155 #define ATI_REG_IN_DMA_DT_SIZE 0x30 156 157 #define ATI_REG_OUT_DMA_SLOT 0x34 158 #define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3)) 159 #define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff 160 #define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800 161 #define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11 162 163 #define ATI_REG_OUT_DMA_LINKPTR 0x38 164 #define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */ 165 #define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */ 166 #define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */ 167 #define ATI_REG_OUT_DMA_DT_SIZE 0x48 168 169 #define ATI_REG_SPDF_CMD 0x4c 170 #define ATI_REG_SPDF_CMD_LFSR (1U<<4) 171 #define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5) 172 #define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */ 173 174 #define ATI_REG_SPDF_DMA_LINKPTR 0x50 175 #define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */ 176 #define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */ 177 #define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */ 178 #define ATI_REG_SPDF_DMA_DT_SIZE 0x60 179 180 #define ATI_REG_MODEM_MIRROR 0x7c 181 #define ATI_REG_AUDIO_MIRROR 0x80 182 183 #define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */ 184 #define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */ 185 186 #define ATI_REG_FIFO_FLUSH 0x88 187 #define ATI_REG_FIFO_OUT_FLUSH (1U<<0) 188 #define ATI_REG_FIFO_IN_FLUSH (1U<<1) 189 190 /* LINKPTR */ 191 #define ATI_REG_LINKPTR_EN (1U<<0) 192 193 /* [INT|OUT|SPDIF]_DMA_DT_SIZE */ 194 #define ATI_REG_DMA_DT_SIZE (0xffffU<<0) 195 #define ATI_REG_DMA_FIFO_USED (0x1fU<<16) 196 #define ATI_REG_DMA_FIFO_FREE (0x1fU<<21) 197 #define ATI_REG_DMA_STATE (7U<<26) 198 199 200 #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */ 201 202 203 struct atiixp; 204 205 /* 206 * DMA packate descriptor 207 */ 208 209 struct atiixp_dma_desc { 210 u32 addr; /* DMA buffer address */ 211 u16 status; /* status bits */ 212 u16 size; /* size of the packet in dwords */ 213 u32 next; /* address of the next packet descriptor */ 214 }; 215 216 /* 217 * stream enum 218 */ 219 enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */ 220 enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */ 221 enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */ 222 223 #define NUM_ATI_CODECS 3 224 225 226 /* 227 * constants and callbacks for each DMA type 228 */ 229 struct atiixp_dma_ops { 230 int type; /* ATI_DMA_XXX */ 231 unsigned int llp_offset; /* LINKPTR offset */ 232 unsigned int dt_cur; /* DT_CUR offset */ 233 /* called from open callback */ 234 void (*enable_dma)(struct atiixp *chip, int on); 235 /* called from trigger (START/STOP) */ 236 void (*enable_transfer)(struct atiixp *chip, int on); 237 /* called from trigger (STOP only) */ 238 void (*flush_dma)(struct atiixp *chip); 239 }; 240 241 /* 242 * DMA stream 243 */ 244 struct atiixp_dma { 245 const struct atiixp_dma_ops *ops; 246 struct snd_dma_buffer desc_buf; 247 struct snd_pcm_substream *substream; /* assigned PCM substream */ 248 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */ 249 unsigned int period_bytes, periods; 250 int opened; 251 int running; 252 int suspended; 253 int pcm_open_flag; 254 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */ 255 unsigned int saved_curptr; 256 }; 257 258 /* 259 * ATI IXP chip 260 */ 261 struct atiixp { 262 struct snd_card *card; 263 struct pci_dev *pci; 264 265 unsigned long addr; 266 void __iomem *remap_addr; 267 int irq; 268 269 struct snd_ac97_bus *ac97_bus; 270 struct snd_ac97 *ac97[NUM_ATI_CODECS]; 271 272 spinlock_t reg_lock; 273 274 struct atiixp_dma dmas[NUM_ATI_DMAS]; 275 struct ac97_pcm *pcms[NUM_ATI_PCMS]; 276 struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS]; 277 278 int max_channels; /* max. channels for PCM out */ 279 280 unsigned int codec_not_ready_bits; /* for codec detection */ 281 282 int spdif_over_aclink; /* passed from the module option */ 283 struct mutex open_mutex; /* playback open mutex */ 284 }; 285 286 287 /* 288 */ 289 static DEFINE_PCI_DEVICE_TABLE(snd_atiixp_ids) = { 290 { PCI_VDEVICE(ATI, 0x4341), 0 }, /* SB200 */ 291 { PCI_VDEVICE(ATI, 0x4361), 0 }, /* SB300 */ 292 { PCI_VDEVICE(ATI, 0x4370), 0 }, /* SB400 */ 293 { PCI_VDEVICE(ATI, 0x4382), 0 }, /* SB600 */ 294 { 0, } 295 }; 296 297 MODULE_DEVICE_TABLE(pci, snd_atiixp_ids); 298 299 static struct snd_pci_quirk atiixp_quirks[] = { 300 SND_PCI_QUIRK(0x105b, 0x0c81, "Foxconn RC4107MA-RS2", 0), 301 SND_PCI_QUIRK(0x15bd, 0x3100, "DFI RS482", 0), 302 { } /* terminator */ 303 }; 304 305 /* 306 * lowlevel functions 307 */ 308 309 /* 310 * update the bits of the given register. 311 * return 1 if the bits changed. 312 */ 313 static int snd_atiixp_update_bits(struct atiixp *chip, unsigned int reg, 314 unsigned int mask, unsigned int value) 315 { 316 void __iomem *addr = chip->remap_addr + reg; 317 unsigned int data, old_data; 318 old_data = data = readl(addr); 319 data &= ~mask; 320 data |= value; 321 if (old_data == data) 322 return 0; 323 writel(data, addr); 324 return 1; 325 } 326 327 /* 328 * macros for easy use 329 */ 330 #define atiixp_write(chip,reg,value) \ 331 writel(value, chip->remap_addr + ATI_REG_##reg) 332 #define atiixp_read(chip,reg) \ 333 readl(chip->remap_addr + ATI_REG_##reg) 334 #define atiixp_update(chip,reg,mask,val) \ 335 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val) 336 337 /* 338 * handling DMA packets 339 * 340 * we allocate a linear buffer for the DMA, and split it to each packet. 341 * in a future version, a scatter-gather buffer should be implemented. 342 */ 343 344 #define ATI_DESC_LIST_SIZE \ 345 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc)) 346 347 /* 348 * build packets ring for the given buffer size. 349 * 350 * IXP handles the buffer descriptors, which are connected as a linked 351 * list. although we can change the list dynamically, in this version, 352 * a static RING of buffer descriptors is used. 353 * 354 * the ring is built in this function, and is set up to the hardware. 355 */ 356 static int atiixp_build_dma_packets(struct atiixp *chip, struct atiixp_dma *dma, 357 struct snd_pcm_substream *substream, 358 unsigned int periods, 359 unsigned int period_bytes) 360 { 361 unsigned int i; 362 u32 addr, desc_addr; 363 unsigned long flags; 364 365 if (periods > ATI_MAX_DESCRIPTORS) 366 return -ENOMEM; 367 368 if (dma->desc_buf.area == NULL) { 369 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, 370 snd_dma_pci_data(chip->pci), 371 ATI_DESC_LIST_SIZE, 372 &dma->desc_buf) < 0) 373 return -ENOMEM; 374 dma->period_bytes = dma->periods = 0; /* clear */ 375 } 376 377 if (dma->periods == periods && dma->period_bytes == period_bytes) 378 return 0; 379 380 /* reset DMA before changing the descriptor table */ 381 spin_lock_irqsave(&chip->reg_lock, flags); 382 writel(0, chip->remap_addr + dma->ops->llp_offset); 383 dma->ops->enable_dma(chip, 0); 384 dma->ops->enable_dma(chip, 1); 385 spin_unlock_irqrestore(&chip->reg_lock, flags); 386 387 /* fill the entries */ 388 addr = (u32)substream->runtime->dma_addr; 389 desc_addr = (u32)dma->desc_buf.addr; 390 for (i = 0; i < periods; i++) { 391 struct atiixp_dma_desc *desc; 392 desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i]; 393 desc->addr = cpu_to_le32(addr); 394 desc->status = 0; 395 desc->size = period_bytes >> 2; /* in dwords */ 396 desc_addr += sizeof(struct atiixp_dma_desc); 397 if (i == periods - 1) 398 desc->next = cpu_to_le32((u32)dma->desc_buf.addr); 399 else 400 desc->next = cpu_to_le32(desc_addr); 401 addr += period_bytes; 402 } 403 404 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN, 405 chip->remap_addr + dma->ops->llp_offset); 406 407 dma->period_bytes = period_bytes; 408 dma->periods = periods; 409 410 return 0; 411 } 412 413 /* 414 * remove the ring buffer and release it if assigned 415 */ 416 static void atiixp_clear_dma_packets(struct atiixp *chip, struct atiixp_dma *dma, 417 struct snd_pcm_substream *substream) 418 { 419 if (dma->desc_buf.area) { 420 writel(0, chip->remap_addr + dma->ops->llp_offset); 421 snd_dma_free_pages(&dma->desc_buf); 422 dma->desc_buf.area = NULL; 423 } 424 } 425 426 /* 427 * AC97 interface 428 */ 429 static int snd_atiixp_acquire_codec(struct atiixp *chip) 430 { 431 int timeout = 1000; 432 433 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) { 434 if (! timeout--) { 435 snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n"); 436 return -EBUSY; 437 } 438 udelay(1); 439 } 440 return 0; 441 } 442 443 static unsigned short snd_atiixp_codec_read(struct atiixp *chip, unsigned short codec, unsigned short reg) 444 { 445 unsigned int data; 446 int timeout; 447 448 if (snd_atiixp_acquire_codec(chip) < 0) 449 return 0xffff; 450 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | 451 ATI_REG_PHYS_OUT_ADDR_EN | 452 ATI_REG_PHYS_OUT_RW | 453 codec; 454 atiixp_write(chip, PHYS_OUT_ADDR, data); 455 if (snd_atiixp_acquire_codec(chip) < 0) 456 return 0xffff; 457 timeout = 1000; 458 do { 459 data = atiixp_read(chip, PHYS_IN_ADDR); 460 if (data & ATI_REG_PHYS_IN_READ_FLAG) 461 return data >> ATI_REG_PHYS_IN_DATA_SHIFT; 462 udelay(1); 463 } while (--timeout); 464 /* time out may happen during reset */ 465 if (reg < 0x7c) 466 snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg); 467 return 0xffff; 468 } 469 470 471 static void snd_atiixp_codec_write(struct atiixp *chip, unsigned short codec, 472 unsigned short reg, unsigned short val) 473 { 474 unsigned int data; 475 476 if (snd_atiixp_acquire_codec(chip) < 0) 477 return; 478 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) | 479 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | 480 ATI_REG_PHYS_OUT_ADDR_EN | codec; 481 atiixp_write(chip, PHYS_OUT_ADDR, data); 482 } 483 484 485 static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97, 486 unsigned short reg) 487 { 488 struct atiixp *chip = ac97->private_data; 489 return snd_atiixp_codec_read(chip, ac97->num, reg); 490 491 } 492 493 static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg, 494 unsigned short val) 495 { 496 struct atiixp *chip = ac97->private_data; 497 snd_atiixp_codec_write(chip, ac97->num, reg, val); 498 } 499 500 /* 501 * reset AC link 502 */ 503 static int snd_atiixp_aclink_reset(struct atiixp *chip) 504 { 505 int timeout; 506 507 /* reset powerdoewn */ 508 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0)) 509 udelay(10); 510 511 /* perform a software reset */ 512 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET); 513 atiixp_read(chip, CMD); 514 udelay(10); 515 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0); 516 517 timeout = 10; 518 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) { 519 /* do a hard reset */ 520 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, 521 ATI_REG_CMD_AC_SYNC); 522 atiixp_read(chip, CMD); 523 mdelay(1); 524 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET); 525 if (!--timeout) { 526 snd_printk(KERN_ERR "atiixp: codec reset timeout\n"); 527 break; 528 } 529 } 530 531 /* deassert RESET and assert SYNC to make sure */ 532 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, 533 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET); 534 535 return 0; 536 } 537 538 #ifdef CONFIG_PM_SLEEP 539 static int snd_atiixp_aclink_down(struct atiixp *chip) 540 { 541 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */ 542 // return -EBUSY; 543 atiixp_update(chip, CMD, 544 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET, 545 ATI_REG_CMD_POWERDOWN); 546 return 0; 547 } 548 #endif 549 550 /* 551 * auto-detection of codecs 552 * 553 * the IXP chip can generate interrupts for the non-existing codecs. 554 * NEW_FRAME interrupt is used to make sure that the interrupt is generated 555 * even if all three codecs are connected. 556 */ 557 558 #define ALL_CODEC_NOT_READY \ 559 (ATI_REG_ISR_CODEC0_NOT_READY |\ 560 ATI_REG_ISR_CODEC1_NOT_READY |\ 561 ATI_REG_ISR_CODEC2_NOT_READY) 562 #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME) 563 564 static int ac97_probing_bugs(struct pci_dev *pci) 565 { 566 const struct snd_pci_quirk *q; 567 568 q = snd_pci_quirk_lookup(pci, atiixp_quirks); 569 if (q) { 570 snd_printdd(KERN_INFO 571 "Atiixp quirk for %s. Forcing codec %d\n", 572 snd_pci_quirk_name(q), q->value); 573 return q->value; 574 } 575 /* this hardware doesn't need workarounds. Probe for codec */ 576 return -1; 577 } 578 579 static int snd_atiixp_codec_detect(struct atiixp *chip) 580 { 581 int timeout; 582 583 chip->codec_not_ready_bits = 0; 584 if (ac97_codec == -1) 585 ac97_codec = ac97_probing_bugs(chip->pci); 586 if (ac97_codec >= 0) { 587 chip->codec_not_ready_bits |= 588 CODEC_CHECK_BITS ^ (1 << (ac97_codec + 10)); 589 return 0; 590 } 591 592 atiixp_write(chip, IER, CODEC_CHECK_BITS); 593 /* wait for the interrupts */ 594 timeout = 50; 595 while (timeout-- > 0) { 596 mdelay(1); 597 if (chip->codec_not_ready_bits) 598 break; 599 } 600 atiixp_write(chip, IER, 0); /* disable irqs */ 601 602 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) { 603 snd_printk(KERN_ERR "atiixp: no codec detected!\n"); 604 return -ENXIO; 605 } 606 return 0; 607 } 608 609 610 /* 611 * enable DMA and irqs 612 */ 613 static int snd_atiixp_chip_start(struct atiixp *chip) 614 { 615 unsigned int reg; 616 617 /* set up spdif, enable burst mode */ 618 reg = atiixp_read(chip, CMD); 619 reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT; 620 reg |= ATI_REG_CMD_BURST_EN; 621 atiixp_write(chip, CMD, reg); 622 623 reg = atiixp_read(chip, SPDF_CMD); 624 reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH); 625 atiixp_write(chip, SPDF_CMD, reg); 626 627 /* clear all interrupt source */ 628 atiixp_write(chip, ISR, 0xffffffff); 629 /* enable irqs */ 630 atiixp_write(chip, IER, 631 ATI_REG_IER_IO_STATUS_EN | 632 ATI_REG_IER_IN_XRUN_EN | 633 ATI_REG_IER_OUT_XRUN_EN | 634 ATI_REG_IER_SPDF_XRUN_EN | 635 ATI_REG_IER_SPDF_STATUS_EN); 636 return 0; 637 } 638 639 640 /* 641 * disable DMA and IRQs 642 */ 643 static int snd_atiixp_chip_stop(struct atiixp *chip) 644 { 645 /* clear interrupt source */ 646 atiixp_write(chip, ISR, atiixp_read(chip, ISR)); 647 /* disable irqs */ 648 atiixp_write(chip, IER, 0); 649 return 0; 650 } 651 652 653 /* 654 * PCM section 655 */ 656 657 /* 658 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current 659 * position. when SG-buffer is implemented, the offset must be calculated 660 * correctly... 661 */ 662 static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream) 663 { 664 struct atiixp *chip = snd_pcm_substream_chip(substream); 665 struct snd_pcm_runtime *runtime = substream->runtime; 666 struct atiixp_dma *dma = runtime->private_data; 667 unsigned int curptr; 668 int timeout = 1000; 669 670 while (timeout--) { 671 curptr = readl(chip->remap_addr + dma->ops->dt_cur); 672 if (curptr < dma->buf_addr) 673 continue; 674 curptr -= dma->buf_addr; 675 if (curptr >= dma->buf_bytes) 676 continue; 677 return bytes_to_frames(runtime, curptr); 678 } 679 snd_printd("atiixp: invalid DMA pointer read 0x%x (buf=%x)\n", 680 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr); 681 return 0; 682 } 683 684 /* 685 * XRUN detected, and stop the PCM substream 686 */ 687 static void snd_atiixp_xrun_dma(struct atiixp *chip, struct atiixp_dma *dma) 688 { 689 if (! dma->substream || ! dma->running) 690 return; 691 snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type); 692 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN); 693 } 694 695 /* 696 * the period ack. update the substream. 697 */ 698 static void snd_atiixp_update_dma(struct atiixp *chip, struct atiixp_dma *dma) 699 { 700 if (! dma->substream || ! dma->running) 701 return; 702 snd_pcm_period_elapsed(dma->substream); 703 } 704 705 /* set BUS_BUSY interrupt bit if any DMA is running */ 706 /* call with spinlock held */ 707 static void snd_atiixp_check_bus_busy(struct atiixp *chip) 708 { 709 unsigned int bus_busy; 710 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN | 711 ATI_REG_CMD_RECEIVE_EN | 712 ATI_REG_CMD_SPDF_OUT_EN)) 713 bus_busy = ATI_REG_IER_SET_BUS_BUSY; 714 else 715 bus_busy = 0; 716 atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy); 717 } 718 719 /* common trigger callback 720 * calling the lowlevel callbacks in it 721 */ 722 static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 723 { 724 struct atiixp *chip = snd_pcm_substream_chip(substream); 725 struct atiixp_dma *dma = substream->runtime->private_data; 726 int err = 0; 727 728 if (snd_BUG_ON(!dma->ops->enable_transfer || 729 !dma->ops->flush_dma)) 730 return -EINVAL; 731 732 spin_lock(&chip->reg_lock); 733 switch (cmd) { 734 case SNDRV_PCM_TRIGGER_START: 735 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 736 case SNDRV_PCM_TRIGGER_RESUME: 737 dma->ops->enable_transfer(chip, 1); 738 dma->running = 1; 739 dma->suspended = 0; 740 break; 741 case SNDRV_PCM_TRIGGER_STOP: 742 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 743 case SNDRV_PCM_TRIGGER_SUSPEND: 744 dma->ops->enable_transfer(chip, 0); 745 dma->running = 0; 746 dma->suspended = cmd == SNDRV_PCM_TRIGGER_SUSPEND; 747 break; 748 default: 749 err = -EINVAL; 750 break; 751 } 752 if (! err) { 753 snd_atiixp_check_bus_busy(chip); 754 if (cmd == SNDRV_PCM_TRIGGER_STOP) { 755 dma->ops->flush_dma(chip); 756 snd_atiixp_check_bus_busy(chip); 757 } 758 } 759 spin_unlock(&chip->reg_lock); 760 return err; 761 } 762 763 764 /* 765 * lowlevel callbacks for each DMA type 766 * 767 * every callback is supposed to be called in chip->reg_lock spinlock 768 */ 769 770 /* flush FIFO of analog OUT DMA */ 771 static void atiixp_out_flush_dma(struct atiixp *chip) 772 { 773 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH); 774 } 775 776 /* enable/disable analog OUT DMA */ 777 static void atiixp_out_enable_dma(struct atiixp *chip, int on) 778 { 779 unsigned int data; 780 data = atiixp_read(chip, CMD); 781 if (on) { 782 if (data & ATI_REG_CMD_OUT_DMA_EN) 783 return; 784 atiixp_out_flush_dma(chip); 785 data |= ATI_REG_CMD_OUT_DMA_EN; 786 } else 787 data &= ~ATI_REG_CMD_OUT_DMA_EN; 788 atiixp_write(chip, CMD, data); 789 } 790 791 /* start/stop transfer over OUT DMA */ 792 static void atiixp_out_enable_transfer(struct atiixp *chip, int on) 793 { 794 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN, 795 on ? ATI_REG_CMD_SEND_EN : 0); 796 } 797 798 /* enable/disable analog IN DMA */ 799 static void atiixp_in_enable_dma(struct atiixp *chip, int on) 800 { 801 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN, 802 on ? ATI_REG_CMD_IN_DMA_EN : 0); 803 } 804 805 /* start/stop analog IN DMA */ 806 static void atiixp_in_enable_transfer(struct atiixp *chip, int on) 807 { 808 if (on) { 809 unsigned int data = atiixp_read(chip, CMD); 810 if (! (data & ATI_REG_CMD_RECEIVE_EN)) { 811 data |= ATI_REG_CMD_RECEIVE_EN; 812 #if 0 /* FIXME: this causes the endless loop */ 813 /* wait until slot 3/4 are finished */ 814 while ((atiixp_read(chip, COUNTER) & 815 ATI_REG_COUNTER_SLOT) != 5) 816 ; 817 #endif 818 atiixp_write(chip, CMD, data); 819 } 820 } else 821 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0); 822 } 823 824 /* flush FIFO of analog IN DMA */ 825 static void atiixp_in_flush_dma(struct atiixp *chip) 826 { 827 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH); 828 } 829 830 /* enable/disable SPDIF OUT DMA */ 831 static void atiixp_spdif_enable_dma(struct atiixp *chip, int on) 832 { 833 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN, 834 on ? ATI_REG_CMD_SPDF_DMA_EN : 0); 835 } 836 837 /* start/stop SPDIF OUT DMA */ 838 static void atiixp_spdif_enable_transfer(struct atiixp *chip, int on) 839 { 840 unsigned int data; 841 data = atiixp_read(chip, CMD); 842 if (on) 843 data |= ATI_REG_CMD_SPDF_OUT_EN; 844 else 845 data &= ~ATI_REG_CMD_SPDF_OUT_EN; 846 atiixp_write(chip, CMD, data); 847 } 848 849 /* flush FIFO of SPDIF OUT DMA */ 850 static void atiixp_spdif_flush_dma(struct atiixp *chip) 851 { 852 int timeout; 853 854 /* DMA off, transfer on */ 855 atiixp_spdif_enable_dma(chip, 0); 856 atiixp_spdif_enable_transfer(chip, 1); 857 858 timeout = 100; 859 do { 860 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED)) 861 break; 862 udelay(1); 863 } while (timeout-- > 0); 864 865 atiixp_spdif_enable_transfer(chip, 0); 866 } 867 868 /* set up slots and formats for SPDIF OUT */ 869 static int snd_atiixp_spdif_prepare(struct snd_pcm_substream *substream) 870 { 871 struct atiixp *chip = snd_pcm_substream_chip(substream); 872 873 spin_lock_irq(&chip->reg_lock); 874 if (chip->spdif_over_aclink) { 875 unsigned int data; 876 /* enable slots 10/11 */ 877 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 878 ATI_REG_CMD_SPDF_CONFIG_01); 879 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK; 880 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) | 881 ATI_REG_OUT_DMA_SLOT_BIT(11); 882 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT; 883 atiixp_write(chip, OUT_DMA_SLOT, data); 884 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT, 885 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ? 886 ATI_REG_CMD_INTERLEAVE_OUT : 0); 887 } else { 888 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0); 889 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0); 890 } 891 spin_unlock_irq(&chip->reg_lock); 892 return 0; 893 } 894 895 /* set up slots and formats for analog OUT */ 896 static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream) 897 { 898 struct atiixp *chip = snd_pcm_substream_chip(substream); 899 unsigned int data; 900 901 spin_lock_irq(&chip->reg_lock); 902 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK; 903 switch (substream->runtime->channels) { 904 case 8: 905 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) | 906 ATI_REG_OUT_DMA_SLOT_BIT(11); 907 /* fallthru */ 908 case 6: 909 data |= ATI_REG_OUT_DMA_SLOT_BIT(7) | 910 ATI_REG_OUT_DMA_SLOT_BIT(8); 911 /* fallthru */ 912 case 4: 913 data |= ATI_REG_OUT_DMA_SLOT_BIT(6) | 914 ATI_REG_OUT_DMA_SLOT_BIT(9); 915 /* fallthru */ 916 default: 917 data |= ATI_REG_OUT_DMA_SLOT_BIT(3) | 918 ATI_REG_OUT_DMA_SLOT_BIT(4); 919 break; 920 } 921 922 /* set output threshold */ 923 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT; 924 atiixp_write(chip, OUT_DMA_SLOT, data); 925 926 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT, 927 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ? 928 ATI_REG_CMD_INTERLEAVE_OUT : 0); 929 930 /* 931 * enable 6 channel re-ordering bit if needed 932 */ 933 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN, 934 substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0); 935 936 spin_unlock_irq(&chip->reg_lock); 937 return 0; 938 } 939 940 /* set up slots and formats for analog IN */ 941 static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream) 942 { 943 struct atiixp *chip = snd_pcm_substream_chip(substream); 944 945 spin_lock_irq(&chip->reg_lock); 946 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN, 947 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ? 948 ATI_REG_CMD_INTERLEAVE_IN : 0); 949 spin_unlock_irq(&chip->reg_lock); 950 return 0; 951 } 952 953 /* 954 * hw_params - allocate the buffer and set up buffer descriptors 955 */ 956 static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream, 957 struct snd_pcm_hw_params *hw_params) 958 { 959 struct atiixp *chip = snd_pcm_substream_chip(substream); 960 struct atiixp_dma *dma = substream->runtime->private_data; 961 int err; 962 963 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 964 if (err < 0) 965 return err; 966 dma->buf_addr = substream->runtime->dma_addr; 967 dma->buf_bytes = params_buffer_bytes(hw_params); 968 969 err = atiixp_build_dma_packets(chip, dma, substream, 970 params_periods(hw_params), 971 params_period_bytes(hw_params)); 972 if (err < 0) 973 return err; 974 975 if (dma->ac97_pcm_type >= 0) { 976 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type]; 977 /* PCM is bound to AC97 codec(s) 978 * set up the AC97 codecs 979 */ 980 if (dma->pcm_open_flag) { 981 snd_ac97_pcm_close(pcm); 982 dma->pcm_open_flag = 0; 983 } 984 err = snd_ac97_pcm_open(pcm, params_rate(hw_params), 985 params_channels(hw_params), 986 pcm->r[0].slots); 987 if (err >= 0) 988 dma->pcm_open_flag = 1; 989 } 990 991 return err; 992 } 993 994 static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream) 995 { 996 struct atiixp *chip = snd_pcm_substream_chip(substream); 997 struct atiixp_dma *dma = substream->runtime->private_data; 998 999 if (dma->pcm_open_flag) { 1000 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type]; 1001 snd_ac97_pcm_close(pcm); 1002 dma->pcm_open_flag = 0; 1003 } 1004 atiixp_clear_dma_packets(chip, dma, substream); 1005 snd_pcm_lib_free_pages(substream); 1006 return 0; 1007 } 1008 1009 1010 /* 1011 * pcm hardware definition, identical for all DMA types 1012 */ 1013 static struct snd_pcm_hardware snd_atiixp_pcm_hw = 1014 { 1015 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1016 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1017 SNDRV_PCM_INFO_PAUSE | 1018 SNDRV_PCM_INFO_RESUME | 1019 SNDRV_PCM_INFO_MMAP_VALID), 1020 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE, 1021 .rates = SNDRV_PCM_RATE_48000, 1022 .rate_min = 48000, 1023 .rate_max = 48000, 1024 .channels_min = 2, 1025 .channels_max = 2, 1026 .buffer_bytes_max = 256 * 1024, 1027 .period_bytes_min = 32, 1028 .period_bytes_max = 128 * 1024, 1029 .periods_min = 2, 1030 .periods_max = ATI_MAX_DESCRIPTORS, 1031 }; 1032 1033 static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream, 1034 struct atiixp_dma *dma, int pcm_type) 1035 { 1036 struct atiixp *chip = snd_pcm_substream_chip(substream); 1037 struct snd_pcm_runtime *runtime = substream->runtime; 1038 int err; 1039 1040 if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma)) 1041 return -EINVAL; 1042 1043 if (dma->opened) 1044 return -EBUSY; 1045 dma->substream = substream; 1046 runtime->hw = snd_atiixp_pcm_hw; 1047 dma->ac97_pcm_type = pcm_type; 1048 if (pcm_type >= 0) { 1049 runtime->hw.rates = chip->pcms[pcm_type]->rates; 1050 snd_pcm_limit_hw_rates(runtime); 1051 } else { 1052 /* direct SPDIF */ 1053 runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE; 1054 } 1055 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) 1056 return err; 1057 runtime->private_data = dma; 1058 1059 /* enable DMA bits */ 1060 spin_lock_irq(&chip->reg_lock); 1061 dma->ops->enable_dma(chip, 1); 1062 spin_unlock_irq(&chip->reg_lock); 1063 dma->opened = 1; 1064 1065 return 0; 1066 } 1067 1068 static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream, 1069 struct atiixp_dma *dma) 1070 { 1071 struct atiixp *chip = snd_pcm_substream_chip(substream); 1072 /* disable DMA bits */ 1073 if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma)) 1074 return -EINVAL; 1075 spin_lock_irq(&chip->reg_lock); 1076 dma->ops->enable_dma(chip, 0); 1077 spin_unlock_irq(&chip->reg_lock); 1078 dma->substream = NULL; 1079 dma->opened = 0; 1080 return 0; 1081 } 1082 1083 /* 1084 */ 1085 static int snd_atiixp_playback_open(struct snd_pcm_substream *substream) 1086 { 1087 struct atiixp *chip = snd_pcm_substream_chip(substream); 1088 int err; 1089 1090 mutex_lock(&chip->open_mutex); 1091 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0); 1092 mutex_unlock(&chip->open_mutex); 1093 if (err < 0) 1094 return err; 1095 substream->runtime->hw.channels_max = chip->max_channels; 1096 if (chip->max_channels > 2) 1097 /* channels must be even */ 1098 snd_pcm_hw_constraint_step(substream->runtime, 0, 1099 SNDRV_PCM_HW_PARAM_CHANNELS, 2); 1100 return 0; 1101 } 1102 1103 static int snd_atiixp_playback_close(struct snd_pcm_substream *substream) 1104 { 1105 struct atiixp *chip = snd_pcm_substream_chip(substream); 1106 int err; 1107 mutex_lock(&chip->open_mutex); 1108 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]); 1109 mutex_unlock(&chip->open_mutex); 1110 return err; 1111 } 1112 1113 static int snd_atiixp_capture_open(struct snd_pcm_substream *substream) 1114 { 1115 struct atiixp *chip = snd_pcm_substream_chip(substream); 1116 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1); 1117 } 1118 1119 static int snd_atiixp_capture_close(struct snd_pcm_substream *substream) 1120 { 1121 struct atiixp *chip = snd_pcm_substream_chip(substream); 1122 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]); 1123 } 1124 1125 static int snd_atiixp_spdif_open(struct snd_pcm_substream *substream) 1126 { 1127 struct atiixp *chip = snd_pcm_substream_chip(substream); 1128 int err; 1129 mutex_lock(&chip->open_mutex); 1130 if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */ 1131 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2); 1132 else 1133 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1); 1134 mutex_unlock(&chip->open_mutex); 1135 return err; 1136 } 1137 1138 static int snd_atiixp_spdif_close(struct snd_pcm_substream *substream) 1139 { 1140 struct atiixp *chip = snd_pcm_substream_chip(substream); 1141 int err; 1142 mutex_lock(&chip->open_mutex); 1143 if (chip->spdif_over_aclink) 1144 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]); 1145 else 1146 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]); 1147 mutex_unlock(&chip->open_mutex); 1148 return err; 1149 } 1150 1151 /* AC97 playback */ 1152 static struct snd_pcm_ops snd_atiixp_playback_ops = { 1153 .open = snd_atiixp_playback_open, 1154 .close = snd_atiixp_playback_close, 1155 .ioctl = snd_pcm_lib_ioctl, 1156 .hw_params = snd_atiixp_pcm_hw_params, 1157 .hw_free = snd_atiixp_pcm_hw_free, 1158 .prepare = snd_atiixp_playback_prepare, 1159 .trigger = snd_atiixp_pcm_trigger, 1160 .pointer = snd_atiixp_pcm_pointer, 1161 }; 1162 1163 /* AC97 capture */ 1164 static struct snd_pcm_ops snd_atiixp_capture_ops = { 1165 .open = snd_atiixp_capture_open, 1166 .close = snd_atiixp_capture_close, 1167 .ioctl = snd_pcm_lib_ioctl, 1168 .hw_params = snd_atiixp_pcm_hw_params, 1169 .hw_free = snd_atiixp_pcm_hw_free, 1170 .prepare = snd_atiixp_capture_prepare, 1171 .trigger = snd_atiixp_pcm_trigger, 1172 .pointer = snd_atiixp_pcm_pointer, 1173 }; 1174 1175 /* SPDIF playback */ 1176 static struct snd_pcm_ops snd_atiixp_spdif_ops = { 1177 .open = snd_atiixp_spdif_open, 1178 .close = snd_atiixp_spdif_close, 1179 .ioctl = snd_pcm_lib_ioctl, 1180 .hw_params = snd_atiixp_pcm_hw_params, 1181 .hw_free = snd_atiixp_pcm_hw_free, 1182 .prepare = snd_atiixp_spdif_prepare, 1183 .trigger = snd_atiixp_pcm_trigger, 1184 .pointer = snd_atiixp_pcm_pointer, 1185 }; 1186 1187 static struct ac97_pcm atiixp_pcm_defs[] = { 1188 /* front PCM */ 1189 { 1190 .exclusive = 1, 1191 .r = { { 1192 .slots = (1 << AC97_SLOT_PCM_LEFT) | 1193 (1 << AC97_SLOT_PCM_RIGHT) | 1194 (1 << AC97_SLOT_PCM_CENTER) | 1195 (1 << AC97_SLOT_PCM_SLEFT) | 1196 (1 << AC97_SLOT_PCM_SRIGHT) | 1197 (1 << AC97_SLOT_LFE) 1198 } 1199 } 1200 }, 1201 /* PCM IN #1 */ 1202 { 1203 .stream = 1, 1204 .exclusive = 1, 1205 .r = { { 1206 .slots = (1 << AC97_SLOT_PCM_LEFT) | 1207 (1 << AC97_SLOT_PCM_RIGHT) 1208 } 1209 } 1210 }, 1211 /* S/PDIF OUT (optional) */ 1212 { 1213 .exclusive = 1, 1214 .spdif = 1, 1215 .r = { { 1216 .slots = (1 << AC97_SLOT_SPDIF_LEFT2) | 1217 (1 << AC97_SLOT_SPDIF_RIGHT2) 1218 } 1219 } 1220 }, 1221 }; 1222 1223 static struct atiixp_dma_ops snd_atiixp_playback_dma_ops = { 1224 .type = ATI_DMA_PLAYBACK, 1225 .llp_offset = ATI_REG_OUT_DMA_LINKPTR, 1226 .dt_cur = ATI_REG_OUT_DMA_DT_CUR, 1227 .enable_dma = atiixp_out_enable_dma, 1228 .enable_transfer = atiixp_out_enable_transfer, 1229 .flush_dma = atiixp_out_flush_dma, 1230 }; 1231 1232 static struct atiixp_dma_ops snd_atiixp_capture_dma_ops = { 1233 .type = ATI_DMA_CAPTURE, 1234 .llp_offset = ATI_REG_IN_DMA_LINKPTR, 1235 .dt_cur = ATI_REG_IN_DMA_DT_CUR, 1236 .enable_dma = atiixp_in_enable_dma, 1237 .enable_transfer = atiixp_in_enable_transfer, 1238 .flush_dma = atiixp_in_flush_dma, 1239 }; 1240 1241 static struct atiixp_dma_ops snd_atiixp_spdif_dma_ops = { 1242 .type = ATI_DMA_SPDIF, 1243 .llp_offset = ATI_REG_SPDF_DMA_LINKPTR, 1244 .dt_cur = ATI_REG_SPDF_DMA_DT_CUR, 1245 .enable_dma = atiixp_spdif_enable_dma, 1246 .enable_transfer = atiixp_spdif_enable_transfer, 1247 .flush_dma = atiixp_spdif_flush_dma, 1248 }; 1249 1250 1251 static int snd_atiixp_pcm_new(struct atiixp *chip) 1252 { 1253 struct snd_pcm *pcm; 1254 struct snd_pcm_chmap *chmap; 1255 struct snd_ac97_bus *pbus = chip->ac97_bus; 1256 int err, i, num_pcms; 1257 1258 /* initialize constants */ 1259 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops; 1260 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops; 1261 if (! chip->spdif_over_aclink) 1262 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops; 1263 1264 /* assign AC97 pcm */ 1265 if (chip->spdif_over_aclink) 1266 num_pcms = 3; 1267 else 1268 num_pcms = 2; 1269 err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs); 1270 if (err < 0) 1271 return err; 1272 for (i = 0; i < num_pcms; i++) 1273 chip->pcms[i] = &pbus->pcms[i]; 1274 1275 chip->max_channels = 2; 1276 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) { 1277 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE)) 1278 chip->max_channels = 6; 1279 else 1280 chip->max_channels = 4; 1281 } 1282 1283 /* PCM #0: analog I/O */ 1284 err = snd_pcm_new(chip->card, "ATI IXP AC97", 1285 ATI_PCMDEV_ANALOG, 1, 1, &pcm); 1286 if (err < 0) 1287 return err; 1288 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops); 1289 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops); 1290 pcm->private_data = chip; 1291 strcpy(pcm->name, "ATI IXP AC97"); 1292 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm; 1293 1294 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1295 snd_dma_pci_data(chip->pci), 1296 64*1024, 128*1024); 1297 1298 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1299 snd_pcm_alt_chmaps, chip->max_channels, 0, 1300 &chmap); 1301 if (err < 0) 1302 return err; 1303 chmap->channel_mask = SND_PCM_CHMAP_MASK_2468; 1304 chip->ac97[0]->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap; 1305 1306 /* no SPDIF support on codec? */ 1307 if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates) 1308 return 0; 1309 1310 /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */ 1311 if (chip->pcms[ATI_PCM_SPDIF]) 1312 chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000; 1313 1314 /* PCM #1: spdif playback */ 1315 err = snd_pcm_new(chip->card, "ATI IXP IEC958", 1316 ATI_PCMDEV_DIGITAL, 1, 0, &pcm); 1317 if (err < 0) 1318 return err; 1319 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops); 1320 pcm->private_data = chip; 1321 if (chip->spdif_over_aclink) 1322 strcpy(pcm->name, "ATI IXP IEC958 (AC97)"); 1323 else 1324 strcpy(pcm->name, "ATI IXP IEC958 (Direct)"); 1325 chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm; 1326 1327 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1328 snd_dma_pci_data(chip->pci), 1329 64*1024, 128*1024); 1330 1331 /* pre-select AC97 SPDIF slots 10/11 */ 1332 for (i = 0; i < NUM_ATI_CODECS; i++) { 1333 if (chip->ac97[i]) 1334 snd_ac97_update_bits(chip->ac97[i], 1335 AC97_EXTENDED_STATUS, 1336 0x03 << 4, 0x03 << 4); 1337 } 1338 1339 return 0; 1340 } 1341 1342 1343 1344 /* 1345 * interrupt handler 1346 */ 1347 static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id) 1348 { 1349 struct atiixp *chip = dev_id; 1350 unsigned int status; 1351 1352 status = atiixp_read(chip, ISR); 1353 1354 if (! status) 1355 return IRQ_NONE; 1356 1357 /* process audio DMA */ 1358 if (status & ATI_REG_ISR_OUT_XRUN) 1359 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]); 1360 else if (status & ATI_REG_ISR_OUT_STATUS) 1361 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]); 1362 if (status & ATI_REG_ISR_IN_XRUN) 1363 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]); 1364 else if (status & ATI_REG_ISR_IN_STATUS) 1365 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]); 1366 if (! chip->spdif_over_aclink) { 1367 if (status & ATI_REG_ISR_SPDF_XRUN) 1368 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]); 1369 else if (status & ATI_REG_ISR_SPDF_STATUS) 1370 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]); 1371 } 1372 1373 /* for codec detection */ 1374 if (status & CODEC_CHECK_BITS) { 1375 unsigned int detected; 1376 detected = status & CODEC_CHECK_BITS; 1377 spin_lock(&chip->reg_lock); 1378 chip->codec_not_ready_bits |= detected; 1379 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */ 1380 spin_unlock(&chip->reg_lock); 1381 } 1382 1383 /* ack */ 1384 atiixp_write(chip, ISR, status); 1385 1386 return IRQ_HANDLED; 1387 } 1388 1389 1390 /* 1391 * ac97 mixer section 1392 */ 1393 1394 static struct ac97_quirk ac97_quirks[] = { 1395 { 1396 .subvendor = 0x103c, 1397 .subdevice = 0x006b, 1398 .name = "HP Pavilion ZV5030US", 1399 .type = AC97_TUNE_MUTE_LED 1400 }, 1401 { 1402 .subvendor = 0x103c, 1403 .subdevice = 0x308b, 1404 .name = "HP nx6125", 1405 .type = AC97_TUNE_MUTE_LED 1406 }, 1407 { 1408 .subvendor = 0x103c, 1409 .subdevice = 0x3091, 1410 .name = "unknown HP", 1411 .type = AC97_TUNE_MUTE_LED 1412 }, 1413 { } /* terminator */ 1414 }; 1415 1416 static int snd_atiixp_mixer_new(struct atiixp *chip, int clock, 1417 const char *quirk_override) 1418 { 1419 struct snd_ac97_bus *pbus; 1420 struct snd_ac97_template ac97; 1421 int i, err; 1422 int codec_count; 1423 static struct snd_ac97_bus_ops ops = { 1424 .write = snd_atiixp_ac97_write, 1425 .read = snd_atiixp_ac97_read, 1426 }; 1427 static unsigned int codec_skip[NUM_ATI_CODECS] = { 1428 ATI_REG_ISR_CODEC0_NOT_READY, 1429 ATI_REG_ISR_CODEC1_NOT_READY, 1430 ATI_REG_ISR_CODEC2_NOT_READY, 1431 }; 1432 1433 if (snd_atiixp_codec_detect(chip) < 0) 1434 return -ENXIO; 1435 1436 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0) 1437 return err; 1438 pbus->clock = clock; 1439 chip->ac97_bus = pbus; 1440 1441 codec_count = 0; 1442 for (i = 0; i < NUM_ATI_CODECS; i++) { 1443 if (chip->codec_not_ready_bits & codec_skip[i]) 1444 continue; 1445 memset(&ac97, 0, sizeof(ac97)); 1446 ac97.private_data = chip; 1447 ac97.pci = chip->pci; 1448 ac97.num = i; 1449 ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE; 1450 if (! chip->spdif_over_aclink) 1451 ac97.scaps |= AC97_SCAP_NO_SPDIF; 1452 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) { 1453 chip->ac97[i] = NULL; /* to be sure */ 1454 snd_printdd("atiixp: codec %d not available for audio\n", i); 1455 continue; 1456 } 1457 codec_count++; 1458 } 1459 1460 if (! codec_count) { 1461 snd_printk(KERN_ERR "atiixp: no codec available\n"); 1462 return -ENODEV; 1463 } 1464 1465 snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override); 1466 1467 return 0; 1468 } 1469 1470 1471 #ifdef CONFIG_PM_SLEEP 1472 /* 1473 * power management 1474 */ 1475 static int snd_atiixp_suspend(struct device *dev) 1476 { 1477 struct pci_dev *pci = to_pci_dev(dev); 1478 struct snd_card *card = dev_get_drvdata(dev); 1479 struct atiixp *chip = card->private_data; 1480 int i; 1481 1482 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 1483 for (i = 0; i < NUM_ATI_PCMDEVS; i++) 1484 if (chip->pcmdevs[i]) { 1485 struct atiixp_dma *dma = &chip->dmas[i]; 1486 if (dma->substream && dma->running) 1487 dma->saved_curptr = readl(chip->remap_addr + 1488 dma->ops->dt_cur); 1489 snd_pcm_suspend_all(chip->pcmdevs[i]); 1490 } 1491 for (i = 0; i < NUM_ATI_CODECS; i++) 1492 snd_ac97_suspend(chip->ac97[i]); 1493 snd_atiixp_aclink_down(chip); 1494 snd_atiixp_chip_stop(chip); 1495 1496 pci_disable_device(pci); 1497 pci_save_state(pci); 1498 pci_set_power_state(pci, PCI_D3hot); 1499 return 0; 1500 } 1501 1502 static int snd_atiixp_resume(struct device *dev) 1503 { 1504 struct pci_dev *pci = to_pci_dev(dev); 1505 struct snd_card *card = dev_get_drvdata(dev); 1506 struct atiixp *chip = card->private_data; 1507 int i; 1508 1509 pci_set_power_state(pci, PCI_D0); 1510 pci_restore_state(pci); 1511 if (pci_enable_device(pci) < 0) { 1512 printk(KERN_ERR "atiixp: pci_enable_device failed, " 1513 "disabling device\n"); 1514 snd_card_disconnect(card); 1515 return -EIO; 1516 } 1517 pci_set_master(pci); 1518 1519 snd_atiixp_aclink_reset(chip); 1520 snd_atiixp_chip_start(chip); 1521 1522 for (i = 0; i < NUM_ATI_CODECS; i++) 1523 snd_ac97_resume(chip->ac97[i]); 1524 1525 for (i = 0; i < NUM_ATI_PCMDEVS; i++) 1526 if (chip->pcmdevs[i]) { 1527 struct atiixp_dma *dma = &chip->dmas[i]; 1528 if (dma->substream && dma->suspended) { 1529 dma->ops->enable_dma(chip, 1); 1530 dma->substream->ops->prepare(dma->substream); 1531 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN, 1532 chip->remap_addr + dma->ops->llp_offset); 1533 writel(dma->saved_curptr, chip->remap_addr + 1534 dma->ops->dt_cur); 1535 } 1536 } 1537 1538 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 1539 return 0; 1540 } 1541 1542 static SIMPLE_DEV_PM_OPS(snd_atiixp_pm, snd_atiixp_suspend, snd_atiixp_resume); 1543 #define SND_ATIIXP_PM_OPS &snd_atiixp_pm 1544 #else 1545 #define SND_ATIIXP_PM_OPS NULL 1546 #endif /* CONFIG_PM_SLEEP */ 1547 1548 1549 #ifdef CONFIG_PROC_FS 1550 /* 1551 * proc interface for register dump 1552 */ 1553 1554 static void snd_atiixp_proc_read(struct snd_info_entry *entry, 1555 struct snd_info_buffer *buffer) 1556 { 1557 struct atiixp *chip = entry->private_data; 1558 int i; 1559 1560 for (i = 0; i < 256; i += 4) 1561 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i)); 1562 } 1563 1564 static void snd_atiixp_proc_init(struct atiixp *chip) 1565 { 1566 struct snd_info_entry *entry; 1567 1568 if (! snd_card_proc_new(chip->card, "atiixp", &entry)) 1569 snd_info_set_text_ops(entry, chip, snd_atiixp_proc_read); 1570 } 1571 #else /* !CONFIG_PROC_FS */ 1572 #define snd_atiixp_proc_init(chip) 1573 #endif 1574 1575 1576 /* 1577 * destructor 1578 */ 1579 1580 static int snd_atiixp_free(struct atiixp *chip) 1581 { 1582 if (chip->irq < 0) 1583 goto __hw_end; 1584 snd_atiixp_chip_stop(chip); 1585 1586 __hw_end: 1587 if (chip->irq >= 0) 1588 free_irq(chip->irq, chip); 1589 if (chip->remap_addr) 1590 iounmap(chip->remap_addr); 1591 pci_release_regions(chip->pci); 1592 pci_disable_device(chip->pci); 1593 kfree(chip); 1594 return 0; 1595 } 1596 1597 static int snd_atiixp_dev_free(struct snd_device *device) 1598 { 1599 struct atiixp *chip = device->device_data; 1600 return snd_atiixp_free(chip); 1601 } 1602 1603 /* 1604 * constructor for chip instance 1605 */ 1606 static int snd_atiixp_create(struct snd_card *card, 1607 struct pci_dev *pci, 1608 struct atiixp **r_chip) 1609 { 1610 static struct snd_device_ops ops = { 1611 .dev_free = snd_atiixp_dev_free, 1612 }; 1613 struct atiixp *chip; 1614 int err; 1615 1616 if ((err = pci_enable_device(pci)) < 0) 1617 return err; 1618 1619 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 1620 if (chip == NULL) { 1621 pci_disable_device(pci); 1622 return -ENOMEM; 1623 } 1624 1625 spin_lock_init(&chip->reg_lock); 1626 mutex_init(&chip->open_mutex); 1627 chip->card = card; 1628 chip->pci = pci; 1629 chip->irq = -1; 1630 if ((err = pci_request_regions(pci, "ATI IXP AC97")) < 0) { 1631 pci_disable_device(pci); 1632 kfree(chip); 1633 return err; 1634 } 1635 chip->addr = pci_resource_start(pci, 0); 1636 chip->remap_addr = pci_ioremap_bar(pci, 0); 1637 if (chip->remap_addr == NULL) { 1638 snd_printk(KERN_ERR "AC'97 space ioremap problem\n"); 1639 snd_atiixp_free(chip); 1640 return -EIO; 1641 } 1642 1643 if (request_irq(pci->irq, snd_atiixp_interrupt, IRQF_SHARED, 1644 KBUILD_MODNAME, chip)) { 1645 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); 1646 snd_atiixp_free(chip); 1647 return -EBUSY; 1648 } 1649 chip->irq = pci->irq; 1650 pci_set_master(pci); 1651 synchronize_irq(chip->irq); 1652 1653 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 1654 snd_atiixp_free(chip); 1655 return err; 1656 } 1657 1658 snd_card_set_dev(card, &pci->dev); 1659 1660 *r_chip = chip; 1661 return 0; 1662 } 1663 1664 1665 static int snd_atiixp_probe(struct pci_dev *pci, 1666 const struct pci_device_id *pci_id) 1667 { 1668 struct snd_card *card; 1669 struct atiixp *chip; 1670 int err; 1671 1672 err = snd_card_create(index, id, THIS_MODULE, 0, &card); 1673 if (err < 0) 1674 return err; 1675 1676 strcpy(card->driver, spdif_aclink ? "ATIIXP" : "ATIIXP-SPDMA"); 1677 strcpy(card->shortname, "ATI IXP"); 1678 if ((err = snd_atiixp_create(card, pci, &chip)) < 0) 1679 goto __error; 1680 card->private_data = chip; 1681 1682 if ((err = snd_atiixp_aclink_reset(chip)) < 0) 1683 goto __error; 1684 1685 chip->spdif_over_aclink = spdif_aclink; 1686 1687 if ((err = snd_atiixp_mixer_new(chip, ac97_clock, ac97_quirk)) < 0) 1688 goto __error; 1689 1690 if ((err = snd_atiixp_pcm_new(chip)) < 0) 1691 goto __error; 1692 1693 snd_atiixp_proc_init(chip); 1694 1695 snd_atiixp_chip_start(chip); 1696 1697 snprintf(card->longname, sizeof(card->longname), 1698 "%s rev %x with %s at %#lx, irq %i", card->shortname, 1699 pci->revision, 1700 chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?", 1701 chip->addr, chip->irq); 1702 1703 if ((err = snd_card_register(card)) < 0) 1704 goto __error; 1705 1706 pci_set_drvdata(pci, card); 1707 return 0; 1708 1709 __error: 1710 snd_card_free(card); 1711 return err; 1712 } 1713 1714 static void snd_atiixp_remove(struct pci_dev *pci) 1715 { 1716 snd_card_free(pci_get_drvdata(pci)); 1717 pci_set_drvdata(pci, NULL); 1718 } 1719 1720 static struct pci_driver atiixp_driver = { 1721 .name = KBUILD_MODNAME, 1722 .id_table = snd_atiixp_ids, 1723 .probe = snd_atiixp_probe, 1724 .remove = snd_atiixp_remove, 1725 .driver = { 1726 .pm = SND_ATIIXP_PM_OPS, 1727 }, 1728 }; 1729 1730 module_pci_driver(atiixp_driver); 1731