1 /* 2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 3 * Universal interface for Audio Codec '97 4 * 5 * For more details look to AC '97 component specification revision 2.2 6 * by Intel Corporation (http://developer.intel.com) and to datasheets 7 * for specific codecs. 8 * 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 * 24 */ 25 26 #include <linux/delay.h> 27 #include <linux/init.h> 28 #include <linux/slab.h> 29 #include <linux/mutex.h> 30 31 #include <sound/core.h> 32 #include <sound/pcm.h> 33 #include <sound/control.h> 34 #include <sound/ac97_codec.h> 35 #include <sound/asoundef.h> 36 #include "ac97_id.h" 37 #include "ac97_local.h" 38 39 /* 40 * PCM support 41 */ 42 43 static unsigned char rate_reg_tables[2][4][9] = { 44 { 45 /* standard rates */ 46 { 47 /* 3&4 front, 7&8 rear, 6&9 center/lfe */ 48 AC97_PCM_FRONT_DAC_RATE, /* slot 3 */ 49 AC97_PCM_FRONT_DAC_RATE, /* slot 4 */ 50 0xff, /* slot 5 */ 51 AC97_PCM_LFE_DAC_RATE, /* slot 6 */ 52 AC97_PCM_SURR_DAC_RATE, /* slot 7 */ 53 AC97_PCM_SURR_DAC_RATE, /* slot 8 */ 54 AC97_PCM_LFE_DAC_RATE, /* slot 9 */ 55 0xff, /* slot 10 */ 56 0xff, /* slot 11 */ 57 }, 58 { 59 /* 7&8 front, 6&9 rear, 10&11 center/lfe */ 60 0xff, /* slot 3 */ 61 0xff, /* slot 4 */ 62 0xff, /* slot 5 */ 63 AC97_PCM_SURR_DAC_RATE, /* slot 6 */ 64 AC97_PCM_FRONT_DAC_RATE, /* slot 7 */ 65 AC97_PCM_FRONT_DAC_RATE, /* slot 8 */ 66 AC97_PCM_SURR_DAC_RATE, /* slot 9 */ 67 AC97_PCM_LFE_DAC_RATE, /* slot 10 */ 68 AC97_PCM_LFE_DAC_RATE, /* slot 11 */ 69 }, 70 { 71 /* 6&9 front, 10&11 rear, 3&4 center/lfe */ 72 AC97_PCM_LFE_DAC_RATE, /* slot 3 */ 73 AC97_PCM_LFE_DAC_RATE, /* slot 4 */ 74 0xff, /* slot 5 */ 75 AC97_PCM_FRONT_DAC_RATE, /* slot 6 */ 76 0xff, /* slot 7 */ 77 0xff, /* slot 8 */ 78 AC97_PCM_FRONT_DAC_RATE, /* slot 9 */ 79 AC97_PCM_SURR_DAC_RATE, /* slot 10 */ 80 AC97_PCM_SURR_DAC_RATE, /* slot 11 */ 81 }, 82 { 83 /* 10&11 front, 3&4 rear, 7&8 center/lfe */ 84 AC97_PCM_SURR_DAC_RATE, /* slot 3 */ 85 AC97_PCM_SURR_DAC_RATE, /* slot 4 */ 86 0xff, /* slot 5 */ 87 0xff, /* slot 6 */ 88 AC97_PCM_LFE_DAC_RATE, /* slot 7 */ 89 AC97_PCM_LFE_DAC_RATE, /* slot 8 */ 90 0xff, /* slot 9 */ 91 AC97_PCM_FRONT_DAC_RATE, /* slot 10 */ 92 AC97_PCM_FRONT_DAC_RATE, /* slot 11 */ 93 }, 94 }, 95 { 96 /* double rates */ 97 { 98 /* 3&4 front, 7&8 front (t+1) */ 99 AC97_PCM_FRONT_DAC_RATE, /* slot 3 */ 100 AC97_PCM_FRONT_DAC_RATE, /* slot 4 */ 101 0xff, /* slot 5 */ 102 0xff, /* slot 6 */ 103 AC97_PCM_FRONT_DAC_RATE, /* slot 7 */ 104 AC97_PCM_FRONT_DAC_RATE, /* slot 8 */ 105 0xff, /* slot 9 */ 106 0xff, /* slot 10 */ 107 0xff, /* slot 11 */ 108 }, 109 { 110 /* not specified in the specification */ 111 0xff, /* slot 3 */ 112 0xff, /* slot 4 */ 113 0xff, /* slot 5 */ 114 0xff, /* slot 6 */ 115 0xff, /* slot 7 */ 116 0xff, /* slot 8 */ 117 0xff, /* slot 9 */ 118 0xff, /* slot 10 */ 119 0xff, /* slot 11 */ 120 }, 121 { 122 0xff, /* slot 3 */ 123 0xff, /* slot 4 */ 124 0xff, /* slot 5 */ 125 0xff, /* slot 6 */ 126 0xff, /* slot 7 */ 127 0xff, /* slot 8 */ 128 0xff, /* slot 9 */ 129 0xff, /* slot 10 */ 130 0xff, /* slot 11 */ 131 }, 132 { 133 0xff, /* slot 3 */ 134 0xff, /* slot 4 */ 135 0xff, /* slot 5 */ 136 0xff, /* slot 6 */ 137 0xff, /* slot 7 */ 138 0xff, /* slot 8 */ 139 0xff, /* slot 9 */ 140 0xff, /* slot 10 */ 141 0xff, /* slot 11 */ 142 } 143 }}; 144 145 /* FIXME: more various mappings for ADC? */ 146 static unsigned char rate_cregs[9] = { 147 AC97_PCM_LR_ADC_RATE, /* 3 */ 148 AC97_PCM_LR_ADC_RATE, /* 4 */ 149 0xff, /* 5 */ 150 AC97_PCM_MIC_ADC_RATE, /* 6 */ 151 0xff, /* 7 */ 152 0xff, /* 8 */ 153 0xff, /* 9 */ 154 0xff, /* 10 */ 155 0xff, /* 11 */ 156 }; 157 158 static unsigned char get_slot_reg(struct ac97_pcm *pcm, unsigned short cidx, 159 unsigned short slot, int dbl) 160 { 161 if (slot < 3) 162 return 0xff; 163 if (slot > 11) 164 return 0xff; 165 if (pcm->spdif) 166 return AC97_SPDIF; /* pseudo register */ 167 if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK) 168 return rate_reg_tables[dbl][pcm->r[dbl].rate_table[cidx]][slot - 3]; 169 else 170 return rate_cregs[slot - 3]; 171 } 172 173 static int set_spdif_rate(struct snd_ac97 *ac97, unsigned short rate) 174 { 175 unsigned short old, bits, reg, mask; 176 unsigned int sbits; 177 178 if (! (ac97->ext_id & AC97_EI_SPDIF)) 179 return -ENODEV; 180 181 /* TODO: double rate support */ 182 if (ac97->flags & AC97_CS_SPDIF) { 183 switch (rate) { 184 case 48000: bits = 0; break; 185 case 44100: bits = 1 << AC97_SC_SPSR_SHIFT; break; 186 default: /* invalid - disable output */ 187 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); 188 return -EINVAL; 189 } 190 reg = AC97_CSR_SPDIF; 191 mask = 1 << AC97_SC_SPSR_SHIFT; 192 } else { 193 if (ac97->id == AC97_ID_CM9739 && rate != 48000) { 194 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); 195 return -EINVAL; 196 } 197 switch (rate) { 198 case 44100: bits = AC97_SC_SPSR_44K; break; 199 case 48000: bits = AC97_SC_SPSR_48K; break; 200 case 32000: bits = AC97_SC_SPSR_32K; break; 201 default: /* invalid - disable output */ 202 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); 203 return -EINVAL; 204 } 205 reg = AC97_SPDIF; 206 mask = AC97_SC_SPSR_MASK; 207 } 208 209 mutex_lock(&ac97->reg_mutex); 210 old = snd_ac97_read(ac97, reg) & mask; 211 if (old != bits) { 212 snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); 213 snd_ac97_update_bits_nolock(ac97, reg, mask, bits); 214 /* update the internal spdif bits */ 215 sbits = ac97->spdif_status; 216 if (sbits & IEC958_AES0_PROFESSIONAL) { 217 sbits &= ~IEC958_AES0_PRO_FS; 218 switch (rate) { 219 case 44100: sbits |= IEC958_AES0_PRO_FS_44100; break; 220 case 48000: sbits |= IEC958_AES0_PRO_FS_48000; break; 221 case 32000: sbits |= IEC958_AES0_PRO_FS_32000; break; 222 } 223 } else { 224 sbits &= ~(IEC958_AES3_CON_FS << 24); 225 switch (rate) { 226 case 44100: sbits |= IEC958_AES3_CON_FS_44100<<24; break; 227 case 48000: sbits |= IEC958_AES3_CON_FS_48000<<24; break; 228 case 32000: sbits |= IEC958_AES3_CON_FS_32000<<24; break; 229 } 230 } 231 ac97->spdif_status = sbits; 232 } 233 snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, AC97_EA_SPDIF); 234 mutex_unlock(&ac97->reg_mutex); 235 return 0; 236 } 237 238 /** 239 * snd_ac97_set_rate - change the rate of the given input/output. 240 * @ac97: the ac97 instance 241 * @reg: the register to change 242 * @rate: the sample rate to set 243 * 244 * Changes the rate of the given input/output on the codec. 245 * If the codec doesn't support VAR, the rate must be 48000 (except 246 * for SPDIF). 247 * 248 * The valid registers are AC97_PMC_MIC_ADC_RATE, 249 * AC97_PCM_FRONT_DAC_RATE, AC97_PCM_LR_ADC_RATE. 250 * AC97_PCM_SURR_DAC_RATE and AC97_PCM_LFE_DAC_RATE are accepted 251 * if the codec supports them. 252 * AC97_SPDIF is accepted as a pseudo register to modify the SPDIF 253 * status bits. 254 * 255 * Returns zero if successful, or a negative error code on failure. 256 */ 257 int snd_ac97_set_rate(struct snd_ac97 *ac97, int reg, unsigned int rate) 258 { 259 int dbl; 260 unsigned int tmp; 261 262 dbl = rate > 48000; 263 if (dbl) { 264 if (!(ac97->flags & AC97_DOUBLE_RATE)) 265 return -EINVAL; 266 if (reg != AC97_PCM_FRONT_DAC_RATE) 267 return -EINVAL; 268 } 269 270 snd_ac97_update_power(ac97, reg, 1); 271 switch (reg) { 272 case AC97_PCM_MIC_ADC_RATE: 273 if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRM) == 0) /* MIC VRA */ 274 if (rate != 48000) 275 return -EINVAL; 276 break; 277 case AC97_PCM_FRONT_DAC_RATE: 278 case AC97_PCM_LR_ADC_RATE: 279 if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRA) == 0) /* VRA */ 280 if (rate != 48000 && rate != 96000) 281 return -EINVAL; 282 break; 283 case AC97_PCM_SURR_DAC_RATE: 284 if (! (ac97->scaps & AC97_SCAP_SURROUND_DAC)) 285 return -EINVAL; 286 break; 287 case AC97_PCM_LFE_DAC_RATE: 288 if (! (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)) 289 return -EINVAL; 290 break; 291 case AC97_SPDIF: 292 /* special case */ 293 return set_spdif_rate(ac97, rate); 294 default: 295 return -EINVAL; 296 } 297 if (dbl) 298 rate /= 2; 299 tmp = (rate * ac97->bus->clock) / 48000; 300 if (tmp > 65535) 301 return -EINVAL; 302 if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE) 303 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, 304 AC97_EA_DRA, dbl ? AC97_EA_DRA : 0); 305 snd_ac97_update(ac97, reg, tmp & 0xffff); 306 snd_ac97_read(ac97, reg); 307 if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE) { 308 /* Intel controllers require double rate data to be put in 309 * slots 7+8 310 */ 311 snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE, 312 AC97_GP_DRSS_MASK, 313 dbl ? AC97_GP_DRSS_78 : 0); 314 snd_ac97_read(ac97, AC97_GENERAL_PURPOSE); 315 } 316 return 0; 317 } 318 319 EXPORT_SYMBOL(snd_ac97_set_rate); 320 321 static unsigned short get_pslots(struct snd_ac97 *ac97, unsigned char *rate_table, unsigned short *spdif_slots) 322 { 323 if (!ac97_is_audio(ac97)) 324 return 0; 325 if (ac97_is_rev22(ac97) || ac97_can_amap(ac97)) { 326 unsigned short slots = 0; 327 if (ac97_is_rev22(ac97)) { 328 /* Note: it's simply emulation of AMAP behaviour */ 329 u16 es; 330 es = ac97->regs[AC97_EXTENDED_ID] &= ~AC97_EI_DACS_SLOT_MASK; 331 switch (ac97->addr) { 332 case 1: 333 case 2: es |= (1<<AC97_EI_DACS_SLOT_SHIFT); break; 334 case 3: es |= (2<<AC97_EI_DACS_SLOT_SHIFT); break; 335 } 336 snd_ac97_write_cache(ac97, AC97_EXTENDED_ID, es); 337 } 338 switch (ac97->addr) { 339 case 0: 340 slots |= (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT); 341 if (ac97->scaps & AC97_SCAP_SURROUND_DAC) 342 slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT); 343 if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC) 344 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE); 345 if (ac97->ext_id & AC97_EI_SPDIF) { 346 if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC)) 347 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT); 348 else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)) 349 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1); 350 else 351 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2); 352 } 353 *rate_table = 0; 354 break; 355 case 1: 356 case 2: 357 slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT); 358 if (ac97->scaps & AC97_SCAP_SURROUND_DAC) 359 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE); 360 if (ac97->ext_id & AC97_EI_SPDIF) { 361 if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC)) 362 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1); 363 else 364 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2); 365 } 366 *rate_table = 1; 367 break; 368 case 3: 369 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE); 370 if (ac97->ext_id & AC97_EI_SPDIF) 371 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2); 372 *rate_table = 2; 373 break; 374 } 375 return slots; 376 } else { 377 unsigned short slots; 378 slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT); 379 if (ac97->scaps & AC97_SCAP_SURROUND_DAC) 380 slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT); 381 if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC) 382 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE); 383 if (ac97->ext_id & AC97_EI_SPDIF) { 384 if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC)) 385 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT); 386 else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)) 387 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1); 388 else 389 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2); 390 } 391 *rate_table = 0; 392 return slots; 393 } 394 } 395 396 static unsigned short get_cslots(struct snd_ac97 *ac97) 397 { 398 unsigned short slots; 399 400 if (!ac97_is_audio(ac97)) 401 return 0; 402 slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT); 403 slots |= (1<<AC97_SLOT_MIC); 404 return slots; 405 } 406 407 static unsigned int get_rates(struct ac97_pcm *pcm, unsigned int cidx, unsigned short slots, int dbl) 408 { 409 int i, idx; 410 unsigned int rates = ~0; 411 unsigned char reg; 412 413 for (i = 3; i < 12; i++) { 414 if (!(slots & (1 << i))) 415 continue; 416 reg = get_slot_reg(pcm, cidx, i, dbl); 417 switch (reg) { 418 case AC97_PCM_FRONT_DAC_RATE: idx = AC97_RATES_FRONT_DAC; break; 419 case AC97_PCM_SURR_DAC_RATE: idx = AC97_RATES_SURR_DAC; break; 420 case AC97_PCM_LFE_DAC_RATE: idx = AC97_RATES_LFE_DAC; break; 421 case AC97_PCM_LR_ADC_RATE: idx = AC97_RATES_ADC; break; 422 case AC97_PCM_MIC_ADC_RATE: idx = AC97_RATES_MIC_ADC; break; 423 default: idx = AC97_RATES_SPDIF; break; 424 } 425 rates &= pcm->r[dbl].codec[cidx]->rates[idx]; 426 } 427 if (!dbl) 428 rates &= ~(SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 | 429 SNDRV_PCM_RATE_96000); 430 return rates; 431 } 432 433 /** 434 * snd_ac97_pcm_assign - assign AC97 slots to given PCM streams 435 * @bus: the ac97 bus instance 436 * @pcms_count: count of PCMs to be assigned 437 * @pcms: PCMs to be assigned 438 * 439 * It assigns available AC97 slots for given PCMs. If none or only 440 * some slots are available, pcm->xxx.slots and pcm->xxx.rslots[] members 441 * are reduced and might be zero. 442 */ 443 int snd_ac97_pcm_assign(struct snd_ac97_bus *bus, 444 unsigned short pcms_count, 445 const struct ac97_pcm *pcms) 446 { 447 int i, j, k; 448 const struct ac97_pcm *pcm; 449 struct ac97_pcm *rpcms, *rpcm; 450 unsigned short avail_slots[2][4]; 451 unsigned char rate_table[2][4]; 452 unsigned short tmp, slots; 453 unsigned short spdif_slots[4]; 454 unsigned int rates; 455 struct snd_ac97 *codec; 456 457 rpcms = kcalloc(pcms_count, sizeof(struct ac97_pcm), GFP_KERNEL); 458 if (rpcms == NULL) 459 return -ENOMEM; 460 memset(avail_slots, 0, sizeof(avail_slots)); 461 memset(rate_table, 0, sizeof(rate_table)); 462 memset(spdif_slots, 0, sizeof(spdif_slots)); 463 for (i = 0; i < 4; i++) { 464 codec = bus->codec[i]; 465 if (!codec) 466 continue; 467 avail_slots[0][i] = get_pslots(codec, &rate_table[0][i], &spdif_slots[i]); 468 avail_slots[1][i] = get_cslots(codec); 469 if (!(codec->scaps & AC97_SCAP_INDEP_SDIN)) { 470 for (j = 0; j < i; j++) { 471 if (bus->codec[j]) 472 avail_slots[1][i] &= ~avail_slots[1][j]; 473 } 474 } 475 } 476 /* first step - exclusive devices */ 477 for (i = 0; i < pcms_count; i++) { 478 pcm = &pcms[i]; 479 rpcm = &rpcms[i]; 480 /* low-level driver thinks that it's more clever */ 481 if (pcm->copy_flag) { 482 *rpcm = *pcm; 483 continue; 484 } 485 rpcm->stream = pcm->stream; 486 rpcm->exclusive = pcm->exclusive; 487 rpcm->spdif = pcm->spdif; 488 rpcm->private_value = pcm->private_value; 489 rpcm->bus = bus; 490 rpcm->rates = ~0; 491 slots = pcm->r[0].slots; 492 for (j = 0; j < 4 && slots; j++) { 493 if (!bus->codec[j]) 494 continue; 495 rates = ~0; 496 if (pcm->spdif && pcm->stream == 0) 497 tmp = spdif_slots[j]; 498 else 499 tmp = avail_slots[pcm->stream][j]; 500 if (pcm->exclusive) { 501 /* exclusive access */ 502 tmp &= slots; 503 for (k = 0; k < i; k++) { 504 if (rpcm->stream == rpcms[k].stream) 505 tmp &= ~rpcms[k].r[0].rslots[j]; 506 } 507 } else { 508 /* non-exclusive access */ 509 tmp &= pcm->r[0].slots; 510 } 511 if (tmp) { 512 rpcm->r[0].rslots[j] = tmp; 513 rpcm->r[0].codec[j] = bus->codec[j]; 514 rpcm->r[0].rate_table[j] = rate_table[pcm->stream][j]; 515 if (bus->no_vra) 516 rates = SNDRV_PCM_RATE_48000; 517 else 518 rates = get_rates(rpcm, j, tmp, 0); 519 if (pcm->exclusive) 520 avail_slots[pcm->stream][j] &= ~tmp; 521 } 522 slots &= ~tmp; 523 rpcm->r[0].slots |= tmp; 524 rpcm->rates &= rates; 525 } 526 /* for double rate, we check the first codec only */ 527 if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK && 528 bus->codec[0] && (bus->codec[0]->flags & AC97_DOUBLE_RATE) && 529 rate_table[pcm->stream][0] == 0) { 530 tmp = (1<<AC97_SLOT_PCM_LEFT) | (1<<AC97_SLOT_PCM_RIGHT) | 531 (1<<AC97_SLOT_PCM_LEFT_0) | (1<<AC97_SLOT_PCM_RIGHT_0); 532 if ((tmp & pcm->r[1].slots) == tmp) { 533 rpcm->r[1].slots = tmp; 534 rpcm->r[1].rslots[0] = tmp; 535 rpcm->r[1].rate_table[0] = 0; 536 rpcm->r[1].codec[0] = bus->codec[0]; 537 if (pcm->exclusive) 538 avail_slots[pcm->stream][0] &= ~tmp; 539 if (bus->no_vra) 540 rates = SNDRV_PCM_RATE_96000; 541 else 542 rates = get_rates(rpcm, 0, tmp, 1); 543 rpcm->rates |= rates; 544 } 545 } 546 if (rpcm->rates == ~0) 547 rpcm->rates = 0; /* not used */ 548 } 549 bus->pcms_count = pcms_count; 550 bus->pcms = rpcms; 551 return 0; 552 } 553 554 EXPORT_SYMBOL(snd_ac97_pcm_assign); 555 556 /** 557 * snd_ac97_pcm_open - opens the given AC97 pcm 558 * @pcm: the ac97 pcm instance 559 * @rate: rate in Hz, if codec does not support VRA, this value must be 48000Hz 560 * @cfg: output stream characteristics 561 * @slots: a subset of allocated slots (snd_ac97_pcm_assign) for this pcm 562 * 563 * It locks the specified slots and sets the given rate to AC97 registers. 564 */ 565 int snd_ac97_pcm_open(struct ac97_pcm *pcm, unsigned int rate, 566 enum ac97_pcm_cfg cfg, unsigned short slots) 567 { 568 struct snd_ac97_bus *bus; 569 int i, cidx, r, ok_flag; 570 unsigned int reg_ok[4] = {0,0,0,0}; 571 unsigned char reg; 572 int err = 0; 573 574 r = rate > 48000; 575 bus = pcm->bus; 576 if (cfg == AC97_PCM_CFG_SPDIF) { 577 for (cidx = 0; cidx < 4; cidx++) 578 if (bus->codec[cidx] && (bus->codec[cidx]->ext_id & AC97_EI_SPDIF)) { 579 err = set_spdif_rate(bus->codec[cidx], rate); 580 if (err < 0) 581 return err; 582 } 583 } 584 spin_lock_irq(&pcm->bus->bus_lock); 585 for (i = 3; i < 12; i++) { 586 if (!(slots & (1 << i))) 587 continue; 588 ok_flag = 0; 589 for (cidx = 0; cidx < 4; cidx++) { 590 if (bus->used_slots[pcm->stream][cidx] & (1 << i)) { 591 spin_unlock_irq(&pcm->bus->bus_lock); 592 err = -EBUSY; 593 goto error; 594 } 595 if (pcm->r[r].rslots[cidx] & (1 << i)) { 596 bus->used_slots[pcm->stream][cidx] |= (1 << i); 597 ok_flag++; 598 } 599 } 600 if (!ok_flag) { 601 spin_unlock_irq(&pcm->bus->bus_lock); 602 snd_printk(KERN_ERR "cannot find configuration for AC97 slot %i\n", i); 603 err = -EAGAIN; 604 goto error; 605 } 606 } 607 pcm->cur_dbl = r; 608 spin_unlock_irq(&pcm->bus->bus_lock); 609 for (i = 3; i < 12; i++) { 610 if (!(slots & (1 << i))) 611 continue; 612 for (cidx = 0; cidx < 4; cidx++) { 613 if (pcm->r[r].rslots[cidx] & (1 << i)) { 614 reg = get_slot_reg(pcm, cidx, i, r); 615 if (reg == 0xff) { 616 snd_printk(KERN_ERR "invalid AC97 slot %i?\n", i); 617 continue; 618 } 619 if (reg_ok[cidx] & (1 << (reg - AC97_PCM_FRONT_DAC_RATE))) 620 continue; 621 //printk(KERN_DEBUG "setting ac97 reg 0x%x to rate %d\n", reg, rate); 622 err = snd_ac97_set_rate(pcm->r[r].codec[cidx], reg, rate); 623 if (err < 0) 624 snd_printk(KERN_ERR "error in snd_ac97_set_rate: cidx=%d, reg=0x%x, rate=%d, err=%d\n", cidx, reg, rate, err); 625 else 626 reg_ok[cidx] |= (1 << (reg - AC97_PCM_FRONT_DAC_RATE)); 627 } 628 } 629 } 630 pcm->aslots = slots; 631 return 0; 632 633 error: 634 pcm->aslots = slots; 635 snd_ac97_pcm_close(pcm); 636 return err; 637 } 638 639 EXPORT_SYMBOL(snd_ac97_pcm_open); 640 641 /** 642 * snd_ac97_pcm_close - closes the given AC97 pcm 643 * @pcm: the ac97 pcm instance 644 * 645 * It frees the locked AC97 slots. 646 */ 647 int snd_ac97_pcm_close(struct ac97_pcm *pcm) 648 { 649 struct snd_ac97_bus *bus; 650 unsigned short slots = pcm->aslots; 651 int i, cidx; 652 653 #ifdef CONFIG_SND_AC97_POWER_SAVE 654 int r = pcm->cur_dbl; 655 for (i = 3; i < 12; i++) { 656 if (!(slots & (1 << i))) 657 continue; 658 for (cidx = 0; cidx < 4; cidx++) { 659 if (pcm->r[r].rslots[cidx] & (1 << i)) { 660 int reg = get_slot_reg(pcm, cidx, i, r); 661 snd_ac97_update_power(pcm->r[r].codec[cidx], 662 reg, 0); 663 } 664 } 665 } 666 #endif 667 668 bus = pcm->bus; 669 spin_lock_irq(&pcm->bus->bus_lock); 670 for (i = 3; i < 12; i++) { 671 if (!(slots & (1 << i))) 672 continue; 673 for (cidx = 0; cidx < 4; cidx++) 674 bus->used_slots[pcm->stream][cidx] &= ~(1 << i); 675 } 676 pcm->aslots = 0; 677 pcm->cur_dbl = 0; 678 spin_unlock_irq(&pcm->bus->bus_lock); 679 return 0; 680 } 681 682 EXPORT_SYMBOL(snd_ac97_pcm_close); 683 684 static int double_rate_hw_constraint_rate(struct snd_pcm_hw_params *params, 685 struct snd_pcm_hw_rule *rule) 686 { 687 struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 688 if (channels->min > 2) { 689 static const struct snd_interval single_rates = { 690 .min = 1, 691 .max = 48000, 692 }; 693 struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 694 return snd_interval_refine(rate, &single_rates); 695 } 696 return 0; 697 } 698 699 static int double_rate_hw_constraint_channels(struct snd_pcm_hw_params *params, 700 struct snd_pcm_hw_rule *rule) 701 { 702 struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 703 if (rate->min > 48000) { 704 static const struct snd_interval double_rate_channels = { 705 .min = 2, 706 .max = 2, 707 }; 708 struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 709 return snd_interval_refine(channels, &double_rate_channels); 710 } 711 return 0; 712 } 713 714 /** 715 * snd_ac97_pcm_double_rate_rules - set double rate constraints 716 * @runtime: the runtime of the ac97 front playback pcm 717 * 718 * Installs the hardware constraint rules to prevent using double rates and 719 * more than two channels at the same time. 720 */ 721 int snd_ac97_pcm_double_rate_rules(struct snd_pcm_runtime *runtime) 722 { 723 int err; 724 725 err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 726 double_rate_hw_constraint_rate, NULL, 727 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 728 if (err < 0) 729 return err; 730 err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 731 double_rate_hw_constraint_channels, NULL, 732 SNDRV_PCM_HW_PARAM_RATE, -1); 733 return err; 734 } 735 736 EXPORT_SYMBOL(snd_ac97_pcm_double_rate_rules); 737